A power-on and power-off anti-impact sound circuit

By designing a power switch-off anti-impact sound circuit, using a delay circuit and a transistor combination to control the MUTE pin of the amplifier chip, the impact sound problem of the high-level silent amplifier chip when switching on and off is solved, achieving the impact sound effect without impact sound and reducing the circuit cost.

CN116388701BActive Publication Date: 2025-07-25广州市迪士普音响科技有限公司
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Patent Information

Application Number
CN202310277150.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-20
Publication Date
2025-07-25
Estimated Expiration
2043-03-20

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    Figure CN116388701B_ABST
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Abstract

The present invention discloses a power-on and power-off anti-impact sound circuit, comprising: a first switch, a delay circuit, a power amplifier chip control circuit, a power amplifier chip and a speaker device; a first end of the first switch is connected to an external power supply, a second end of the first switch is respectively connected to an input end of the delay circuit and a first input end of the power amplifier chip control circuit, an output end of the delay circuit is connected to a PVCC pin of the power amplifier chip; a second input end of the power amplifier chip control circuit serves as a receiving end for receiving an external single-chip microcomputer signal, an output end of the power amplifier chip control circuit is connected to a MUTE pin of the power amplifier chip, and an output end of the power amplifier chip is connected to the speaker device. The present invention can control the MUTE pin of the power amplifier chip through an input signal of an external single-chip microcomputer when the first switch is turned on, so as to achieve no impact sound during power-on and power-off when the power amplifier chip has the function of muting with a high-level pin during power-on and power-off of the power amplifier chip.
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Description

Technical Field

[0001] The present invention relates to the technical field of anti-impact sound, and particularly to a power-on and power-off anti-impact sound circuit for a power supply. Background Art

[0002] When a device is powered on and off, due to the impact of the power supply on the device, an impact pulse signal will be generated at the output port of the device. Especially in a power amplifier circuit, a speaker will emit an impact sound. The commonly used solution in the prior art is to add an RC delay circuit to the mute pin of the power amplifier circuit. When the power supply powers on the RC delay circuit, the mute pin remains at a low level during the charging process, so that a power amplifier chip with a low-level mute function can prevent the impact sound of power-on and power-off of the power supply. However, for a power amplifier chip with a high-level mute function on its pin, the above circuit solution of the prior art cannot achieve the effect of preventing the impact sound caused by power-on and power-off. Summary of the Invention

[0003] An embodiment of the present invention provides a power-on and power-off anti-impact sound circuit for a power supply, which can effectively solve the problem in the prior art that for a power amplifier chip with a high-level mute function on its pin, the impact sound caused by power-on and power-off cannot be prevented.

[0004] An embodiment of the present invention provides a power-on and power-off anti-impact sound circuit for a power supply, including: a first switch, a delay circuit, a power amplifier chip control circuit, a power amplifier chip, and a speaker device;

[0005] The power amplifier chip control circuit includes a first diode, a second diode, a first resistor, a second resistor, a first capacitor, a first triode, a second triode, a third resistor, and a fourth resistor; the cathode of the first diode is connected to the cathode of the second diode, and the cathode of the second diode is also respectively connected to the first end of the first resistor and the first end of the first capacitor, and the cathode of the second diode serves as the first input end of the power amplifier chip control circuit; the second end of the first resistor is connected to the second end of the first capacitor, and the second end of the first resistor is also connected to the collector of the second triode, and the second end of the first resistor is the output end of the power amplifier chip control circuit;

[0006] The second port of the second resistor is connected to the base of the first triode, the collector of the first triode is connected to the first end of the third resistor, the second end of the third resistor serves as the second input end of the power amplifier chip control circuit, the emitter of the first triode is respectively connected to the first end of the fourth resistor and the base of the second triode, the second end of the fourth resistor is connected to the emitter of the second triode, and the emitter of the second triode is grounded;

[0007] The first end of the first switch is connected to an external power supply. The second end of the first switch is respectively connected to the input end of the delay circuit and the first input end of the power amplifier chip control circuit. The output end of the delay circuit is connected to the PVCC pin of the power amplifier chip;

[0008] The second input end of the power amplifier chip control circuit serves as the receiving end for receiving signals from an external single-chip microcomputer. The output end of the power amplifier chip control circuit is connected to the MUTE pin of the power amplifier chip. The output end of the power amplifier chip is connected to the speaker device.

[0009] Preferably, the delay circuit includes a third diode, a fifth resistor, and a second capacitor;

[0010] The positive electrode of the third diode serves as the input end of the delay circuit. The negative electrode of the third diode is connected to the first end of the fifth resistor. The second end of the fifth resistor is connected to the first end of the second capacitor. The second end of the second capacitor is grounded. The second end of the fifth resistor is the output end of the delay circuit.

[0011] Preferably, a first filter circuit is further included;

[0012] The first filter circuit includes a first inductor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and a sixth resistor;

[0013] The BSPR pin of the power amplifier chip is connected to the first end of the third capacitor. The second end of the third capacitor is respectively connected to the OUTPR pin of the power amplifier chip and the first end of the first inductor. The BSNR pin of the power amplifier chip is connected to the first end of the fourth capacitor. The second end of the fourth capacitor is respectively connected to the OUTNR pin of the power amplifier chip and the first end of the first inductor;

[0014] The second end of the first inductor is respectively connected to the first end of the fifth capacitor and the first end of the sixth capacitor. The first GND pin of the power amplifier chip is respectively connected to the second end of the fifth capacitor, the second end of the sixth capacitor, and the first end of the seventh capacitor. The second end of the seventh capacitor is connected to the first end of the sixth resistor. The second end of the sixth resistor is connected to the first end of the sixth capacitor, and the second end of the sixth resistor is connected to the first input end of the speaker device.

[0015] Preferably, a second filter circuit is further included;

[0016] The second filter circuit includes a second inductor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, and a seventh resistor;

[0017] The BSPL pin of the power amplifier chip is connected to the first end of the eighth capacitor. The second end of the eighth capacitor is respectively connected to the OUTPL pin of the power amplifier chip and the first end of the second inductor. The BSNL pin of the power amplifier chip is connected to the first end of the ninth capacitor. The second end of the ninth capacitor is respectively connected to the OUTNL pin of the power amplifier chip and the first end of the second inductor;

[0018] The second end of the second inductor is respectively connected to the first end of the tenth capacitor and the first end of the eleventh capacitor. The second GND pin of the power amplifier chip is respectively connected to the second end of the tenth capacitor, the second end of the eleventh capacitor, and the first end of the twelfth capacitor. The second end of the twelfth capacitor is connected to the first end of the seventh resistor. The second end of the seventh resistor is connected to the first end of the eleventh capacitor, and the second end of the seventh resistor is connected to the second input end of the speaker device.

[0019] Preferably, it further includes a thirteenth capacitor, a fourteenth capacitor, and a fifteenth capacitor;

[0020] The first PVCC pin, the second PVCC pin, and the AVCC pin of the power amplifier chip are respectively connected to the first end of the thirteenth capacitor. The AVCC pin of the power amplifier chip is also respectively connected to the first end of the fourteenth capacitor and the first end of the fifteenth capacitor. The first end of the fifteenth capacitor is also connected to an external power supply;

[0021] The second ends of the thirteenth capacitor, the fourteenth capacitor, and the fifteenth capacitor are respectively connected, and the second end of the thirteenth capacitor is grounded.

[0022] Preferably, it further includes: a sixteenth capacitor and a seventeenth capacitor;

[0023] The third PVCC pin of the power amplifier chip is respectively connected to the first end of the sixteenth capacitor and the first end of the seventeenth capacitor. The second ends of the sixteenth capacitor and the seventeenth capacitor are both grounded;

[0024] The fourth PVCC pin of the power amplifier chip is respectively connected to the first end of the seventeenth capacitor and the output end of the delay circuit.

[0025] Preferably, it further includes: an eighth resistor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a ninth resistor, and a tenth resistor;

[0026] The first end of the eighth resistor is used to receive an external audio signal. The second end of the eighth resistor is connected to the first end of the eighteenth capacitor. The second end of the eighteenth capacitor is connected to the RINP pin of the power amplifier chip. The nineteenth capacitor is connected to the RINN pin of the power amplifier chip;

[0027] The first end of the twentieth capacitor is connected to the PLIMIT pin of the power amplifier chip, the second end of the twentieth capacitor is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the first end of the tenth resistor, the second end of the tenth resistor is connected to the GVDD pin of the power amplifier chip, and the second end of the ninth resistor is also connected to the GAIN pin of the power amplifier chip.

[0028] By implementing the present invention, the following beneficial effects are achieved:

[0029] An embodiment of the present invention provides a power-on and power-off anti-impact sound circuit. The specific implementation principle is as follows: When the first switch is turned on, the power-on voltage of the external power supply passes through the first resistor and the first capacitor in the power amplifier chip control circuit and reaches the MUTE pin of the power amplifier chip. The MUTE pin is the mute function pin of the power amplifier chip. Due to the existence of the delay circuit, the power supply voltage of the power amplifier chip reaches the power amplifier chip later than the power-on voltage, so that when the power amplifier chip is powered on by the power supply, it can achieve mute first, and then the power amplifier chip is gradually powered on, thus realizing the function of muting when the power is turned on; When the power-on voltage of the external power supply reaches the MUTE pin of the power amplifier chip, the present invention controls the opening of the MUTE pin function through the diode and the triode in the power amplifier chip control circuit. Specifically, when the power-on voltage gradually rises and is greater than the conduction voltage of the first diode, the first diode conducts reversely, and the power-on voltage reaches the base of the first triode through the second resistor to turn on the first triode. The voltage of the collector of the first triode flows to the emitter. Because the emitter of the first triode is connected to the base of the second triode, the opening and closing of the second triode can be controlled by the voltage of the first triode; If the low-level signal is sent by the external single-chip microcomputer at this time, the second triode is cut off. Since the first resistor is used as the pull-up resistor, the MUTE pin of the power amplifier chip can achieve high-level mute function; If the high-level signal is sent by the external single-chip microcomputer at this time, the second triode conducts, and the voltage of the MUTE pin of the power amplifier chip will be pulled to the ground, and the power amplifier chip is in the normal working mode; That is, the present invention can control the MUTE pin of the power amplifier chip through the input signal of the external single-chip microcomputer when the first switch is turned on, so that when the power amplifier chip is powered on and the MUTE pin of the power amplifier chip has the high-level mute function, there is no impact sound when the power is turned on; When the first switch is turned off, when the power-off voltage of the external power supply gradually decreases and is less than the conduction voltage of the first diode, the first diode is cut off, so that the base of the first triode has no voltage, that is, the first triode is cut off (the collector voltage cannot reach the emitter). Therefore, the base of the second triode is cut off because there is no voltage flowing in. At this time, the MUTE pin of the power amplifier chip can achieve the high-level mute function due to the first resistor as the pull-up resistor, so that when the power amplifier chip is powered off and the MUTE pin of the power amplifier chip has the high-level mute function, there is no impact sound when the power is turned off. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 FIG. is a circuit connection diagram of a power-on and power-off anti-impact sound circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0031] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0032] As Figure 1 shown, it is a schematic circuit connection diagram of a power-on / off anti-impact sound circuit provided by an embodiment of the present invention;

[0033] The present invention is a power-on / off anti-impact sound circuit, including: a first switch S1, a delay circuit, a power amplifier chip control circuit, a power amplifier chip, and a speaker device;

[0034] The power amplifier chip control circuit includes a first diode D1, a second diode D2, a first resistor R1, a second resistor R2, a first capacitor C1, a first triode Q1, a second triode Q2, a third resistor R3, and a fourth resistor R4; the cathode of the first diode D1 is connected to the cathode of the second diode D2, and the cathode of the second diode D2 is also respectively connected to the first end of the first resistor R1 and the first end of the first capacitor C1, and the cathode of the second diode D2 serves as the first input end of the power amplifier chip control circuit; the second end of the first resistor R1 is connected to the second end of the first capacitor C1, and the second end of the first resistor R1 is also connected to the collector of the second triode Q2, and the second end of the first resistor R1 is the output end of the power amplifier chip control circuit;

[0035] The second port of the second resistor R2 is connected to the base of the first triode Q1, the collector of the first triode Q1 is connected to the first end of the third resistor R3, the second end of the third resistor R3 serves as the second input end of the power amplifier chip control circuit, the emitter of the first triode Q1 is respectively connected to the first end of the fourth resistor R4 and the base of the second triode Q2, the second end of the fourth resistor R4 is connected to the emitter of the second triode Q2, and the emitter of the second triode Q2 is grounded;

[0036] In a preferred embodiment, the first diode D1 is a zener diode, which plays a voltage stabilizing role.

[0037] In a preferred embodiment, the delay circuit includes a third diode, a fifth resistor, and a second capacitor;

[0038] The positive electrode of the third diode serves as the input terminal of the delay circuit. The negative electrode of the third diode is connected to the first end of the fifth resistor. The second end of the fifth resistor is connected to the first end of the second capacitor. The second end of the second capacitor is grounded. The second end of the fifth resistor is the output terminal of the delay circuit;

[0039] The first end of the first switch S1 is connected to an external power supply. The second end of the first switch S1 is respectively connected to the input terminal of the delay circuit and the first input terminal of the power amplifier chip control circuit. The output terminal of the delay circuit is connected to the PVCC pin of the power amplifier chip;

[0040] The second input terminal of the power amplifier chip control circuit serves as the receiving terminal for receiving external single-chip microcomputer signals. The output terminal of the power amplifier chip control circuit is connected to the MUTE pin of the power amplifier chip. The output terminal of the power amplifier chip is connected to a speaker device.

[0041] Specifically, the principle of preventing impact sound during power-on of the power supply of the present invention is as follows: When the first switch S1 is turned on, the power-on voltage of the external power supply passes through the first resistor R1 and the first capacitor C1 in the power amplifier chip control circuit and then reaches the MUTE pin of the power amplifier chip. And the MUTE pin is the mute function pin of the power amplifier chip. Due to the existence of the delay circuit, the power supply voltage of the power amplifier chip reaches the chip later than the power-on voltage, so that when the power supply powers on the power amplifier chip, it can achieve muting first, and then the power amplifier chip gradually powers on (it can be understood that the power supply voltage of the chip comes later than the mute voltage, that is, muting first and then powering on the chip, thus realizing the function of muting during power-on of the power supply.

[0042] In a preferred embodiment, both the first triode Q1 and the second triode Q2 are NPN transistors; it can be understood that the high-level mute voltage reaches the power amplifier chip first. At the same time, the 0 signal controlled by the single-chip microcomputer reaches the base of the second triode Q2 through the resistor R3 and the first triode Q1. Since there is no voltage at the base of the NPN transistor, the second triode is in the cut-off state, and the power amplifier chip is in the high-level mute mode, and no sound is emitted from the speaker.

[0043] The switch control principle of the power amplifier chip of the present invention is as follows: When the power-on voltage of the external power supply reaches the MUTE pin of the power amplifier chip, the present invention controls the opening of the function of the MUTE pin through the diodes and triodes in the power amplifier chip control circuit. Specifically, when the power-on voltage gradually rises and is greater than the conduction voltage of the first diode D1. In a preferred embodiment, the power-on voltage is 24V and the conduction voltage of the first diode D1 is 18V;

[0044] When the startup voltage of 24V gradually rises and is greater than the conduction voltage of 18V of the first diode D1, the first diode D1 conducts reversely, and the power startup voltage reaches the base of the first triode Q1 through the second resistor R2 to turn on the first triode Q1. The voltage at the collector of the first triode Q1 flows to the emitter. Because the emitter of the first triode is connected to the base of the second triode, the on and off of the second triode Q2 can be controlled by the voltage of the first triode Q1. If the low-level signal (0 signal) is sent by the external single-chip microcomputer at this time, the second triode Q2 is cut off. Since the first resistor R1 is used as a pull-up resistor, the MUTE pin of the power amplifier chip can achieve the high-level mute function. If the high-level signal (1 signal) is sent by the external single-chip microcomputer at this time, the second triode Q2 conducts, and the voltage of the MUTE pin of the power amplifier chip will be pulled to the ground, and the power amplifier chip is in the normal working mode. That is, the present invention can control the MUTE pin of the power amplifier chip through the input signal of the external single-chip microcomputer when the first switch S1 is turned on, so that when the power amplifier chip is turned on and the power amplifier chip has the high-level mute function of the pin, there is no impact sound when starting up.

[0045] The principle of preventing impact sound during power-off of the present invention is as follows: when the first switch S1 is turned off, the power-off voltage of the external power supply gradually decreases and is less than the conduction voltage of the first diode D1, the first diode D1 is cut off, so that there is no voltage at the base of the first triode Q1, that is, the first triode Q1 is cut off (the collector voltage cannot reach the emitter). Therefore, the base of the second triode Q2 is cut off because no voltage flows in. At this time, the MUTE pin of the power amplifier chip can achieve the high-level mute function due to the first resistor as a pull-up resistor, so that when the power amplifier chip is turned off and the power amplifier chip has the high-level mute function of the pin, there is no impact sound when turning off.

[0046] It can be understood that during power-off, due to the unidirectional conduction characteristic of the third diode D3 and the charge storage characteristic of the second capacitor C2, the power supply voltage of the power amplifier chip drops more slowly. That is, the power amplifier chip has been muted when the power supply voltage is lower than 18V, and the power-off impact sound will not be emitted from the speaker.

[0047] The circuit of the present invention can achieve no impact sound during startup and shutdown for power amplifier chips with high-level mute, and compared with the circuit using a relay as the main control device in the prior art, the circuit of the present invention can achieve anti-power impact sound during startup and shutdown of the power amplifier without using a relay, and the circuit cost is lower.

[0048] In a preferred embodiment, the present invention further includes a first filter circuit;

[0049] The first filtering circuit includes a first inductor L1, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, and a sixth resistor R6;

[0050] The BSPR pin of the power amplifier chip is connected to the first end of the third capacitor C3. The second end of the third capacitor C3 is respectively connected to the OUTPR pin of the power amplifier chip and the first end of the first inductor L1. The BSNR pin of the power amplifier chip is connected to the first end of the fourth capacitor C4. The second end of the fourth capacitor C4 is respectively connected to the OUTNR pin of the power amplifier chip and the first end of the first inductor L1;

[0051] The second end of the first inductor L1 is respectively connected to the first end of the fifth capacitor C5 and the first end of the sixth capacitor C6. The first GND pin of the power amplifier chip is respectively connected to the second end of the fifth capacitor C5, the second end of the sixth capacitor C6, and the first end of the seventh capacitor C7. The second end of the seventh capacitor C7 is connected to the first end of the sixth resistor R6. The second end of the sixth resistor R6 is connected to the first end of the sixth capacitor C6, and the second end of the sixth resistor R6 is connected to the first input terminal of the speaker device.

[0052] In a preferred embodiment, the present invention further includes a second filtering circuit;

[0053] The second filtering circuit includes a second inductor L2, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, and a seventh resistor R7;

[0054] The BSPL pin of the power amplifier chip is connected to the first end of the eighth capacitor C8. The second end of the eighth capacitor C8 is respectively connected to the OUTPL pin of the power amplifier chip and the first end of the second inductor L2. The BSNL pin of the power amplifier chip is connected to the first end of the ninth capacitor C9. The second end of the ninth capacitor C9 is respectively connected to the OUTNL pin of the power amplifier chip and the first end of the second inductor L2;

[0055] The second end of the second inductor L2 is respectively connected to the first end of the tenth capacitor C10 and the first end of the eleventh capacitor C11. The second GND pin of the power amplifier chip is respectively connected to the second end of the tenth capacitor C10, the second end of the eleventh capacitor C11, and the first end of the twelfth capacitor C12. The second end of the twelfth capacitor C12 is connected to the first end of the seventh resistor R7. The second end of the seventh resistor R7 is connected to the first end of the eleventh capacitor C11, and the second end of the seventh resistor R7 is connected to the second input terminal of the speaker device.

[0056] It should be noted that the inductors and capacitors in the first filter circuit and the second filter circuit of the present invention can be valued according to actual situations to better improve the filtering effect of the audio signal of the power amplifier chip.

[0057] In a preferred embodiment, the present invention further includes a thirteenth capacitor C13, a fourteenth capacitor C14, and a fifteenth capacitor C15;

[0058] The first PVCC pin, the second PVCC pin, and the AVCC pin of the power amplifier chip are respectively connected to the first end of the thirteenth capacitor C13. The AVCC pin of the power amplifier chip is also respectively connected to the first end of the fourteenth capacitor C14 and the first end of the fifteenth capacitor C15. The first end of the fifteenth capacitor C15 is also connected to an external power supply;

[0059] The second end of the thirteenth capacitor C13, the second end of the fourteenth capacitor C14, and the second end of the fifteenth capacitor C15 are respectively connected, and the second end of the thirteenth capacitor C13 is grounded.

[0060] In a preferred embodiment, the present invention further includes a sixteenth capacitor C16 and a seventeenth capacitor C17;

[0061] The third PVCC pin of the power amplifier chip is respectively connected to the first end of the sixteenth capacitor C16 and the first end of the seventeenth capacitor C17. The second end of the sixteenth capacitor C16 and the second end of the seventeenth capacitor C17 are both grounded;

[0062] The fourth PVCC pin of the power amplifier chip is respectively connected to the first end of the seventeenth capacitor C17 and the output end of the delay circuit.

[0063] In a preferred embodiment, the present invention further includes an eighth resistor R8, an eighteenth capacitor C18, a nineteenth capacitor C19, a twentieth capacitor C20, a ninth resistor R9, and a tenth resistor R10;

[0064] The first end of the eighth resistor R8 is used to receive an external audio signal. The second end of the eighth resistor R8 is connected to the first end of the eighteenth capacitor C18. The second end of the eighteenth capacitor C18 is connected to the RINP pin of the power amplifier chip. The nineteenth capacitor C19 is connected to the RINN pin of the power amplifier chip;

[0065] The first end of the twentieth capacitor C20 is connected to the PLIMIT pin of the power amplifier chip, the second end of the twentieth capacitor C20 is connected to the first end of the ninth resistor R9, the second end of the ninth resistor R9 is connected to the first end of the tenth resistor R10, the second end of the tenth resistor R10 is connected to the GVDD pin of the power amplifier chip, and the second end of the ninth resistor R9 is also connected to the GAIN pin of the power amplifier chip.

[0066] The above are the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications are also regarded as the protection scope of the present invention.

Claims

1. A power-on / off anti-impact sound circuit, characterized in that Comprising: A first switch, a delay circuit, a power amplifier chip control circuit, a power amplifier chip, and a speaker device; The power amplifier chip control circuit includes a first diode, a second diode, a first resistor, a second resistor, a first capacitor, a first triode, a second triode, a third resistor, and a fourth resistor; the cathode of the first diode is connected to the cathode of the second diode, the cathode of the second diode is also respectively connected to the first end of the first resistor and the first end of the first capacitor, and the cathode of the second diode serves as the first input end of the power amplifier chip control circuit; the second end of the first resistor is connected to the second end of the first capacitor, the second end of the first resistor is also connected to the collector of the second triode, and the second end of the first resistor is the output end of the power amplifier chip control circuit; the anode of the first diode is connected to the first port of the second resistor, and the anode of the second diode is connected to the first port of the second resistor; The second port of the second resistor is connected to the base of the first triode, the collector of the first triode is connected to the first end of the third resistor, the second end of the third resistor serves as the second input end of the power amplifier chip control circuit, the emitter of the first triode is respectively connected to the first end of the fourth resistor and the base of the second triode, the second end of the fourth resistor is connected to the emitter of the second triode, and the emitter of the second triode is grounded; The first end of the first switch is connected to an external power supply, the second end of the first switch is respectively connected to the input end of the delay circuit and the first input end of the power amplifier chip control circuit, and the output end of the delay circuit is connected to the PVCC pin of the power amplifier chip; The second input end of the power amplifier chip control circuit serves as the receiving end for receiving external single-chip microcomputer signals, the output end of the power amplifier chip control circuit is connected to the MUTE pin of the power amplifier chip, and the output end of the power amplifier chip is connected to the speaker device.

2. The power-on and power-off anti-impact sound circuit according to claim 1, characterized in that, The delay circuit includes a third diode, a fifth resistor, and a second capacitor; The positive electrode of the third diode serves as the input end of the delay circuit, the negative electrode of the third diode is connected to the first end of the fifth resistor, the second end of the fifth resistor is connected to the first end of the second capacitor, the second end of the second capacitor is grounded, and the second end of the fifth resistor is the output end of the delay circuit.

3. The power-on and power-off anti-impact sound circuit according to claim 1, characterized in that, It further includes a first filtering circuit; The first filtering circuit includes a first inductor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, and a sixth resistor; The BSPR pin of the power amplifier chip is connected to the first end of the third capacitor, the second end of the third capacitor is respectively connected to the OUTPR pin of the power amplifier chip and the first end of the first inductor, the BSNR pin of the power amplifier chip is connected to the first end of the fourth capacitor, and the second end of the fourth capacitor is respectively connected to the OUTNR pin of the power amplifier chip and the first end of the first inductor; The second end of the first inductor is respectively connected to the first end of the fifth capacitor and the first end of the sixth capacitor. The first GND pin of the power amplifier chip is respectively connected to the second end of the fifth capacitor, the second end of the sixth capacitor, and the first end of the seventh capacitor. The second end of the seventh capacitor is connected to the first end of the sixth resistor. The second end of the sixth resistor is connected to the first end of the sixth capacitor, and the second end of the sixth resistor is connected to the first input terminal of the speaker device.

4. The power-on and power-off anti-impact sound circuit according to claim 1, characterized in that, It further includes a second filtering circuit; The second filtering circuit includes a second inductor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, and a seventh resistor; The BSPL pin of the power amplifier chip is connected to the first end of the eighth capacitor. The second end of the eighth capacitor is respectively connected to the OUTPL pin of the power amplifier chip and the first end of the second inductor. The BSNL pin of the power amplifier chip is connected to the first end of the ninth capacitor. The second end of the ninth capacitor is respectively connected to the OUTNL pin of the power amplifier chip and the first end of the second inductor; The second end of the second inductor is respectively connected to the first end of the tenth capacitor and the first end of the eleventh capacitor. The second GND pin of the power amplifier chip is respectively connected to the second end of the tenth capacitor, the second end of the eleventh capacitor, and the first end of the twelfth capacitor. The second end of the twelfth capacitor is connected to the first end of the seventh resistor. The second end of the seventh resistor is connected to the first end of the eleventh capacitor, and the second end of the seventh resistor is connected to the second input terminal of the speaker device.

5. The power-on and power-off anti-impact sound circuit according to claim 1, characterized in that, It further includes a thirteenth capacitor, a fourteenth capacitor, and a fifteenth capacitor; The first PVCC pin, the second PVCC pin, and the AVCC pin of the power amplifier chip are respectively connected to the first end of the thirteenth capacitor. The AVCC pin of the power amplifier chip is also respectively connected to the first end of the fourteenth capacitor and the first end of the fifteenth capacitor. The first end of the fifteenth capacitor is also connected to an external power supply; The second ends of the thirteenth capacitor, the fourteenth capacitor, and the fifteenth capacitor are respectively connected, and the second end of the thirteenth capacitor is grounded.

6. The power-on and power-off anti-impact sound circuit according to claim 1, characterized in that, It further includes: A sixteenth capacitor and a seventeenth capacitor; The third PVCC pin of the power amplifier chip is respectively connected to the first end of the sixteenth capacitor and the first end of the seventeenth capacitor. The second ends of the sixteenth capacitor and the seventeenth capacitor are both grounded; The fourth PVCC pin of the power amplifier chip is connected to the first end of the seventeenth capacitor and the output terminal of the delay circuit respectively.

7. The power-on and power-off anti-impact sound circuit according to claim 1, wherein, It further includes: An eighth resistor, an eighteenth capacitor, a nineteenth capacitor, a twentieth capacitor, a ninth resistor, and a tenth resistor; The first end of the eighth resistor is used to receive an external audio signal. The second end of the eighth resistor is connected to the first end of the eighteenth capacitor. The second end of the eighteenth capacitor is connected to the RINP pin of the power amplifier chip. The nineteenth capacitor is connected to the RINN pin of the power amplifier chip; The first end of the twentieth capacitor is connected to the PLIMIT pin of the power amplifier chip, the second end of the twentieth capacitor is connected to the first end of the ninth resistor, the second end of the ninth resistor is connected to the first end of the tenth resistor, the second end of the tenth resistor is connected to the GVDD pin of the power amplifier chip, and the second end of the ninth resistor is also connected to the GAIN pin of the power amplifier chip.

Citation Information

Patent Citations

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