Signal processing circuit, chip, circuit board assembly and radio frequency transceiver

Abstract

The present invention relates to the field of analog integrated circuit technology, and discloses a signal processing circuit, chip, circuit board assembly, and radio frequency transceiver. The signal processing circuit includes a resistor array, a mixer, an analog-to-digital converter, a digital-to-analog converter, and an amplifier; the output of the resistor array is connected to the input of the mixer, and the output of the analog-to-digital converter is connected to the input of the digital-to-analog converter; the input of the resistor array is connected to the input of the analog-to-digital converter, and the connection forms a radio frequency signal input; the output of the mixer is connected to the output of the digital-to-analog converter, and the connection forms a residual signal output, which is connected to the input of the amplifier; the resistor array and the mixer form a first branch, the analog-to-digital converter and the digital-to-analog converter form a second branch, and the residual signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively. It can shorten the path of the radio frequency and analog signals, optimize linearity, and reduce the introduction of noise.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of analog integrated circuits, and in particular to a signal processing circuit, a chip, a circuit board assembly, and a radio frequency transceiver. Background Art

[0002] With the development of wireless communication systems, the signal bandwidth of analog channels has increased significantly. This has led to higher performance requirements for RF transceivers. Modern RF transceivers typically use a zero-IF architecture. In this architecture, a mixer at the RF end converts the RF signal into an intermediate frequency (IF) analog signal. The analog signal at the IF end is processed by the IF signal processing circuit and then digitized by the analog-to-digital converter (ADC).

[0003] However, in this traditional RF transceiver architecture, the RF and analog signals need to travel a long path, and each cascade circuit introduces a large amount of noise and nonlinear factors, which may lead to overall performance deterioration. Summary of the Invention

[0004] The purpose of the embodiments of the present invention is to provide a signal processing circuit, chip, circuit board assembly and radio frequency transceiver to shorten the path of radio frequency and analog signals, reduce the introduction of noise and optimize linearity.

[0005] To achieve the above-mentioned objectives, an embodiment of the present invention provides a signal processing circuit, comprising: a resistor array, a mixer, an analog-to-digital converter, a digital-to-analog converter, and an amplifier; the output end of the resistor array is connected to the input end of the mixer, and the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter; the input end of the resistor array is connected to the input end of the analog-to-digital converter, and the connection forms a radio frequency signal input end; the output end of the mixer is connected to the output end of the digital-to-analog converter, and the connection forms a residue signal output end, and the residue signal output end is connected to the input end of the amplifier; wherein the resistor array and the mixer form a first branch, the analog-to-digital converter and the digital-to-analog converter form a second branch, and the residue signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively.

[0006] To achieve the above objectives, an embodiment of the present invention provides a chip including the above signal processing circuit.

[0007] To achieve the above objectives, an embodiment of the present invention provides a circuit board assembly including the above signal processing circuit.

[0008] To achieve the above objectives, an embodiment of the present invention provides a radio frequency transceiver including the above chip or circuit board assembly.

[0009] The signal processing circuit provided by the embodiments of the present invention significantly streamlines the architecture of a radio frequency receiver. Compared to a signal processing method in which the radio frequency is first processed into an intermediate frequency analog signal and then passed through an intermediate frequency processing circuit, the radio frequency can be processed solely by the signal processing circuit provided by the embodiments of the present invention. This significantly shortens the processing paths for the radio frequency and analog signals, reduces the introduction of noise in the processing paths, and thus optimizes the linearity of the communication system's transmit link. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings, and these exemplifications do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0011] Figure 1 is a schematic structural diagram of a signal processing circuit according to an embodiment of the present invention;

[0012] Figure 2 It is a schematic diagram of the structure of a traditional zero-IF receiver;

[0013] Figure 3 is a structural diagram of a signal processing circuit according to another embodiment of the present invention;

[0014] Figure 4 FIG. 4 is a schematic structural diagram of a low-pass filter circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, each embodiment of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be understood by those skilled in the art that in each embodiment of the present invention, many technical details are provided to enable the reader to better understand the present invention. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present invention can be implemented. The division of the following embodiments is for convenience of description and should not constitute any limitation on the specific implementation of the present invention. The various embodiments can be combined and referenced with each other under the premise that there is no contradiction.

[0016] As used herein, the term "comprises" refers to the presence of a feature, step, or element, but does not exclude the presence or addition of one or more other features, steps, or elements. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terminology used herein is for the purpose of describing specific embodiments only and is not intended to limit this application.

[0017] In addition, in the description of the embodiments of the present application, the terms "first", "second", "third", etc. are only used for descriptive purposes and to distinguish similar objects. There is no order of precedence between the two, and they cannot be understood as indicating or implying relative importance.

[0018] One embodiment of the present invention relates to a signal processing circuit, the circuit structure of the signal processing circuit is shown in FIG. Figure 1 shown.

[0019] In this embodiment, a signal processing circuit includes: a resistor array, a mixer, an analog-to-digital converter, a digital-to-analog converter, and an amplifier; the output end of the resistor array is connected to the input end of the mixer, and the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter; the input end of the resistor array is connected to the input end of the analog-to-digital converter, and the connection forms a radio frequency signal input end; the output end of the mixer is connected to the output end of the digital-to-analog converter, and the connection forms a residual signal output end, and the residual signal output end is connected to the input end of the amplifier; wherein the resistor array and the mixer form a first branch, the analog-to-digital converter and the digital-to-analog converter form a second branch, and the residual signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively.

[0020] Figure 2 Figure 1 shows the architecture of a traditional zero-IF receiver, which consists of a resistor array, a mixer, and a cascaded amplifier. Figure 2 The figure shows the resistor array, mixer, amplifier, RF signal input terminal and IF signal input terminal. The mixer converts the RF signal into an IF analog signal at the RF terminal. The analog signal at the IF terminal is processed by the IF signal processing circuit and then quantized into a digital signal by the analog-to-digital converter (ADC). Figure 2 In the RF receiver of the shown architecture, the paths that the RF and analog signals need to pass through are very long, and each cascade circuit introduces a large amount of noise and nonlinear factors, which may lead to deterioration of the overall performance.

[0021] In response to the above problems, this application proposes a signal processing circuit. The following is a detailed description of the implementation details of the signal processing circuit in this embodiment. The following content is only for the convenience of understanding the implementation details of this solution and is not necessary for the implementation of this solution. Figure 1As shown, the signal processing circuit may include the following components: a resistor array 101, a mixer 102, an analog-to-digital converter 103, a digital-to-analog converter 104, and an amplifier 105; the output end of the resistor array 101 is connected to the input end of the mixer 102, the output end of the analog-to-digital converter 103 is connected to the input end of the digital-to-analog converter 104; the input end of the resistor array 101 is connected to the input end of the analog-to-digital converter 103, and the connection forms a radio frequency signal input end, as shown in FIG. Figure 1 As shown in ; the output end of the mixer 102 is connected to the output end of the digital-to-analog converter 104, and the connection forms a residue signal output end, and the residue signal output end is connected to the input end of the amplifier 105; wherein, the resistor array 101 and the mixer 102 form a first branch, the analog-to-digital converter 103 and the digital-to-analog converter 104 form a second branch, and the residue signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively.

[0022] In actual implementation, the above-mentioned residual signal, i.e., the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch, can also be obtained by providing a subtractor at the connection between the output end of the mixer and the output end of the digital-to-analog converter to perform the difference between the intermediate frequency signals obtained by processing the first branch and the second branch. The structural diagram of the signal processing circuit in which a subtractor is provided at the connection between the output end of the mixer and the output end of the digital-to-analog converter is shown in FIG. Figure 3 shown.

[0023] In addition, when the obtained residual signal is a current signal, the differential signal can generally be connected in reverse to achieve the difference between the two branch signals.

[0024] In one example, when both the first branch and the second branch are configured as voltage-type output circuits, the signal processing circuit may further include a voltage-current conversion module ( Figure 1 (not shown), and the current conversion module is connected between the residual signal output terminal and the input terminal of the amplifier 105. The voltage output from the residual signal output terminal can be converted into a current signal by the voltage-to-current conversion module provided in this example.

[0025] In another example, the first branch and the second branch are configured such that the signal gain of the first branch matches the signal gain of the second branch, and the signal delay of the first branch matches the signal delay of the second branch. Gain and delay matching can reduce the peak value of the residual signal and prevent overload of the subsequent amplifier. In actual implementation, gain and delay matching can be achieved by adjusting the impedance of the resistor array or the mixing characteristics of the mixer.

[0026] The signal processing circuit of this embodiment may further include an analog-to-digital conversion module; the analog-to-digital conversion module includes a single analog-to-digital converter or multiple analog-to-digital converters connected in series; the input of the analog-to-digital conversion module is connected to the output of the amplifier, and the output of the analog-to-digital conversion module is used to output the intermediate frequency signal converted into digital form. The analog-to-digital conversion module is capable of ultimately converting the processed signal into digital form.

[0027] The signal processing circuit provided in this embodiment can be applied in devices such as ultra-wide bandwidth radio frequency transceivers, analog-to-digital converters, and active RC filters.

[0028] Those skilled in the art should understand that the amplifier in this application is not limited to the above structure, and amplifiers with other structures that can achieve signal amplification and meet the requirements of the signal processing circuit involved in this embodiment are also applicable to this embodiment.

[0029] The signal processing circuit provided in this embodiment significantly simplifies the architecture of the RF receiver. Compared to a signal processing method in which the RF signal is first processed into an intermediate frequency analog signal and then passed through an intermediate frequency processing circuit, the RF signal is processed solely by the signal processing circuit provided in the embodiment of the present invention. This significantly shortens the processing paths for the RF and analog signals, reduces the introduction of noise in the processing paths, and thus optimizes the linearity of the communication system's transmit link.

[0030] Another embodiment of the present invention relates to a signal processing circuit. The signal processing circuit of this embodiment is improved based on the signal processing circuit of the previous embodiment.

[0031] With the rapid development of communication technology, wide bandwidth performance has become increasingly important in wireless communication systems. To expand signal bandwidth, a typical architecture for wideband analog signal processing circuits has emerged. In this architecture, the wide bandwidth design results in an excessively large filter Q factor. When the Q factor exceeds 0.707, a peak appears in the output characteristic curve, and the peak value increases with increasing Q. This increase in peak value also degrades in-band flatness performance. This indicates a trade-off between signal bandwidth and in-band flatness. In-band flatness measures the amplitude variation of each frequency point in the in-band signal relative to the center frequency and is a key indicator of linear distortion in the transmit chain of a communication system. Therefore, a loss of in-band flatness is unacceptable in many wireless communication applications.

[0032] The implementation details of the signal processing circuit in this embodiment are described in detail below. The following content is only for facilitating understanding of the implementation details of this solution and is not necessary for implementing this solution.

[0033] In this embodiment, a signal processing circuit includes: a resistor array, a mixer, an analog-to-digital converter, a digital-to-analog converter, and an amplifier; the output end of the resistor array is connected to the input end of the mixer, and the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter; the input end of the resistor array is connected to the input end of the analog-to-digital converter, and the connection forms a radio frequency signal input end; the output end of the mixer is connected to the output end of the digital-to-analog converter, and the connection forms a residual signal output end, and the residual signal output end is connected to the input end of the amplifier; wherein the resistor array and the mixer form a first branch, the analog-to-digital converter and the digital-to-analog converter form a second branch, and the residual signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively.

[0034] In this embodiment, the signal processing circuit further includes: a low-pass filter circuit. The low-pass filter circuit includes: a grounded capacitor, a transconductance amplifier, a transimpedance amplifier, and a jumper resistor; the input end of the transconductance amplifier is connected to the residual signal output end, the output end of the transconductance amplifier is connected to the input end of the transimpedance amplifier, and the output end of the transimpedance amplifier is used to output the intermediate frequency signal; the first end of the grounded capacitor is connected to the input end of the transconductance amplifier, and the second end of the grounded capacitor is grounded; the first end of the jumper resistor is connected to the input end of the transconductance amplifier, and the second end of the jumper resistor is connected to the output end of the transimpedance amplifier.

[0035] The general expression for a 2nd order low pass filter is Based on this, Kirchhoff's Current Law (KCL) can be used to derive the low-pass filtering form in this structure as follows:

[0036]

[0037] Then we can deduce that the bandwidth of the circuit is

[0038]

[0039] According to the above expression, it can be seen that the bandwidth of the low-pass filter circuit structure provided by this embodiment can be significantly widened.

[0040] In addition to the above structure, a feedback resistor (R1) may be added to the low-pass filter circuit. The first end of the feedback resistor is connected to the input of the transimpedance amplifier, and the second end of the feedback resistor is connected to the output of the transimpedance amplifier. Adding the feedback resistor to the low-pass filter circuit can also widen the bandwidth.

[0041] The low-pass filter circuit may further include a feedback capacitor; the feedback capacitor is connected in parallel with the jumper resistor.

[0042] In the case where both the first branch and the second branch are configured as voltage-type output circuits, the low-pass filter circuit may further include an input resistor, and the input end of the transconductance amplifier is connected to the residual signal output end via the input resistor. Figure 4 shown. Figure 4 , a transconductance amplifier (-Gm) with an amplification factor of -Gm, an operational amplifier (-A) with an amplification factor of -A, a grounding capacitor (C0), and a jumper resistor (R2) are shown. The input end of the transconductance amplifier -Gm is connected to the residual signal output end, the output end of the transconductance amplifier -Gm is connected to the input end of the operational amplifier -A, and the output end of the operational amplifier -A is used to output the processed intermediate frequency signal; the first end of the grounding capacitor C0 is connected to the input end of the transconductance amplifier -Gm, and the second end of the grounding capacitor C0 is grounded; the first end of the jumper resistor is connected to the input end of the transconductance amplifier -Gm, and the second end of the jumper resistor R2 is connected to the output end of the operational amplifier -A.

[0043] The low-pass filter circuit includes a feedback capacitor (C2) such as Figure 4 In the low-pass filter circuit without adding this feedback capacitor, the expression of Q value is

[0044]

[0045] The Q value is an indicator that reflects the in-band flatness. As can be seen from the above expression, the larger the bandwidth, the larger the Q value will be. That is, the larger the bandwidth, the worse the in-band flatness will be. To solve this problem, the following can be added to the above low-pass filter circuit: Figure 4 The feedback capacitor C2 is shown in Figure 1. The low-pass filter circuit with feedback capacitor C2 is added. The expression of Q value can be obtained by deducing and normalizing the KCL formula as follows:

[0046]

[0047] In the above Q-value expression, adding the factor (1 + GmR1) to the denominator lowers the Q value, thereby reducing the Q value while maintaining the same bandwidth. This significantly improves in-band flatness while maintaining a high bandwidth. Adding feedback capacitance to the low-pass filter circuit decouples bandwidth and flatness, maintaining bandwidth while avoiding a decrease in flatness.

[0048] The low-pass filter circuit includes an input resistor as shown in the figure. Figure 4The input resistor shown can convert the voltage signal input to the low-pass filter circuit into a current when both the first branch and the second branch are configured as voltage-type output circuits.

[0049] In this embodiment, in addition to adding an input resistor to the low-pass filter circuit for converting the voltage signal output from the residual signal output terminal into a current signal, when both the first branch and the second branch are configured as voltage-type output circuits, the signal processing circuit involved in this embodiment may further add a voltage-to-current conversion module ( Figure 1 The current conversion module is connected between the residual signal output terminal and the input terminal of the amplifier. The voltage-current conversion module can also be used to convert the voltage signal output by the residual signal output terminal into a current signal.

[0050] In the actual implementation of the signal processing circuit involved in this embodiment, in order to achieve the required bandwidth and satisfactory in-band flatness, the values ​​of the resistors and capacitors involved in the circuit structure of the signal processing circuit can be determined by the following steps. First, the jumper resistor can be determined by considering the equivalent input impedance of the previous stage and the full-link gain distribution; second, based on the required bandwidth index, the product of the feedback resistor, jumper resistor, ground capacitor, and shunt capacitor is determined; after converting the flatness index to the Q value, the value of the feedback resistor can be obtained; the values ​​of the ground capacitor and shunt capacitor can be appropriately adjusted according to the loop stability, noise, linearity and other indicators of the application scenario.

[0051] In this embodiment, the signal processing circuit greatly simplifies the architecture of the RF receiver. Compared to the signal processing method in which the RF is first processed into an intermediate frequency analog signal and then processed by the intermediate frequency processing circuit, the RF can be processed only by the signal processing circuit provided by this embodiment. This greatly shortens the processing path of the RF and analog signals, can reduce the introduction of noise in the processing path, and thus optimize the linearity of the communication system transmission link. In addition, this embodiment adds a low-pass filter circuit to the signal processing circuit, which can greatly widen the bandwidth under the action of the amplifier gain and transconductance. Adding feedback capacitance to the low-pass filter circuit can decouple bandwidth and flatness, thereby avoiding a decrease in flatness while ensuring a higher bandwidth. Compared with traditional architectures, the in-band flatness can be significantly improved.

[0052] It is worth mentioning that the above-mentioned embodiments of the present invention do not introduce units that are not closely related to solving the technical problem proposed by the present invention, but this does not mean that there are no other units in this embodiment.

[0053] One embodiment of the present invention relates to a chip including the aforementioned signal processing circuit. The signal processing circuit in this chip significantly streamlines the architecture of a radio frequency receiver. Compared to a signal processing method in which the radio frequency is first processed into an intermediate frequency analog signal and then passed through an intermediate frequency processing circuit, the radio frequency is processed solely by the signal processing circuit in the chip provided by this embodiment of the present invention. This significantly shortens the processing paths for the radio frequency and analog signals, reduces the introduction of noise into the processing paths, and thus optimizes the linearity of the communication system's transmit link.

[0054] Another embodiment of the present invention relates to a circuit board assembly including the aforementioned signal processing circuit. The signal processing circuit in the circuit board assembly provided in this embodiment significantly streamlines the architecture of a radio frequency receiver. Compared to a signal processing method in which the radio frequency is first processed into an intermediate frequency analog signal and then passed through an intermediate frequency processing circuit, the radio frequency is processed solely by the signal processing circuit in the circuit board assembly provided in this embodiment of the present invention. This significantly shortens the processing paths for the radio frequency and analog signals, reduces the introduction of noise into the processing paths, and thereby optimizes the linearity of the communication system's transmit link.

[0055] Another embodiment of the present invention relates to a radio frequency transceiver including the aforementioned chip or circuit board assembly. Compared to traditional radio frequency transceivers, the radio frequency transceiver provided in this embodiment has a significantly streamlined architecture. Compared to signal processing methods where the radio frequency is first processed into an intermediate frequency analog signal and then passed through an intermediate frequency processing circuit, the radio frequency is processed solely by the signal processing circuit within the radio frequency transceiver provided in this embodiment of the present invention. This significantly shortens the processing paths for the radio frequency and analog signals, reduces the introduction of noise into the processing paths, and thereby optimizes the linearity of the communication system's transmit link.

[0056] The above embodiments are provided to those skilled in the art for implementing and using the present invention. Those skilled in the art may make various modifications or changes to the above embodiments without departing from the inventive concept of the present application. Therefore, the protection scope of the present invention is not limited to the above embodiments, but should conform to the maximum scope of the innovative features mentioned in the claims.

Claims

1. A signal processing circuit, characterized in that: include: resistor arrays, mixers, analog-to-digital converters, digital-to-analog converters, and amplifiers; The output end of the resistor array is connected to the input end of the mixer, and the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter; The input end of the resistor array is connected to the input end of the analog-to-digital converter, and the connection forms a radio frequency signal input end; the output end of the mixer is connected to the output end of the digital-to-analog converter, and the connection forms a residual signal output end, and the residual signal output end is connected to the input end of the amplifier; The resistor array and the mixer form a first branch, the analog-to-digital converter and the digital-to-analog converter form a second branch, and the residual signal refers to the difference between the intermediate frequency signals obtained after the radio frequency signal is processed by the first branch and the second branch respectively.

2. The signal processing circuit according to claim 1, wherein: The signal processing circuit further includes: a low-pass filter circuit; the low-pass filter circuit includes: a grounding capacitor, a transconductance amplifier, a transimpedance amplifier, and a jumper resistor; The input end of the transconductance amplifier is connected to the residual signal output end, the output end of the transconductance amplifier is connected to the input end of the transimpedance amplifier, and the output end of the transimpedance amplifier is used to output the intermediate frequency signal; The first end of the grounding capacitor is connected to the input end of the transconductance amplifier, and the second end of the grounding capacitor is grounded; the first end of the jumper resistor is connected to the input end of the transconductance amplifier, and the second end of the jumper resistor is connected to the output end of the transimpedance amplifier.

3. The signal processing circuit according to claim 2, wherein: The low-pass filter circuit further includes a feedback capacitor; the feedback capacitor is connected in parallel with the jumper resistor.

4. The signal processing circuit according to claim 2 or 3, characterized in that: In the case where both the first branch and the second branch are configured as voltage-type output circuits, the low-pass filter circuit further includes an input resistor, and the input end of the transconductance amplifier is connected to the residual signal output end through the input resistor.

5. The signal processing circuit according to any one of claims 1 to 3, characterized in that: In the case where both the first branch and the second branch are configured as voltage-type output circuits, the signal processing circuit further includes a voltage-current conversion module, and the voltage-current conversion module is connected between the residual signal output terminal and the input terminal of the amplifier.

6. The signal processing circuit according to claim 1, wherein: The first branch and the second branch are configured such that: a signal gain of the first branch matches a signal gain of the second branch, and a signal delay of the first branch matches a signal delay of the second branch.

7. The signal processing circuit according to claim 1, wherein: The signal processing circuit further comprises: an analog-to-digital conversion module; the analog-to-digital conversion module comprises one analog-to-digital converter or a plurality of analog-to-digital converters connected in series; The input end of the analog-to-digital conversion module is connected to the output end of the amplifier, and the output end of the analog-to-digital conversion module is used to output the intermediate frequency signal converted into a digital form.

8. A chip, characterized in that: include: The signal processing circuit according to any one of claims 1 to 7.

9. A circuit board assembly, characterized in that: include: The signal processing circuit according to any one of claims 1 to 7.

10. A radio frequency transceiver, characterized in that: include: The chip according to claim 8 or the circuit board assembly according to claim 9.

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