Driving method and device of light-emitting substrate, driving chip and timing control board

Abstract

The present disclosure provides a driving method of a light-emitting substrate. The driving method comprises: receiving a frequency modulation signal; generating a frequency modulation synchronization signal corresponding to the frequency modulation signal; in a case where a rising edge of the frequency modulation synchronization signal is in a write-in stage of a light-emitting unit group writing in a last frame period, generating an auxiliary synchronization signal; based on the auxiliary synchronization signal, controlling a write-in stage of a first light-emitting unit group writing in a current frame period to be staggered with a write-in stage of a last light-emitting unit group in the previous frame period; wherein the last light-emitting unit group in the previous frame period and the first light-emitting unit group in the current frame period belong to the same light-emitting unit group.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular to a driving method and device of a light-emitting substrate, a driving chip and a timing control board. BACKGROUND

[0002] With the continuous development of electronic products, the display frequency of display devices is also continuously improved. At present, more and more display devices also have the function of self-adaptive adjustment of display frequency. SUMMARY

[0003] The purpose of some embodiments of the present disclosure is to provide a driving method and device of a light-emitting substrate, a driving chip and a timing control board to improve the display effect of a display device.

[0004] To achieve the above purpose, some embodiments of the present disclosure provide the following technical solutions:

[0005] In one aspect, a driving method of a light-emitting substrate is provided. The light-emitting substrate includes at least one light-emitting unit group, N light-emitting unit groups in a light-emitting unit group are respectively electrically connected with N first signal lines; M light-emitting units in a light-emitting unit group are respectively electrically connected with M second signal lines, N light-emitting unit groups in the same light-emitting unit group are connected with the same M second signal lines, and N and M are positive integers.

[0006] In a frame period, the N first signal lines provide driving signals to the N light-emitting unit groups in time, so that the N light-emitting unit groups are in a write-in stage in time; in the write-in stage of a light-emitting unit group, the M second signal lines simultaneously provide light-emitting data signals to the M light-emitting units in the light-emitting unit group.

[0007] The driving method includes: receiving a frequency modulation signal; generating a frequency modulation synchronization signal corresponding to the frequency modulation signal; in the case that a rising edge of the frequency modulation synchronization signal is in a write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of a previous frame period, generating an auxiliary synchronization signal; based on the auxiliary synchronization signal, controlling the write-in stage of a first light-emitting unit group writing in light-emitting data signals in a current frame period to be staggered with the write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of the previous frame period; wherein the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and the first light-emitting unit group writing in light-emitting data signals in the current frame period belong to the same light-emitting unit group.

[0008] The driving method of the light-emitting substrate provided by the present disclosure generates an auxiliary synchronization signal to stagger the write stage of the light-emitting unit group ZE in the current frame period II, which is the first to write the light-emitting data signal, with the write stage of the light-emitting unit group ZE in the previous frame period I, which is the last to write the light-emitting data signal, when the rising edge of the frequency-modulated synchronization signal TP is in the write stage of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period I, thereby avoiding the problem of abnormal backlight caused by the light-emitting data signal being charged incorrectly, and improving the display effect of the display device.

[0009] In some embodiments, the step of generating the auxiliary synchronization signal includes generating the auxiliary synchronization signal whose rising edge is after the write stage of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period.

[0010] In some embodiments, the step of generating the auxiliary synchronization signal whose rising edge is after the write stage of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period, includes obtaining the starting write time point and the preset write duration of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period; calculating a target time point based on the starting write time point and the preset write duration of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period; the time interval between the target time point and the starting write time point of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period, is greater than the preset write duration; and generating the auxiliary synchronization signal whose rising edge is at the target time point.

[0011] In some embodiments, the step of calculating the target time point based on the starting write time point and the preset write duration of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period, includes calculating a target time interval between the starting write time points of two adjacent light-emitting unit groups that write the light-emitting data signal in the previous frame period; and obtaining the target time point by adding the target time interval to the starting write time point of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period.

[0012] In some embodiments, the step of generating the auxiliary synchronization signal whose rising edge is after the write stage of the light-emitting unit group, which is the last to write the light-emitting data signal in the previous frame period, also includes taking the signal duration of the frequency-modulated synchronization signal as the signal duration of the auxiliary synchronization signal.

[0013] In some embodiments, the step of controlling the write stage of the first group of light emitting units in the current frame period to be staggered with the write stage of the last group of light emitting units in the previous frame period based on the auxiliary synchronization signal comprises: controlling the first group of light emitting units in the current frame period to start writing the light emitting data signal when the rising edge of the auxiliary synchronization signal arrives.

[0014] In some embodiments, the driving method further comprises: updating the light emitting data signal after the write stage of the last group of light emitting units in the previous frame period and before the write stage of the first group of light emitting units in the current frame period; and providing the updated light emitting data signal to the first group of light emitting units in the current frame period by using the M second signal lines during the write stage of the first group of light emitting units in the current frame period.

[0015] In some embodiments, the first group of light emitting units in the current frame period is the next group of light emitting units after the last group of light emitting units in the previous frame period in the writing sequence of the corresponding group of light emitting units.

[0016] In another aspect, a driving device of a light emitting substrate is provided. The light emitting substrate comprises at least one group of light emitting units, N groups of light emitting units in one group of light emitting units are respectively electrically connected to N first signal lines; M light emitting units in one group of light emitting units are respectively electrically connected to M second signal lines, N groups of light emitting units in the same group of light emitting units are connected to the same M second signal lines, and N and M are positive integers.

[0017] In a frame period, the N first signal lines provide driving signals to the N groups of light emitting units in time division manner, so that the N groups of light emitting units are in write stage in time division manner; and in the write stage of one group of light emitting units, the M second signal lines provide light emitting data signals to the M light emitting units in the group of light emitting units simultaneously.

[0018] The driving device of the light-emitting substrate comprises: a receiving module configured to receive a frequency modulation signal; a first generating module configured to generate a frequency modulation synchronization signal corresponding to the frequency modulation signal; a second generating module configured to generate an auxiliary synchronization signal in a case where a rising edge of the frequency modulation synchronization signal is in a write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of a previous frame period; and a control module configured to control the write-in stage of the first light-emitting unit group writing in light-emitting data signals in a current frame period to be staggered with the write-in stage of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period based on the auxiliary synchronization signal, wherein the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and the first light-emitting unit group writing in light-emitting data signals in the current frame period belong to the same light-emitting unit group.

[0019] In some embodiments, the second generating module is further configured to generate the auxiliary synchronization signal with the rising edge after the write-in stage of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period.

[0020] In some embodiments, the second generating module comprises: an obtaining submodule configured to obtain a starting write-in time point of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and a preset write-in duration; a calculation submodule configured to calculate a target time point based on the starting write-in time point of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and the preset write-in duration, wherein a time interval between the target time point and the starting write-in time point of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period is greater than the preset write-in duration; and a generating submodule configured to generate the auxiliary synchronization signal with the rising edge at the target time point.

[0021] In some embodiments, the calculation submodule comprises: a first calculation unit configured to calculate a target time interval between starting write-in time points of two light-emitting unit groups writing in light-emitting data signals in the previous frame period; and a second calculation unit configured to obtain the target time point by adding the target time interval to the starting write-in time point of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period.

[0022] In some embodiments, the second generating module is further configured to take a signal duration of the frequency modulation synchronization signal as a signal duration of the auxiliary synchronization signal.

[0023] In some embodiments, the control module is further configured to control the light-emitting unit group writing in light-emitting data signals in the current frame period to start writing in light-emitting data signals when the rising edge of the auxiliary synchronization signal arrives.

[0024] In some embodiments, the driving apparatus further comprises: an updating module configured to update the light emitting data signal after a write stage of the group of light emitting units writing the light emitting data signal at the end of the previous frame period and before a write stage of the group of light emitting units writing the light emitting data signal at the beginning of the current frame period; and a providing module configured to provide the updated light emitting data signal to the group of light emitting units writing the light emitting data signal at the beginning of the current frame period using the M second signal lines during the write stage of the group of light emitting units writing the light emitting data signal at the beginning of the current frame period.

[0025] In some embodiments, the group of light emitting units writing the light emitting data signal at the beginning of the current frame period is a next group of light emitting units in the writing sequence of the group of light emitting units writing the light emitting data signal at the end of the previous frame period.

[0026] In another aspect, a driving chip is provided. The driving chip is configured to drive a light emitting substrate to emit light. The light emitting substrate comprises at least one group of light emitting units, N groups of light emitting units in one group of light emitting units are respectively electrically connected to N first signal lines; M light emitting units in one group of light emitting units are respectively electrically connected to M second signal lines, and N groups of light emitting units in the same group of light emitting units are connected to the same M second signal lines, and the N and the M are positive integers.

[0027] In a frame period, the N first signal lines provide driving signals to the N groups of light emitting units in time to make the N groups of light emitting units in time to be in a write stage; and in the write stage of one group of light emitting units, the M second signal lines simultaneously provide light emitting data signals to the M light emitting units in the group of light emitting units.

[0028] The driving chip comprises a receiver and a processing module electrically connected to each other. The processing module is further electrically connected to the light emitting substrate. The receiver is configured to receive a frequency-modulated synchronization signal. The processing module is configured to generate an auxiliary synchronization signal in a case that a rising edge of the frequency-modulated synchronization signal is in a write stage of a group of light emitting units writing a light emitting data signal at the end of a previous frame period; and control a write stage of a group of light emitting units writing a light emitting data signal at the beginning of a current frame period to be staggered with the write stage of the group of light emitting units writing the light emitting data signal at the end of the previous frame period based on the auxiliary synchronization signal, wherein the group of light emitting units writing the light emitting data signal at the end of the previous frame period and the group of light emitting units writing the light emitting data signal at the beginning of the current frame period belong to the same group of light emitting units.

[0029] In another aspect, a driving chip is provided. The light-emitting substrate includes at least one light-emitting unit group, N light-emitting unit groups in one light-emitting unit group are respectively electrically connected with N first signal lines, M light-emitting units in one light-emitting unit group are respectively electrically connected with M second signal lines, N light-emitting unit groups in the same light-emitting unit group are connected with the same M second signal lines, and N and M are positive integers.

[0030] In one frame period, the N first signal lines provide driving signals to the N light-emitting unit groups in time, so that the N light-emitting unit groups are in a writing stage in time; and in the writing stage of one light-emitting unit group, the M second signal lines simultaneously provide light-emitting data signals to the M light-emitting units in the light-emitting unit group.

[0031] The driving chip includes a data interface, an auxiliary synchronization signal generation circuit and a scan control module. The data interface is configured to receive a frequency-modulated synchronization signal and image data. The auxiliary synchronization signal generation circuit is electrically connected with the data interface. The auxiliary synchronization signal generation circuit is configured to generate an auxiliary synchronization signal when a rising edge of the frequency-modulated synchronization signal is in a writing stage of a light-emitting unit group writing light-emitting data signals at the end of a previous frame period. The scan control module is electrically connected with the auxiliary synchronization signal generation circuit. The scan control module is configured to control a writing stage of a light-emitting unit group writing light-emitting data signals at the beginning of a current frame period to be staggered with the writing stage of the light-emitting unit group writing light-emitting data signals at the end of the previous frame period. The light-emitting unit group writing light-emitting data signals at the beginning of the current frame period and the light-emitting unit group writing light-emitting data signals at the end of the previous frame period belong to the same light-emitting unit group.

[0032] In some embodiments, the driving chip further includes a driving control circuit and a driving module. The driving control circuit is electrically connected with the auxiliary synchronization signal generation circuit. The driving control circuit is configured to obtain the image data and calculate light-emitting data corresponding to the image data. The driving module is electrically connected with the driving control circuit and electrically connected with the light-emitting unit group in the light-emitting substrate through the second signal lines. The driving module is configured to obtain the light-emitting data and provide light-emitting data signals corresponding to the light-emitting data to the light-emitting unit group in the light-emitting substrate.

[0033] In another aspect, a timing control board is provided. The timing control board includes a first substrate, a timing control circuit and a driving chip. The driving chip is as described above. The timing control circuit is located on the first substrate. The timing control circuit is configured to receive a frequency-modulated signal and generate a frequency-modulated synchronization signal corresponding to the frequency-modulated signal. The driving chip is located on the first substrate and electrically connected with the timing control circuit.

[0034] In another aspect, a light emitting substrate is provided. The light emitting substrate includes a second substrate, a plurality of light emitting unit groups, and a driving chip. The driving chip is as described above. The plurality of light emitting unit groups are on the second substrate. The driving chip is on the second substrate and electrically connected with the plurality of light emitting unit groups.

[0035] In another aspect, a backlight module is provided. The backlight module includes a light emitting substrate and a driving chip. The driving chip is as described above. The driving chip is electrically connected with the light emitting substrate.

[0036] In another aspect, a display device is provided. The display device includes a light emitting substrate, a driving chip, and a timing control board. The driving chip is as described above. The driving chip is electrically connected with the light emitting substrate. The timing control board is electrically connected with the driving chip.

[0037] In some embodiments, the driving chip is integrated on the light emitting substrate, or the driving chip is integrated on the timing control board.

[0038] In another aspect, a display device is provided. The display device includes a backlight module, a timing control board, and a frequency modulation circuit. The backlight module is as described above. The timing control board is electrically connected with the driving chip of the backlight module. The frequency modulation circuit is electrically connected with the timing control board to provide a frequency modulation signal to the timing control board.

[0039] In another aspect, a computer storage medium is provided. The computer readable storage medium stores computer program instructions, which, when executed by a processor, cause the processor to perform one or more steps of the driving method of the light emitting substrate as described above.

[0040] In another aspect, a computer program product is provided. The computer program product includes computer program instructions, which, when executed on a computer, cause the computer to perform one or more steps of the driving method of the light emitting substrate as described in the above embodiments.

[0041] In another aspect, a computer program is provided. When the computer program is executed on a computer, the computer program causes the computer to perform one or more steps of the driving method of the light emitting substrate as described in the above embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed to be used in some embodiments of the present disclosure will be briefly introduced as follows. Obviously, the drawings in the following description are only some drawings of the embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art according to these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not limited to the actual size, actual process, actual timing of signals, etc. of the products involved in the embodiments of the present disclosure.

[0043] Figure 1A A sectional view of a display device according to some embodiments;

[0044] Figure 1B A structural diagram of a display device according to some embodiments;

[0045] Figure 2 A timing diagram of a driving signal of a light emitting unit group according to some embodiments;

[0046] Figure 3 A structural diagram of a light emitting substrate according to some embodiments;

[0047] Figure 4A A structural diagram of a light emitting unit group according to some embodiments;

[0048] Figure 4B Another structural diagram of a light emitting unit group according to some embodiments;

[0049] Figure 5 A flowchart of a driving method of a light emitting substrate according to some embodiments;

[0050] Figure 6A A timing diagram of a driving signal of a light emitting unit group according to some embodiments;

[0051] Figure 6B Another timing diagram of a driving signal of a light emitting unit group according to some embodiments;

[0052] Figure 7 Another flowchart of a driving method of a light emitting substrate according to some embodiments;

[0053] Figure 8 Another flowchart of a driving method of a light emitting substrate according to some embodiments;

[0054] Figure 9 Another flowchart of a driving method of a light emitting substrate according to some embodiments;

[0055] Figure 10 Another flowchart of a driving method of a light emitting substrate according to some embodiments;

[0056] Figure 11 Another flow chart for the driving method of the light-emitting substrate according to some embodiments;

[0057] Figure 12 Another flow chart for the driving method of the light-emitting substrate according to some embodiments;

[0058] Figure 13 Another timing chart for the driving signal of the light-emitting unit group according to some embodiments;

[0059] Figure 14 A structural diagram of the driving device of the light-emitting substrate according to some embodiments;

[0060] Figure 15 Another structural diagram of the driving device of the light-emitting substrate according to some embodiments;

[0061] Figure 16 Another structural diagram of the driving device of the light-emitting substrate according to some embodiments;

[0062] Figure 17 Another structural diagram of the driving device of the light-emitting substrate according to some embodiments;

[0063] Figure 18A A structural diagram of the driving chip according to some embodiments;

[0064] Figure 18B A hardware structural diagram in the driving chip according to some embodiments;

[0065] Figure 19 A structural diagram of the timing control board according to some embodiments;

[0066] Figure 20 A structural diagram of the timing control board according to some embodiments;

[0067] Figure 21 A structural diagram of the backlight module according to some embodiments;

[0068] Figure 22A A structural diagram of the display device according to some embodiments;

[0069] Figure 22B Another structural diagram of the display device according to some embodiments;

[0070] Figure 22C Another structural diagram of the display device according to some embodiments;

[0071] Figure 23 A structural diagram of the display device according to some embodiments;

[0072] Figure 24Connection diagram of the display device and the frequency modulation circuit according to some embodiments. DETAILED DESCRIPTION

[0073] The technical solutions in the some embodiments of the present disclosure will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present disclosure, but not all the embodiments. Based on the embodiments provided in the present disclosure, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present disclosure.

[0074] Unless otherwise required by context, the term "comprise" and its other forms such as "comprises" and "comprising" are to be construed as open, inclusive, meaning that "comprising" means "including but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to mean that the specific feature, structure, material or characteristic associated with that embodiment or example is included in at least one embodiment or example of the present disclosure. The illustrative representation of the above terms does not necessarily mean the same embodiment or example. In addition, the specific features, structures, materials or characteristics described can be included in any one or more embodiments or examples in any appropriate manner.

[0075] Hereinafter, the terms "first", "second" are only used for description purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0076] In describing some embodiments, "electrically connected" and "connected" and their derivatives can be used. For example, the term "point connection" can be used to describe some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content herein.

[0077] "A and / or B" includes the following three combinations: only A, only B, and a combination of A and B.

[0078] The use of "configured to" herein means an open and inclusive language that does not exclude devices that are adapted to or configured to perform additional tasks or steps.

[0079] Additionally, the use of "based on" means open and inclusive, as a process, step, calculation, or other action that is "based on" one or more recited conditions or values can be based on additional conditions or values beyond those recited.

[0080] As used herein, "approximately" or "about" includes the recited value and average values falling within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art considering the measurement in question and the error in measuring the particular quantity (i.e., the limitations of the measurement system).

[0081] Exemplary embodiments are described herein with reference to cross-sectional and / or plan view illustrations that are idealized examples. In the drawings, the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region illustrated as a rectangle will typically have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

[0082] Some embodiments of the present disclosure provide a display device. Figure 1A and Figure 1B shown, Figure 1A is a cross-sectional view of a display device according to some embodiments; Figure 1B is a structural diagram of a display device according to some embodiments. See Figure 1A and Figure 1B The display device 1 is a product having an image (including a still image or a moving image, where the moving image can be a video) display function. For example, the display device 1 can be any one of a display, a television, a billboard, a digital photo frame, a laser printer having a display function, a telephone, a mobile phone, a Personal Digital Assistant (PDA), a digital camera, a camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information inquiry device (such as a business inquiry device for a government office, a bank, a hospital, a power company, and the like), a monitor, and the like.

[0083] The display device 1 can include a backlight module 900 and a display panel 10 configured to display based on light provided by the backlight module 900. The backlight module 900 includes a light-emitting substrate 910 and a driving control circuit 20 coupled to the light-emitting substrate 910. The driving control circuit 20 is configured to provide an electrical signal to the light-emitting substrate 910. Exemplarily, the driving control circuit (LED Driver) 20 can include a driving module (LED Driver Block) 210 configured to provide a light-emitting data signal (also referred to as a data signal or a data driving signal) to the light-emitting substrate 910. The display device 1 can further include a timing control circuit 220 (also referred to as a timing controller, Timer Control Register, abbreviated as TCON) coupled to the driving control circuit 20, and the like.

[0084] In some embodiments, the driving control circuit 20 can further include a scan control module (SCAN Control Block) 110 configured to output a control signal to the driving switches SW1-SW8 to control the driving switches SW to be turned on or turned off. In other embodiments, the scan control module 110 can be integrated in the light-emitting substrate 910, or in other words, the light-emitting substrate 910 can include the scan control module 110.

[0085] Specifically, the timing control circuit 220 is coupled to the driving control circuit 20, thereby indirectly controlling the scan control module 110 and the driving module 210.

[0086] The timing control circuit 220 can be configured to receive a display signal, which for example includes a power signal, a video image signal, a communication signal (for example, a signal corresponding to an IIC communication protocol), and a mode control signal (for example, a mode control signal corresponding to a test mode, or a mode control signal corresponding to a normal display mode), and the like. The video image signal is for example a MIPI (Mobile Industry Processor Interface) signal, a LVDS (Low-Voltage Differential Signaling) signal. The video image signal can include image data and timing control signals. The image data for example includes light-emitting data of a plurality of light-emitting units. The timing control signals for example include a data enable signal (Data Enable, can be abbreviated as DE), a horizontal synchronization signal (Hsync, can be abbreviated as HS), and a vertical synchronization signal (Vsync, can be abbreviated as VS).

[0087] In some embodiments, the timing control circuit 220 can be further configured to provide, in response to the display signal, a first control signal, a second control signal and an image signal to the driving control circuit 20. The first control signal is configured to control the working timing of the driving module 210, and the second control signal is configured to control the working timing of the scanning control module 110.

[0088] The scanning control module 110 is configured to output control signals to the driving switches SW1-SW8 in sequence according to the working timing determined by the second control signal, so that the plurality of light emitting units E corresponding to the driving switches SW1-SW8, respectively, are in the writing stage in sequence.

[0089] The driving module 210 is configured to convert the received image data into light emitting data signals of a plurality of light emitting units E (to be described below) in the light emitting substrate 910, and output the light emitting data signals to the corresponding light emitting units E according to the working timing determined by the first control signal.

[0090] In some embodiments, the timing control circuit 220 can be further configured to provide, in response to the display signal, a first control signal, a second control signal and an image signal to the driving control circuit 20. The first control signal is configured to control the working timing of the driving module 210, and the second control signal is configured to control the working timing of the scanning control module 110.

[0091] The scanning control module 110 is configured to output control signals to the driving switches SW1-SW8 in sequence according to the working timing determined by the second control signal, so that the plurality of light emitting units E corresponding to the driving switches SW1-SW8, respectively, are in the writing stage in sequence.

[0092] The driving module 210 is configured to convert the received image data into light emitting data signals of a plurality of light emitting units E (to be described below) in the light emitting substrate 910, and output the light emitting data signals to the corresponding light emitting units E according to the working timing determined by the first control signal.

[0093] It should be noted that the above-mentioned first control signal and second control signal can be different control signals. In the case where one control signal includes the working timing of the first control signal and the working timing of the second control signal, the above-mentioned first control signal and second control signal can also be the same control signal, which is not limited here.

[0094] The light emitting unit E in the light emitting substrate 910 can be one of a Mini Light Emitting Diode (Mini LED), a Micro Light Emitting Diode (Micro LED), and a Quantum Dot Light Emitting Diode (QLED).

[0095] With the continuous development of electronic products, the display frequency of display devices is also increasing. At present, more and more display devices also have the function of self-adaptive adjustment of display frequency. Specifically, the display device supporting Free Sync technology, some graphics cards and APUs (accelerated processors) can directly and dynamically control the display refresh rate of the display device supporting Free Sync technology. In general, the display refresh rate of the display device is fixed at a certain frequency, for example, 60Hz. In the case of running games on electronic equipment, the graphics card can control the refresh of the display device to be synchronized with the game, and the upper limit of the display refresh rate of the display device is its highest refresh rate, and the display refresh rate will be lowered when necessary.

[0096] The inventors of the present disclosure found that when the graphics card outputs a frequency modulation signal (for example: Free SYNC signal or GSYNC signal), the vertical synchronization signal (VSYNC) of the display device is frequency-converted, that is, the refresh frequency of the backlight module is changed. In the case of sudden shortening of the VSYNC period when the refresh frequency is increased, the previous frame period I cannot change the internal clock, resulting in that the scan control module of the backlight module cannot be synchronized with the frequency conversion, and the light emitting unit group writing the light emitting data signal at the end of the previous frame period I and the light emitting unit group writing the light emitting data signal at the beginning of the current frame period II will be in the writing stage at the same time, as shown in Figure 2 . Figure 2 SW1-SW8 in the middle are driving switches corresponding to the continuous 8 light emitting unit groups in the scan control module 110. In the case that the switch SW receives a driving signal and is in a high potential conduction state, the light emitting unit group corresponding to the switch SW is in the writing stage. Among them, SW4 is the driving switch corresponding to the light emitting unit group writing the light emitting data signal at the end of the previous frame period I, and SW1 is the driving switch corresponding to the light emitting unit group writing the light emitting data signal at the beginning of the current frame period II. TP represents the vertical synchronization signal (VSYNC) triggered by the frequency modulation signal, that is, the frequency modulation synchronization signal. The rising edge of the frequency modulation synchronization signal TP is in the conduction stage of SW4, that is, the writing stage of the light emitting unit group writing the light emitting data signal at the end of the previous frame period I.

[0097] Figure 2As can be seen, at the time point when the rising edge of the frequency-modulated synchronization signal TP appears, SW4 and SW1 are turned on at the same time, that is, the light-emitting data signal provided by the driving module is written into the two light-emitting unit groups corresponding to SW4 and SW1 at the same time, causing the problem of incorrect charging of the light-emitting data signal, leading to abnormal backlight brightness and reducing the display effect of the display device.

[0098] Based on this, some embodiments of the present disclosure provide a driving method of a light-emitting substrate. As shown in Figure 3 The light-emitting substrate 400 includes at least one light-emitting unit group QE, N light-emitting unit groups ZE in one light-emitting unit group QE are respectively connected to N first signal lines GL in a corresponding manner, M light-emitting units E in one light-emitting unit group ZE are respectively connected to M second signal lines DL in a corresponding manner, and N light-emitting unit groups ZE in the same light-emitting unit group QE are connected to the same M second signal lines DL, wherein N and M are positive integers.

[0099] In one frame period, N first signal lines GL provide driving signals to N light-emitting unit groups ZE in a time-sharing manner, so that N light-emitting unit groups ZE are in a writing stage in a time-sharing manner; and in the writing stage of one light-emitting unit group ZE, M second signal lines DL simultaneously provide light-emitting data signals to M light-emitting units E in the light-emitting unit group ZE.

[0100] As shown in Figure 3 The above light-emitting substrate 400 can include a substrate 410 and at least one light-emitting unit group QE formed on the substrate 410. One light-emitting unit group QE can include N light-emitting unit groups ZE, and different light-emitting unit groups ZE are respectively connected to different first signal lines GL. N first signal lines GL provide driving signals in a time-sharing manner, so that N light-emitting unit groups ZE are in a writing stage in a time-sharing manner. Specifically, in the case that the first signal line GL1 provides a driving signal and other first signal lines GL (such as GL2 and GL3) do not provide driving signals, the light-emitting unit group ZE1 is in a writing stage, and other light-emitting unit groups ZE (such as ZE2 and ZE3) are not in a writing stage.

[0101] One light-emitting unit group ZE can include M light-emitting units E, and different light-emitting units E are respectively connected to different second signal lines DL. In the case that one light-emitting unit group ZE is in a writing stage, M second signal lines DL connected to the light-emitting unit group ZE simultaneously provide light-emitting data signals to M light-emitting units E in the light-emitting unit group ZE. Specifically, in the case that the light-emitting unit group ZE1 is in a writing stage, the second signal line DL1 provides light-emitting data to the light-emitting unit E1, the second signal line DL2 provides light-emitting data to the light-emitting unit E2, and the second signal line DL3 provides light-emitting data to the light-emitting unit E3.

[0102] It should be noted that the light emitting data signals provided by the M second signal lines DL can be different, that is, the M second signal lines can independently provide light emitting data signals, so that the light emitting units E can be controlled individually.

[0103] One light emitting unit E can include a plurality of light emitting elements (such as mini light emitting diodes and / or micro light emitting diodes) 420. The plurality of light emitting elements 420 in one light emitting unit E can adopt a one-to-multiple string and / or a multiple-to-multiple string connection structure. The one-to-multiple string structure can be understood as all the light emitting elements in one light emitting unit E being connected in series, as shown in FIG. 4A. Correspondingly, the multiple-to-multiple string structure means that one light emitting unit E includes at least two light emitting element strings, and at least one light emitting element string includes at least two light emitting elements connected in series, and all the light emitting element strings in one light emitting unit E are in parallel relationship, as shown in FIG. 4B. Figure 4A Figure 4B

[0104] The plurality of light emitting elements 420 in one light emitting unit E can be arranged in a rectangular shape, a diamond shape, etc., which is not limited herein. In addition, the number of light emitting elements 420 in one light emitting unit E is not limited to the above-mentioned 3, and can be 8, 16, etc., which is not limited herein. Correspondingly, the number of second signal lines DL can also be 8, 16, etc., which is not limited herein.

[0105] One light emitting unit E includes two signal terminals, and the two signal terminals are electrically connected with the first signal line GL and the second signal line DL, respectively. In the case that the two signal terminals respectively receive the driving signal provided by the first signal line GL and the light emitting data signal provided by the second signal line DL, the plurality of light emitting elements 420 in the light emitting unit E realize light emission. The light emitting brightness of the light emitting elements 420 depends on the driving signal and the light emitting data signal, and since the driving signal and the light emitting data signal of all the light emitting elements 420 in one light emitting unit E are the same, the light emitting brightness of all the light emitting elements 420 in one light emitting unit E is the same.

[0106] It can be understood that in the case that the light emitting element 420 is an LED, the driving signal can be an anode signal, and the light emitting data signal can be a cathode signal; or the driving signal can be a cathode signal, and the light emitting data signal can be an anode signal. Since the second signal line DL can provide different signals to realize that different light emitting units in the same light emitting unit group emit light with different brightness, the signal provided by the second signal line DL is referred to as a light emitting data signal.

[0107] All the light emitting units E on the entire light emitting substrate 400 perform at least one light emitting data update, so as to realize refreshing of the backlight brightness of the light emitting substrate 400.

[0108] ​​The driving scanning circuit 110 mainly determines the current frame frequency of the display device according to a vertical synchronization signal (VSYNC) provided by the timing control circuit 220.

[0109] Please refer to Figure 5 The driving method of the light-emitting substrate includes steps S10-S40.

[0110] Step S10: receiving a frequency modulation signal.

[0111] The frequency modulation signal can be provided by a frequency modulation circuit outside the display device, or can be generated and provided by the display device under the control of other signals, which is not limited here.

[0112] The frequency modulation signal can be a single signal or a signal composed of multiple signals. In some examples, the frequency modulation signal can include a start signal (BS) of the interval period between two adjacent frames and an end signal (BE) of the interval period, so that the frame frequency corresponding to the frequency modulation signal can be determined by the BS signal and the BE signal. In other examples, the frequency modulation signal can also include other signals that can be used to determine the frame frequency, which is not limited here.

[0113] The frequency modulation signal can be received by being electrically connected to a device (such as a module or a circuit) that provides the frequency modulation signal through a connection line, or by a wireless receiver using a wireless signal transmission method (such as Bluetooth, WIFI, etc.) to receive the frequency modulation signal, or by other signal transmission methods, which is not limited here.

[0114] In addition, since the frequency modulation signal can be provided randomly, the time point of receiving the frequency modulation signal can also be random. The time point of receiving the frequency modulation signal can be at any time point in a frame period.

[0115] Step S20: generating a frequency modulation synchronization signal corresponding to the frequency modulation signal.

[0116] The frequency modulation synchronization signal TP corresponding to the frequency modulation signal can mean that the frame frequency corresponding to the frequency modulation synchronization signal TP is the same as the frame frequency corresponding to the frequency modulation signal. The frequency modulation synchronization signal TP is a kind of vertical synchronization signal. The frame frequency corresponding to the frequency modulation synchronization signal TP is different from the frame frequency corresponding to the vertical synchronization signal (VSYNC) of the previous frame.

[0117] The frequency modulation synchronization signal TP can be generated by the timing control circuit 220 based on the frequency modulation signal. In some examples, the timing control circuit 220 parses a Data Enable (DE) signal based on the BS signal and the BE signal, and generates the frequency modulation synchronization signal TP according to the DE signal. In other examples, the frequency modulation synchronization signal TP can also be generated in other ways, which are not limited here.

[0118] In some embodiments, the frequency modulation synchronization signal TP can be generated immediately after receiving the frequency modulation signal. Since the time point of receiving the frequency modulation signal is random, the time point of generating the frequency modulation synchronization signal TP is also random, resulting in that the time point of generating the frequency modulation synchronization signal TP can be at any time point in a frame period.

[0119] It can be understood that the frequency modulation synchronization signal TP is a kind of vertical synchronization signal, which is randomly generated triggered by the frequency modulation signal, and is different from other vertical synchronization signals that appear at fixed time intervals according to frame periods.

[0120] Since the frequency modulation synchronization signal TP is a kind of vertical synchronization signal, the generation of the frequency modulation synchronization signal TP will cause the previous frame period I to be interrupted at any time. In this way, the length of the previous frame period I will be less than or equal to the original length of the previous frame period I. In the case where the length of the previous frame period I is less than the original length of the previous frame period I, the rising edge of the frequency modulation synchronization signal TP can be in the writing stage of a certain light emitting unit group ZE, or can be in the gap between the writing stages of the original two light emitting unit groups ZE.

[0121] It should be noted that the frame frequency corresponding to the frequency modulation signal does not affect the time point of generating the frequency modulation synchronization signal TP. That is, whether the frequency modulation signal increases the original frame frequency or decreases the original frame frequency, it does not affect the length of the previous frame period I. The length of the previous frame period I can be less than the length of the current frame period II, or can be greater than the length of the current frame period II.

[0122] Step S30: generating an auxiliary synchronization signal (RESYNC) in the case where the rising edge of the frequency modulation synchronization signal is in the writing stage of the light emitting unit group ZE at the end of the previous frame period I.

[0123] The time point at which the rising edge of the vertical synchronization signal is located is the time point between the adjacent two frames under the conventional definition. Since the rising edge of the frequency modulation synchronization signal TP appears, the previous frame period I ends and the current frame period II starts.

[0124] The auxiliary synchronization signal can be generated by the timing control circuit 220, or can be generated by the driving control circuit 20, which is not limited here.

[0125] The rising edge of the auxiliary synchronization signal can be located after the rising edge of the frequency-modulated synchronization signal TP. The signal duration of the auxiliary synchronization signal can be the same as or different from the signal duration of the frequency-modulated synchronization signal TP. The signal duration of the auxiliary synchronization signal can be in the range of 10 μs to 20 μs, for example, 10 μs, 11.6 μs, 12.9 μs, 13.4 μs, 14 μs, 15.5 μs, 16.1 μs, 17.8 μs, 19.2 μs, or 20 μs.

[0126] It can be understood that the auxiliary synchronization signal is a signal generated based on the vertical synchronization signal. Specifically, the auxiliary synchronization signal is generated when the rising edge of the vertical synchronization signal (including the frequency-modulated synchronization signal TP) is in the write stage of any light emitting unit group ZE, and the rising edge of the auxiliary synchronization signal lags behind the rising edge of the vertical synchronization signal. The auxiliary synchronization signal is not the vertical synchronization signal, but has the same effect as the vertical synchronization signal.

[0127] Step S40: based on the auxiliary synchronization signal, the write stage of the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II is controlled to be staggered with the write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I.

[0128] The light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I and the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II belong to the same light emitting unit group QE.

[0129] The write stage of the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II is staggered with the write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I, which means that the time period of the write stage of the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II does not coincide with the time period of the write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I.

[0130] The write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I has already started when the rising edge of the frequency-modulated synchronization signal TP appears, that is, the write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I is earlier than the write stage of the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II. Therefore, after the write stage of the light emitting unit group ZE in which the light emitting data signal is last written in the previous frame period I is completed, the write stage of the light emitting unit group ZE in which the light emitting data signal is first written in the current frame period II is started.

[0131] In some examples, the write phase of the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I can end when the rising edge of the frequency modulation synchronization signal TP appears, as shown in FIG. 3. Figure 6A In the example shown in FIG. 3, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal. Figure 6A In the example shown in FIG. 3, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal. Figure 6A In the example shown in FIG. 3, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal. Figure 6A In the example shown in FIG. 3, the fourth light emitting unit group is the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I, corresponding to the driving switch SW4 in FIG. 3; and the first light emitting unit group is the light emitting unit group ZE writing the light emitting data signal at the beginning of the current frame period II, corresponding to the driving switch SW1 in FIG. 3. Figure 6A In the example shown in FIG. 3, the fourth light emitting unit group is the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I, corresponding to the driving switch SW4 in FIG. 3; and the first light emitting unit group is the light emitting unit group ZE writing the light emitting data signal at the beginning of the current frame period II, corresponding to the driving switch SW1 in FIG. 3.

[0132] In the case where the write phase of the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I ends when the rising edge of the frequency modulation synchronization signal TP appears, the write phase of the light emitting unit group ZE writing the light emitting data signal at the beginning of the current frame period II can start when the rising edge of the frequency modulation synchronization signal TP appears, as shown in FIG. 4. Figure 6A In the example shown in FIG. 4, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal.

[0133] In some other examples, the write phase of the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I can also end after the rising edge of the frequency modulation synchronization signal TP appears, as shown in FIG. 5. Figure 6B In the example shown in FIG. 5, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal. Figure 6A In the example shown in FIG. 5, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal. Figure 6A In the example shown in FIG. 5, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal.

[0134] In the case where the write phase of the light emitting unit group ZE writing the light emitting data signal at the end of the previous frame period I ends after the rising edge of the frequency modulation synchronization signal TP appears, the write phase of the light emitting unit group ZE writing the light emitting data signal at the beginning of the current frame period II needs to start after the rising edge of the frequency modulation synchronization signal TP appears for a period of time, as shown in FIG. 6. Figure 6B In the example shown in FIG. 6, only TP is the frequency modulation synchronization signal, and the remaining VSYNC is not the frequency modulation synchronization signal.

[0135] It should be noted that the VSYNC in the drawings of the present disclosure is the vertical synchronization signal (including the frequency modulation synchronization signal TP), and the RESYNC in the drawings is the auxiliary synchronization signal.

[0136] The light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I and the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II belong to the same light emitting unit group, and are connected to the same plurality of second signal lines DL. By controlling the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II to be staggered with the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I, the problem of backlight abnormality caused by the mischarging of the light emitting data signal is avoided, and the display effect of the display device is improved.

[0137] In summary, the driving method of the light emitting substrate provided by the present disclosure avoids the problem of backlight abnormality caused by the mischarging of the light emitting data signal by generating an auxiliary synchronization signal to stagger the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II with the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I when the rising edge of the frequency modulation synchronization signal TP is in the writing stage of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I, thereby improving the display effect of the display device.

[0138] Please refer to Figure 7 In some embodiments, the step of generating the auxiliary synchronization signal in step S30 includes step S31: generating the auxiliary synchronization signal whose rising edge is after the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I.

[0139] In this embodiment, the auxiliary synchronization signal replaces the frequency modulation synchronization signal to control the function of starting the writing of the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II.

[0140] The rising edge of the auxiliary synchronization signal is after the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I, so that the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I can include a continuous first writing stage i and a second writing stage ii. The first writing stage i is before the rising edge of the frequency modulation synchronization signal TP, and the second writing stage ii is after the rising edge of the frequency modulation synchronization signal TP, as shown in Figure 6B .

[0141] After the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I is completed, the auxiliary synchronization signal (RESYNC) triggers a rising edge to control the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II to start writing, so as to stagger the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the beginning of the current frame period II with the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I.

[0142] In addition, in some embodiments, when the rising edge of the frequency modulation synchronization signal TP is in the write-in stage of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I, the write-in of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I is interrupted, causing abnormal light emission of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I.

[0143] In the embodiment, the rising edge of the auxiliary synchronization signal (RESYNC) is located after the write-in stage of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I, so that the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I can be completely written in the light emitting data signal, avoiding the problem of abnormal light emission of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I.

[0144] Please refer to Figure 8 In some embodiments, the step S31 includes steps 311-313.

[0145] The step S311: obtaining a starting write-in time point and a preset write-in duration of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I.

[0146] The starting write-in time point of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I can be the time point at which the scan control module 110 starts to provide driving signals to the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I through the first signal line GL.

[0147] In some examples, the scan control module 110 pre-sets an interval duration between the write-in stages of two adjacent light emitting unit groups ZE in a light emitting unit group QE. Therefore, the starting write-in time point of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I can also be calculated based on the ending write-in time point of the write-in stage of the second last light emitting unit group ZE which writes in the light emitting data signal in the previous frame period I and the interval duration.

[0148] The preset write-in duration of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I can be the write-in duration of each light emitting unit group ZE in a light emitting unit group QE which is pre-set by the scan control module 110 in the previous frame period I.

[0149] In some examples, the scan control module 110 pre-sets the write-in duration of each light emitting unit group ZE in a light emitting unit group QE, and the write-in durations of the light emitting unit groups ZE are basically consistent. Therefore, the write-in durations of the light emitting unit groups ZE which have written in the light emitting data signal in the previous frame period I can also be used as the preset write-in duration of the light emitting unit group ZE which writes in the light emitting data signal at the end of the previous frame period I.

[0150] Of course, other ways of determining or calculating the starting writing time point and the preset writing duration of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I can also be included, which are only examples and should not be considered as limitations.

[0151] Step S312: based on the starting writing time point and the preset writing duration of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I, a target time point is calculated; the time interval between the target time point and the starting writing time point of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I is greater than the preset writing duration.

[0152] The time interval between the target time point and the starting writing time point of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I is greater than the preset writing duration of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I. That is, the target time point is located after the writing stage of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I.

[0153] The time interval between the target time point and the starting writing time point of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I can be equal to the sum of the preset writing duration of the light emitting unit group ZE to which the light emitting data signal is written at the end of the previous frame period I and the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE.

[0154] The interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE can be the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the previous frame period I preset by the scan control module 110, or the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the current frame period II preset by the scan control module 110.

[0155] In the case where the duration of the current frame period II is greater than the duration of the previous frame period I, the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the current frame period II preset by the scan control module 110 is greater than the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the previous frame period I preset by the scan control module 110. In the case where the duration of the current frame period II is less than the duration of the previous frame period I, the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the current frame period II preset by the scan control module 110 is less than the interval duration between the writing stages of the preset adjacent two light emitting unit groups ZE corresponding to the previous frame period I preset by the scan control module 110.

[0156] Of course, the time interval between the target time point and the start write time point of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I, can also be greater than or less than the sum of the preset write duration of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I and the interval duration between the write stages of the preset two adjacent light emitting unit groups ZE.

[0157] Step S313: generating an auxiliary synchronization signal (RESYNC) whose rising edge is at the target time point.

[0158] Since the target time point is after the write stage of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I, the rising edge of the auxiliary synchronization signal (RESYNC) is after the write stage of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I, and thus the write stage of the light emitting unit group ZE which writes the first light emitting control signal in the current frame period II controlled by the auxiliary synchronization signal (RESYNC) is after the write stage of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I.

[0159] In the case that the time interval between the target time point and the start write time point of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I is equal to the sum of the preset write duration of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I and the interval duration between the write stages of the preset two adjacent light emitting unit groups ZE, the continuity of the light emitting unit group ZE which writes in sequence can be improved, and the smoothness of the picture display of the display device can be improved.

[0160] As shown in FIG. 12, in some embodiments, step S312 includes step S3121 and step S3122. Figure 9

[0161] Step S3121: calculating a target time interval between the start write time points of two adjacent light emitting unit groups ZE which write the light emitting data signal in the previous frame period I.

[0162] Step S3122: adding the target time interval to the start write time point of the light emitting unit group ZE which writes the light emitting data signal at the end of the previous frame period I to obtain the target time point.

[0163] ​By obtaining the time point at which the later-written light-emitting unit group ZE in the two adjacent light-emitting unit groups ZE with written light-emitting data signals controlled by the driving scanning circuit 110 begins writing, and subtracting the time point at which the earlier-written light-emitting unit group ZE in the two adjacent light-emitting unit groups ZE with written light-emitting data signals begins writing, the target time interval between the starting writing time points of the two adjacent light-emitting unit groups ZE with written light-emitting data signals in the previous frame period I can be obtained.

[0164] The time interval between the target time point and the starting time point of the light-emitting unit group ZE that writes light-emitting data signals at the end of the previous frame period I is equal to the target time interval between the starting time points of the two adjacent light-emitting unit groups ZE that write light-emitting data signals in the previous frame period I. This ensures that the first light-emitting unit group ZE that writes light-emitting data signals in the current frame period II, which is subsequently controlled by the rising edge of the auxiliary synchronization signal, begins the writing phase at the target time point.

[0165] That is, the time interval between the writing phase of the first light-emitting unit group ZE that writes light-emitting data signals in the current frame period II and the writing phase of the last light-emitting unit group ZE that writes light-emitting data signals in the previous frame period I is equal to the time interval between the writing phases of the two adjacent light-emitting unit groups ZE that write light-emitting data signals in the previous frame period I.

[0166] In this way, when the display device receives an FM signal, the time interval between the writing stages of the light-emitting unit group ZE, which continuously writes light-emitting data signals, remains stable, ensuring the smoothness of the display screen.

[0167] like Figure 10 As shown, in some embodiments, step 31 further includes: using the acquired frequency modulation synchronization signal TP as the signal duration of the auxiliary synchronization signal (RESYNC).

[0168] The aforementioned frequency modulation (FM) synchronization signal TP is a vertical synchronization signal. The signal duration of a vertical synchronization signal can be fixed, meaning the signal duration of FM synchronization signal TP is the same as that of other vertical synchronization signals. In this case, by obtaining the signal duration of any vertical synchronization signal, the signal duration of FM synchronization signal TP can be obtained.

[0169] The signal duration of the vertical synchronization signal can also vary in various situations. For example, under the control of the frequency modulation signal, the signal duration of the frequency modulation synchronization signal TP is different from that of other vertical synchronization signals, which is not limited here.

[0170] The frequency-modulated synchronization signal TP can be generated by the timing control circuit 220 based on the frequency-modulated signal. The signal duration of the frequency-modulated synchronization signal TP can be obtained by the timing control circuit 220.

[0171] The signal duration of the frequency-modulated synchronization signal TP is taken as the signal duration of the auxiliary synchronization signal (RESYNC), so that the auxiliary synchronization signal (RESYNC) is equivalent to the frequency-modulated synchronization signal TP with a delay. The delay can enable the writing stage of the light-emitting unit group ZE at the end of the previous frame period I to be successfully completed.

[0172] As shown in FIG. 4, in some embodiments, step S40 includes step S41. Figure 11

[0173] Step S41: When the rising edge of the auxiliary synchronization signal (RESYNC) arrives, the light-emitting unit group ZE that needs to write the light-emitting data signal first in the current frame period II is controlled to start writing the light-emitting data signal.

[0174] The scan control module 110 can obtain the generated auxiliary synchronization signal (RESYNC). When the rising edge of the auxiliary synchronization signal (RESYNC) obtained by the scan control module 110 appears, the scan control module 110 controls the light-emitting unit group ZE that needs to write the light-emitting data signal first in the current frame period II to start writing the light-emitting data signal.

[0175] In some examples, the order of the light-emitting unit group ZE that writes the light-emitting data signal in each frame period is the same. That is, the light-emitting unit group ZE that needs to write the light-emitting data signal first in each frame period is the same. Even if part of the light-emitting unit group ZE that needs to write the light-emitting data signal in the frame period before the adjacent two frames is not written with the light-emitting data signal, the light-emitting unit group ZE that needs to write the light-emitting data signal first in the frame period after the adjacent two frames is the same as the light-emitting unit group that writes the light-emitting data signal first in the frame period before the adjacent two frames, as shown in FIG. 3 and FIG. 4. Figure 6A Figure 6B

[0176] The time point at which the rising edge of the auxiliary synchronization signal (RESYNC) appears is the same as the time point at which the light-emitting unit group ZE that writes the light-emitting data signal first in the current frame period II starts writing. As mentioned above, the time point at which the rising edge of the auxiliary synchronization signal (RESYNC) appears is after the writing stage of the light-emitting unit group ZE that writes the light-emitting data signal at the end of the previous frame period I, so that the writing stage of the light-emitting unit group ZE that writes the light-emitting data signal at the end of the previous frame period I is before the writing stage of the light-emitting unit group ZE that writes the light-emitting data signal first in the current frame period II, thereby avoiding the problem of abnormal backlight caused by incorrect charging of the light-emitting data signal and improving the display effect of the display device.​​​

[0177] As Figure 12 shown in some embodiments, the driving method of the light-emitting substrate further comprises steps S50 and S60.

[0178] Step S50: after the write phase of the light-emitting unit group ZE writing the light-emitting data signal in the last of the previous frame period I, and before the write phase of the light-emitting unit group ZE writing the light-emitting data signal in the first of the current frame period II, the light-emitting data signal is updated.

[0179] The light-emitting data signal is provided to each light-emitting unit group by the driving module 210, and the update of the light-emitting data signal can be based on the image data provided by the driving module 210 based on the timing control signal 220. The time point of the update of the light-emitting data signal is in the write phase of the light-emitting unit group ZE, which will cause the problem of writing abnormity of the light-emitting data signal of the light-emitting unit group ZE.

[0180] In some examples, the driving module 210 can receive an auxiliary synchronization signal (RESYNC), and at the time point of the rising edge of the auxiliary synchronization signal (RESYNC), the light-emitting data signal is updated (i.e. the light-emitting data signal of the previous frame period I is updated to the light-emitting data signal of the current frame period II). After the update phase of the update of the light-emitting data signal is completed, the start of the writing of the light-emitting unit group ZE writing the light-emitting data signal in the first of the current frame period II is controlled.

[0181] In another example, the driving module 210 can be connected to the scan control module 110, and the light-emitting data signal is updated after the time point of the end of the writing of the light-emitting unit group ZE writing the light-emitting data signal in the last of the previous frame period I controlled by the scan control module 110. The update phase of the update of the light-emitting data signal can be before the time point of the rising edge of the auxiliary synchronization signal (RESYNC), can include the time point of the rising edge of the auxiliary synchronization signal (RESYNC), or can be after the time point of the rising edge of the auxiliary synchronization signal (RESYNC). Only the update phase of the update of the light-emitting data signal is before the time point of the start of the writing of the light-emitting unit group ZE writing the light-emitting data signal in the first of the current frame period II.

[0182] Step S60: in the write phase of the light-emitting unit group ZE writing the light-emitting data signal in the first of the current frame period II, the updated light-emitting data signal is provided to the light-emitting unit group ZE writing the light-emitting data signal in the first of the current frame period II by using the M second signal lines DL.

[0183] In the current frame period II, the scanning control module 110 controls the start of the writing phase of the first light-emitting unit group ZE that writes the light-emitting data signal. The driving module 210 uses M second signal lines DL to provide the updated light-emitting data signal to the first light-emitting unit group ZE that writes the light-emitting data signal, so that the first light-emitting unit group ZE that writes the light-emitting data signal in the current frame period II can emit light according to the updated light-emitting data signal, thereby realizing the update of the backlight of the display device in the current frame.

[0184] By controlling the drive module 210 to update the light emission data signal after the writing stage of the light emission unit group ZE that writes the light emission data signal at the end of the previous frame period I and before the writing stage of the first light emission unit group ZE that writes the light emission data signal in the current frame period II, it is possible to avoid abnormal writing of the light emission unit group ZE caused by the update of the light emission data signal.

[0185] In some embodiments, such as Figure 13 As shown, the first light-emitting unit group ZE to write light-emitting data signals in the current frame period II is the next light-emitting unit group ZE to be written with light-emitting data signals in the writing order of the light-emitting unit group ZE corresponding to the previous frame period I.

[0186] When the current frame period II is less than the previous frame period I, since the scanning control module 110 cannot change the internal counting clock instantaneously, some light-emitting unit groups ZE in the light-emitting unit group QE will reach the current frame period II before entering the writing stage in the previous frame period I.

[0187] At this point, if each frame cycle enters the writing phase sequentially according to a preset writing order, such as... Figure 6B As shown, the light-emitting unit group ZE that did not write the light-emitting data signal in the previous frame period I will have one less light-emitting data signal written than other light-emitting unit groups ZE, resulting in the problem of missing backlight refresh.

[0188] In this embodiment, the next light emitting unit group ZE of the light emitting unit group ZE written with the light emitting data signal at the end of the previous frame period I is taken as the light emitting unit group ZE written with the light emitting data signal at the beginning of the current frame period II according to the order of writing of the light emitting unit group ZE in the previous frame period I. Exemplarily, SW1-SW8 correspond to the driving of the first light emitting unit group to the eighth light emitting unit group in sequence. The order of writing of the light emitting unit group ZE in the previous frame period I is SW1-SW8. Therefore, when the light emitting unit group ZE written with the light emitting data signal at the end of the previous frame period I is the fourth light emitting unit group, the light emitting unit group ZE written with the light emitting data signal at the beginning of the current frame period II is the fifth light emitting unit group, and the writing of the light emitting data signal is sequentially and timely written until the eighth light emitting unit group, and then the first light emitting unit group starts to write the light emitting data signal.

[0189] In this way, the light emitting unit group ZE not written with the light emitting data signal in the previous frame period I is still written with the light emitting data signal according to the order of writing of the light emitting unit group ZE in the previous frame period I, and will not be less than other light emitting unit groups ZE in the writing of the light emitting data signal, thereby avoiding the problem of missing light refresh and improving the display effect of the display device.

[0190] In summary, the driving method of the light emitting substrate provided by the present disclosure avoids the problem of abnormal backlight caused by the error charging of the light emitting data signal, improves the display effect of the display device, when the rising edge of the frequency modulation synchronization signal TP is in the writing stage of the light emitting unit group ZE written with the light emitting data signal at the end of the previous frame period I, and generates an auxiliary synchronization signal (RESYNC) to stagger the writing stage of the light emitting unit group ZE written with the light emitting data signal at the beginning of the current frame period II and the writing stage of the light emitting unit group ZE written with the light emitting data signal at the end of the previous frame period I.

[0191] The above mainly introduces the scheme provided by the embodiments of the present disclosure from the perspective of the method. In order to realize the above functions, it contains the hardware structure and / or software module corresponding to the execution of each function. Those skilled in the art should easily realize that the algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in the form of hardware or the combination of hardware and computer software. Whether a certain function is executed in the form of hardware or computer software driven hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present disclosure.

[0192] As Figure 14As shown, some embodiments of the present disclosure provide a driving device 500 of a light-emitting substrate. The driving device 500 of the light-emitting substrate is used to execute the driving method of the light-emitting substrate described above. The driving device 500 of the light-emitting substrate comprises a receiving module 510, a first generating module 520, a second generating module 530, and a control module 540.

[0193] The receiving module 510 is configured to receive a frequency-modulated signal.

[0194] The first generating module 520 is configured to generate a frequency-modulated synchronization signal corresponding to the frequency-modulated signal.

[0195] The second generating module 530 is configured to generate an auxiliary synchronization signal in the case where a rising edge of the frequency-modulated synchronization signal is in a write-in stage of a light-emitting unit group in which light-emitting data signals are written in at the end of a previous frame period I.

[0196] The control module 540 is configured to control the write-in stage of a light-emitting unit group in which light-emitting data signals are written first in a current frame period II to be staggered with the write-in stage of the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I based on the auxiliary synchronization signal.

[0197] The light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I and the light-emitting unit group in which light-emitting data signals are written first in the current frame period II belong to the same light-emitting unit group.

[0198] The driving method of the light-emitting substrate provided by the present disclosure generates an auxiliary synchronization signal to make the write-in stage of the light-emitting unit group in which light-emitting data signals are written first in the current frame period II to be staggered with the write-in stage of the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I in the case where the rising edge of the frequency-modulated synchronization signal is in the write-in stage of the light-emitting unit group, thereby avoiding the problem of backlight abnormality caused by incorrect charging of light-emitting data signals and improving the display effect of the display device.

[0199] In some embodiments, the second generating module 530 is further configured to generate an auxiliary synchronization signal whose rising edge is after the write-in stage of the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I.

[0200] In the present embodiment, the rising edge of the auxiliary synchronization signal is after the write-in stage of the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I, which can make the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I completely write in light-emitting data signals and avoid the problem of light-emitting abnormality of the light-emitting unit group in which light-emitting data signals are written in at the end of the previous frame period I.

[0201] In some embodiments, as Figure 15The second generation module 530 includes an acquisition submodule 531, a calculation submodule 532, and a generation submodule 533.

[0202] The acquisition submodule 531 is configured to acquire a starting writing time point of a light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I and a preset writing duration.

[0203] The calculation submodule 532 is configured to calculate a target time point based on the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I and the preset writing duration; and the time interval between the target time point and the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I is greater than the preset writing duration.

[0204] The generation submodule 533 is configured to generate an auxiliary synchronization signal with a rising edge at the target time point.

[0205] In the embodiment, when the time interval between the target time point and the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I is equal to the sum of the preset writing duration of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I and the interval duration between the writing stages of the two adjacent light emitting unit groups, the continuity of the light emitting unit groups written in sequence can be improved, and the smoothness of the display device in displaying a picture can be improved.

[0206] In some embodiments, as shown in FIG. 5, the calculation submodule 532 includes a first calculation unit 5321 and a second calculation unit 5322. Figure 16

[0207] The first calculation unit 5321 is configured to calculate a target time interval between the starting writing time points of two light emitting unit groups to which the light emitting data signal is written in the previous frame period I.

[0208] The second calculation unit 5322 is configured to add the target time interval to the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period I to obtain the target time point.

[0209] In the embodiment, when the display device receives the frequency modulation signal, the time interval between the writing stages of the light emitting unit groups to which the light emitting data signal is written continuously remains stable, and the smoothness of the display device in displaying a picture is ensured.

[0210] In some embodiments, the second generation module 530 is further configured to take the signal duration of the acquired frequency modulation synchronization signal as the signal duration of the auxiliary synchronization signal.

[0211] ​In this embodiment, the signal duration of the frequency modulation synchronization signal is used as the signal duration of the auxiliary synchronization signal. In this way, the auxiliary synchronization signal is equivalent to the frequency modulation synchronization signal with a delay. This delay allows the writing stage of the light-emitting unit group that writes the light-emitting data signal at the end of the previous frame period I to be completed smoothly.

[0212] In some embodiments, the control module 540 is further configured to control the light-emitting unit group that needs to be the first to write the light-emitting data signal in the current frame period II to start writing the light-emitting data signal when the rising edge of the auxiliary synchronization signal arrives.

[0213] In this embodiment, the writing stage of the light-emitting unit group that writes the light-emitting data signal at the end of the previous frame period I is made to be before the writing stage of the light-emitting unit group that writes the light-emitting data signal in the current frame period II, thereby avoiding the problem of incorrect filling of light-emitting data signals and improving the display effect of the display device.

[0214] In some embodiments, such as Figure 17 As shown, the driving device 500 for the light-emitting substrate also includes an update module 550 and a supply module 560.

[0215] The update module 550 is configured to update the light emission data signal after the write phase of the light emission unit group that writes the light emission data signal at the end of the previous frame period I, and before the write phase of the first light emission unit group that writes the light emission data signal in the current frame period II.

[0216] The module 560 is configured to provide an updated light emission data signal to the first light emission unit group that writes the light emission data signal in the current frame period II during the writing phase of the first light emission unit group that writes the light emission data signal in the current frame period II using M second signal lines.

[0217] In this embodiment, by controlling the auxiliary synchronization signal to update the light-emitting unit group after the writing stage of the light-emitting data signal at the end of the previous frame period I and before the writing stage of the first light-emitting unit group in the current frame period II, the writing abnormality of the light-emitting unit group caused by the update of the light-emitting data signal can be avoided.

[0218] In some embodiments, the first group of light-emitting units to write light-emitting data signals in the current frame period II is the next light-emitting unit group after the last group of light-emitting units to write light-emitting data signals in the writing order of the light-emitting unit groups corresponding to the previous frame period I.

[0219] In this embodiment, the light emitting unit group in the previous frame period I which does not write the light emitting data signal will still write the light emitting data signal according to the order of the light emitting unit group in the previous frame period I which writes the light emitting data signal in turn, and will not be less than other light emitting unit groups by one time of writing the light emitting data signal, thereby avoiding the problem of light emitting refresh missing, and improving the display effect of the display device.

[0220] In combination Figure 18A As shown in the figure, some embodiments of the present disclosure provide a driving chip 600. The driving chip 600 is configured to drive the light emitting substrate 400 to emit light. The driving chip 600 includes a receiver 610 and a processing module 620 which are electrically connected to each other; the processing module 620 is also electrically connected to the light emitting substrate 400.

[0221] The receiver 610 is configured to receive a frequency modulation synchronization signal.

[0222] The processing module 620 is configured to generate an auxiliary synchronization signal in the case that the rising edge of the frequency modulation synchronization signal is in the writing stage of the light emitting unit group which writes the light emitting data signal at the end of the previous frame period I; and control the writing stage of the light emitting unit group which writes the light emitting data signal at the first time in the current frame period II to be staggered with the writing stage of the light emitting unit group which writes the light emitting data signal at the end of the previous frame period I based on the auxiliary synchronization signal.

[0223] The light emitting unit group which writes the light emitting data signal at the end of the previous frame period I and the light emitting unit group which writes the light emitting data signal at the first time in the current frame period II belong to the same light emitting unit group.

[0224] The driving chip 600 can cooperate with the timing control circuit 220. The timing control circuit 220 receives the frequency modulation signal and generates the frequency modulation synchronization signal corresponding to the frequency modulation signal. In the case that the driving chip 600 receives the frequency modulation synchronization signal, the driving chip 600 can drive the light emitting substrate to stagger the writing stage of the light emitting unit group which writes the light emitting data signal at the end of the previous frame period I with the writing stage of the light emitting unit group which writes the light emitting data signal at the first time in the current frame period II, thereby avoiding the problem of abnormal backlight caused by the light emitting data signal being charged incorrectly, ensuring the normal light emission of the light emitting substrate, and improving the display effect of the display device.

[0225] In some embodiments, please refer to Figure 18B , Figure 18B The figure is a hardware structure diagram of the driving chip according to some embodiments. The driving chip 600 includes a data interface 310, an auxiliary synchronization signal generation circuit 330 and a scan control module 110.

[0226] The data interface 310 is configured to be coupled with the timing control circuit 220 to receive the frequency modulation synchronization signal and receive the image data.

[0227] The auxiliary synchronization signal generation circuit 330 is electrically connected with the data interface 310. The auxiliary synchronization signal generation circuit 330 is configured to generate an auxiliary synchronization signal in a case where a rising edge of the frequency-modulated synchronization signal is in a write-in stage of a light-emitting unit group writing in a light-emitting data signal at the end of a previous frame period.

[0228] The scan control module 110 is electrically connected with the auxiliary synchronization signal generation circuit 330. The scan control module 110 is configured to control the write-in stage of the first light-emitting unit group writing in a light-emitting data signal in the current frame period II to be staggered with the write-in stage of the light-emitting unit group writing in a light-emitting data signal at the end of the previous frame period I.

[0229] The light-emitting unit group writing in a light-emitting data signal at the end of the previous frame period I and the light-emitting unit group writing in a light-emitting data signal in the current frame period II belong to the same light-emitting unit group.

[0230] The data interface 310 can be a serial peripheral (SPI) interface. The data interface 310 can be coupled with the timing control circuit 220 to receive the frequency-modulated synchronization signal and image data provided by the timing control circuit 220.

[0231] The kernel (CORE) 320 is electrically connected with the SPI interface to obtain the frequency-modulated synchronization signal TP and generate an auxiliary synchronization signal (RESYNC) corresponding to the frequency-modulated synchronization signal TP. Specifically, the kernel 320 includes an auxiliary synchronization signal generation circuit (RESYNC Generator) 330, which generates the auxiliary synchronization signal (RESYNC) based on the frequency-modulated synchronization signal TP.

[0232] The auxiliary synchronization signal generation circuit 330 includes a vertical synchronization signal detector (VSYNC Detector) 331 and a scan calculator (SCAN calculator) 332. The vertical synchronization signal detector 331 is used to detect a vertical synchronization signal (VSYNC, including the frequency-modulated synchronization signal TP) and determine whether a rising edge of the vertical synchronization signal is in a write-in stage of a certain light-emitting unit group. The scan calculator 332 calculates a generation time of the auxiliary synchronization signal based on data parameters detected by the vertical synchronization signal detector 331.

[0233] The scan control module (SCAN control block) 110 is electrically connected with the auxiliary synchronization signal generation circuit 330. The scan control module 110 is electrically connected with the plurality of light emitting unit groups in the light emitting substrate 400 through N first signal lines GL. The scan control module 110 provides driving signals to the plurality of light emitting unit groups in the light emitting unit group at different time based on the auxiliary synchronization signal (which can be understood as the second control signal described above) so as to make the plurality of light emitting unit groups in the light emitting unit group enter the writing stage at different time.

[0234] The scan control module 110 controls the writing stage of the light emitting unit group which writes the light emitting data signal in the first frame period to be staggered with the writing stage of the light emitting unit group which writes the light emitting data signal in the last frame period based on the auxiliary synchronization signal. The above has been described in detail and will not be repeated here.

[0235] In some embodiments, as shown in FIG. 6, the driving chip 600 further includes a driving control circuit 350 and a driving module 210. Figure 18B

[0236] The driving control circuit 350 is electrically connected with the auxiliary synchronization signal generation circuit 330. The driving control circuit 350 is configured to obtain the image data and the auxiliary synchronization signal, and calculate the light emitting data and the working timing corresponding to the image data.

[0237] The driving module 210 is electrically connected with the driving control circuit 350 and electrically connected with the light emitting unit group in the light emitting substrate through M second signal lines DL. The driving module 210 is configured to obtain the light emitting data and the working timing (which can be understood as the first control signal described above), and provide the light emitting data signal corresponding to the light emitting data to the light emitting unit group in the light emitting substrate.

[0238] The driving control circuit (Driver control block) 350 is electrically connected with the kernel 320, so as to obtain the image data provided by the timing control circuit 220 and the auxiliary synchronization signal provided by the auxiliary synchronization signal generation circuit 330. The image data includes the light emitting data of each light emitting unit group corresponding to each frame of display picture. The driving control module 350 is used to obtain the image data and the auxiliary synchronization signal, perform binary analysis on the image data, and perform timing analysis on the auxiliary synchronization signal, so as to obtain the binary light emitting data and the working timing corresponding to each second signal line DL.

[0239] ​The driving module (LED driver block) 210 is electrically connected with the driving control module 350 to obtain binary light-emitting data and working timing. The driving module 210 provides an electrical signal (i.e., light-emitting data signal) corresponding to the binary light-emitting data to a light-emitting unit group connected with the second signal line DL according to the working timing based on the binary light-emitting data and circuit devices such as transistors and variable capacitors through the second signal line DL, so that the light-emitting unit group emits light according to the received light-emitting data signal.

[0240] In addition, the driving module 210 further includes a high-low voltage comparator (VH / VL Comparator) 211 electrically connected with the FBO controller 370 for adjusting the backlight voltage. The driving module 210 further includes an open / short detector (Open / Short Detector) 212 electrically connected with the fault detector (Fault Detector) 380 for detecting whether there is an open circuit or a short circuit in the circuit. A pre-charge unit (Pre-charge) 213 is used to improve the voltage rising speed and discharging speed in the second signal line DL.

[0241] The driving chip 600 can further include a shift register (shift register) 360 for buffering or transmitting serial digital interface (Serial Digital Interface, SDI) data.

[0242] The driving chip 600 can cooperate with the timing control circuit 220. The timing control circuit 220 receives a frequency modulation signal and generates a frequency modulation synchronization signal corresponding to the frequency modulation signal. In the case of receiving the frequency modulation synchronization signal, the driving chip 600 can drive the writing stage of the light-emitting unit group in which the light-emitting data signal is written at the end of the previous frame period I and the writing stage of the light-emitting unit group in which the light-emitting data signal is written at the beginning of the current frame period II to be staggered, thereby avoiding the problem of backlight abnormality caused by incorrect charging of the light-emitting data signal, ensuring normal light emission of the light-emitting substrate, and improving the display effect of the display device.

[0243] In combination Figure 19 As shown, some embodiments of the present disclosure provide a timing control board 700. The timing control board 700 includes a first substrate 710, a timing control circuit 220, and a driving chip 600.

[0244] The timing control circuit 220 is located on the first substrate 710. The timing control circuit 220 is configured to: receive a frequency modulation signal; and generate a frequency modulation synchronization signal corresponding to the frequency modulation signal.

[0245] The driving chip 600 is the driving chip 600 as described above, located on the first substrate 710, and electrically connected with the timing control circuit 220.

[0246] In this embodiment, the driver chip 600 is integrated on the first substrate of the timing control board 700.

[0247] The timing control board 700 can receive the frequency modulation signal using the timing control circuit 220, and then the timing control circuit 220 generates a frequency modulation synchronization signal corresponding to the frequency modulation signal. The timing control board 700 can also receive the frequency modulation synchronization signal using the driver chip 600, and control the writing stage of the first light-emitting unit group that writes the light-emitting data signal in the current frame period II to be staggered from the writing stage of the last light-emitting unit group that writes the light-emitting data signal in the previous frame period I.

[0248] The specific method for controlling the writing phase of the first group of light-emitting units that writes light-emitting data signals in the current frame period II to be staggered from the writing phase of the last group of light-emitting units that writes light-emitting data signals in the previous frame period I has been explained in detail before and will not be repeated here.

[0249] In this way, when the timing control board 700 receives the frequency modulation signal, the timing control board 700 can drive the writing stage of the light-emitting unit group that writes the light-emitting data signal at the end of the previous frame period I in the light-emitting substrate to be staggered from the writing stage of the light-emitting unit group that writes the light-emitting data signal at the beginning of the current frame period II, thereby avoiding the problem of incorrect filling of light-emitting data signals, ensuring the normal light emission of the light-emitting substrate, and improving the display effect of the display device.

[0250] like Figure 20 As shown, some embodiments of this disclosure provide a light-emitting substrate 800. The light-emitting substrate 800 includes a second substrate 810, a plurality of light-emitting unit groups ZE, and a driving chip 600.

[0251] The light-emitting unit group ZE is located on the second substrate 810. The driver chip 600 is located on the second substrate 810 and is electrically connected to multiple light-emitting unit groups ZE.

[0252] In this embodiment, the driving chip 600 is integrated on the second substrate 810 of the light-emitting substrate 800.

[0253] The light-emitting substrate 800 can receive the frequency modulation synchronization signal using the driver chip 600, and control the writing phase of the first light-emitting unit group ZE that writes the light-emitting data signal in the current frame period II to be staggered from the writing phase of the last light-emitting unit group ZE that writes the light-emitting data signal in the previous frame period I.

[0254] The specific method for controlling the writing phase of the first light-emitting unit group ZE that writes light-emitting data signals in the current frame period II to be staggered from the writing phase of the last light-emitting unit group ZE that writes light-emitting data signals in the previous frame period I has been explained in detail before and will not be repeated here.

[0255] In this way, when a frequency modulation signal is received, the light-emitting substrate 800 can stagger the writing phase of the light-emitting unit group ZE that writes the light-emitting data signal at the end of the previous frame period I with the writing phase of the light-emitting unit group ZE that writes the light-emitting data signal at the beginning of the current frame period II, thereby avoiding the problem of incorrect filling of light-emitting data signals, ensuring the normal light emission of the light-emitting substrate, and improving the display effect of the display device.

[0256] like Figure 21 As shown, some embodiments of this disclosure provide a backlight module 900. The backlight module 900 includes a light-emitting substrate 910 and a driver chip 600.

[0257] The driving chip is the driving chip 600 as described above, and the driving chip 600 is electrically connected to the light-emitting substrate 910.

[0258] In this way, when the backlight module 900 receives the frequency modulation synchronization signal, the light-emitting substrate 910 can stagger the writing stage of the light-emitting unit group ZE that writes the light-emitting data signal at the end of the previous frame period I and the writing stage of the light-emitting unit group ZE that writes the light-emitting data signal at the beginning of the current frame period II, thereby avoiding the problem of incorrect filling of light-emitting data signals, ensuring the normal light emission of the light-emitting substrate, and improving the display effect of the display device.

[0259] like Figure 22A As shown, this disclosure provides a display device 1000. The display device 1000 includes a light-emitting substrate 910, a driver chip 600, and a timing control board 930.

[0260] The driving chip is the driving chip 600 as described above, and the driving chip 600 is electrically connected to the light-emitting substrate 910 and the timing control board 930 respectively.

[0261] The timing control board 930 receives the frequency modulation signal and generates a frequency modulation synchronization signal corresponding to the frequency modulation signal. The driver chip 600 receives the frequency modulation synchronization signal and controls the writing phase of the first light-emitting unit group ZE that writes light-emitting data signals in the current frame period II to be staggered from the writing phase of the last light-emitting unit group ZE that writes light-emitting data signals in the previous frame period I.

[0262] In this way, when the display device 1000 receives the frequency modulation signal, the light-emitting substrate 910 can avoid the problem of incorrect charging of the light-emitting data signal by staggering the write stage of the light-emitting unit group ZE to which the light-emitting data signal is written at the end of the previous frame period I and the write stage of the light-emitting unit group ZE to which the light-emitting data signal is written at the beginning of the current frame period II, thereby ensuring normal light emission of the light-emitting substrate and improving the display effect of the display device.

[0263] In some embodiments, as shown in FIG. 6, the driving chip 600 is integrated on the light-emitting substrate 910. The light-emitting substrate 910 includes a second substrate 911 and a plurality of light-emitting unit groups ZE on the second substrate 911. At the same time, the driving chip 600 is also on the second substrate 911 and is electrically connected to the plurality of light-emitting unit groups ZE. Figure 22B

[0264] In some embodiments, as shown in FIG. 7, the driving chip 600 is integrated on the timing control board 930. The light-emitting substrate 910 includes a second substrate 911 and a plurality of light-emitting unit groups ZE on the second substrate 911. At the same time, the timing control board 930 includes a first substrate 931, the driving chip 600 is on the first substrate 710 and is electrically connected to the timing control circuit 220. The driving chip 600 is also electrically connected to the plurality of light-emitting unit groups ZE. Figure 22C

[0265] The first substrate 931 can be a flexible printed circuit (FPC), and the FPC can be bound to the second substrate 911 of the light-emitting substrate 910 to realize the butt joint of the electrical signal transmission path. Further, the FPC can be bent to be bound to the side of the second substrate 911 away from the light-emitting side, so as to reduce the frame width of the light-emitting substrate 910 and facilitate the realization of the narrow frame of the display device.

[0266] In combination with FIG. 8, the display device 1000 provided by the present disclosure is provided. The display device 1000 includes a backlight module 900, a timing control board 930, and a frequency modulation circuit 990. Figure 23

[0267] The backlight module 900 is the backlight module 900 described above. The timing control board 930 is electrically connected to the driving chip 600 of the backlight module 900. The frequency modulation circuit 990 is configured to provide a frequency modulation signal. The frequency modulation circuit 990 is electrically connected to the timing control board 930 of the backlight module 900 to provide the frequency modulation signal to the timing control board 930.

[0268] ​​​The timing control board 930 receives the frequency modulation signal and generates a frequency modulation synchronization signal corresponding to the frequency modulation signal. The drive chip 600 receives the frequency modulation synchronization signal and controls the write-in stage of the light emitting unit group ZE in which the light emitting data signal is written in first in the current frame period II to be staggered with the write-in stage of the light emitting unit group ZE in which the light emitting data signal is written at the end in the previous frame period I based on the frequency modulation synchronization signal.

[0269] In this way, when the display module 1000 is in a case that the frequency modulation circuit 990 provides the frequency modulation signal to the timing control board 930, the light emitting substrate can realize the write-in stage of the light emitting unit group ZE in which the light emitting data signal is written in first in the current frame period II to be staggered with the write-in stage of the light emitting unit group ZE in which the light emitting data signal is written at the end in the previous frame period I, thereby avoiding the problem of backlight abnormality caused by the light emitting data signal being charged incorrectly, and improving the display effect of the display device.

[0270] In combination Figure 24 As shown in the figure, the display device 1000 is provided. The display device 1000 is electrically connected with an external frequency modulation circuit 2000. The frequency modulation circuit 2000 can be a graphics card, an APU (accelerated processor) or the like, which can change the display frequency of the display device.

[0271] The display device 1000 includes a timing control circuit 220, a scan control module 110 and a light emitting substrate 400 which are electrically connected in sequence.

[0272] The frequency modulation circuit 2000 provides a start signal (Blanking Sttart, BS) of an interval period between adjacent two frames and an end signal (Blanking End, BE) of the interval period. The timing control circuit 220 can determine the frame frequency corresponding to the frequency modulation signal through the BS signal and the BE signal, and generate a frequency modulation synchronization signal (VSYNC) based on the frequency modulation signal.

[0273] The scan control module 110 generates an auxiliary synchronization signal (RESYNC) based on the frequency modulation synchronization signal, and provides driving signals to the light emitting substrate 400 through the first signal line GL in time based on the auxiliary synchronization signal. A plurality of light emitting unit groups ZE in a light emitting unit group QE in the light emitting substrate 400 enter the write-in stage in time according to the driving signals, and then obtain corresponding light emitting data signals in time. Each light emitting unit group ZE emits light according to the obtained light emitting data signal, realizing picture display.

[0274] Some embodiments of the present disclosure provide a computer readable storage medium (for example, a non-transitory computer readable storage medium) having stored therein computer program instructions, which, when executed on a processor, cause the processor to perform one or more steps of the driving method of the light emitting substrate as described in any of the above embodiments.

[0275] By way of example, the computer-readable storage media described above can include, but is not limited to, magnetic storage devices (e.g., hard disk, floppy disk, or magnetic tape), optical storage devices (e.g., compact disk (CD), digital versatile disk (DVD), etc.), smart cards, and flash memory devices (e.g., EPROM, card, stick, or key drive). The various computer-readable storage media described above can represent one or more devices and / or other machine-readable storage media for storing information. The term “machine-readable storage medium” shall accordingly include, but not be limited to, wireless channels and various other media capable of storing, containing, and / or carrying instruction(s) and / or data.

[0276] Some embodiments of the present disclosure further provide a computer program product. The computer program product includes computer program instructions, which, when executed on a computer, cause the computer to perform one or more steps of the driving method of the light-emitting substrate as described in the above embodiments.

[0277] Some embodiments of the present disclosure further provide a computer program. When the computer program is executed on a computer, the computer program causes the computer to perform one or more steps of the driving method of the light-emitting substrate as described in the above embodiments.

[0278] The computer-readable storage media, the computer program product, and the computer program described above have the same beneficial effects as the driving method of the light-emitting substrate described in the above embodiments, and thus repeated descriptions are omitted here.

[0279] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by using a software program, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions according to the embodiments of the present disclosure are generated. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center through a wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be accessed by a computer or data storage device including one or more servers, data centers, etc. integrated with the medium. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0280] The above description is merely a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who thinks of changes or replacements within the technical range disclosed by the present disclosure should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A driving method of a light emitting substrate, characterized by, The light-emitting substrate comprises at least one light-emitting unit group, N light-emitting unit groups correspond to N first signal lines respectively; M light-emitting units in one light-emitting unit group correspond to M second signal lines respectively, N light-emitting unit groups in the same light-emitting unit group are connected to the same M second signal lines, and N and M are positive integers; In a frame period, the N first signal lines provide driving signals to the N light-emitting unit groups in time, so that the N light-emitting unit groups are in a writing stage in time; in the writing stage of one light-emitting unit group, the M second signal lines simultaneously provide light-emitting data signals to the M light-emitting units in the light-emitting unit group; The driving method comprises: receiving a frequency-modulated signal; generating a frequency-modulated synchronization signal corresponding to the frequency-modulated signal; in the case that the rising edge of the frequency-modulated synchronization signal is in the writing stage of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period, generating an auxiliary synchronization signal; based on the auxiliary synchronization signal, controlling the writing stage of the light-emitting unit group writing the light-emitting data signal at the beginning of the current frame period to be staggered with the writing stage of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period; wherein the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period and the light-emitting unit group writing the light-emitting data signal at the beginning of the current frame period belong to the same light-emitting unit group.

2. The driving method according to claim 1, wherein The step of generating the auxiliary synchronization signal comprises: generating the auxiliary synchronization signal with the rising edge after the writing stage of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period.

3. The driving method according to claim 2, wherein The step of generating the auxiliary synchronization signal with the rising edge after the writing stage of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period comprises: obtaining a starting writing time point of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period and a preset writing duration; based on the starting writing time point of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period and the preset writing duration, calculating a target time point; the time interval between the starting writing time point of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period and the target time point is greater than the preset writing duration; generating the auxiliary synchronization signal with the rising edge at the same time point as the target time point.

4. The driving method according to claim 3, wherein The step of calculating the target time point based on the starting writing time point of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period and the preset writing duration comprises: calculating a target time interval between the starting writing time points of two adjacent light-emitting unit groups writing the light-emitting data signal in the previous frame period; on the basis of the starting writing time point of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period, adding the target time interval to obtain the target time point.

5. The driving method according to any one of claims 2 to 4, wherein The step of generating the auxiliary synchronization signal with the rising edge after the writing stage of the light-emitting unit group writing the light-emitting data signal at the end of the previous frame period further comprises: The signal duration of the obtained frequency-modulated synchronization signal is taken as the signal duration of the auxiliary synchronization signal.

6. The driving method according to any one of claims 2 to 4, wherein The step of controlling the write-in stage of the light-emitting unit group that writes in the light-emitting data signal first in the current frame period to be staggered with the write-in stage of the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period based on the auxiliary synchronization signal comprises: controlling the light-emitting unit group that needs to write in the light-emitting data signal first in the current frame period to start writing in the light-emitting data signal when the rising edge of the auxiliary synchronization signal arrives.

7. The driving method according to claim 1, wherein Further comprising: updating the light-emitting data signal after the write-in stage of the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period and before the write-in stage of the light-emitting unit group that writes in the light-emitting data signal first in the current frame period; in the write-in stage of the light-emitting unit group that writes in the light-emitting data signal first in the current frame period, using the M second signal lines to provide the light-emitting unit group that writes in the light-emitting data signal first in the current frame period with the updated light-emitting data signal.

8. The driving method according to claim 1, wherein The light-emitting unit group that writes in the light-emitting data signal first in the current frame period is the next light-emitting unit group of the light-emitting unit group that writes in the light-emitting data signal last in the write-in sequence of the light-emitting unit group corresponding to the previous frame period.

9. A driving device of a light emitting substrate, characterized by, The light-emitting substrate comprises at least one light-emitting unit group, and N light-emitting unit groups in one light-emitting unit group are respectively electrically connected to N first signal lines; M light-emitting units in one light-emitting unit group are respectively electrically connected to M second signal lines, and N light-emitting unit groups in the same light-emitting unit group are connected to the same M second signal lines, wherein N and M are positive integers. In one frame period, the N first signal lines provide driving signals to the N light-emitting unit groups in time division, so that the N light-emitting unit groups are in the write-in stage in time division; and in the write-in stage of one light-emitting unit group, the M second signal lines simultaneously provide light-emitting data signals to the M light-emitting units in the light-emitting unit group. The driving device of the light-emitting substrate comprises: a receiving module configured to receive a frequency-modulated signal; a first generating module configured to generate a frequency-modulated synchronization signal corresponding to the frequency-modulated signal; a second generating module configured to generate an auxiliary synchronization signal in the case that the rising edge of the frequency-modulated synchronization signal is in the write-in stage of the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period; a control module configured to control the write-in stage of the light-emitting unit group that writes in the light-emitting data signal first in the current frame period to be staggered with the write-in stage of the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period based on the auxiliary synchronization signal; wherein the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period and the light-emitting unit group that writes in the light-emitting data signal first in the current frame period belong to the same light-emitting unit group.

10. The drive apparatus according to claim 9, characterized by The second generating module is further configured to generate the auxiliary synchronization signal with the rising edge after the write-in stage of the light-emitting unit group that writes in the light-emitting data signal last in the previous frame period.

11. The drive apparatus according to claim 10, characterized by The second generating module comprises: The acquisition submodule is configured to acquire a starting writing time point of a light emitting unit group to which the light emitting data signal is written at the end of the previous frame period and a preset writing duration; The calculation submodule is configured to calculate a target time point based on the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period and the preset writing duration; a time interval between the target time point and the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period is greater than the preset writing duration; The generation submodule is configured to generate an auxiliary synchronization signal with a rising edge at the target time point.

12. The drive apparatus according to claim 11, characterized by The calculation submodule comprises: The first calculation unit is configured to calculate a target time interval between starting writing time points of two adjacent light emitting unit groups to which the light emitting data signal is written in the previous frame period; The second calculation unit is configured to add the target time interval to the starting writing time point of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period to obtain the target time point.

13. The drive arrangement of any of claims 10-12, wherein, The second generation module is further configured to take a signal duration of the frequency-modulated synchronization signal as a signal duration of the auxiliary synchronization signal.

14. The drive apparatus according to any one of claims 10 to 12, characterized by The control module is further configured to control a light emitting unit group to which the light emitting data signal needs to be written first in the current frame period to start writing the light emitting data signal when the rising edge of the auxiliary synchronization signal arrives.

15. The drive apparatus according to claim 9, wherein Further comprising: The update module is configured to update the light emitting data signal after a writing stage of the light emitting unit group to which the light emitting data signal is written at the end of the previous frame period and before a writing stage of the light emitting unit group to which the light emitting data signal is written first in the current frame period. The providing module is configured to provide the light emitting unit group to which the light emitting data signal is written first in the current frame period with the updated light emitting data signal by using the M second signal lines in the writing stage of the light emitting unit group to which the light emitting data signal is written first in the current frame period.

16. The drive apparatus according to claim 9, characterized by The light emitting unit group to which the light emitting data signal is written first in the current frame period is a next light emitting unit group of the light emitting unit group to which the light emitting data signal is written at the end in the writing sequence of the light emitting unit group in the previous frame period.

17. A driving chip configured to drive a light-emitting substrate to emit light, characterized in that, The light emitting substrate comprises at least one light emitting unit group; N light emitting unit groups in one light emitting unit group are respectively electrically connected to N first signal lines; M light emitting units in one light emitting unit group are respectively electrically connected to M second signal lines; N light emitting unit groups in the same light emitting unit group are connected to the same M second signal lines; the N and the M are positive integers; In one frame period, the N first signal lines provide driving signals to the N light emitting unit groups in time division to make the N light emitting unit groups in time division in a writing stage; in the writing stage of one light emitting unit group, the M second signal lines simultaneously provide light emitting data signals to M light emitting units in the light emitting unit group; The driving chip comprises a receiver and a processing module which are electrically connected to each other; the processing module is further electrically connected to the light emitting substrate. The receiver is configured to receive a frequency-modulated synchronization signal; The processing module is configured to generate an auxiliary synchronization signal in the case that a rising edge of the frequency-modulated synchronization signal is in a write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of a previous frame period, and control a write-in stage of a first light-emitting unit group writing in light-emitting data signals in a current frame period to be staggered with the write-in stage of the light-emitting unit group writing in light-emitting data signals at the end of the previous frame period based on the auxiliary synchronization signal. The light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and the first light-emitting unit group writing in light-emitting data signals in the current frame period belong to the same light-emitting unit group.

18. A driving chip configured to drive a light-emitting substrate to emit light, characterized in that, The light-emitting substrate comprises at least one light-emitting unit group, N light-emitting unit groups in one light-emitting unit group are respectively electrically connected with N first signal lines; M light-emitting units in one light-emitting unit group are respectively electrically connected with M second signal lines, N light-emitting unit groups in the same light-emitting unit group are connected with the same M second signal lines, and N and M are positive integers; In a frame period, the N first signal lines provide driving signals to the N light-emitting unit groups in time, so that the N light-emitting unit groups are in a write-in stage in time; in the write-in stage of one light-emitting unit group, the M second signal lines simultaneously provide light-emitting data signals to the M light-emitting units in the light-emitting unit group; The driving chip comprises: The data interface is configured to receive a frequency-modulated synchronization signal and image data; The auxiliary synchronization signal generation circuit is electrically connected with the data interface; the auxiliary synchronization signal generation circuit is configured to generate an auxiliary synchronization signal in the case that a rising edge of the frequency-modulated synchronization signal is in a write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of a previous frame period; The scan control module is electrically connected with the auxiliary synchronization signal generation circuit; the scan control module is configured to control a write-in stage of a first light-emitting unit group writing in light-emitting data signals in a current frame period to be staggered with a write-in stage of a light-emitting unit group writing in light-emitting data signals at the end of a previous frame period; The light-emitting unit group writing in light-emitting data signals at the end of the previous frame period and the first light-emitting unit group writing in light-emitting data signals in the current frame period belong to the same light-emitting unit group.

19. The driver chip of claim 18, wherein, Further comprising: The driving control circuit is electrically connected with the auxiliary synchronization signal generation circuit; The driving control circuit is configured to obtain the image data and calculate light-emitting data corresponding to the image data; The driving module is electrically connected with the driving control circuit and the light-emitting unit group in the light-emitting substrate through the M second signal lines; the driving module is configured to obtain the light-emitting data and provide light-emitting data signals corresponding to the light-emitting data to the light-emitting unit group in the light-emitting substrate.

20. A timing control board characterized by, Comprise: A first substrate; A timing control circuit on the first substrate; The timing control circuit is configured to receive a frequency-modulated signal; And generate a frequency-modulated synchronization signal corresponding to the frequency-modulated signal; And The driving chip according to any one of claims 17-19 is located on the first substrate and is electrically connected to the timing control circuit.

21. A light-emitting substrate, characterized by Comprising: a second substrate; a plurality of light emitting unit groups located on the second substrate; The driving chip according to any one of claims 17-19 is located on the second substrate and is electrically connected to the plurality of light emitting unit groups.

22. A backlight module, comprising: Comprising: a light emitting substrate; The driving chip according to any one of claims 17-19 is electrically connected to the light emitting substrate.

23. A display device comprising: Comprising: a light emitting substrate; The driving chip according to any one of claims 17-19 is electrically connected to the light emitting substrate; and a timing control board electrically connected to the driving chip.

24. The display device according to claim 23, wherein the driving chip is integrated on the light emitting substrate, or the driving chip is integrated on the timing control board.

25. A display device comprising: Comprising: the backlight module according to claim 22; a timing control board electrically connected to the driving chip of the backlight module; a frequency modulation circuit electrically connected to the timing control board to provide a frequency modulation signal to the timing control board.

26. A computer storage medium, comprising, The computer readable storage medium stores computer program instructions, and the computer program instructions, when executed by a processor, cause the processor to perform one or more steps of the driving method of the light emitting substrate according to any one of claims 1-8.

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