A hardware device detection method and device, electronic device and storage medium

Abstract

Embodiments of the present application provide a hardware device detection method and device, electronic equipment and storage medium, which determine a target hardware device with the same target bus I2C from the hardware device; the target hardware device has a corresponding driver, which is used to provide a test interface for the target hardware device; a test thread for the target bus I2C is generated; the target test interface corresponding to the target hardware device is determined from the test interface through the test thread; and the target hardware device is detected through the target test interface called by the test thread, so as to realize automatic detection of the hardware device based on bus I2C for data interaction, thereby improving the detection efficiency.

Description

Technical Field

[0001] This invention relates to the field of hardware device testing technology, and in particular to a hardware device testing method, a hardware device testing apparatus, an electronic device, and a computer-readable storage medium. Background Technology

[0002] The Baseboard Management Controller (BMC) is a remote management controller for servers. It allows for operations such as firmware upgrades and device monitoring even when the machine is not powered on. The I2C bus is a simple, bidirectional, two-wire synchronous serial bus that enables information transmission between devices connected to it. In the server field, different projects and products use different motherboard forms and manage different peripherals, such as… Figure 1 As shown, Figure 1 This is a schematic diagram of the connection between different external devices and BMC provided by existing technology. For different types of BMC onboard I2C hardware devices, the device topology can be different, and the buses connected to the devices can also be different. For example, different hardware devices can be connected to different I2C buses, different hardware devices can also be connected to the same bus switch (i2c switch), and different hardware devices can also be connected to different bus switches (i2c switches).

[0003] In practical applications, during the production testing phase, it is often necessary to test the onboard I2C hardware devices of the BMC. In related technologies, hardware function testing of the BMC's onboard I2C hardware devices requires quality control personnel to test the hardware devices using BMC commands. This testing method requires the BMC to provide specific interfaces for different hardware, and quality control personnel also need to develop corresponding test scripts for different boards and components. However, due to significant differences in motherboards, using the above method for quality control leads to low efficiency. Summary of the Invention

[0004] The present invention provides a hardware device detection method, apparatus, electronic device, and computer-readable storage medium to address the problem of how to improve the detection efficiency of hardware devices that perform data interaction based on the I2C bus.

[0005] This invention discloses a hardware device detection method, wherein the hardware device is a hardware device that interacts with the Baseboard Management Controller (BMC) via the I2C bus, comprising:

[0006] A target hardware device with the same target bus I2C is identified from the hardware devices; the target hardware device has a corresponding driver, which is used to provide a test interface for the target hardware device;

[0007] Generate a test thread for the target I2C bus;

[0008] The target test interface corresponding to the target hardware device is determined from the test interface through the test thread;

[0009] The target hardware device is detected by calling the target test interface through the test thread.

[0010] Optionally, it may also include:

[0011] Generate a management list for the target I2C bus; the management list corresponds one-to-one with the target I2C bus.

[0012] The target hardware device is instantiated and added to the management list to register the target hardware device with the Baseboard Management Controller (BMC).

[0013] Optionally, the step of generating a test thread for the target I2C bus may include:

[0014] The management list is traversed, and when the target hardware device exists in the management list, a test thread for the target bus I2C is generated.

[0015] Optionally, the step of determining the target test interface corresponding to the target hardware device from the test interface through the test thread may include:

[0016] The test thread traverses the management list to identify the target hardware device in the management list, and determines the target test interface corresponding to the target hardware device from the test interface.

[0017] Optionally, the step of calling the target test interface through the test thread to detect the target hardware device may include:

[0018] The test thread calls the target test interface to obtain the test data of the target hardware device, and sets the number of test rounds according to a preset number of times;

[0019] Determine whether the number of test rounds is zero;

[0020] When the number of test rounds is not zero, a write operation is performed on the data to be tested using preset data, and it is determined whether the write operation is successful.

[0021] When the write operation is determined to be successful, a read operation is performed on the data to be tested for the preset data, and it is determined whether the read operation is successful.

[0022] When the read operation is determined to be successful, the read data corresponding to the read operation is obtained, and it is determined whether the read data is consistent with the preset data.

[0023] When it is determined that the read data is consistent with the preset data, the step of determining whether the number of test rounds is zero is executed.

[0024] Optionally, it may also include:

[0025] When the number of test rounds is zero, a detection result is generated;

[0026] Generate backup data for the detection results and end the test.

[0027] Optionally, it may also include:

[0028] If the write operation is determined to be unsuccessful, or if the read operation is determined to be unsuccessful, or if the read data is determined to be inconsistent with the preset data, the test is determined to be unsuccessful and the test ends.

[0029] This invention also provides a hardware device detection apparatus, wherein the hardware device is a hardware device that interacts with the Baseboard Management Controller (BMC) via the I2C bus, comprising:

[0030] A target hardware device determination module is used to determine a target hardware device with the same target bus I2C from the hardware devices; the target hardware device has a corresponding driver, and the driver is used to provide a test interface for the target hardware device;

[0031] A test thread generation module is used to generate test threads for the target I2C bus.

[0032] The target test interface determination module is used to determine the target test interface corresponding to the target hardware device from the test interface through the test thread;

[0033] The target hardware device detection module is used to detect the target hardware device by calling the target test interface through the test thread.

[0034] Optionally, it may also include:

[0035] The management list generation module is used to generate a management list for the target I2C bus; the management list corresponds one-to-one with the target I2C bus.

[0036] The device registration module is used to instantiate the target hardware device and add the target hardware device to the management list to register the target hardware device with the Baseboard Management Controller (BMC).

[0037] Optionally, the test thread generation module may include:

[0038] A test thread generation submodule is used to traverse the management list, and when the target hardware device exists in the management list, a test thread is generated for the target bus I2C.

[0039] Optionally, the target test interface determination module may include:

[0040] The target test interface determination submodule is used to traverse the management list using the test thread to determine the target hardware device in the management list, and to determine the target test interface corresponding to the target hardware device from the test interface.

[0041] Optionally, the target hardware device detection module may include:

[0042] The first target hardware device detection submodule is used to obtain the test data of the target hardware device by calling the target test interface through the test thread, and set the test round number value according to a preset number of times;

[0043] The second target hardware device detection submodule is used to determine whether the number of test rounds is zero;

[0044] When the number of test rounds is not zero, the third target hardware device detection submodule is invoked.

[0045] The third target hardware device detection submodule is used to perform a write operation on the data to be tested using preset data, and to determine whether the write operation is successful.

[0046] When the write operation is determined to be successful, the fourth target hardware device detection submodule is invoked.

[0047] The fourth target hardware device detection submodule is used to perform a read operation on the preset data of the test data and determine whether the read operation is successful.

[0048] When the read operation is determined to be successful, the fifth target hardware device detection submodule is invoked;

[0049] The fifth target hardware device detection submodule is used to acquire the read data corresponding to the read operation and determine whether the read data is consistent with the preset data;

[0050] When it is determined that the read data is consistent with the preset data, the second target hardware device detection submodule is invoked.

[0051] Optionally, it may also include:

[0052] When the number of test rounds is zero, the sixth target hardware device detection submodule is invoked.

[0053] The sixth target hardware device detection submodule is used to generate detection results;

[0054] The seventh target hardware device detection submodule is used to generate backup data for the detection results and end the test.

[0055] Optionally, it may also include:

[0056] When the write operation is determined to be unsuccessful, or when the read operation is determined to be unsuccessful, or when the read data is determined to be inconsistent with the preset data, the eighth target hardware device detection submodule is invoked.

[0057] The eighth target hardware device detection submodule is used to determine if the test has failed and to terminate the test.

[0058] This invention also discloses an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus;

[0059] The memory is used to store computer programs;

[0060] When the processor executes a program stored in the memory, it implements the method described in the embodiments of the present invention.

[0061] This invention also discloses a computer-readable storage medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described in this invention.

[0062] The embodiments of the present invention have the following advantages:

[0063] In this embodiment of the invention, a target hardware device with the same target I2C bus is identified from the hardware devices; the target hardware device has a corresponding driver, which provides a test interface for the target hardware device; a test thread for the target I2C bus is generated; a target test interface corresponding to the target hardware device is determined from the test interface through the test thread; and the target hardware device is detected by calling the target test interface through the test thread, thereby achieving automatic detection of hardware devices that interact with data based on the I2C bus, thus improving detection efficiency. Attached Figure Description

[0064] Figure 1 This is a schematic diagram of the connection between different external devices and the BMC provided by existing technology;

[0065] Figure 2 This is a flowchart of the steps of a hardware device detection method provided in an embodiment of the present invention;

[0066] Figure 3 This is a schematic diagram of the software layered structure of a hardware device detection software provided in an embodiment of the present invention;

[0067] Figure 4 This is a flowchart illustrating a hardware device registration process provided in an embodiment of the present invention;

[0068] Figure 5 This is a flowchart illustrating an instantiation operation provided in an embodiment of the present invention;

[0069] Figure 6 This is a flowchart illustrating a hardware device testing process provided in an embodiment of the present invention;

[0070] Figure 7 This is a flowchart illustrating a hardware device stress test process provided in an embodiment of the present invention.

[0071] Figure 8 This is a structural block diagram of a hardware device detection device provided in an embodiment of the present invention;

[0072] Figure 9 This is a hardware structure block diagram of an electronic device provided in various embodiments of the present invention;

[0073] Figure 10 This is a schematic diagram of a computer-readable medium provided in an embodiment of the present invention. Detailed Implementation

[0074] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0075] To enable those skilled in the art to better understand the embodiments of the present invention, some technical terms of the embodiments of the present invention are explained below.

[0076] I2C: The I2C bus is a simple, bidirectional, two-wire synchronous serial bus. It requires only two wires to transmit information between devices connected to the bus. The master device initiates data transmission on the bus and generates a clock to enable transmission; any addressed device is considered a slave device. The master-slave and send-receive relationships on the bus are not constant but depend on the direction of data transmission. If the master wants to send data to a slave device, it first addresses the slave device, then actively sends data to the slave device, and finally terminates the data transmission. If the master wants to receive data from a slave device, it first addresses the slave device, then receives the data sent by the slave device, and finally terminates the receiving process. In this case, the master is responsible for generating the timing clock and terminating the data transmission.

[0077] BMC stands for Baseboard Management Controller. It is a dedicated controller used for monitoring and managing servers, with four main functions: 1. Device Information Management: Records server information (model, manufacturer, date, production and technical information of each component, chassis information, motherboard information, etc.) and BMC information (server hostname, IP address, BMC firmware version, etc.); 2. Server Status Monitoring and Management: Monitors the health status of various server components (CPU, memory, hard drive, fans, chassis, etc.) such as temperature and voltage, and adjusts fan speeds in real time based on temperature data to prevent overheating and control overall power consumption; if any abnormality occurs in a single board component, the information is promptly reported to the upper-level network management system via various industry-standard protocols such as SNMP, SMTP, and Redfish; 3. Remote Control Management of Servers: Server power on / off, restart, maintenance, firmware updates, system installation, etc.; 4. Maintenance Management: Log management, user management, BIOS management, alarm management, etc.

[0078] EEP: EEPROM (Electrically Erasable Programmable Read-Only Memory) refers to an electrically erasable programmable read-only memory. It is a type of memory chip that does not lose data after power is lost.

[0079] Reference Figure 2 The diagram illustrates a flowchart of a hardware device detection method provided in an embodiment of the present invention, which may specifically include the following steps:

[0080] Step 201: Identify a target hardware device with the same target bus I2C from the hardware devices; the target hardware device has a corresponding driver, which is used to provide a test interface for the target hardware device;

[0081] Step 202: Generate a test thread for the target I2C bus;

[0082] Step 203: Determine the target test interface corresponding to the target hardware device from the test interface through the test thread;

[0083] Step 204: The target hardware device is detected by calling the target test interface through the test thread.

[0084] In a specific implementation, the embodiments of the present invention can be applied to a server, which can be configured with a baseboard management controller (BMC) and a hardware device that interacts with the baseboard management controller (BMC) via the I2C bus.

[0085] like Figure 3 As shown, Figure 3 This is a schematic diagram of the software layered structure of a hardware device detection software provided in an embodiment of the present invention. The layered logic of the hardware device detection software may include an APP layer, an APP HAL layer, a platform layer, and a driver layer. The APP layer may include an APP management module and information acquisition and control logic. The APP HAL layer may include the hardware access interface corresponding to each APP and further encapsulate the platform layer. The platform layer may include descriptions of hardware platform device information, such as I2C address, I2C bus information, initial information, etc., and a device registration list. The driver layer can be used to implement access logic for each driver, including reading, writing, control, initialization, etc.

[0086] In practical applications, the configuration information varies across different platforms. This embodiment of the invention can describe the basic information of I2C devices at the platform level. This basic information may include I2C address, initialization parameter information, bus information, and topology information. It can also register devices and generate driver instances for each device, adding them to the device list for convenient subsequent management.

[0087] For different devices, there are multiple different device drivers. The driver layer of this embodiment can be used to provide corresponding test interfaces for different test methods, such as single-unit testing, batch testing, and stress testing. The test methods for different devices are inconsistent. Some read-only devices only have read attributes, while some devices have read and write attributes. In specific implementations, test interfaces can be separated through device drivers.

[0088] In this embodiment of the invention, a target hardware device with the same target bus I2C can be determined from the hardware devices. Specifically, the platform device file or global list can be read from the platform layer to determine the hardware device with the same target bus I2C and use it as the target hardware device.

[0089] After identifying the target hardware device, embodiments of the present invention can determine the driver for the target hardware device through the driver layer, and the driver can provide a corresponding test interface for the target hardware device.

[0090] In practical applications, there may be one or more I2C buses connected to the Baseboard Management Controller (BMC). In this embodiment of the invention, the target I2C bus can be determined and a test thread for the target I2C bus can be generated. Specifically, to improve detection efficiency, different test processes can be generated for different I2C buses.

[0091] After determining the test thread, this embodiment of the invention can use the test thread to determine the target test interface corresponding to the target hardware device from multiple test interfaces for the target hardware device, and use the test thread to call the target test interface to detect the target hardware device.

[0092] For example, different test categories can be used for the target hardware device, such as single-unit testing, batch testing, and stress testing. Different test categories can have corresponding test interfaces. The test category for the target hardware device can be determined first. Let's say the test category is stress testing. The test thread can determine the target test interface corresponding to the stress test from multiple test interfaces for the target hardware device. When only single-unit testing needs to be performed on the hardware device and there is no need to start the cyclic stress test of the bus, the test thread can directly call the target test interface to perform stress testing on the target hardware device.

[0093] In this embodiment of the invention, a target hardware device with the same target I2C bus is identified from the hardware devices; the target hardware device has a corresponding driver, which provides a test interface for the target hardware device; a test thread for the target I2C bus is generated; a target test interface corresponding to the target hardware device is determined from the test interface through the test thread; and the target hardware device is detected by calling the target test interface through the test thread, thereby achieving automatic detection of hardware devices that interact with data based on the I2C bus, thus improving detection efficiency.

[0094] Based on the above embodiments, modified embodiments of the above embodiments are proposed. It should be noted that, in order to keep the description brief, only the differences from the above embodiments are described in the modified embodiments.

[0095] In an optional embodiment of the present invention, it further includes:

[0096] Generate a management list for the target I2C bus; the management list corresponds one-to-one with the target I2C bus.

[0097] The target hardware device is instantiated and added to the management list to register the target hardware device with the Baseboard Management Controller (BMC).

[0098] In practical applications, in order to further improve the detection efficiency of hardware devices that interact with data via the I2C bus, embodiments of the present invention can perform a registration process before executing the test process.

[0099] Specifically, such as Figure 4 As shown, Figure 4 This is a flowchart illustrating a hardware device registration process provided in this embodiment of the invention. After reading the platform device file or global list from the platform layer to identify hardware devices with the same target I2C bus and designating them as target hardware devices, this embodiment of the invention can generate a management list for the target I2C bus. When multiple I2C buses exist, a management list is generated for devices on one I2C bus. The management list can be used to register hardware devices with the Baseboard Management Controller (BMC). When a hardware device exists in the management list, the BMC can know the currently registered hardware devices by looking up the table. Therefore, this embodiment of the invention can add the target hardware device to the management list after instantiating the target hardware device to complete the registration of the target hardware device with the BMC.

[0100] In object-oriented programming, instantiation refers to the process of creating an object from a class. Figure 5 As shown, Figure 5 This is a flowchart illustrating an instantiation operation provided in an embodiment of the present invention. In this embodiment, the target hardware device can be instantiated before being registered with the Baseboard Management Controller (BMC) so that the target hardware device has a driver for providing a test interface.

[0101] In this embodiment of the invention, a management list for the target I2C bus is generated; the management list corresponds one-to-one with the target I2C bus; the target hardware device is instantiated and added to the management list to register the target hardware device with the Baseboard Management Controller (BMC), thereby further improving the detection efficiency of hardware devices that interact with data via the I2C bus.

[0102] In an optional embodiment of the present invention, the step of generating a test thread for the target I2C bus includes:

[0103] The management list is traversed, and when the target hardware device exists in the management list, a test thread for the target bus I2C is generated.

[0104] refer to Figure 6 , Figure 6 This is a flowchart illustrating a hardware device testing process provided in this embodiment of the invention. When multiple target I2C buses exist, to ensure that corresponding test threads are generated for the same target I2C bus, thereby further improving the testing efficiency of hardware devices that interact with data via I2C bus, this embodiment of the invention can traverse the management list. When the target hardware device exists in the management list, a test thread for the target I2C bus is generated. Furthermore, since all hardware devices registered with the Baseboard Management Controller (BMC) in the management list are target hardware devices with the same target I2C bus, it can be guaranteed that the test threads generated for the target hardware device after traversing the management list are all test threads for the same target I2C bus.

[0105] In this embodiment of the invention, by traversing the management list, when the target hardware device exists in the management list, a test thread is generated for the target bus I2C. This ensures that when multiple target bus I2Cs exist, the subsequently generated test threads target the same target bus I2C, thereby further improving the detection efficiency of hardware devices that interact with data based on the bus I2C.

[0106] In an optional embodiment of the present invention, the step of determining the target test interface corresponding to the target hardware device from the test interface through the test thread includes:

[0107] The test thread traverses the management list to identify the target hardware device in the management list, and determines the target test interface corresponding to the target hardware device from the test interface.

[0108] refer to Figure 6 , Figure 6 This is a flowchart illustrating a hardware device testing process provided in an embodiment of the present invention. To avoid missing any target hardware devices during testing, and thus further improve the testing efficiency of hardware devices that interact with data via the I2C bus, this embodiment of the present invention can use a test thread to traverse the management list to identify the target hardware devices in the management list, and determine the target test interface corresponding to the target hardware device from the test interface.

[0109] In this embodiment of the invention, by using the test thread to traverse the management list to identify the target hardware devices in the management list, and by determining the target test interface corresponding to the target hardware devices from the test interface, the detection efficiency of hardware devices that interact with data based on the bus I2C is further improved, thus avoiding omissions in the detection of target hardware devices.

[0110] In an optional embodiment of the present invention, the step of calling the target test interface through the test thread to detect the target hardware device includes:

[0111] The test thread calls the target test interface to obtain the test data of the target hardware device, and sets the number of test rounds according to a preset number of times;

[0112] Determine whether the number of test rounds is zero;

[0113] When the number of test rounds is not zero, a write operation is performed on the data to be tested using preset data, and it is determined whether the write operation is successful.

[0114] When the write operation is determined to be successful, a read operation is performed on the data to be tested for the preset data, and it is determined whether the read operation is successful.

[0115] When the read operation is determined to be successful, the read data corresponding to the read operation is obtained, and it is determined whether the read data is consistent with the preset data.

[0116] When it is determined that the read data is consistent with the preset data, the step of determining whether the number of test rounds is zero is executed.

[0117] In practical applications, the production stage only verifies functionality, without testing for stability and stress, resulting in low accuracy of quality inspection.

[0118] refer to Figure 7 , Figure 7 This is a flowchart illustrating a hardware device stress test process provided in this embodiment of the invention. For example, an EEPROM device is used as the target hardware device and backed up. The test thread calls the target test interface to read the test data from the EEPROM. After backing up the test data, the number of test rounds is set according to a preset number of cycles. Assuming that 10 cycles of stress testing are currently required for the EEPROM, the test round count is checked. If the test round count is zero, it indicates that multiple cycles of stress testing have been completed according to the preset number of cycles. When the test round count is not zero, a write operation is performed on the test data using preset data, and the success of the write operation is determined. If the write operation is successful, a read operation is performed on the test data using the preset data, and the success of the read operation is determined. If the read operation is successful, the read data corresponding to the read operation is obtained, and it is determined whether the read data matches the preset data. If the read data matches the preset data, one cycle of testing is completed, and the cycle count is decremented by one. Currently, 9 cycles of stress testing are required for the EEPROM, and the test round count is checked again to see if it is zero.

[0119] Optionally, it also includes:

[0120] When the number of test rounds is zero, a detection result is generated;

[0121] Generate backup data for the detection results and end the test.

[0122] In a specific implementation, after determining whether the number of test rounds is zero, if the number of test rounds is zero, it means that multiple rounds of stress testing have been completed according to the preset number of cycles. Therefore, backup data for the test results can be generated so that R&D personnel can view the test results and end the test.

[0123] Optionally, it also includes:

[0124] If the write operation is determined to be unsuccessful, or if the read operation is determined to be unsuccessful, or if the read data is determined to be inconsistent with the preset data, the test is determined to be unsuccessful and the test ends.

[0125] In a specific implementation, this embodiment of the invention can determine that the test has failed when a write operation fails, a read operation fails, or the read data is inconsistent with preset data. After determining that the test has failed, backup data for the test results can be generated so that R&D personnel can view the test results and end the test.

[0126] Of course, the above examples are merely illustrative. Those skilled in the art can use other hardware devices that interact with the Baseboard Management Controller (BMC) via the I2C bus as the target hardware device, and the embodiments of the present invention do not limit this. Optionally, the stress test may include cyclic stress testing for a single hardware device, or it may include cyclic stress testing for the I2C bus, and the two can be combined.

[0127] This invention, in its embodiment, obtains the test data of the target hardware device by calling the target test interface through the test thread, and sets the number of test rounds according to a preset number; it determines whether the number of test rounds is zero; when the number of test rounds is not zero, it performs a write operation on the test data using preset data, and determines whether the write operation is successful; when the write operation is successful, it performs a read operation on the test data for the preset data, and determines whether the read operation is successful; when the read operation is successful, it obtains the read data corresponding to the read operation, and determines whether the read data is consistent with the preset data; when the read data is consistent with the preset data, it executes the step of determining whether the number of test rounds is zero. When the number of test rounds is zero, a test result is generated; backup data for the test result is generated, and the test ends. When the write operation is unsuccessful, or when the read operation is unsuccessful, or when the read data is inconsistent with the preset data, the test is deemed to have failed, and the test ends. This achieves stress testing of hardware devices during the production stage, improving the accuracy of quality inspection.

[0128] Furthermore, this embodiment of the invention only requires functional and stress testing of the single-board I2C hardware on the BMC side, reducing the need for manual development of test code and greatly improving testing efficiency. Simultaneously, the single-board adaptation is handled by the BMC, resulting in highly integrated modules and significantly improving the scalability and compatibility of the solution in practical implementations.

[0129] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0130] Reference Figure 8 The diagram illustrates a structural block diagram of a hardware device detection apparatus provided in an embodiment of the present invention, which may specifically include the following modules:

[0131] The target hardware device determination module 801 is used to determine a target hardware device with the same target bus I2C from the hardware devices; the target hardware device has a corresponding driver, and the driver is used to provide a test interface for the target hardware device.

[0132] The test thread generation module 802 is used to generate test threads for the target bus I2C;

[0133] The target test interface determination module 803 is used to determine the target test interface corresponding to the target hardware device from the test interface through the test thread;

[0134] The target hardware device detection module 804 is used to detect the target hardware device by calling the target test interface through the test thread.

[0135] Optionally, it may also include:

[0136] The management list generation module is used to generate a management list for the target I2C bus; the management list corresponds one-to-one with the target I2C bus.

[0137] The device registration module is used to instantiate the target hardware device and add the target hardware device to the management list to register the target hardware device with the Baseboard Management Controller (BMC).

[0138] Optionally, the test thread generation module may include:

[0139] A test thread generation submodule is used to traverse the management list, and when the target hardware device exists in the management list, a test thread is generated for the target bus I2C.

[0140] Optionally, the target test interface determination module may include:

[0141] The target test interface determination submodule is used to traverse the management list using the test thread to determine the target hardware device in the management list, and to determine the target test interface corresponding to the target hardware device from the test interface.

[0142] Optionally, the target hardware device detection module may include:

[0143] The first target hardware device detection submodule is used to obtain the test data of the target hardware device by calling the target test interface through the test thread, and set the test round number value according to a preset number of times;

[0144] The second target hardware device detection submodule is used to determine whether the number of test rounds is zero;

[0145] When the number of test rounds is not zero, the third target hardware device detection submodule is invoked.

[0146] The third target hardware device detection submodule is used to perform a write operation on the data to be tested using preset data, and to determine whether the write operation is successful.

[0147] When the write operation is determined to be successful, the fourth target hardware device detection submodule is invoked.

[0148] The fourth target hardware device detection submodule is used to perform a read operation on the preset data of the test data and determine whether the read operation is successful.

[0149] When the read operation is determined to be successful, the fifth target hardware device detection submodule is invoked;

[0150] The fifth target hardware device detection submodule is used to acquire the read data corresponding to the read operation and determine whether the read data is consistent with the preset data;

[0151] When it is determined that the read data is consistent with the preset data, the second target hardware device detection submodule is invoked.

[0152] Optionally, it may also include:

[0153] When the number of test rounds is zero, the sixth target hardware device detection submodule is invoked.

[0154] The sixth target hardware device detection submodule is used to generate detection results;

[0155] The seventh target hardware device detection submodule is used to generate backup data for the detection results and end the test.

[0156] Optionally, it may also include:

[0157] When the write operation is determined to be unsuccessful, or when the read operation is determined to be unsuccessful, or when the read data is determined to be inconsistent with the preset data, the eighth target hardware device detection submodule is invoked.

[0158] The eighth target hardware device detection submodule is used to determine test failure and terminate the test.

[0159] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0160] In addition, this invention also provides an electronic device, including: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, it implements the various processes of the above-described hardware device detection method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0161] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the hardware device detection method embodiments described above and achieves the same technical effects. To avoid repetition, it will not be described again here. The computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0162] Figure 9 A schematic diagram of the hardware structure of an electronic device for implementing various embodiments of the present invention.

[0163] The electronic device 900 includes, but is not limited to, components such as: a radio frequency unit 901, a network module 902, an audio output unit 903, an input unit 904, a sensor 905, a display unit 906, a user input unit 907, an interface unit 908, a memory 909, a processor 910, and a power supply 911. Those skilled in the art will understand that... Figure 9 The electronic device structures shown are not intended to limit the electronic device. An electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements. In embodiments of the present invention, the electronic device includes, but is not limited to, mobile phones, tablet computers, laptops, PDAs, in-vehicle terminals, wearable devices, and pedometers.

[0164] It should be understood that, in this embodiment of the invention, the radio frequency unit 901 can be used for receiving and transmitting signals during information transmission or calls. Specifically, it receives downlink data from the base station and processes it with the processor 910; additionally, it transmits uplink data to the base station. Typically, the radio frequency unit 901 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier, a duplexer, etc. Furthermore, the radio frequency unit 901 can also communicate with networks and other devices through a wireless communication system.

[0165] Electronic devices provide users with wireless broadband internet access through network module 902, such as helping users send and receive emails, browse web pages, and access streaming media.

[0166] The audio output unit 903 can convert audio data received by the radio frequency unit 901 or the network module 902 or stored in the memory 909 into audio signals and output them as sound. Furthermore, the audio output unit 903 can also provide audio output related to specific functions performed by the electronic device 900 (e.g., call signal reception sound, message reception sound, etc.). The audio output unit 903 includes a speaker, a buzzer, and a receiver, etc.

[0167] Input unit 904 is used to receive audio or video signals. Input unit 904 may include a graphics processing unit (GPU) 9041 and a microphone 9042. The GPU 9041 processes image data of still images or videos acquired by an image capture device (such as a camera) in video capture mode or image capture mode. The processed image frames can be displayed on display unit 906. The image frames processed by GPU 9041 can be stored in memory 909 (or other storage medium) or transmitted via radio frequency unit 901 or network module 902. Microphone 9042 can receive sound and process such sound into audio data. The processed audio data can be converted into a format that can be transmitted to a mobile communication base station via radio frequency unit 901 in telephone call mode.

[0168] The electronic device 900 also includes at least one sensor 905, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor includes an ambient light sensor and a proximity sensor. The ambient light sensor can adjust the brightness of the display panel 9061 according to the ambient light level, and the proximity sensor can turn off the display panel 9061 and / or backlight when the electronic device 900 is moved to the ear. As a type of motion sensor, an accelerometer sensor can detect the magnitude of acceleration in various directions (generally three axes). When stationary, it can detect the magnitude and direction of gravity and can be used to identify the posture of the electronic device (such as landscape / portrait switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc. The sensor 905 may also include a fingerprint sensor, pressure sensor, iris sensor, molecular sensor, gyroscope, barometer, hygrometer, thermometer, infrared sensor, etc., which will not be described in detail here.

[0169] The display unit 906 is used to display information input by the user or information provided to the user. The display unit 906 may include a display panel 9061, which may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like.

[0170] User input unit 907 can be used to receive input numerical or character information, and to generate key signal inputs related to user settings and function control of electronic devices. Specifically, user input unit 907 includes a touch panel 9071 and other input devices 9072. Touch panel 9071, also known as a touch screen, can collect touch operations performed by the user on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near touch panel 9071). Touch panel 9071 may include two parts: a touch detection device and a touch controller. The touch detection device detects the user's touch position and the signal generated by the touch operation, and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device, converts it into touch point coordinates, and sends it to processor 910, which receives and executes commands from processor 910. In addition, touch panel 9071 can be implemented using various types such as resistive, capacitive, infrared, and surface acoustic wave. Besides touch panel 9071, user input unit 907 may also include other input devices 9072. Specifically, other input devices 9072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, joysticks, etc., which will not be described in detail here.

[0171] Furthermore, the touch panel 9071 can cover the display panel 9061. When the touch panel 9071 detects a touch operation on or near it, it transmits the information to the processor 910 to determine the type of touch event. Subsequently, the processor 910 provides corresponding visual output on the display panel 9061 based on the type of touch event. Although in Figure 9 In this embodiment, the touch panel 9071 and the display panel 9061 are two independent components to realize the input and output functions of the electronic device. However, in some embodiments, the touch panel 9071 and the display panel 9061 can be integrated to realize the input and output functions of the electronic device. The specific implementation is not limited here.

[0172] Interface unit 908 serves as an interface for connecting external devices to electronic device 900. For example, external devices may include a wired or wireless headphone port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device with an identification module, an audio input / output (I / O) port, a video I / O port, a headphone port, and so on. Interface unit 908 can be used to receive input from external devices (e.g., data, power, etc.) and transmit the received input to one or more components within electronic device 900, or it can be used to transmit data between electronic device 900 and external devices.

[0173] The memory 909 can be used to store software programs and various data. The memory 909 may primarily include a program storage area and a data storage area. The program storage area may store the operating system, applications required for at least one function (such as sound playback, image playback, etc.), etc.; the data storage area may store data created based on the use of the mobile phone (such as audio data, phonebook, etc.). Furthermore, the memory 909 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0174] The processor 910 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs and / or modules stored in the memory 909, and by calling data stored in the memory 909, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. The processor 910 may include one or more processing units; preferably, the processor 910 may integrate an application processor and a modem processor. The application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 910.

[0175] The electronic device 900 may also include a power supply 911 (such as a battery) that supplies power to various components. Preferably, the power supply 911 is logically connected to the processor 910 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system.

[0176] In addition, the electronic device 900 includes some functional modules not shown, which will not be described in detail here.

[0177] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0178] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0179] like Figure 10 As shown, in another embodiment of the present invention, a computer-readable storage medium 1001 is also provided, which stores instructions that, when executed on a computer, cause the computer to perform the hardware device detection method described in the above embodiments.

[0180] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.

[0181] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0182] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0183] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0184] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0185] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0186] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0187] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for testing hardware devices, characterized in that, The hardware device is based on a bus with the Baseboard Management Controller (BMC). Hardware devices for data interaction include: Determine the hardware devices that have the same target bus. The target hardware device; the target hardware device has a corresponding driver, the driver being used to provide a test interface for the target hardware device; Generate a target bus The test thread; The target test interface corresponding to the target hardware device is determined from the test interface through the test thread; The target hardware device is detected by calling the target test interface through the test thread; The step of calling the target test interface through the test thread to detect the target hardware device includes: The test thread calls the target test interface to obtain the test data of the target hardware device, and sets the number of test rounds according to a preset number of times; Determine whether the number of test rounds is zero; When the number of test rounds is not zero, a write operation is performed on the data to be tested using preset data, and it is determined whether the write operation is successful. When the write operation is determined to be successful, a read operation is performed on the data to be tested for the preset data, and it is determined whether the read operation is successful. When the read operation is determined to be successful, the read data corresponding to the read operation is obtained, and it is determined whether the read data is consistent with the preset data. When it is determined that the read data is consistent with the preset data, the step of determining whether the number of test rounds is zero is executed.

2. The method according to claim 1, characterized in that, Also includes: Generate a target bus The management list; the management list and the target bus One-to-one correspondence; The target hardware device is instantiated and added to the management list to register the target hardware device with the Baseboard Management Controller (BMC).

3. The method according to claim 2, characterized in that, The generation is for the target bus The steps for testing the thread include: Traverse the management list, and when the target hardware device exists in the management list, generate a target bus. The test thread.

4. The method according to claim 3, characterized in that, The step of determining the target test interface corresponding to the target hardware device from the test interface through the test thread includes: The test thread traverses the management list to identify the target hardware device in the management list, and determines the target test interface corresponding to the target hardware device from the test interface.

5. The method according to claim 1, characterized in that, Also includes: When the number of test rounds is zero, a detection result is generated; Generate backup data for the detection results and end the test.

6. The method according to claim 1, characterized in that, Also includes: If the write operation is determined to be unsuccessful, or if the read operation is determined to be unsuccessful, or if the read data is determined to be inconsistent with the preset data, the test is determined to be unsuccessful and the test ends.

7. A hardware device testing device, characterized in that, The hardware device is based on a bus with the Baseboard Management Controller (BMC). Hardware devices for data interaction include: The target hardware device determination module is used to determine from the hardware devices those having the same target bus. The target hardware device; the target hardware device has a corresponding driver, the driver being used to provide a test interface for the target hardware device; The test thread generation module is used to generate test threads for the target bus. The test thread; The target test interface determination module is used to determine the target test interface corresponding to the target hardware device from the test interface through the test thread; The target hardware device detection module is used to detect the target hardware device by calling the target test interface through the test thread. The target hardware device detection module includes: The first target hardware device detection submodule is used to obtain the test data of the target hardware device by calling the target test interface through the test thread, and set the test round number value according to a preset number of times; The second target hardware device detection submodule is used to determine whether the number of test rounds is zero; When the number of test rounds is not zero, the third target hardware device detection submodule is invoked. The third target hardware device detection submodule is used to perform a write operation on the data to be tested using preset data, and to determine whether the write operation is successful. When the write operation is determined to be successful, the fourth target hardware device detection submodule is invoked. The fourth target hardware device detection submodule is used to perform a read operation on the preset data of the test data and determine whether the read operation is successful. When the read operation is determined to be successful, the fifth target hardware device detection submodule is invoked; The fifth target hardware device detection submodule is used to acquire the read data corresponding to the read operation and determine whether the read data is consistent with the preset data; When it is determined that the read data is consistent with the preset data, the second target hardware device detection submodule is invoked. When the number of test rounds is zero, the sixth target hardware device detection submodule is invoked.

8. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; The memory is used to store computer programs; When the processor executes a program stored in the memory, it implements the method as described in any one of claims 1-6.

9. A computer-readable storage medium having instructions stored thereon that, when executed by one or more processors, cause the processors to perform the method as described in any one of claims 1-6.

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