Optoelectronic device photodetector and method of fabrication thereof

Abstract

The application relates to the research and application field of nano semiconductor material photoelectric detectors and photoelectric memories, in particular to a photoelectric device light control diode and a manufacturing method thereof. The light control diode is composed of a hexagonal boron nitride (h-BN) protective layer, a graphene electrode, a molybdenum disulfide (MoS2) n-n ‑ junction, an h-BN grating layer and a gate dielectric layer. Based on the light control diode with the MoS2 n-n ‑ junction and the h-BN grating layer heterostructure, the current state under illumination can be converted from the off state to the rectification state, so that an external gating device is not needed during integration. With the increase of the thickness of the h-BN grating layer, the light control diode is changed from a single-function photoelectric detector into a multi-function photoelectric memory. The photoelectric memory based on the light control diode has the functions of weak light detection, non-volatility, high responsivity, long-time storage and the like; and a photoelectric storage array without any external selector is manufactured, and the functions of image storage and information processing are demonstrated.

Description

Technical Field

[0001] This invention relates to the research and application of photodetectors and photoelectric memories made of nano-semiconductor materials, specifically to a photoelectric device, a photodiode, and its fabrication method. Background Technology

[0002] A photodetector is an electronic component that converts light signals into electrical signals and is widely used in imaging, optical communication, and other fields. Opto-memory (OM) devices can simultaneously perform light signal detection, storage, and processing functions, and hold promise for future applications in artificial visual neuromorphic systems. Under illumination, the current state of existing photodetectors and OM devices can only transition from off to on or from rectified to on, necessitating the addition of additional gating devices during integration.

[0003] In the post-Moore's Law era, multifunctional chips are one of the most important development directions [Reference 1]. Optoelectronic systems, with their functions of emitting, modulating, transmitting, and detecting light, fully integrate optical signal processing into modern chips, making them one of the most important components of multifunctional chips. The function of detecting light is mainly realized by various photodetectors [References 2-4]. Opto-memory, because it simultaneously possesses optical signal detection, storage, and processing functions, is expected to be applied in future artificial vision systems [References 5-7]. Although there are many types of photodetectors and opto-memory, based on the change in current at the device's output terminal with voltage before and after receiving a light signal, existing devices can be divided into two main categories: devices represented by photodiodes, which, after being illuminated, will change the output signal from a rectified state to an on state; and devices represented by photoconductors and phototransistors, which will change the output signal from an off state to an on state [References 8-9].

[0004] Although not yet reported, the completeness of signal change types suggests the existence of devices that can change the current output state from off to rectified under illumination. This novel photodetector is expected to play an irreplaceable key role in optoelectronic systems such as optical logic and high-precision imaging. For example, with the gradual improvement of photodetection accuracy, there is an urgent need for photodetector and optoelectronic storage arrays with further miniaturized pixel units. However, to avoid array crosstalk, existing arrays must equip each detection unit with a transistor or diode as a selector for controlling signal readout. This fundamentally limits the array's integration, increases system power consumption and cost, and reduces reliability, posing a significant challenge to achieving high-precision, high-performance detection arrays in the future. Therefore, to solve this problem, a new device is needed that can change the output current from off to rectified under illumination. This is because such a device can be considered as integrating a photodetector (optoelectronic memory) and a diode, achieving the function that originally required two devices with just one.

[0005] References:

[0006] [1]International Roadmap for Devices and Systems(IRDS)2017 Edition.https: / / irds.ieee.org / roadmap-2017(2017).

[0007] [2]Pei,J.et al.Towards artificial general intelligence with hybrid Tianjic chip architecture.Nature 572,106–111(2019).

[0008] [3]Atabaki,A.H.et al.Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.Nature 556,349–354(2018).

[0009] [4]Westerveld,W.J.et al.Sensitive,small,broadband and scalable optomechanical ultrasound sensor in silicon photonics.Nature Photon.15,341–345(2021).

[0010] [5]Liu,C.et al.Two-dimensional materials for next-generation computing technologies.Nat.Nanotechnol.15,545–557(2020).

[0011] )]]

[0012] ​[7] Zhu, Q. et al. A flexible ultrasensitive optoelectronic sensor array for neuromorphic vision systems. Nat Commun 12, 1798 (2021).

[0013] [8] Konstantatos, G. & Sargent, EH Nanostructured materials for photon detection. Nature Nanotechnol. 5, 391–400 (2010).

[0014] [9] Huo, N. & Konstantatos, G. Recent progress and future prospects of 2D-based photodetectors. Adv. Mater. 30, 1801164 (2018). Summary of the Invention:

[0015] The purpose of this invention is to propose a light-controlled diode capable of switching the current state from off state to rectified state and its fabrication method, based on MoS2n-n - The photodiode, with its heterostructure of junction and h-BN grating layers, can switch the current state from off to rectified under illumination, thus eliminating the need for external selection devices during integration. As the thickness of the h-BN grating layer increases, the photodiode transforms from a single-function photodetector into a multi-functional photomembrane. Photodiode-based photomembrane devices possess functions such as weak light detection, non-volatile high responsivity, and long-term storage. Furthermore, a photomembrane array without any external selectors was fabricated, demonstrating image storage and information processing capabilities.

[0016] The technical solution of the present invention:

[0017] A photoelectric device, a photodiode, is composed of an h-BN protective layer, a graphene electrode, a MoS2n-n junction, an h-BN grating layer, and a gate dielectric layer, with the specific structure as follows:

[0018] The gate dielectric layer uses a silicon semiconductor substrate as the gate electrode, a silicon dioxide insulating layer on the substrate as the dielectric layer, and an h-BN grating layer disposed on the dielectric layer. MoS2n-n - The junction is located on the h-BN grating layer, MoS2n-n -The graphene electrode is a composite structure consisting of n-type MoS2 and p-type doped MoS2, with an h-BN protective layer covering the n-type MoS2. The graphene electrode includes an anode graphene electrode and a cathode graphene electrode as contact electrodes. The cathode graphene electrode and the anode graphene electrode are respectively disposed on the n-type MoS2 and the p-type doped MoS2. The cathode lead electrode is located on the upper surface of one end of the cathode graphene electrode, and the anode lead electrode is located on the lower surface of one end of the anode graphene electrode. The other end of the anode graphene electrode is attached to the p-type doped MoS2.

[0019] The aforementioned optoelectronic device, a photodiode, has an h-BN protective layer that is a majority layer, meaning more than 30 layers.

[0020] The aforementioned optoelectronic device is a photodiode, and the MoS2 is a 5-30 layer single crystal.

[0021] The aforementioned optoelectronic device, a photodiode, has an h-BN grating layer that is a few-layer single crystal, where a few layers refer to 1 to 30 layers.

[0022] The method for fabricating the photodiode of the aforementioned optoelectronic device includes the following steps:

[0023] (1) Graphene, MoS2 and h-BN sheets were peeled onto a p-type doped Si substrate with a 100 nm or 300 nm thick SiO2 insulating layer on the surface by micromechanical peeling.

[0024] (2) Using a heterojunction transfer platform, the h-BN protective layer is lifted with propylene carbonate (PPC), and then the cathode graphene electrode and MoS2 are lifted in sequence and stacked on the h-BN grating layer on a 100nm or 300nm SiO2 / Si substrate to form an h-BN / MoS2 / h-BN heterojunction.

[0025] (3) The stacked h-BN / MoS2 / h-BN heterojunction is placed in a vacuum annealing furnace for annealing.

[0026] (4) Graphene electrode lead electrodes are constructed by electron beam exposure, reactive ion etching, electron beam evaporation and stripping processes.

[0027] (5) Using oxygen plasma, p-type doping is performed on MoS2 that is not protected by the h-BN protective layer to form MoS2n-n - Knot;

[0028] (6) Using a heterojunction transfer platform, polydimethylsiloxane (PDMS) is used as the dielectric transfer anode graphene electrode to contact the p-type doped MoS2 and the lead electrode at the anode, respectively.

[0029] In the method for fabricating the photoelectric control diode of the aforementioned optoelectronic device, in step (2), the protective layer h-BN only covers a portion of MoS2 to protect the intrinsic MoS2.

[0030] In the method for fabricating the photoelectric device photodiode, in step (3), the PPC residue on the surface of the heterojunction is removed by annealing, the vacuum annealing temperature is controlled at 350-450℃, the heating time is 0.5-1.5h, the holding time is 0.5-2h, and the furnace is cooled to room temperature.

[0031] In the method for fabricating the photoelectric control diode of the aforementioned optoelectronic device, in step (4), the lead electrode is a composite of Ti layer and Au layer. First, a Ti layer with a thickness range of 4 to 6 nm is deposited on the substrate and the cathode graphene electrode, and then an Au layer with a thickness range of 50 to 60 nm is deposited.

[0032] In the method for fabricating the photoelectric device photodiode, step (5) involves achieving p-type doping of MoS2 through oxygen plasma treatment, controlling the oxygen flow rate to be 160-200 sccm, the power of the oxygen plasma treatment instrument to be 160-200 W, and the time to be 0.5-1.5 h.

[0033] In the method for fabricating the photoelectric device photodiode, in step (6), the sample temperature is controlled to be 70-90℃ during the release process of the anode graphene electrode.

[0034] The design concept of this invention:

[0035] Photodetectors are crucial components of optoelectronic chips and imaging arrays. Optical memory (OMemory) is an electronic device capable of detecting, storing, and processing optical signals; its arrays hold promise for future visual neuromorphic systems. This invention utilizes gate voltage and grating layers to... - The modulation effect of the junction diode allows the device to switch from an off state to a rectified state under illumination. As the grating layer thickness increases, this rectified state changes from volatile to non-volatile after the illumination is removed. Therefore, the device can be transformed from a single-function photodetector into a multi-functional photoelectric memory. This invention proposes a method based on MoS2n-n... - A photodiode with a junction / h-BN structure, wherein MoS2n-n - The junction acts as a diode layer, and h-BN acts as a grating layer. Under the influence of the gate voltage, MoS2n-n -The junction diode is modulated into an off state. Under illumination, the photogenerated carriers generated by the h-BN grating layer shield the gate voltage, and the diode layer is in a rectified state, thus enabling the output current to switch from the off state to the rectified state under illumination. Furthermore, the grating layer is extremely sensitive to light, giving the photodiode weak light detection and high responsivity. As the grating layer thickness increases, the generated photogenerated carriers become non-volatile, thus allowing the photodiode to have long-term storage capabilities when used as a photoelectric memory.

[0036] The advantages and beneficial effects of this invention are:

[0037] 1. The novel optoelectronic device photodiode design structure proposed in this invention can be used as a photodetector or photoelectric memory by adjusting the thickness of the grating layer; the current output state of the device can change from the off state to the rectified state under illumination, laying the foundation for the ultimate realization of a highly integrated optoelectronic system in the future.

[0038] 2. The photodiode obtained by this invention exhibits excellent photoelectric performance: when used as a photodetector, the responsivity exceeds 10 under 405nm laser irradiation. 5 A / W; the device's response time is less than 1 second. When used as a photoelectric memory, it can detect 0.7 μW / cm² under 405 nm laser irradiation. 2 Its low-light, non-volatile responsivity is as high as 4.8 × 10⁻⁶. 7 A / W, long-term storage up to 75 days. Attached Figure Description

[0039] Figure 1 This is a flowchart of the manufacturing process for a photodiode.

[0040] Figure 2 The diagram shows the structure and characterization of a photodiode. (a) is a schematic diagram of the photodiode, using MoS2 nn. - The junction acts as a diode, with graphene as the contact electrode, top and bottom h-BN as the protective layer and grating layer, respectively, SiO2 as the dielectric layer, and p-type doped Si as the gate electrode; top h-BN represents the h-BN protective layer, top Gr represents the anode graphene electrode, bottom Gr represents the cathode graphene electrode, bottom h-BN represents the h-BN grating layer, and n-MoS2 represents intrinsic MoS2, n - -MoS2 represents p-type doped MoS2; (b) Transmission electron microscopy (TEM) image of the cross-section of the photodiode, showing MoS2n-n -There is a high-quality interface between the junction and the h-BN grating layer; top h-BN represents the h-BN protective layer, top Gr represents the anode graphene electrode, bottom h-BN represents the h-BN grating layer, n-MoS2 represents intrinsic MoS2, and n - -MoS2 represents p-type doped MoS2, with a scale bar of 10 nanometers; (c) n in TEM imaging - Energy dispersive X-ray spectroscopy (EDX) elemental diagram of O, Mo, S, N, and Si corresponding to the -MoS2 / h-BN / SiO2 layer ( Figure 1 (b) White dashed line), scale bar is 5 nanometers; (d) Energy dispersive X-ray spectroscopy (EDX) elemental map of O, Mo, S, N and Si corresponding to the n-MoS2 / h-BN / SiO2 layer in TEM imaging ( Figure 1 (b) Black dashed line in b), scale bar is 5 nanometers; (e) Current-voltage curve of photodiode at gate voltage of 0V; horizontal axis V A Represents the bias voltage (V), with the vertical axis abs (I) A (f) represents current (A); (f) at a gate voltage of –60V, darkness and power density (P) in ) is 32μW / cm 2 Current-voltage curve of a photodiode under 405nm laser irradiation for 10 seconds; x-axis V A Represents the bias voltage (V), with the vertical axis abs (I) A (g) Equivalent circuit diagram of photodiode, where Anode represents anode, Light represents illumination, Gate represents gate, and Cathode represents cathode.

[0041] Figure 3 Figure 1 shows the structure and photoelectric performance of a photodiode used as a photodetector. (a) Optical microscope image of the device. MoS2n-n was used. - The junction acts as a diode, with graphene as the contact electrode, top and bottom h-BN as the protective layer and grating layer, respectively, a 100nm thick SiO2 as the dielectric layer, and p-type doped Si as the gate electrode; top h-BN represents the h-BN protective layer, top Gr represents the anode graphene electrode, bottom Gr represents the cathode graphene electrode, bottom h-BN represents the h-BN grating layer, and n-MoS2 represents intrinsic MoS2, n - -MoS2 represents p-type doped MoS2, with a scale bar of 10 micrometers; (b) Optical photograph and thickness characterization of the h-BN grating layer, with a thickness of approximately 1.6 nm, scale bar of 10 micrometers; (c) Photoelectric response diagram of the device under 405 nm illumination. Current-voltage curves of the photodiode under darkness and different power densities of 405 nm laser light at a gate voltage of –15 V; the horizontal axis is V.A Represents the bias voltage (V), with the vertical axis abs (I) A (d) Represents the current (A); under the conditions of a bias voltage of 3V, a gate voltage of –15V, and a 405nm laser, the responsivity (R) varies with the incident light power density, R = (I ph -I dark ) / P in I ph Photocurrent (A), I dark (e) is the dark current (A); the programmable-read-erase cycle curve of the device, the photodetector is programmed and read by light when the gate voltage is –15V, and erased when the gate voltage is 0V; the horizontal axis represents time (s), and the vertical axis represents I. A (a) Represents the current (A); (f) The photodetector's erase mechanism at 0V.

[0042] Figure 4 The graph shows the photoelectric and storage performance of a photodiode as a photoelectric memory. (a) Current retention capability of the photoelectric memory after programming at bias voltages of 3V and –3V; the horizontal axis represents time (s), and the vertical axis represents abs (I). A (a) Current (A); (b) Programming-reading-erasing cycle curves of a photoelectric memory fabricated on a 100nm thick SiO2 substrate. The photoelectric memory is programmed and read by illumination at a gate voltage of –15V, and erased by illumination at a gate voltage of 15V. The horizontal axis represents time (s), and the vertical axis represents I. A (c) Non-volatile responsivity (NR) and detectivity (D*) as a function of P under the conditions of a bias voltage of 3V, a gate voltage of –60V, and a 405nm laser. in The change, NR = (I store –I dark ) / P in ,,I dark It is dark current (A), I store It stores the current (A), D* = (AB) 1 / 2 NR / S 1 / 2 A is 30μm 2 The effective area is B, the bandwidth (1 Hz) is S, and the power density spectrum is (A). 2 / (d) Responsivity (R) and non-volatile responsivity (NR) under the conditions of bias voltage of 3V, gate voltage of –60V, and 638nm laser, as P in The change, R = (I ph –I dark ) / P in I ph Photocurrent (A), I dark This is the dark current (A). The devices in Figures a, c, and d are constructed on a 300 nm thick SiO2 dielectric layer.

[0043] Figure 5 This is a diagram illustrating the working mechanism of a photodiode. (a) Energy band diagram of the photodiode before programming, E C It is the minimum value of the conduction band, E F It is the Fermi level, E V (a) The maximum value of the valence band, where e represents electrons; (b) A schematic diagram of the energy band structure of the photodiode during the programming process, where h represents holes; (c) The energy band structure of the photodiode after programming; (d) A schematic diagram of the energy band structure of the photodiode during the erasure process when it is used as a photoelectric memory.

[0044] Figure 6 This diagram demonstrates a photoelectric storage array based on photodiodes as its basic unit and its functional application in image storage and processing. (a) Schematic diagram of a 3×3 photoelectric storage array without a selector; SiO2 is used as the dielectric layer, and p-type doped Si is used as the gate electrode; (b) Schematic diagram of the array unit; top h-BN represents the h-BN protective layer, bottom Gr represents the cathode graphene electrode, topGr represents the anode graphene electrode, bottom h-BN represents the h-BN grating layer, n-MoS2 represents intrinsic MoS2, n - -MoS2 represents p-type doped MoS2; (c) Optical microscope image of the array, scale bar is 10 micrometers; top h-BN represents h-BN protective layer, bottomGr represents cathode graphene electrode, top Gr represents anode graphene electrode, bottom h-BN represents h-BN grating layer, n-MoS2 represents intrinsic MoS2, n - -MoS2 represents p-type doped MoS2; (d) Equivalent circuit diagram of the optoelectronic memory array; (e) Demonstration of the array's crosstalk-free function under a bias voltage of 3V and a gate voltage of –40V, with the left diagram showing optical signal input and the right diagram showing electrical signal output; (f) Demonstration of the wavelength selection function under a bias voltage of 3V and a gate voltage of –40V, with the left diagram showing optical signal input and the right diagram showing electrical signal output; (g) Demonstration of the power selection function under a bias voltage of 3V and a gate voltage of –40V, with the left diagram showing optical signal input and the right diagram showing electrical signal output; P in Representative power density (μW / cm) 2 ), I A Represents current (A) or (pA). Detailed Implementation

[0045] In specific implementation, the method for fabricating photodiodes using electron beam lithography (EBL), reactive ion etching (RIE), electron book evaporation (EBV), dry transfer, oxygen plasma doping, and vacuum annealing techniques is as follows:

[0046] (1) Graphene, MoS2 and h-BN sheets were peeled off onto a p-type doped Si substrate with a 100 nm or 300 nm thick SiO2 insulating layer on the surface by micromechanical peeling.

[0047] (2) Using a self-assembled heterojunction transfer platform, a sufficiently thick h-BN protective layer is raised with propylene carbonate (PPC), and then the cathode graphene electrode and MoS2 are raised in sequence and stacked on a thin h-BN grating layer on a 100nm or 300nm SiO2 / Si substrate to form an h-BN / MoS2 / h-BN heterojunction.

[0048] (3) The stacked h-BN / MoS2 / h-BN heterojunction is placed in a vacuum annealing furnace for annealing to remove PPC;

[0049] (4) The cathode lead electrode and anode lead electrode of the graphene electrode are constructed by EBL, RIE, EBV and exfoliation process;

[0050] (5) Using O2 plasma, p-type doping is performed on MoS2 that is not protected by the h-BN protective layer to form MoS2n-n - Knot;

[0051] (6) Using a self-assembled heterojunction transfer platform, polydimethylsiloxane (PDMS) is used as the dielectric transfer anode graphene electrode, which is then contacted with the p-type doped MoS2 and the lead electrode at the anode end, respectively.

[0052] The feasibility of the present invention will be further demonstrated below through examples.

[0053] Example

[0054] like Figure 1 As shown, a photodiode is constructed through the following six steps:

[0055] (a) Use the PPC attached to the bottom of the PDMS to lift a sufficiently thick h-BN protective layer (top h-BN), and then lift the cathode graphene electrode and n-type MoS2 in sequence.

[0056] (b) The above two-dimensional material is stacked on a thin h-BN grating layer located on a SiO2 / Si substrate (the SiO2 layer is an oxide layer on the upper surface of p-type doped Si with a thickness of 300 nm or 100 nm). The material is dropped onto the surface of the h-BN grating layer at a high temperature of 120–140 °C, so that n-type MoS2 is disposed on the surface of the h-BN grating layer. The cathode graphene electrode is conformally attached to the surface of the h-BN grating layer and the surface of the n-type MoS2. The h-BN protective layer covers the surface of the cathode graphene electrode, and one end of the h-BN protective layer is attached to the surface of the n-type MoS2. The h-BN protective layer only covers a portion of the n-type MoS2, which serves to protect the intrinsic n-type MoS2 and prevent it from being p-type doped by subsequent oxygen plasma.

[0057] (c) The PPC residue on the surface of the heterojunction is removed by vacuum annealing. The vacuum annealing temperature is controlled at 350°C, the heating time is 0.5h, the holding time is 1h, and the furnace is cooled to room temperature to form a contact window at the end where the h-BN protective layer overlaps with the cathode graphene electrode.

[0058] (d) A lead electrode for a cathode graphene electrode is constructed at the contact window using electron beam lithography (EBL), reactive ion etching (RIE), electron beam evaporation (EBV), and lift-off processes; additionally, a lead electrode for an anode graphene electrode is constructed on the n-type MoS2 side of the h-BN grating layer surface.

[0059] The lead electrode is a composite of titanium (Ti) layer and gold (Au) layer. First, a Ti layer with a thickness range of 4-6 nm is deposited on the h-BN grating layer and the graphene electrode, and then an Au layer with a thickness range of 50-60 nm is deposited.

[0060] (e) Using oxygen plasma (O2 plasma), p-type doping was performed on n-type MoS2 that was not protected by the h-BN protective layer. The oxygen (O2) flow rate was controlled at 180 sccm, the power of the oxygen plasma treatment instrument was 200 W, and the time was 60 min to form p-type doped MoS2, thus obtaining MoS2n-n - Knot.

[0061] (f) Using a self-assembled heterojunction transfer platform, polydimethylsiloxane (PDMS) is used as the medium to transfer the anode graphene electrode. During the release process of the anode graphene electrode, the sample temperature is controlled at 80°C to form a photodiode.

[0062] The photodiode consists of an h-BN protective layer, graphene electrodes, and in-plane MoS2n-n electrodes. - It consists of a junction, an h-BN grating layer, and a gate dielectric layer. The gate dielectric layer is made of p-type doped silicon (p... +The silicon dioxide (SiO2) semiconductor substrate is used as the gate electrode, and the silicon dioxide (SiO2) insulating layer on the substrate is used as the dielectric layer. The h-BN grating layer is disposed on the dielectric layer, and the in-plane MoS2 nn - The junction is disposed on an h-BN grating layer, and the h-BN protective layer covers n-type MoS2. The graphene electrode includes a cathode graphene electrode and an anode graphene electrode as contact electrodes. The cathode graphene electrode and the anode graphene electrode are respectively disposed on n-type MoS2 and p-type doped MoS2. The cathode lead electrode is located on the upper surface of one end of the cathode graphene electrode, and the anode lead electrode is located on the lower surface of one end of the anode graphene electrode. The other end of the anode graphene electrode overlaps the upper surface of one end of the h-BN protective layer. See [link to documentation]. Figure 2 a.

[0063] Among them, in SiO2 / p + - Micromechanical exfoliation method for lifting multilayer two-dimensional materials on Si substrates: Novoselov, KS, Geim, AK, Morozov, SV, et al. (2004) Electric Field Effect in Atomically Thin Carbon Films. Science, 306, 666-669.

[0064] The thickness of the h-BN protective layer is 20–50 nm, the thickness of the h-BN grating layer is 1–20 nm, the thickness of the graphene layer is 1–10 nm, and the thickness of the MoS2 layer is 5–20 nm.

[0065] like Figure 2 The device structure and characterization diagram are shown. (a) A photodiode with a back-gate structure was fabricated using a layer transfer method. The diode is a MoS2n-n array stacked on an h-BN grating layer. - The junction, the contact electrode material is graphene. To form the MoS2 sheet... - (a) The device was p-doped using oxygen plasma to protect a portion of the MoS2 from doping with a thick h-BN sheet; (b) The cross-section of the device showed a high-quality van der Waals heterojunction with no bubbles or obvious defects between the different materials; (c) Energy dispersive X-ray spectroscopy (EDX) elemental analysis of the successfully fabricated device revealed a large amount of oxygen in the O2 plasma-treated MoS2 sheet, resulting in p-type doping; (d) No oxygen was found in the top h-BN-protected MoS2, indicating that it was in an intrinsic state; (e) At the gate voltage (V G When the voltage is 0V, the photodiode exhibits significant rectification characteristics, with a rectification ratio greater than 10. 5 (f) in V GAt -60V, the device is in the off state under dark conditions; while at power density (P) in ) is 32μW / cm 2 The device exhibits a rectified state under 405nm laser irradiation; (g) based on the device under constant V G Under light, the equivalent circuit diagram of the device can be drawn by observing its characteristic of changing from the off state to the rectified state.

[0066] like Figure 3 As shown, the device structure and photoelectric characteristics are characterized when the photodiode is used as a photodetector. (a) Optical photograph of the device. MoS2n-n - The junction acts as a diode, with graphene as the contact electrode, top and bottom h-BN as the protective layer and grating layer, respectively, a 100nm thick SiO2 as the dielectric layer, and p-type doped Si as the gate electrode; top h-BN represents the h-BN protective layer, top Gr represents the anode graphene electrode, bottom Gr represents the cathode graphene electrode, bottom h-BN represents the h-BN grating layer, and n-MoS2 represents intrinsic MoS2, n - -MoS2 represents p-type doped MoS2; (b) the thickness of the h-BN grating layer is approximately 1.6 nm; (c) in V G At -15V, the device is in the off state under dark conditions, and the photodiode is in the on state under 405nm laser light. Furthermore, the photoresponse of the device increases with increasing optical power density; (d) at V A For 3V, V G Under the condition of -15V, 405nm laser, the responsivity (R) first increases and then decreases with the increase of incident light power density, with the peak value exceeding 10⁵. A / W; (e) Programming-reading-erasing cycle curve of the device: the photodetector is programmed and read by illumination when the gate voltage is –15V, and erased when the gate voltage is 0V in the dark state; (f) The photodetector is erased at 0V because photogenerated carriers can tunnel from MoS2 back to the h-BN grating layer under the action of Coulomb force.

[0067] like Figure 4 As shown, the photodiode is characterized as a photoelectric and storage memory. When a 7nm thick h-BN is used as the grating layer, the photodiode exhibits photoelectric memory characteristics. Figure 2 (b) (a) After 75 days, the device's rectification ratio remains at 10. 5 The above demonstrates that the optoelectronic memory exhibits stable non-volatility; (b) the device has extremely high sensitivity to 405nm light, at P in 0.7 μW / cm 2 At that time, its nonvolatile response (NR) was 4.8 × 10⁻⁶. 7A / W, detectivity (D*) is 2.4 × 10 16 Jones; (c) Typical dynamic behavior of optoelectronic memory, including programming, reading, and erasing processes. The device can operate under negative gate voltage and P... in 0.1mW / cm 2 Programming under a 405nm laser; reading after removing the light source; and using P under a positive gate voltage. in 100mW / cm 2 405nm laser erasure. Programming time is 0.5 seconds, erasure time is 1 second, with a performance greater than 10. 6 On / off ratio (I) store / I erase (d) For 638nm light, the device's photoresponse decreases sharply. With the removal of light, the device's photocurrent will decrease rapidly, especially for weak light. The device's wavelength and power-dependent responsivity can be used for optical signal processing functions.

[0068] like Figure 5 The diagram illustrates the working principle of the photodiode. (a) Under a negative gate voltage, the device is initially in the off state because electrons cannot be injected into MoS2 from the graphene electrode; (b) Under illumination, electrons from donor-type defects in h-BN are excited to the conduction band by photons and move to the conduction band of MoS2 with the help of the negative gate voltage. Ionized defects with positive charges exist in h-BN, and they effectively shield the back gate; (c) Therefore, electrons can be injected into MoS2 from the graphene electrode, and the device changes from the off state to the rectified state. Furthermore, because high-energy photons can excite deeper defects, this device is more sensitive to 405nm lasers than to 638nm lasers. Under 405nm laser irradiation, the photocurrent of the device mainly originates from the grating effect. Under 638nm laser irradiation, the photocurrent originates from the grating effect and the photoresponse of MoS2 itself. Therefore, after the illumination is turned off, the photogenerated carriers generated by MoS2 recombine rapidly, leading to a rapid decrease in photocurrent. (d) When the h-BN grating layer is very thick, due to the high potential barrier, even if the negative gate voltage is removed and the laser is turned off, the excited electrons cannot recombine with the ionized defects in h-BN. Therefore, the device behaves as a photoelectric memory. For photoelectric memories, the erase operation is achieved by applying a gate voltage under illumination. During this process, the defective positive charges generated by ionization in h-BN are filled by photoexcited electrons from the valence band of h-BN, and the generated holes move to the valence band of MoS2 and recombine with the photogenerated electrons. Therefore, the local positive charges in h-BN disappear, and the device returns to its original off state.

[0069] like Figure 6As shown, a 3×3 optoelectronic memory array based on photodiodes without any selectors and its functional demonstration in image storage and processing are illustrated. (a) Schematic diagram of the optoelectronic memory array; (b) Schematic diagram of the optoelectronic memory cell; (c) Optical photograph of the array; (d) Equivalent circuit diagram of the array; (e) Using P in =200μW / cm 2 Image of 405nm light input. The current of the programming device is 10 times higher than that of the switching device. 5 This strongly demonstrates that the device itself can be used to construct a crosstalk-free optoelectronic storage array. (f) We also demonstrate that the array has wavelength selectivity; using P in =200μW / cm 2 Input signals of 405nm and 638nm light were used for 5 seconds. The output current of the 405nm light to the signal was greater than 100nA, while the current of the 638nm light to the signal was as low as 2pA; (g) Using 638nm light with low contrast (780μW / cm²) 2 / 26μW / cm 2 The array's power selectivity is demonstrated by inputting an optical signal for 5 seconds and outputting a high-contrast image (400pA / 1.7pA).

[0070] The examples demonstrate that the novel optoelectronic device, a photodiode, proposed in this invention utilizes the shielding effect of the h-BN grating layer on the gate voltage under illumination, and the MoS2n-n - The junction transitions from an off-state under dark conditions to a rectified state under illumination under a negative gate voltage, thus enabling new signal processing behavior. Simultaneously, the photodiode is highly sensitive to optical signals; photodiode-based optoelectronic memories possess long-term storage capabilities. Using photodiodes to construct arrays effectively suppresses creeping currents, enabling crosstalk-free optoelectronic storage (detection) arrays. This invention provides new technologies and approaches for manufacturing highly integrated, high-performance optoelectronic systems.

Claims

1. A photoelectric device, a photodiode, characterized in that, The photodiode consists of an h-BN protective layer, graphene electrodes, and MoS2n-n... - It consists of a junction, an h-BN grating layer, and a gate dielectric layer, with the specific structure as follows: The gate dielectric layer uses a silicon semiconductor substrate as the gate electrode, a silicon dioxide insulating layer on the substrate as the dielectric layer, and an h-BN grating layer disposed on the dielectric layer. MoS2n-n - The junction is located on the h-BN grating layer, MoS2n-n - The graphene electrode is a composite structure consisting of n-type MoS2 and p-type doped MoS2, with an h-BN protective layer covering the n-type MoS2. The graphene electrode includes an anode graphene electrode and a cathode graphene electrode as contact electrodes. The cathode graphene electrode and the anode graphene electrode are respectively disposed on the n-type MoS2 and the p-type doped MoS2. The cathode lead electrode is located on the upper surface of one end of the cathode graphene electrode, and the anode lead electrode is located on the lower surface of one end of the anode graphene electrode. The other end of the anode graphene electrode is attached to the p-type doped MoS2.

2. The photoelectric device photodiode according to claim 1, characterized in that, h-BN protective layer is a majority layer, which means more than 30 layers.

3. The photoelectric device photodiode according to claim 1, characterized in that, MoS2 is a single crystal with 5 to 30 layers.

4. The photoelectric device photodiode according to claim 1, characterized in that, h-BN grating layers are few-layer single crystals, with few layers referring to 1 to 30 layers.

5. A method for manufacturing a photodiode as described in any one of claims 1 to 4, characterized in that, Includes the following steps: (1) Graphene, MoS2 and h-BN sheets were peeled onto a p-type doped Si substrate with a 100 nm or 300 nm thick SiO2 insulating layer on the surface by micromechanical peeling. (2) Using a heterojunction transfer platform, the h-BN protective layer is lifted with propylene carbonate (PPC), and then the cathode graphene electrode and MoS2 are lifted in sequence and stacked on the h-BN grating layer on a 100nm or 300nm SiO2 / Si substrate to form an h-BN / MoS2 / h-BN heterojunction. (3) The stacked h-BN / MoS2 / h-BN heterojunction is placed in a vacuum annealing furnace for annealing. (4) Graphene electrode lead electrodes are constructed by electron beam exposure, reactive ion etching, electron beam evaporation and stripping processes. (5) Using oxygen plasma, p-type doping is performed on MoS2 that is not protected by the h-BN protective layer to form MoS2n-n - Knot; (6) Using a heterojunction transfer platform, polydimethylsiloxane (PDMS) is used as the dielectric transfer anode graphene electrode, which is then contacted with p-type doped MoS2 and the lead electrode at the anode, respectively.

6. The method for manufacturing a photoelectric control diode according to claim 5, characterized in that, In step (2), the protective layer h-BN only covers a portion of MoS2, thus protecting the intrinsic MoS2.

7. The method for manufacturing a photoelectric control diode according to claim 5, characterized in that, In step (3), the PPC residue on the surface of the heterojunction is removed by annealing. The vacuum annealing temperature is controlled at 350-450℃, the heating time is 0.5-1.5h, the holding time is 0.5-2h, and the furnace is cooled to room temperature.

8. The method for manufacturing a photoelectric control diode according to claim 5, characterized in that, In step (4), the lead electrode is a composite of Ti layer and Au layer. First, a Ti layer with a thickness range of 4 to 6 nm is deposited on the substrate and the cathode graphene electrode, and then an Au layer with a thickness range of 50 to 60 nm is deposited.

9. The method for manufacturing a photoelectric control diode according to claim 5, characterized in that, In step (5), p-type doping of MoS2 is achieved by oxygen plasma treatment, with the oxygen flow rate controlled at 160-200 sccm, the power of the oxygen plasma treatment instrument at 160-200 W, and the time at 0.5-1.5 h.

10. The method for manufacturing a photoelectric control diode according to claim 5, characterized in that, In step (6), the sample temperature is controlled to be 70-90℃ during the release of the anode graphene electrode.

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