Optical semiconductor device and method for manufacturing the same

Abstract

The optical semiconductor device disclosed in the present invention comprises: a ridge structure (5) formed on a first conductive type semiconductor substrate (1); a buried layer (6) buried in both side surfaces of the ridge structure (5); a second conductive type second cladding layer (7) and a second conductive type contact layer (8) stacked in sequence on the top of the ridge structure (5) and the surface of the buried layer (6); a table structure (13) formed on both side surfaces by a table extending from the second conductive type contact layer (8) to the first conductive type semiconductor substrate (1); a heat dissipation layer (9) arranged on the surface of the second conductive type contact layer (8); a table protection film (10) covering both side surfaces of the table structure (13) and both end portions of the surface of the second conductive type contact layer (8); and a second conductive type side electrode (11) electrically connected to the second conductive type contact layer (8).

Description

Technical Field

[0001] The present disclosure relates to an optical semiconductor device and a method for manufacturing the same. Background Art

[0002] In recent years, with the rapid increase in communication volume, the speed of optical communication has become significant, so semiconductor lasers (optical semiconductor devices) are required to operate at high speed. In addition, in order to achieve high-speed operation at low cost, direct modulation semiconductor lasers that directly modulate distributed feedback semiconductor lasers at high speed are required.

[0003] In order to realize high-speed operation of semiconductor lasers, it is effective to reduce parasitic capacitance and shorten the resonator length L. In particular, in an embedded structure in which buried layers functioning as current blocking layers are provided on both sides of the active layer, parasitic capacitance can be reduced by forming the buried layers with semi-insulating semiconductor layers.

[0004] On the other hand, in order to further increase the relaxation oscillation frequency fr required for high-speed modulation, it is effective to shorten the resonator length L of the semiconductor laser as shown in the following formula (1). However, shortening the resonator length has the following problem: namely, since the volume of the active layer that emits laser light is reduced, the laser output is reduced.

[0005] [Number 1]

[0006]

[0007] In formula (1), Γ represents the light confinement coefficient, W represents the width of the active layer, d represents the thickness of the active layer, q represents the elementary charge, dg / dn represents the differential gain, and I op Indicates the operating current, I th Represents the threshold current.

[0008] As a countermeasure for the above-mentioned reduction in laser output, for example, as disclosed in Patent Document 1, attempts have been made to reduce the element resistance of the semiconductor laser by increasing the contact area between the electrode and the contact layer and reducing the contact resistance between the electrode and the contact layer, thereby suppressing the heat generation of the semiconductor laser and improving the laser output.

[0009] Patent Document 1: Japanese Patent Application Laid-Open No. 6-232493

[0010] As a method for reducing the element resistance of a semiconductor laser, in addition to the method of increasing the contact area between the p-type InGaAs contact layer and the p-side electrode to reduce the contact resistance of the electrode portion as disclosed in Patent Document 1, there is also a method of reducing the crystal resistance of the bulk crystal by thinning the p-type InP cladding layer. This is because the dominant factor in the element resistance is the crystal resistance of the bulk crystal.

[0011] However, if the p-type InP cladding is made thinner in order to reduce the crystal resistance, the volume of the crystal layer used to release the heat generated by the active layer is reduced. As a result, the thinning of the p-type InP cladding has the problem of deteriorating the heat dissipation of the semiconductor laser, which in turn leads to a significant deterioration in the device characteristics, especially the temperature characteristics. Summary of the invention

[0012] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to provide an optical semiconductor device having reduced element resistance and excellent heat dissipation properties, and a method for manufacturing the same.

[0013] The optical semiconductor device involved in the present disclosure comprises: a stripe-shaped ridge structure, which is composed of a first conductive type cladding layer, an active layer and a second conductive type first cladding layer stacked in sequence on a first conductive type semiconductor substrate; a buried layer buried in a manner covering the two side surfaces of the above-mentioned ridge structure; a second conductive type second cladding layer and a second conductive type contact layer, which are stacked in sequence on the top of the above-mentioned ridge structure and the surface of the above-mentioned buried layer; a stripe-shaped terrace structure, with the above-mentioned ridge structure as the center, and the two side surfaces formed by the terrace reaching the above-mentioned first conductive type semiconductor substrate from the above-mentioned second conductive type contact layer; a heat dissipation layer, which is arranged on the surface of the above-mentioned second conductive type contact layer and has a width narrower than that of the above-mentioned second conductive type contact layer; a terrace protection film composed of an insulating film, which covers the two side surfaces of the above-mentioned terrace structure and the two end portions of the surface of the above-mentioned second conductive type contact layer; and a second conductive type side electrode, which is electrically connected to the above-mentioned second conductive type contact layer.

[0014] The manufacturing method of the optical semiconductor device involved in the present disclosure comprises: a first crystal growth step, in which a first conductive type cladding layer, an active layer and a second conductive type first cladding layer are sequentially stacked on a first conductive type semiconductor substrate; a ridge structure forming step, in which the first conductive type cladding layer, the active layer and the second conductive type first cladding layer are etched into a stripe-shaped ridge structure; a second crystal growth step, in which a buried layer buried in a manner covering both side surfaces of the ridge structure is crystal-grown; a third crystal growth step, in which a second conductive type second cladding layer, a second conductive type contact layer and a second conductive type first cladding layer are sequentially stacked on the top of the ridge structure and on the surface of the buried layer. A heat dissipation layer; a heat dissipation layer etching step of etching the heat dissipation layer into a stripe shape having a width wider than the width of the ridge structure; a table structure forming step of forming two side surfaces of the table structure by a table reaching the first conductive type semiconductor substrate from the second conductive type contact layer with the ridge structure as the center; a table protection film forming step of forming a table protection film composed of an insulating film covering the two side surfaces of the table structure and the two end portions of the surface of the second conductive type contact layer; and an electrode forming step of forming a second conductive type side electrode electrically connected to the second conductive type contact layer on the surface of the second conductive type contact layer.

[0015] According to the optical semiconductor device of the present disclosure, since the second conductivity type second cladding layer can be made thinner, the device resistance can be reduced and the heat dissipation can be improved, thereby achieving an effect of excellent high temperature characteristics.

[0016] According to the method for manufacturing an optical semiconductor device according to the present disclosure, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture an optical semiconductor device having excellent high-temperature characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a cross-sectional view showing the structure of the optical semiconductor device according to the first embodiment.

[0018] Figure 2 It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0019] Figure 3 It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0020] Figure 4 It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0021] Figure 5 It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0022] Figure 6It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0023] Figure 7 It is a cross-sectional view showing the method for manufacturing the optical semiconductor device according to the first embodiment.

[0024] Figure 8 It is a cross-sectional view showing the structure of an optical semiconductor device according to the second embodiment.

[0025] Fig. 9 It is a cross-sectional view showing a method for manufacturing the optical semiconductor device according to the second embodiment.

[0026] Fig.10 It is a cross-sectional view showing a method for manufacturing the optical semiconductor device according to the second embodiment.

[0027] Fig.11 It is a cross-sectional view showing a method for manufacturing the optical semiconductor device according to the second embodiment.

[0028] Fig.12 It is a cross-sectional view showing a method for manufacturing the optical semiconductor device according to the second embodiment.

[0029] Fig.13 It is a cross-sectional view showing a method for manufacturing the optical semiconductor device according to the second embodiment.

[0030] Fig.14 It is a cross-sectional view showing the structure of an optical semiconductor device according to the third embodiment.

[0031] Fig.15 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the third embodiment.

[0032] Fig.16 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the third embodiment.

[0033] Fig.17 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the third embodiment.

[0034] Fig.18 It is a cross-sectional view showing the structure of an optical semiconductor device according to a fourth embodiment.

[0035] Fig.19 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the fourth embodiment.

[0036] Fig. 20 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the fourth embodiment.

[0037] Fig.21It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the fourth embodiment.

[0038] Fig. 22 It is a cross-sectional view showing the structure of an optical semiconductor device according to the fifth embodiment.

[0039] Fig.23 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the fifth embodiment.

[0040] Fig.24 It is a cross-sectional view showing a method for manufacturing an optical semiconductor device according to the fifth embodiment.

[0041] Fig.25 It is a cross-sectional view showing the structure of an optical semiconductor device according to the sixth embodiment.

[0042] Fig.26 It is a cross-sectional view showing the structure of an optical semiconductor device according to the seventh embodiment.

[0043] Fig. 27 It is a cross-sectional view showing the structure of an optical semiconductor device according to the eighth embodiment.

[0044] Fig.28 It is a cross-sectional view showing the structure of an optical semiconductor device according to a comparative example. DETAILED DESCRIPTION

[0045] Implementation Method 1

[0046] Figure 1 It is a cross-sectional view showing the structure of the optical semiconductor device 200 according to the first embodiment.

[0047] The optical semiconductor device 200 involved in the first embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2 (first conductivity type cladding layer), an active layer 3, and a p-type InP first cladding layer 4 (second conductivity type first cladding layer) stacked in sequence on an n-type InP substrate 1 (first conductivity type semiconductor substrate); a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a (a semiconductor layer of any conductivity type) and an n-type InP barrier layer 6b (first conductivity type barrier layer) formed on both side surfaces of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 (second conductivity type second cladding layer) and a p-type InGaAs contact layer 8 (second conductivity type contact layer), which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; A p-type InP heat sink layer 9 (a second conductive type heat sink layer) is formed on the surface of the p-type InGaAs contact layer 8; a striped terrace structure 13 is formed with the striped ridge structure 5 as the center, and the two side surfaces are formed by the terraces reaching the n-type InP substrate 1 from the p-type InGaAs contact layer 8; a terrace protection film 10 composed of SiO2 (a terrace protection film composed of an insulating film) is formed to cover the two side surfaces of the striped terrace structure 13, the p-type InP heat sink layer 9 and the two end portions of the surface of the p-type InGaAs contact layer 8; a p-side electrode 11 (a second conductive type side electrode) is arranged on both sides of the p-type InP heat sink layer 9 on the surface of the p-type InGaAs contact layer 8; and an n-side electrode 12 (a first conductive type side electrode) is arranged on the back side of the n-type InP substrate 1.

[0048] Here, the Fe-doped semi-insulating InP layer 6 a and the n-type InP barrier layer 6 b are collectively referred to as a buried layer 6 .

[0049] First, a method for manufacturing the optical semiconductor device 200 according to the first embodiment will be described below.

[0050] An n-type InP cladding layer 2 , an active layer 3 , and a p-type InP first cladding layer 4 are sequentially crystal-grown on the surface of an n-type InP substrate 1 by a crystal growth method such as Metal Organic Chemical Vapor Deposition (MOCVD) (first crystal growth step).

[0051] After the crystal growth of each of the above layers, the first SiO2 film 101 is formed on the surface of the p-type InP first cladding layer 4. As a method for forming the first SiO2 film 101, for example, a CVD (Chemical Vapor Deposition) method can be cited. After the first SiO2 film 101 is formed, Figure 2 As shown, the first SiO 2 film 101 is patterned into stripes having a desired width using photolithography and etching techniques.

[0052] Next, the first SiO2 film 101 in stripe shape is used as an etching mask. Figure 3 As shown, dry etching is performed from the p-type InP first cladding layer 4 to the middle of the n-type InP cladding layer 2, or dry etching is performed to the middle of the n-type InP substrate 1, thereby forming a stripe-shaped ridge structure 5 (ridge structure forming step). Here, the etching mask is not limited to the SiO2 film, but may also be a SiN film. In addition, etching is not limited to dry etching, and wet etching may also be used.

[0053] After the stripe-shaped ridge structure 5 is formed, Figure 4 As shown in FIG. 1 , a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD so as to cover both side surfaces of the stripe-shaped ridge structure 5 (second crystal growth step). That is, the Fe-doped semi-insulating InP layer 6a and the n-type InP barrier layer 6b as the buried layer 6 are formed on both side surfaces of the stripe-shaped ridge structure 5.

[0054] The structure of the buried layer 6 is not limited to the above-mentioned two-layer structure, but may be a structure in which three layers, namely, a p-type InP layer, an Fe-doped semi-insulating InP layer, and an n-type InP layer are stacked in sequence.

[0055] After the crystal growth of the buried layer 6, the stripe-shaped first SiO2 film 101 is removed by dry etching or the like.

[0056] Next, a p-type InP second cladding layer 7, a p-type InGaAs contact layer 8, and a p-type InP heat sink layer 9 are sequentially stacked by MOCVD in such a manner as to cover the surface of the n-type InP barrier layer 6b and the top of the stripe-shaped ridge structure 5, i.e., the surface of the p-type InP first cladding layer 4 (third crystal growth step). The heat sink layer 9 may also be a p-type semiconductor layer (second conductivity type semiconductor layer) other than InP. In short, any material with excellent heat dissipation properties may be used.

[0057] After the crystal growth of each layer, the second SiO2 film 102 is formed on the surface of the p-type InP heat sink layer 9. As a method for forming the second SiO2 film 102, for example, a CVD method can be cited. After the second SiO2 film 102 is formed, a photolithography technique and an etching technique are used, such as Figure 5 As shown, the second SiO2 film 102 is patterned into stripes having a desired width.

[0058] Next, the second SiO2 film 102 in a stripe shape is used as an etching mask. Figure 6As shown, dry etching is performed from the p-type InP heat sink layer 9 to the surface of the p-type InGaAs contact layer 8, thereby forming a heat sink layer portion composed of the stripe-shaped p-type InP heat sink layer 9 (heat sink layer etching step).

[0059] At this time, if Figure 7 As shown, the heat dissipation layer width D2 of the p-type InP heat dissipation layer 9 is set to satisfy the surface terrace width D1 of the optical semiconductor device 200>the heat dissipation layer width D2. The etching mask is not limited to the SiO2 film, but may be a SiN film.

[0060] Then, if Figure 7 As shown, a resist mask 103 is used to form two side surfaces of a mesa formed by wet etching from the p-type InGaAs contact layer 8 to the n-type InP substrate 1 with the stripe-shaped ridge structure 5 as the center, so that the surface mesa width D1 of the optical semiconductor device 200 is greater than the heat dissipation layer width D2, thereby forming a stripe-shaped mesa structure 13 including the buried layer 6 (mesa structure forming step). Here, the etching mask is not limited to the resist, and may be a SiO2 film or a SiN film.

[0061] Alternatively, the stripe-shaped mesa structure 13 may be formed by wet etching from the p-type InGaAs contact layer 8 to the middle of any of the layers such as the Fe-doped semi-insulating InP layer 6 a and the n-type InP cladding layer 2 .

[0062] Next, a mesa protective film 10 made of SiO2 is formed on the surface and both side surfaces of the striped mesa structure 13 and the p-type InP heat sink layer 9 (mesa protective film forming step). Here, the mesa protective film 10 made of SiO2 means a mesa protective film 10 made of an insulating film such as SiO2. As a film forming method of the mesa protective film 10 made of SiO2, for example, a CVD method can be cited.

[0063] Using photolithography and etching techniques, a mesa protection film opening 10a is provided in a mesa protection film 10 made of SiO2 formed on both sides of the p-type InP heat sink layer 9 on the surface of the p-type InGaAs contact layer 8. As a result of providing the mesa protection film opening 10a in the mesa protection film 10, the mesa protection film 10 has a shape covering both ends of the surface of the p-type InGaAs contact layer 8.

[0064] A p-side electrode 11 is formed in contact with the surface of the p-type InGaAs contact layer 8 at locations where terrace protection film openings 10a are provided on both sides of the p-type InP heat dissipation layer 9 (electrode forming process), and an n-side electrode 12 is formed on the back side of the n-type InP substrate 1.

[0065] The optical semiconductor device 200 according to the first embodiment is manufactured through the above steps.

[0066] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 200 according to the first embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 200 having excellent high-temperature characteristics.

[0067] Fig.28 It is a cross-sectional view showing the structure of an optical semiconductor device 500 as a comparative example.

[0068] The optical semiconductor device 500 according to the comparative example is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both side surfaces of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the n-type InP barrier layer 6b. b surface; a striped terrace structure 13, with the striped ridge structure 5 as the center, and the two side surfaces are formed by the terrace from the p-type InGaAs contact layer 8 to the n-type InP substrate 1; a terrace protection film 10 composed of SiO2, formed to cover the two side surfaces of the striped terrace structure 13 and the two end portions of the surface of the p-type InGaAs contact layer 8; a p-side electrode 11, arranged to cover substantially the entire surface of the p-type InGaAs contact layer 8; and an n-side electrode 12, arranged on the back side of the n-type InP substrate 1.

[0069] The operation of the optical semiconductor device 200 according to the first embodiment will be described below.

[0070] By applying a forward bias between the p-side electrode 11 and the n-side electrode 12 of the optical semiconductor device 200, current is injected from the p-type InGaAs contact layer 8. The injected current is narrowed in the region of the stripe-shaped ridge structure 5 by the buried layer 6, that is, the Fe-doped semi-insulating InP layer 6a and the n-type InP barrier layer 6b. By the current injected into the active layer 3, laser light having a wavelength corresponding to the band gap energy of the semiconductor layer constituting the active layer 3 is generated in the active layer 3 and emitted to the outside of the optical semiconductor device 200.

[0071] Next, the function of the p-type InP heat dissipation layer 9 which is a characteristic structure of the optical semiconductor device 200 according to the first embodiment will be described below.

[0072] Generally speaking, in an optical semiconductor device (semiconductor laser), the active layer is the main source of heat generation. The heat generated in the active layer is conducted to the surrounding semiconductor layers and diffused outside the active layer.

[0073] In the optical semiconductor device 500 involved in the comparative example, heat generated in the active layer 3 that is conducted in the stacking direction is conducted from the active layer 3 to the p-side electrode 11 via the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 , and dissipated to the outside of the optical semiconductor device 500 .

[0074] In order to improve the heat dissipation of the optical semiconductor device, it is effective to increase the crystal volume of the p-type InP second cladding layer 7, that is, to make it thicker. For example, in the optical semiconductor device 500 involved in the comparative example, in order to dissipate the heat generated in the active layer 3, it is necessary to make the p-type InP second cladding layer 7 thicker to a degree that can obtain the desired heat dissipation effect. However, there is a problem that the thickening of the p-type InP second cladding layer 7 leads to an increase in the device resistance.

[0075] Another issue in optical semiconductor devices (semiconductor lasers) is to reduce the element resistance. As methods for reducing the element resistance, there are the following methods: a method of increasing the contact area between the p-type InGaAs contact layer and the p-side electrode to reduce the contact resistance of the electrode portion, or a method of thinning the p-type InP cladding layer in order to reduce the crystal resistance of the bulk crystal that is the dominant factor in the element resistance.

[0076] Therefore, in setting the thickness of the p-type InP second cladding layer 7 , there is a trade-off between improvement of heat dissipation and reduction of device resistance.

[0077] In order to solve the above-mentioned problems, in the optical semiconductor device 200 according to the first embodiment, the p-type InP heat dissipation layer 9 is newly provided.

[0078] The p-type InP heat sink layer 9 provided on the surface of the p-type InGaAs contact layer 8 functions in the following manner: the heat conducted from the active layer 3 via the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 is efficiently dissipated to the outside of the optical semiconductor device 200. That is, the p-type InP heat sink layer 9 functions as a heat sink. This is because, since the p-type InP heat sink layer 9 is located at a higher position than the p-type InGaAs contact layer 8 in the stacking direction, heat dissipation to the outside of the optical semiconductor device 200 can be achieved more efficiently than in the optical semiconductor device 500 according to the comparative example in which the p-type InP heat sink layer 9 is not provided.

[0079] Therefore, in the optical semiconductor device 200 involved in embodiment 1, since heat can be efficiently dissipated through the p-type InP heat dissipation layer 9, there is no need to thicken the p-type InP second cladding layer 7 to a degree beyond the original function of the cladding, thereby improving heat dissipation and reducing element resistance.

[0080] As described above, in the optical semiconductor device 200 involved in embodiment 1, since the p-type InP heat dissipation layer 9 is provided on the surface of the p-type InGaAs contact layer 8, the p-type InP second cladding layer 7 can be thinned compared with the optical semiconductor device 500 involved in the comparative example, thereby reducing the element resistance, and since the heat dissipation is improved by the p-type InP heat dissipation layer 9, the high-temperature characteristics are also excellent.

[0081] Implementation Method 2

[0082] Figure 8 It is a cross-sectional view showing the structure of an optical semiconductor device 210 according to the second embodiment.

[0083] The optical semiconductor device 210 according to the second embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; a stripe-shaped terrace structure 13, which is composed of a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; and a stripe-shaped terrace structure 13, which is composed of a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b. The InGaAs contact layer 8 reaches the table of the n-type InP substrate 1 to form two side surfaces; the table protection film 10 composed of SiO2 is formed to cover the two side surfaces of the striped table structure 13, the p-type InP heat dissipation layer 9, and the two end portions of the surface of the p-type InGaAs contact layer 8; the p-type InP heat dissipation layer 9 is in contact with the p-type InP second cladding layer 7 via the contact layer opening 8a provided in the p-type InGaAs contact layer 8; the p-side electrode 11 is provided on both sides of the p-type InP heat dissipation layer 9 on the surface of the p-type InGaAs contact layer 8; and the n-side electrode 12 is provided on the back side of the n-type InP substrate 1.

[0084] The optical semiconductor device 210 involved in embodiment 2 is different from the structure in which the p-type InP heat dissipation layer 9 is formed on the surface of the p-type InGaAs contact layer 8 in the optical semiconductor device 200 involved in embodiment 1 in that the p-type InP heat dissipation layer 9 is in contact with the p-type InP second cladding layer 7 via the contact layer opening 8a provided in the p-type InGaAs contact layer 8.

[0085] A method for manufacturing the optical semiconductor device 210 according to the second embodiment will be described below.

[0086] Until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5. Figures 2 to 4 The method for manufacturing the optical semiconductor device 200 according to the first embodiment shown is the same.

[0087] After the crystal growth of the buried layer 6, the first SiO2 film 101 is etched away, and the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are stacked in sequence on the surface of the n-type InP barrier layer 6b and the top of the striped ridge structure 5 using MOCVD (third crystal growth step).

[0088] After the crystal growth of each of the above layers, the third SiO2 film 104 is formed on the surface of the p-type InGaAs contact layer 8. The third SiO2 film 104 can be formed by, for example, CVD.

[0089] After the third SiO2 film 104 is formed, Fig. 9 As shown, the third SiO 2 film 104 is patterned into a stripe-shaped third SiO 2 film opening 104 a having a desired etching width D3 using photolithography technology and etching technology.

[0090] Next, if Fig.10 As shown, using the third SiO2 film 104 as an etching mask, the portion of the p-type InGaAs contact layer 8 exposed in the third SiO2 film opening 104a is removed by dry etching until it reaches the surface of the p-type InP second cladding layer 7, thereby setting a contact layer opening 8a (contact layer etching process).

[0091] In the contact layer etching step, the opening width of the contact layer opening 8a, that is, the etching width D3 is set to satisfy the surface terrace width D1 of the optical semiconductor device 210>the etching width D3. Here, the etching mask is not limited to the SiO2 film, but may be a SiN film.

[0092] The third SiO2 film 104 is etched away, as shown in FIG. Fig.11 As shown, a p-type InP heat sink layer 9 is stacked by MOCVD (fourth crystal growth step). Here, the heat sink layer 9 does not need to be p-type InP, and may be made of a material other than InP.

[0093] After the crystal growth of the p-type InP heat sink layer 9, the second SiO2 film 102 is formed on the surface of the p-type InP heat sink layer 9. As a method for forming the second SiO2 film 102, for example, a CVD method can be cited. After the second SiO2 film 102 is formed, a photolithography technique and an etching technique are used, such as Fig.12 As shown, the second SiO2 film 102 is patterned into stripes having a desired width.

[0094] Next, the second SiO2 film 102 in a stripe shape is used as an etching mask. Fig.13 As shown, the p-type InP heat sink layer 9 is dry-etched to the surface of the p-type InGaAs contact layer 8 to form a heat sink layer portion composed of a stripe-shaped p-type InP heat sink layer 9 (heat sink layer etching process). The p-type InP heat sink layer 9 has a stripe shape with the bottom in contact with the p-type InP second cladding layer 7.

[0095] In the heat dissipation layer etching process, Figure 8 As shown, the heat dissipation layer width D2 of the p-type InP heat dissipation layer 9 is set to the surface terrace width D1 of the optical semiconductor device 210> the heat dissipation layer width D2. In addition, regarding the relationship with the etching width D3, although the heat dissipation layer width D2 is set to be ≥ the etching width D3, it is preferably set to be the heat dissipation layer width D2 = the etching width D3. Among them, the etching mask is not limited to the SiO2 film, and can also be a SiN film.

[0096] The subsequent manufacturing method is the same as the manufacturing method of the optical semiconductor device 200 according to the first embodiment.

[0097] The optical semiconductor device 210 according to the second embodiment is manufactured through the above steps.

[0098] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 210 according to the second embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 210 having excellent high-temperature characteristics.

[0099] In the optical semiconductor device 210 involved in embodiment 2, the bottom of the p-type InP heat dissipation layer 9 is not in contact with the surface of the p-type InGaAs contact layer 8 as in the optical semiconductor device 200 involved in embodiment 1, but is in contact with the p-type InP second cladding layer 7. Therefore, there is no p-type InGaAs contact layer 8 directly above the stacking direction of the active layer 3, that is, on the top side of the striped mesa structure 13. Therefore, the absorption of laser by the p-type InGaAs contact layer 8 is significantly reduced.

[0100] This is because, since the band gap energy of the p-type InGaAs contact layer 8 is smaller than the band gap energy of the active layer 3, the p-type InGaAs contact layer 8 has the function of absorbing the laser light emitted from the active layer 3. Therefore, when the active layer 3 contacts the p-type InGaAs contact layer 8, the far field image (Far Field Pattern: FFP) of the laser light emitted from the active layer 3 in the stacking direction may be disturbed.

[0101] Due to the above structure, the optical semiconductor device 210 according to the second embodiment has the effect of the optical semiconductor device 200 according to the first embodiment, and can also suppress the disturbance of FFP in the direction perpendicular to the surface of the n-type InP substrate 1 and achieve high output.

[0102] As described above, in the optical semiconductor device 210 involved in embodiment 2, the effects of the optical semiconductor device 200 involved in embodiment 1, namely, the effects of improved heat dissipation and reduced element resistance are achieved, and since the bottom of the p-type InP heat dissipation layer 9 is in contact with the p-type InP second cladding layer 7, and there is no p-type InGaAs contact layer 8 directly above the active layer 3 in the stacking direction, it is also possible to suppress the disturbance of FFP and achieve high output.

[0103] Implementation 3

[0104] Fig.14 It is a cross-sectional view showing the structure of an optical semiconductor device 220 according to the third embodiment.

[0105] The optical semiconductor device 220 according to the third embodiment comprises the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; a stripe-shaped terrace structure 13, which is formed of a Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; The stripe-shaped ridge structure 5 is centered, and the two side surfaces are formed by the table reaching the n-type InP substrate 1 from the p-type InGaAs contact layer 8; the table protection film 10 composed of SiO2 is formed to cover the two side surfaces of the stripe-shaped table structure 13 and the two end portions of the surface of the p-type InGaAs contact layer 8; the undoped InP high resistance layer 14 is formed on the surface of the p-type InGaAs contact layer 8; the p-side electrode 11 is set to cover the p-type InGaAs contact layer 8 and the undoped InP high resistance layer 14; and the n-side electrode 12 is set on the back side of the n-type InP substrate 1.

[0106] A method for manufacturing the optical semiconductor device 220 according to the third embodiment will be described below.

[0107] Until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5. Figures 2 to 4 The method for manufacturing the optical semiconductor device 200 according to the first embodiment shown is the same.

[0108] After the crystal growth of the buried layer 6, the first SiO2 film 101 is removed. Fig.15 As shown, using MOCVD, a p-type InP second cladding layer 7, a p-type InGaAs contact layer 8 and an undoped InP high resistance layer 14 are stacked in sequence in a manner covering the surface of the n-type InP barrier layer 6b and the top of the striped ridge structure 5, i.e., the surface of the p-type InP first cladding layer 4 (third crystal growth step).

[0109] Undoped InP, which is a constituent material of the undoped InP high resistance layer 14, has a higher resistance, that is, a higher resistivity, than the materials constituting each layer such as the n-type InP cladding layer 2, the active layer 3, the p-type InP first cladding layer 4, the p-type InP second cladding layer 7, and the p-type InGaAs contact layer 8 included in the optical semiconductor device 220. Here, the semiconductor layer composed of undoped InP is referred to as a high resistance layer.

[0110] The undoped InP high resistance layer 14 functions as a heat dissipation layer for dissipating the heat generated in the active layer 3 to the outside, similarly to the p-type InP heat dissipation layer 9 constituting the optical semiconductor device 200 involved in Embodiment 1. In other words, it can be said that the heat dissipation layer is composed of a high-resistance undoped InP material. Among them, the undoped InP high resistance layer 14 does not necessarily need to be undoped InP, and may also be an n-type (first conductivity type) or semi-insulating material, as long as it is high resistance. In addition, if it is high resistance, it may be a material other than InP.

[0111] Next, using the second SiO2 film 102 as a mask, Fig.16 As shown, the undoped InP high resistance layer 14 is dry-etched to the surface of the p-type InGaAs contact layer 8 to form a high resistance layer portion composed of the undoped InP high resistance layer 14 in a stripe shape (heat dissipation layer etching step).

[0112] In the heat dissipation layer etching process, Fig.17As shown, the width of the undoped InP high resistance layer 14, that is, the high resistance layer width D4, is set to satisfy the surface terrace width D1 of the optical semiconductor device 220>the high resistance layer width D4. The etching mask is not limited to the SiO2 film, but may be a SiN film.

[0113] Then, if Fig.17 As shown, a mesa structure 13 including a buried layer 6 is formed by wet etching from the p-type InGaAs contact layer 8 to the n-type InP substrate 1, using a resist mask 103 so that the surface mesa width D1 of the optical semiconductor device 220 is greater than the high resistance layer width D4, with the stripe-shaped ridge structure 5 as the center, thereby forming both side surfaces (mesa structure forming step). The etching mask is not limited to the resist mask, but may be a SiN film. In addition, etching is not limited to wet etching, and dry etching may also be used.

[0114] Alternatively, the stripe-shaped mesa structure 13 may be formed by wet etching from the p-type InGaAs contact layer 8 to the middle of any of the layers such as the Fe-doped semi-insulating InP layer 6 a and the n-type InP cladding layer 2 .

[0115] Next, a mesa protection film 10 made of SiO2 is formed on the surface and both side surfaces of the striped mesa structure 13 and the undoped InP high resistance layer 14 (mesa protection film forming step). The mesa protection film 10 made of SiO2 may be formed by, for example, CVD.

[0116] The mesa protection film opening 10a is provided in the mesa protection film 10 composed of SiO2 formed on both sides of the undoped InP high resistance layer 14 on the surface of the p-type InGaAs contact layer 8 using the photolithography technology and the etching technology. As a result of providing the mesa protection film opening 10a in the mesa protection film 10, the mesa protection film 10 has a shape covering both ends of the surface of the p-type InGaAs contact layer 8.

[0117] After the stripe-shaped mesa structure 13 is formed, the p-side electrode 11 is provided to cover the surface of the p-type InGaAs contact layer 8 and the undoped InP high resistance layer 14 (electrode forming step), and the n-side electrode 12 is provided on the back side of the n-type InP substrate 1 .

[0118] The optical semiconductor device 220 according to the third embodiment is manufactured through the above steps.

[0119] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 220 according to the third embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 220 having excellent high-temperature characteristics.

[0120] Next, the function of the undoped InP high resistance layer 14 which is a characteristic structure of the optical semiconductor device 220 according to the third embodiment will be described below.

[0121] The undoped InP high resistance layer 14 functions to efficiently dissipate heat conducted from the active layer 3 via the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 to the outside of the optical semiconductor device 220. That is, the undoped InP high resistance layer 14 functions as a heat sink.

[0122] This is because the undoped InP high resistance layer 14 is located higher than the p-type InGaAs contact layer 8 in the stacking direction, so that heat can be dissipated to the outside of the optical semiconductor device 220 more efficiently than the optical semiconductor device 500 according to the comparative example in which the undoped InP high resistance layer 14 is not provided.

[0123] That is, in the optical semiconductor device 220 involved in embodiment 3, since heat can be efficiently dissipated through the undoped InP high resistance layer 14, there is no need to thicken the p-type InP second cladding layer 7 to a degree beyond the original function of the cladding, thereby improving heat dissipation while also reducing element resistance.

[0124] In the optical semiconductor device 220 according to the third embodiment, Fig.14 As shown, the p-side electrode 11 is provided to cover not only the p-type InGaAs contact layer 8 but also the entire surface including the side surface of the undoped InP high resistance layer 14. Since the thermal conductivity of the p-side electrode 11 is higher than that of the semiconductor layer, the p-side electrode 11 provided on the surface of the undoped InP high resistance layer 14 also contributes to the heat dissipation from the undoped InP high resistance layer 14. Therefore, the effect of further improving the heat dissipation of the optical semiconductor device 220 is brought about.

[0125] As described above, in the optical semiconductor device 220 involved in embodiment 3, since an undoped InP high resistance layer 14 is provided on the surface of the p-type InGaAs contact layer 8, the p-type InP second cladding layer 7 can be thinned compared with the optical semiconductor device 500 involved in the comparative example, thereby reducing the element resistance, and since the heat dissipation is improved by the undoped InP high resistance layer 14, the high temperature characteristics are also excellent.

[0126] Furthermore, since the p-side electrode 11 is provided on the entire surface of the undoped InP high resistance layer 14 , heat dissipation can be further improved, thereby achieving an effect of further improving high temperature characteristics.

[0127] Implementation 4

[0128] Fig.18 It is a cross-sectional view showing the structure of an optical semiconductor device 230 according to the fourth embodiment.

[0129] The optical semiconductor device 230 according to the fourth embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; and a stripe-shaped terrace structure 13, which is centered on the stripe-shaped ridge structure 5. , with two side surfaces formed by a table reaching the n-type InP substrate 1 from the p-type InGaAs contact layer 8; a table protection film 10 composed of SiO2, formed to cover the two side surfaces of the striped table structure 13 and the two end portions of the surface of the p-type InGaAs contact layer 8; an undoped InP high resistance layer 14, in contact with the p-type InP second cladding layer 7 via a contact layer opening 8a provided in the p-type InGaAs contact layer 8; a p-side electrode 11, provided to cover the p-type InGaAs contact layer 8 and the undoped InP high resistance layer 14; and an n-side electrode 12, provided on the back side of the n-type InP substrate 1.

[0130] A method for manufacturing the optical semiconductor device 230 according to the fourth embodiment will be described below.

[0131] Until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5. Figures 2 to 4 The method for manufacturing the optical semiconductor device 200 according to the first embodiment shown is the same.

[0132] After the crystal growth of the buried layer 6, the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are sequentially stacked by MOCVD (third crystal growth step), and the p-type InGaAs contact layer 8 is removed by dry etching until it reaches the surface of the p-type InP second cladding layer 7 using the striped third SiO2 film 104 as an etching mask (contact layer etching step). Fig. 9 as well as Fig.10 The method for manufacturing the optical semiconductor device 210 according to the second embodiment shown is the same.

[0133] After removing the stripe-shaped third SiO2 film 104, Fig.19As shown, an undoped InP high resistance layer 14 is stacked by MOCVD (fourth crystal growth step). Here, the high resistance layer 14 does not need to be undoped InP, but may be an n-type or semi-insulating material, or a material other than InP.

[0134] After the crystal growth of the undoped InP high resistance layer 14, the second SiO2 film 102 is formed on the surface of the undoped InP high resistance layer 14. As a method for forming the second SiO2 film 102, for example, a CVD method can be cited. After the second SiO2 film 102 is formed, a photolithography technique and an etching technique are used, such as Fig. 20 As shown, the second SiO2 film 102 is patterned into stripes having a desired width.

[0135] Next, the second SiO2 film 102 in a stripe shape is used as an etching mask. Fig.21 As shown, the undoped InP high resistance layer 14 is dry-etched to the surface of the p-type InGaAs contact layer 8 to form a high resistance layer portion composed of the undoped InP high resistance layer 14 in a stripe shape (heat dissipation layer etching step).

[0136] In the heat dissipation layer etching process, Fig.18 As shown, the width of the undoped InP high resistance layer 14, i.e., the high resistance layer width D4, is set to satisfy the surface terrace width D1 of the optical semiconductor device 230> the high resistance layer width D4. In addition, regarding the relationship with the etching width D3, although the high resistance layer width D4 is set to satisfy the etching width D3, it is preferred that the high resistance layer width D4=the etching width D3. The etching mask is not limited to the SiO2 film, but may also be a SiN film.

[0137] The subsequent manufacturing method is the same as the manufacturing method of the optical semiconductor device 220 according to the third embodiment.

[0138] The optical semiconductor device 230 according to the fourth embodiment is manufactured through the above steps.

[0139] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 230 according to the fourth embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 230 having excellent high-temperature characteristics.

[0140] The optical semiconductor device 230 involved in embodiment 4 has the same effect as the optical semiconductor device 220 involved in embodiment 3, and the bottom of the undoped InP high resistance layer 14 is not in contact with the surface of the p-type InGaAs contact layer 8 as in the optical semiconductor device 220 involved in embodiment 3, but is in contact with the p-type InP second cladding layer 7. Therefore, there is no p-type InGaAs contact layer 8 directly above the stacking direction of the active layer 3, that is, on the top side of the striped mesa structure 13, and therefore the absorption of laser by the p-type InGaAs contact layer 8 is significantly reduced.

[0141] Therefore, in the optical semiconductor device 230 according to the fourth embodiment, it is possible to suppress the disturbance of the FFP in the direction perpendicular to the surface of the n-type InP substrate 1 and to achieve higher output.

[0142] As described above, in the optical semiconductor device 230 involved in embodiment 4, the effects of the optical semiconductor device 220 involved in embodiment 3, namely, the effect of improving heat dissipation and reducing element resistance are achieved, and since the bottom of the undoped InP high resistance layer 14 is in contact with the p-type InP second cladding layer 7, and there is no p-type InGaAs contact layer 8 directly above the active layer 3 in the stacking direction, it is also possible to suppress the disturbance of FFP and achieve high output.

[0143] Implementation method 5

[0144] Fig. 22 It is a cross-sectional view showing the structure of an optical semiconductor device 240 according to the fifth embodiment.

[0145] The optical semiconductor device 240 according to the fifth embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; a stripe-shaped terrace structure 13, which is composed of a Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, which are formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b; 8 reaches the table of the n-type InP substrate 1 to form two side surfaces; a partial table protection film composed of a SiO2 film is arranged on the two side surfaces of the striped table structure, one end reaches the n-type InP substrate 1 exposed on the two side surfaces, and the other end covers the buried layer 6 exposed on the two side surfaces; a p-side electrode 11 is arranged on the surface of the p-type InGaAs contact layer 8, and is arranged to cover the two side surfaces of the p-type InGaAs contact layer 8 exposed on the two side surfaces of the striped table structure 13 and a part of the two side surfaces of the p-type InP second cladding layer 7 similarly exposed; and an n-side electrode 12 is arranged on the back side of the n-type InP substrate 1.

[0146] A method for manufacturing the optical semiconductor device 240 according to the fifth embodiment will be described below.

[0147] The manufacturing method of the optical semiconductor device 210 involved in the second embodiment is the same as the process until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering the two side surfaces of the stripe-shaped ridge structure 5, and a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8 are sequentially stacked by MOCVD.

[0148] Then, if Fig.23 As shown, using a resist mask 105, a mesa formed by wet etching from the p-type InGaAs contact layer 8 to the n-type InP substrate 1 is used to form two side surfaces with the stripe-shaped ridge structure 5 as the center, thereby forming a stripe-shaped mesa structure 13 including the buried layer 6 (mesa structure forming step). Here, the etching mask is not limited to the resist mask 105, and may also be a SiO2 film or a SiN film.

[0149] Alternatively, the stripe-shaped mesa structure 13 may be formed by wet etching from the p-type InGaAs contact layer 8 to the middle of any of the Fe-doped semi-insulating InP layer 6 a and the n-type InP cladding layer 2 .

[0150] Next, if Fig.24As shown in the figure, a partial mesa protective film 10b composed of SiO2 is formed on the entire surface including both side surfaces of the striped mesa structure 13, and a resist mask 106 is formed in a manner that a portion of the p-type InGaAs contact layer 8 and the p-type InP second cladding layer 7 are opened. The resist mask 106 is used as an etching mask to perform etching processing on the partial mesa protective film 10b composed of SiO2 (partial mesa protective film forming step). Among them, the partial mesa protective film 10b composed of SiO2 needs to cover the n-type InP barrier layer 6b exposed on both side surfaces of the striped mesa structure 13.

[0151] After processing the partial mesa protection film 10 b made of SiO 2 , the p-side electrode 11 is formed on the surface of the p-type InGaAs contact layer 8 , and the n-side electrode 12 is formed on the back side of the n-type InP substrate 1 .

[0152] When forming the above-mentioned p-side electrode 11, on the two side surfaces of the striped mesa structure 13, the two end portions of the p-side electrode 11 can cover at least a portion of the p-type InGaAs contact layer 8 and the p-type InP second cladding layer 7 exposed on the two side surfaces, or can also cover at least a portion of the p-type InGaAs contact layer 8 and the p-type InP second cladding layer 7 exposed on the two side surfaces and the partial mesa protective film 10b composed of SiO2.

[0153] The optical semiconductor device 240 according to the fifth embodiment is manufactured through the above steps.

[0154] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 240 according to the fifth embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 240 having excellent high-temperature characteristics.

[0155] In the optical semiconductor device 500 according to the comparative example, the portion where the p-side electrode 11 contacts the p-type InGaAs contact layer 8 is only the top portion of the stripe-shaped mesa structure 13 .

[0156] On the other hand, in the optical semiconductor device 240 involved in embodiment 5, since the opening portion of the SiO2 partial mesa protection film 10b is widened to the p-type InP second cladding layer 7 exposed on both side surfaces of the striped mesa structure 13, the two end portions of the p-side electrode 11 are in contact with the entire p-type InGaAs contact layer 8 including the portions exposed on both side surfaces and a portion of the p-type InP second cladding layer 7 exposed on both side surfaces, so that the heat dissipation of the optical semiconductor device 240 is further improved.

[0157] As described above, in the optical semiconductor device 240 according to the fifth embodiment, since the contact area between the p-side electrode 11 and each semiconductor layer is increased compared to the optical semiconductor device 500 according to the comparative example, the contact resistance between the two is reduced, thereby reducing the element resistance of the optical semiconductor device 240. In addition, the high-temperature characteristics of the optical semiconductor device 240 are improved by improving the heat dissipation.

[0158] Implementation 6

[0159] Fig.25 It is a cross-sectional view showing the structure of an optical semiconductor device 250 according to the sixth embodiment.

[0160] The optical semiconductor device 250 according to the sixth embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both side surfaces of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7, which is formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b, and the upper end of the p-type InP second cladding layer 7 is in an inverted mesa shape, that is, a shape with a larger width in the stacking direction; a p-type InGaAs contact layer 8, which is formed on the upper surface of the n-type InP barrier layer 6b; and a p-type InGaAs contact layer 8, which is formed on the upper surface of the n-type InP barrier layer 6b. The top of the p-type InP second cladding layer 7; a striped terrace structure 13, formed by a terrace reaching the n-type InP substrate 1 from the p-type InGaAs contact layer 8; a partial terrace protection film 10b composed of a SiO2 film, arranged on both side surfaces of the striped terrace structure 13, one end reaching the n-type InP substrate 1 exposed on both side surfaces, and the other end covering the buried layer 6 exposed on both side surfaces; a p-side electrode 11, arranged on the surface of the p-type InGaAs contact layer 8, and arranged to cover both side surfaces of the p-type InGaAs contact layer 8 and a part of both side surfaces of the p-type InP second cladding layer 7; and an n-side electrode 12, arranged on the back side of the n-type InP substrate 1.

[0161] A method for manufacturing the optical semiconductor device 250 according to the sixth embodiment will be described below.

[0162] The manufacturing method of the optical semiconductor device 240 according to the fifth embodiment is the same as that of the optical semiconductor device 240 of the fifth embodiment until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, and a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5, and a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8 are sequentially stacked by MOCVD to form a stripe-shaped terrace structure 13.

[0163] After the stripe-shaped mesa structure 13 is formed, wet etching is performed again without removing the resist mask 105 and keeping it as it is. The etchant is, for example, a mixed solution of hydrogen bromide, nitric acid and hydrogen peroxide. By means of this wet etching, etching is performed in the reverse mesa direction from the upper end of the p-type InP second cladding layer 7. At this time, the etching is made not to reach the n-type InP cladding layer 2. Among them, the upper end of the p-type InP second cladding layer 7 means the upper surface side that contacts the p-type InGaAs contact layer 8 among the upper and lower surfaces of the p-type InP second cladding layer 7 in the layer thickness direction.

[0164] That is, at least a portion of the upper end portion of the p-type InP second cladding layer 7 is etched into a shape having a larger width with respect to the stacking direction in a cross section perpendicular to the stripe direction.

[0165] Furthermore, other chemical solutions than those described above may be used as long as the etchant can etch in the reverse mesa direction.

[0166] The subsequent manufacturing method is the same as the manufacturing method of the optical semiconductor device 240 according to the fifth embodiment.

[0167] The optical semiconductor device 250 according to the sixth embodiment is manufactured through the above steps.

[0168] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 250 according to the sixth embodiment, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 250 having excellent high-temperature characteristics.

[0169] In the optical semiconductor device 250 according to the sixth embodiment, when the heat generated in the active layer 3 is conducted to the p-type InGaAs contact layer 8 via the p-type InP second cladding layer 7, in addition to the heat conduction from the surface of the p-type InGaAs contact layer 8 to the p-side electrode 11, heat conduction also occurs from the two side surfaces of the p-type InGaAs contact layer 8 and the portions of the two side surfaces of the p-type InP second cladding layer 7 that are in contact with the p-side electrode 11. Furthermore, since the upper end portion of the p-type InP second cladding layer 7 is in an inverted mesa shape, the contact area between the two side surfaces of the p-type InP second cladding layer 7 and the p-side electrode 11 is further expanded in terms of structure compared to the optical semiconductor device 240 according to the fifth embodiment, and the heat dissipation is further improved.

[0170] As described above, in the optical semiconductor device 250 involved in Embodiment 6, since the p-type InP second cladding layer 7 having an upper end in an inverted table shape, i.e., a shape having an enlarged width in the stacking direction, is provided, at least a portion of the two side surfaces of the p-type InP second cladding layer 7 is covered by the p-side electrode 11. Therefore, in addition to heat conduction from the surface of the p-type InGaAs contact layer 8 to the p-side electrode 11, heat conduction can also be performed from the two side surfaces of the p-type InGaAs contact layer 8 and the two side surfaces of the p-type InP second cladding layer 7 that are in contact with the p-side electrode 11. Therefore, the heat dissipation of the optical semiconductor device 250 is further improved. As a result, the high-temperature characteristics of the optical semiconductor device 250 are improved.

[0171] Implementation 7

[0172] Fig.26 It is a cross-sectional view showing the structure of an optical semiconductor device 260 according to the seventh embodiment.

[0173] The optical semiconductor device 260 according to the seventh embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7, which is formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b, and the upper end of the p-type InP second cladding layer 7 is in a positive table shape, that is, a shape in which the width is narrowed in the stacking direction; a p-type InGaAs contact layer 8, which is formed on the p-type InP substrate 1; The top of the second cladding layer 7 is in the shape of a positive terrace, the same as the p-type InP second cladding layer 7; the striped terrace structure 13 is formed by the terrace reaching the n-type InP substrate 1 from the p-type InGaAs contact layer 8; the partial terrace protection film 10b composed of SiO2 film is arranged on the two side surfaces of the striped terrace structure 13, one end reaches the n-type InP substrate 1 exposed on the two side surfaces, and the other end covers the buried layer 6 exposed on the two side surfaces; the p-side electrode 11 is arranged to cover the p-type InGaAs contact layer 8 and a part of the p-type InP second cladding layer 7, and has a shape with a narrowing width in the stacking direction; and the n-side electrode 12 is arranged on the back side of the n-type InP substrate 1.

[0174] A method for manufacturing the optical semiconductor device 260 according to the seventh embodiment will be described below.

[0175] The manufacturing method of the optical semiconductor device 240 according to the fifth embodiment is the same as that of the optical semiconductor device 240 of the fifth embodiment until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, and a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5, and a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8 are sequentially stacked by MOCVD to form a stripe-shaped terrace structure 13.

[0176] After the stripe-shaped mesa structure 13 is formed, wet etching is performed again without removing the resist mask 105. The etchant is, for example, a mixed solution of hydrochloric acid, hydrogen peroxide, and acetic acid. By this wet etching, etching is performed in the positive mesa direction from the p-type InGaAs contact layer 8 side. At this time, the etching does not reach the n-type InP cladding layer 2.

[0177] That is, at least a portion of the upper end portion of the p-type InP second cladding layer 7 is etched into a shape in which the width is narrowed with respect to the stacking direction in a cross section perpendicular to the stripe direction.

[0178] In addition, if the etching agent can etch in the front mesa direction, other chemical solutions other than the above can be used. In addition, the etching surface is not limited to the front mesa, as long as etching with a different gradient from the striped mesa structure 13 is achieved, a chemical solution that can achieve this shape can also be used.

[0179] The subsequent manufacturing method is the same as the manufacturing method of the optical semiconductor device 240 according to the fifth embodiment.

[0180] The optical semiconductor device 260 according to the seventh embodiment is manufactured through the above steps.

[0181] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 260 according to Embodiment 7, it is possible to reduce element resistance and improve heat dissipation, and as a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 260 having excellent high-temperature characteristics.

[0182] In the optical semiconductor device 260 according to the seventh embodiment, when the heat generated in the active layer 3 is conducted to the p-type InGaAs contact layer 8 via the p-type InP second cladding layer 7, in addition to the heat conduction from the surface of the p-type InGaAs contact layer 8 to the lower portion of the p-side electrode 11, heat conduction also occurs from both side surfaces of the p-type InGaAs contact layer 8 and the portions where both side surfaces of the p-type InP second cladding layer 7 are in contact with the p-side electrode 11. Furthermore, since the upper end portion of the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are in a regular mesa shape, the contact area between both side surfaces of the p-type InP second cladding layer 7 and the p-side electrode 11 is further expanded in terms of structure compared to the optical semiconductor device 240 according to the fifth embodiment, and the heat dissipation is further improved.

[0183] As described above, in the optical semiconductor device 260 involved in Embodiment 7, since the p-type InP second cladding layer 7 and the p-type InGaAs contact layer 8 are provided, the p-side electrode 11 covers the two side surfaces of the p-type InGaAs contact layer 8 and at least a portion of the two side surfaces of the p-type InP second cladding layer 7, in addition to heat conduction from the surface of the p-type InGaAs contact layer 8 to the p-side electrode 11, heat conduction can also be performed from the two side surfaces of the p-type InGaAs contact layer 8 and the two side surfaces of the p-type InP second cladding layer 7 that are in contact with the p-side electrode 11, so that the heat dissipation in the optical semiconductor device 260 is further improved, and as a result, the high-temperature characteristics of the optical semiconductor device 260 are improved.

[0184] Implementation 8

[0185] Fig. 27 It is a cross-sectional view showing the structure of an optical semiconductor device 270 according to the eighth embodiment.

[0186] The optical semiconductor device 270 involved in the eighth embodiment is composed of the following parts: a stripe-shaped ridge structure 5, which is composed of an n-type InP cladding layer 2, an active layer 3, and a p-type InP first cladding layer 4 stacked in sequence on an n-type InP substrate 1; a buried layer 6, which is composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b formed on both sides of the stripe-shaped ridge structure 5; a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8, wherein the p-type InP second cladding layer 7 is formed to cover the top of the stripe-shaped ridge structure 5 and the surface of the n-type InP barrier layer 6b, and the p-type InGaAs contact layer 8 has a periodic concave-convex pattern 15 formed on the surface; a stripe-shaped A terrace structure 13 is formed by a terrace extending from a p-type InGaAs contact layer 8 to an n-type InP substrate 1; a partial terrace protection film 10b composed of a SiO2 film is arranged on both side surfaces of the striped terrace structure 13, one end of which reaches the n-type InP substrate 1 exposed on both side surfaces, and the other end covers the buried layer 6 exposed on both side surfaces; a p-side electrode 11 is arranged on the surface of the p-type InGaAs contact layer 8, and is arranged to cover a portion of the two side surfaces of the p-type InGaAs contact layer 8 exposed on both side surfaces of the striped terrace structure 13 and the two side surfaces of the p-type InP second cladding layer 7 similarly exposed; and an n-side electrode 12 is arranged on the back side of the n-type InP substrate 1.

[0187] A method for manufacturing the optical semiconductor device 270 according to the eighth embodiment will be described below.

[0188] The manufacturing method of the optical semiconductor device 240 according to the fifth embodiment is the same as that of the optical semiconductor device 240 of the fifth embodiment until a stripe-shaped ridge structure 5 is formed on the surface of the n-type InP substrate 1, and a buried layer 6 composed of an Fe-doped semi-insulating InP layer 6a and an n-type InP barrier layer 6b is buried by MOCVD in a manner covering both side surfaces of the stripe-shaped ridge structure 5, and a p-type InP second cladding layer 7 and a p-type InGaAs contact layer 8 are sequentially stacked by MOCVD to form a stripe-shaped terrace structure 13.

[0189] For the p-type InGaAs contact layer 8, a SiO2 film (not shown) is used as an etching mask to form a periodic concave-convex pattern 15 by dry etching (concave-convex pattern forming step). Here, the etching mask may also be a SiN film, and the periodic concave-convex pattern 15 may also be formed by wet etching.

[0190] The subsequent manufacturing method is the same as the manufacturing method of the optical semiconductor device 240 according to the fifth embodiment.

[0191] The optical semiconductor device 270 according to the eighth embodiment is manufactured through the above steps.

[0192] By applying the above-described manufacturing method as the manufacturing method of the optical semiconductor device 270 according to the eighth embodiment, it is possible to reduce element resistance and improve heat dissipation. As a result, it is possible to easily and reproducibly manufacture the optical semiconductor device 270 having excellent high-temperature characteristics.

[0193] In the optical semiconductor device 270 according to the eighth embodiment, by forming the periodic concavo-convex pattern 15 on the surface of the p-type InGaAs contact layer 8, the effective surface area of ​​the p-type InGaAs contact layer 8 can be increased, thereby promoting the heat conduction from the p-type InGaAs contact layer 8 to the p-side electrode 11 more smoothly. As a result, the heat dissipation of the optical semiconductor device 270 is further improved. In addition, since the contact area between the p-type InGaAs contact layer 8 and the p-side electrode 11 can be increased, the element resistance of the optical semiconductor device 270 can be reduced.

[0194] In the above description, the periodic concavo-convex pattern 15 is used as an example. Of course, even if the concavo-convex pattern 15 is not periodic but a randomly formed concavo-convex pattern 15, the same effect is achieved. In addition, the cross-sectional shape of the concavo-convex pattern 15 may be a groove shape formed by acute angles or a groove shape formed by obtuse angles in addition to a rectangular shape.

[0195] And, in Fig. 27 , regarding the direction of the periodic concavo-convex pattern 15 , the concavo-convex pattern 15 repeated in the width direction of the stripe-shaped mesa structure 13 is shown, but the same effect can be achieved even if the concavo-convex pattern 15 is repeated in the direction along the stripes.

[0196] exist Fig. 27 In the figure, a periodic concave-convex pattern 15 formed on the p-type InGaAs contact layer 8 is shown as an example, but if the bottom of the periodic concave-convex pattern 15 is set to a shape that reaches the p-type InP second cladding layer 7, the contact area with the p-side electrode 11 is further increased, thereby further improving the heat dissipation.

[0197] As described above, in the optical semiconductor device 270 involved in Embodiment 8, the heat dissipation of the optical semiconductor device 270 is significantly improved by forming the concavo-convex pattern 15 on the surface of the p-type InGaAs contact layer 8, thereby achieving the effect of further improving the high-temperature characteristics of the optical semiconductor device 270. In addition, since the contact resistance between the p-type InGaAs contact layer 8 and the p-side electrode 11 is reduced, the element resistance of the optical semiconductor device 270 is also reduced.

[0198] Although the present disclosure describes various exemplary embodiments and examples, various features, forms, and functions described in one or more embodiments are not limited to application in specific embodiments, and may be applied to the embodiments alone or in various combinations.

[0199] Therefore, numerous modifications not shown in the examples are conceivable within the technical scope disclosed in the present specification, including, for example, the modification, addition or omission of at least one constituent element, and the extraction and combination of at least one constituent element with constituent elements of other embodiments.

[0200] Description of Reference Numerals

[0201] 1...n-type InP substrate (first conductivity type semiconductor substrate); 2...n-type InP cladding layer (first conductivity type cladding layer); 3...active layer; 4...p-type InP first cladding layer (second conductivity type first cladding layer); 5...ridge structure; 6...buried layer; 6a...Fe-doped semi-insulating InP layer; 6b...n-type InP barrier layer (first conductivity type barrier layer); 7...p-type InP second cladding layer (second conductivity type second cladding layer); 8...p-type InGaAs contact layer (second conductivity type contact layer); 8a...contact layer opening; 9...p-type InP heat dissipation layer (second conductivity type heat dissipation layer); 10...table protective film ; 10a...opening of the mesa protective film; 10b...part of the mesa protective film; 11...p-side electrode (second conductive type side electrode); 12...n-side electrode (first conductive type side electrode); 13...mesa structure; 14...high resistance layer (high resistance heat dissipation layer); 15...concave-convex pattern; 101...first SiO2 film; 102...second SiO2 film; 103, 105, 106...anti-etching mask; 104...third SiO2 film; 104a...opening of the third SiO2 film; 200, 210, 220, 230, 240, 250, 260, 270, 500...optical semiconductor device.

Claims

1. An optical semiconductor device, characterized in that: The optical semiconductor device comprises: The stripe-shaped ridge structure is composed of a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer sequentially stacked on a first conductivity type semiconductor substrate; A buried layer is buried in a manner to cover both side surfaces of the ridge structure; A second conductive type second cladding layer and a second conductive type contact layer are sequentially stacked on the top of the ridge structure and the surface of the buried layer; A stripe-shaped mesa structure, with the ridge structure as the center, and two side surfaces formed by mesas extending from the second conductive type contact layer to the first conductive type semiconductor substrate; a heat dissipation layer, disposed on a surface of the second conductive type contact layer, and having a width narrower than that of the second conductive type contact layer; A mesa protection film composed of an insulating film, covering both side surfaces of the mesa structure and both end portions of the surface of the second conductive type contact layer; as well as The second conductivity type side electrode is electrically connected to the second conductivity type contact layer.

2. The optical semiconductor device according to claim 1, wherein The heat dissipation layer is composed of a semiconductor layer of the second conductivity type.

3. The optical semiconductor device according to claim 1, wherein The heat dissipation layer is composed of a high resistance layer.

4. An optical semiconductor device, characterized in that: The optical semiconductor device comprises: The stripe-shaped ridge structure is composed of a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer sequentially stacked on a first conductivity type semiconductor substrate; A buried layer is buried in a manner to cover both side surfaces of the ridge structure; A second conductive type second cladding layer and a second conductive type contact layer are sequentially stacked on the top of the ridge structure and the surface of the buried layer; A stripe-shaped mesa structure, with the ridge structure as the center, and two side surfaces formed by mesas extending from the second conductive type contact layer to the first conductive type semiconductor substrate; a heat dissipation layer formed on a surface of the second conductive type second cladding layer via a contact layer opening provided in the second conductive type contact layer; A mesa protection film composed of an insulating film, covering both side surfaces of the mesa structure and both end portions of the surface of the second conductive type contact layer; as well as The second conductivity type side electrode is electrically connected to the second conductivity type contact layer.

5. The optical semiconductor device according to claim 4, wherein: The heat dissipation layer is composed of a semiconductor layer of the second conductivity type.

6. The optical semiconductor device according to claim 4, wherein The heat dissipation layer is composed of a high resistance layer.

7. An optical semiconductor device, characterized in that: The optical semiconductor device comprises: The stripe-shaped ridge structure is composed of a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer sequentially stacked on a first conductivity type semiconductor substrate; A buried layer is buried in a manner to cover both side surfaces of the ridge structure; A second conductive type second cladding layer and a second conductive type contact layer are sequentially stacked on the top of the ridge structure and the surface of the buried layer; A stripe-shaped mesa structure, with the ridge structure as the center, and two side surfaces formed by mesas extending from the second conductive type contact layer to the first conductive type semiconductor substrate; A partial mesa protection film composed of an insulating film is arranged on two side surfaces of the mesa structure, one end of which reaches the first conductive type semiconductor substrate exposed on the two side surfaces, and the other end at least covers the buried layer exposed on the two side surfaces; as well as The second conductive type side electrode is formed to cover the surface of the second conductive type contact layer, and directly covers at both ends the two side surfaces of the second conductive type contact layer exposed on the two side surfaces of the mesa structure and at least a portion of the two side surfaces of the second conductive type second cladding layer exposed on the two side surfaces of the mesa structure.

8. The optical semiconductor device according to claim 7, wherein Both ends of the second-conductivity-type-side electrode are formed to cover the other end of the portion of the mesa protection film.

9. The optical semiconductor device according to claim 7 or 8, characterized in that At least a portion of the upper end portion of the second-conductivity-type second cladding layer has a shape whose width is expanded with respect to the stacking direction in a cross section perpendicular to the stripe direction.

10. The optical semiconductor device according to claim 7 or 8, characterized in that At least a portion of an upper end portion of the second-conductivity-type second cladding layer has a shape in which the width thereof is narrowed with respect to the stacking direction in a cross section perpendicular to the stripe direction.

11. The optical semiconductor device according to claim 10, wherein The second conductive type contact layer has a shape in which the width is narrowed relative to the stacking direction in a cross section perpendicular to the stripe direction.

12. The optical semiconductor device according to claim 7 or 8, characterized in that A concavo-convex pattern is formed on the surface of the second conductive type contact layer.

13. The optical semiconductor device according to claim 12, wherein: The concave-convex pattern is arranged periodically.

14. A method for manufacturing an optical semiconductor device, characterized in that: include: a first crystal growth step of sequentially stacking a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer on a first conductivity type semiconductor substrate; a ridge structure forming step of etching the first conductive type cladding layer, the active layer, and the second conductive type first cladding layer into a stripe-shaped ridge structure; a second crystal growth step of growing crystals of a buried layer buried in such a manner as to cover both side surfaces of the ridge structure; a third crystal growth step of sequentially stacking a second conductive type second cladding layer, a second conductive type contact layer, and a heat dissipation layer on the top of the ridge structure and on the surface of the buried layer; a heat dissipation layer etching step of etching the heat dissipation layer into a stripe shape having a width wider than a width of the ridge structure; a mesa structure forming step, with the ridge structure as the center, forming two side surfaces of the mesa structure from a mesa reaching the first conductive type semiconductor substrate from the second conductive type contact layer; a mesa protection film forming step of forming a mesa protection film made of an insulating film covering both side surfaces of the mesa structure and both end portions of the surface of the second conductive type contact layer; and The electrode forming step is to form a second conductivity type side electrode electrically connected to the second conductivity type contact layer on the surface of the second conductivity type contact layer.

15. A method for manufacturing an optical semiconductor device, characterized in that: include: a first crystal growth step of sequentially stacking a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer on a first conductivity type semiconductor substrate; a ridge structure forming step of etching the first conductive type cladding layer, the active layer, and the second conductive type first cladding layer into a stripe-shaped ridge structure; a second crystal growth step of growing crystals of a buried layer buried in such a manner as to cover both side surfaces of the ridge structure; a third crystal growth step of sequentially stacking a second conductive type second cladding layer and a second conductive type contact layer on the top of the ridge structure and on the surface of the buried layer; A contact layer etching step of forming a contact layer opening for exposing the second conductive type second cladding layer at the bottom in the second conductive type contact layer by etching; a fourth crystal growth step of growing crystals of a heat dissipation layer on the contact layer opening and on the surface of the second conductive type contact layer; a heat dissipation layer etching step of etching the heat dissipation layer into a stripe shape having a width wider than a width of the ridge structure; a mesa structure forming step, with the ridge structure as the center, forming two side surfaces of the mesa structure from a mesa reaching the first conductive type semiconductor substrate from the second conductive type contact layer; a mesa protection film forming step of forming a mesa protection film made of an insulating film covering both side surfaces of the mesa structure and both end portions of the surface of the second conductive type contact layer; and The electrode forming step is to form a second conductivity type side electrode electrically connected to the second conductivity type contact layer on the surface of the second conductivity type contact layer.

16. A method for manufacturing an optical semiconductor device, characterized in that: include: a first crystal growth step of sequentially stacking a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer on a first conductivity type semiconductor substrate; a ridge structure forming step of etching the first conductive type cladding layer, the active layer, and the second conductive type first cladding layer into a stripe-shaped ridge structure; a second crystal growth step of growing crystals of a buried layer buried in such a manner as to cover both side surfaces of the ridge structure; a third crystal growth step of sequentially stacking a second conductive type second cladding layer and a second conductive type contact layer on the top of the ridge structure and on the surface of the buried layer; a mesa structure forming step, with the ridge structure as the center, forming two side surfaces of the mesa structure from a mesa reaching the first conductive type semiconductor substrate from the second conductive type contact layer; a partial mesa protection film forming step of forming a partial mesa protection film composed of an insulating film, which is disposed on both side surfaces of the mesa structure and has one end reaching the first conductive type semiconductor substrate exposed on the two side surfaces and the other end covering at least the buried layer exposed on the two side surfaces; and An electrode forming step is to form a second conductive type side electrode covering the surface of the second conductive type contact layer and directly covering at both ends the two side surfaces of the second conductive type contact layer exposed on the two side surfaces of the mesa structure and at least a portion of the two side surfaces of the second conductive type second cladding layer exposed on the two side surfaces of the mesa structure.

17. The method for manufacturing an optical semiconductor device according to claim 16, wherein: Both ends of the second-conductivity-type-side electrode are formed to cover the other end of the portion of the mesa protection film.

18. The method for manufacturing an optical semiconductor device according to claim 16 or 17, wherein: At least a portion of the upper end portion of the second conductivity type second cladding layer is etched into a shape having a larger width with respect to the stacking direction in a cross section perpendicular to the stripe direction.

19. The method for manufacturing an optical semiconductor device according to claim 16 or 17, wherein: At least a portion of the upper end portion of the second conductivity type second cladding layer is etched into a shape in which the width is narrowed with respect to the stacking direction in a cross section perpendicular to the stripe direction.

20. The method for manufacturing an optical semiconductor device according to claim 19, wherein: The second conductive type contact layer is etched into a shape in which the width is narrowed with respect to the stacking direction in a cross section perpendicular to the stripe direction.

21. The method for manufacturing an optical semiconductor device according to claim 16 or 17, wherein: The method further includes forming a concavo-convex pattern on a surface of the second conductive type contact layer.

22. The method for manufacturing an optical semiconductor device according to claim 21, wherein: The concave-convex pattern is arranged periodically.

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