Semiconductor memory device

Abstract

An embodiment provides a semiconductor storage device capable of achieving an improvement in heat dissipation. The semiconductor storage device of the embodiment includes a housing, a substrate, a semiconductor memory component, a controller, and a heat dissipation structure. The heat dissipation structure includes a plurality of first heat dissipation fins, a plurality of second heat dissipation fins, and a first cover portion. The plurality of first heat dissipation fins are provided in a first region of the housing and each extend in a second direction from the semiconductor memory component toward the controller. The plurality of second heat dissipation fins are provided in a second region of the housing and are apart from the plurality of first heat dissipation fins in the second direction, and each extend in the second direction. The first cover portion is disposed between the plurality of first heat dissipation fins and the plurality of second heat dissipation fins or in a gap between the plurality of second heat dissipation fins, and covers at least a portion of a gap between the plurality of second heat dissipation fins when viewed in the second direction.

Description

[0001] [Related Application]

[0002] This application claims priority to Japanese Patent Application No. 2022-008698 (Filing Date: January 24, 2022). This application incorporates the entire contents of the basis application by reference thereto. TECHNICAL FIELD

[0003] Embodiments of the present application relate to a semiconductor storage device. BACKGROUND

[0004] A semiconductor storage device is known, which has a housing, a substrate housed in the housing, a semiconductor memory part mounted on the substrate, and a controller mounted on the substrate. SUMMARY

[0005] An embodiment of the present application provides a semiconductor storage device capable of improving heat dissipation.

[0006] The semiconductor storage device of the embodiment has a housing, a substrate, a semiconductor memory part, a controller, and a heat dissipation structure. The substrate is housed in the housing. The semiconductor memory part is mounted on the substrate. The controller is mounted on the substrate and is capable of controlling the semiconductor memory part. The heat dissipation structure is provided in the housing and is exposed to the outside of the housing. The housing has a first region overlapping the semiconductor memory part in a first direction as a thickness direction of the substrate, and a second region overlapping the controller in the first direction. The heat dissipation structure has a plurality of first heat dissipation fins, a plurality of second heat dissipation fins, and a first cover portion. The plurality of first heat dissipation fins are provided in the first region and respectively extend along a second direction from the semiconductor memory part toward the controller. The plurality of second heat dissipation fins are provided in the second region and are apart from the plurality of first heat dissipation fins in the second direction, and respectively extend along the second direction. The first cover portion is arranged between the plurality of first heat dissipation fins and the plurality of second heat dissipation fins, or in a gap between the plurality of second heat dissipation fins, and covers at least a part of the gap between the plurality of second heat dissipation fins when viewed from the second direction. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 FIG. 1 is a perspective view showing a semiconductor storage device of a first embodiment.

[0008] Figure 2 FIG. 2 is a perspective view showing the semiconductor storage device of the first embodiment, which is partially disassembled.

[0009] Figure 3 FIG. 3 is a view showing the semiconductor storage device of the first embodiment, which is partially disassembled and viewed from a second direction. Figure 1A cross-sectional view of the semiconductor storage device taken along the F3-F3 line.

[0010] Figure 4 is a perspective view showing a configuration in association with the heat dissipation structure of the first embodiment.

[0011] Figure 5 is a cross-sectional view of the semiconductor storage device taken along the F5-F5 line. Figure 3

[0012] Figure 6 is a cross-sectional view showing an example of an environment of use of the semiconductor storage device of the first embodiment.

[0013] Figure 7 is a diagram for explaining an operation of the semiconductor storage device of the first embodiment.

[0014] Figure 8 is a plan view showing the semiconductor storage device of the first embodiment of the first variation.

[0015] Figure 9 is a perspective view showing the semiconductor storage device of the first embodiment of the second variation.

[0016] Figure 10 is a perspective view showing the semiconductor storage device of the first embodiment of the third variation.

[0017] Figure 11 is a perspective view showing the semiconductor storage device of the first embodiment of the fourth variation.

[0018] Figure 12 is a perspective view showing the semiconductor storage device of the first embodiment of the fifth variation.

[0019] Figure 13 is a diagram for explaining an operation of the semiconductor storage device of the first embodiment of the fifth variation.

[0020] Figure 14 is a perspective view showing the semiconductor storage device of the second embodiment.

[0021] Figure 15 is a plan view showing the semiconductor storage device of the second embodiment.

[0022] Figure 16 is a diagram for explaining an operation of the semiconductor storage device of the second embodiment.

[0023] Figure 17 is a perspective view showing the semiconductor storage device of the second embodiment of the first variation.

[0024] Figure 18 ​is a perspective view showing a semiconductor storage device according to a second modification of the second embodiment.

[0025] Figure 19 is a view for explaining an operation of the semiconductor storage device according to the second modification of the second embodiment. DETAILED DESCRIPTION

[0026] Hereinafter, a semiconductor storage device according to an embodiment will be described with reference to the drawings. In the following description, the same reference signs are attached to the components having the same or similar functions. Moreover, there are cases in which repeated description of these components is omitted. In the present application, the terms "parallel", "orthogonal", or "identical" can each include "substantially parallel", "substantially orthogonal", or "substantially identical", respectively. In the present application, the term "connected" is not limited to mechanical connection, and can include electrical connection. In addition, the term "connected" is not limited to the case in which a plurality of components are directly connected, and can include the case in which the plurality of components are connected with other components interposed therebetween. In the present application, the term "covered" means overlapping when viewed from a certain direction. That is, the term "a first component covers a second component" is not limited to the case in which the first component is in contact with the second component, and can be the case in which the first component is spaced apart from the second component with a space therebetween.

[0027] Here, first, a +X direction, a -X direction, a +Y direction, a -Y direction, a +Z direction, and a -Z direction are defined. The +X direction, the -X direction, the +Y direction, and the -Y direction are directions parallel to a first surface S1 of a substrate 21 described below (see FIG. 1). The +X direction is a direction in which the substrate 21 faces a first semiconductor memory part 24A from a controller 23. In addition, the term "a direction from A toward B" in the present application can include a direction from a part of A toward B. The -X direction is a direction opposite to the +X direction. In the case in which the +X direction and the -X direction are not distinguished, the direction is simply referred to as an "X direction". The +Y direction and the -Y direction are directions intersecting (for example, orthogonal to) the X direction. The +Y direction is a direction in which a first side wall 13 of a case 10 described below faces a second side wall 14 (see FIG. 1). The -Y direction is a direction opposite to the +Y direction. In the case in which the +Y direction and the -Y direction are not distinguished, the direction is simply referred to as a "Y direction". Figure 2 Figure 1

[0028] The +Z direction and the -Z direction are directions intersecting (for example, orthogonal to) the X direction and the Y direction, and are a thickness direction of the substrate 21 described below (see FIG. 1). The +Z direction is a direction in which the substrate 21 faces a first main wall 11 of the case 10 (see FIG. 1). The -Z direction is a direction opposite to the +Z direction. In the case in which the +Z direction and the -Z direction are not distinguished, the direction is simply referred to as a "Z direction". Figure 2 Figure 2 ​​​). The -Z direction is a direction opposite to the +Z direction. In the case where the +Z direction and the -Z direction are not distinguished, it is simply referred to as the "Z direction". The -Z direction is an example of the "first direction". The -X direction is an example of the "second direction". The +Y direction is an example of the "third direction".

[0029] (First Embodiment)

[0030] <1. Overall Configuration of Semiconductor Storage Device>

[0031] Reference Figures 1 to 7 The semiconductor storage device 1 of the first embodiment will be described. The semiconductor storage device 1 is, for example, a storage device such as an SSD (Solid State Drive). The semiconductor storage device 1 is, for example, mounted on an information processing device such as a server or a personal computer, and is used as a storage area of the information processing device. In the present application, the information processing device on which the semiconductor storage device 1 is mounted is referred to as a "host device".

[0032] Figure 1 is a perspective view showing the semiconductor storage device 1. Figure 2 is a perspective view showing the semiconductor storage device 1 partially disassembled. The semiconductor storage device 1 has a housing 10, a substrate unit 20, a plurality of fixing members 30, and a heat dissipation structure 40.

[0033] <2. Housing>

[0034] First, the housing 10 will be described. As shown in Figure 1 , the housing 10 is a member that forms the outline of the semiconductor storage device 1. The housing 10 is, for example, made of metal. The housing 10 has a flat rectangular tube shape. The housing 10 has a first main wall 11, a second main wall 12, a first side wall 13, and a second side wall 14.

[0035] The first main wall 11 is a wall portion at the end portion on the +Z direction side of the housing 10. As shown in Figure 2As shown, the first main wall 11 is plate-shaped along both the X and Y directions. The first main wall 11 has a first region 11a and a second region 11b. The first region 11a is, for example, the region between the center CA of the first main wall 11 in the X direction and its end on the +X direction side. The first region 11a overlaps with the aforementioned plurality of semiconductor memory components 24 in the Z direction. The second region 11b is, for example, the region between the center CA of the first main wall 11 in the X direction and its end on the -X direction side. The second region 11b overlaps with the aforementioned controller 23 in the Z direction. Additionally, the first main wall 11 has an outer surface 11s that is exposed outside the housing 10. However, the first region 11a and the second region 11b are not limited to the described example. For example, the first region 11a and the second region 11b may be configured to be biased towards the +X direction side compared to the described example. For example, a portion of the second region 11b may also be located further to the +X direction than the center CA of the first main wall 11 in the X direction.

[0036] like Figure 1 As shown, the second main wall 12 is the wall portion located at the end of the housing 10 on the -Z direction side. The second main wall 12 is plate-shaped along the X and Y directions.

[0037] The first sidewall 13 is a wall portion located at the end of the housing 10 in the +Y direction. The first sidewall 13 is plate-shaped along the X and Z directions. The first sidewall 13 connects the end of the first main wall 11 in the +Y direction to the end of the second main wall 12 in the +Y direction.

[0038] The second sidewall 14 is a wall portion located at the end of the housing 10 in the -Y direction. The second sidewall 14 is plate-shaped along the X and Z directions. The second sidewall 14 connects the end of the first main wall 11 in the -Y direction to the end of the second main wall 12 in the -Y direction.

[0039] The housing 10 has a first end 10e1 and a second end 10e2. The first end 10e1 is the end on the +X direction side. The first end 10e1 has an opening 10b that communicates between the interior and exterior of the housing 10. The opening 10b opens in the +X direction. On the other hand, the second end 10e2 is the end on the -X direction side. The second end 10e2 has an opening 10a that communicates between the interior and exterior of the housing 10. The opening 10a opens in the -X direction. The external engagement connector 22 described above is exposed outside the housing 10 via the opening 10a.

[0040] like Figure 2As shown, the housing 10 has a first housing member 17 and a second housing member 18. The first housing member 17 includes the first main wall 11, the first side wall 13, and the second side wall 14. The second housing member 18 includes the second main wall 12. The first housing member 17 and the second housing member 18 are joined with a plurality of fixing members 30.

[0041] <2. Substrate Unit>

[0042] Next, the substrate unit 20 is described. The substrate unit 20 is an assembly that mounts parts including a circuit. The substrate unit 20 is housed in the housing 10. The substrate unit 20 has a substrate 21, an external bonding connector 22, a controller 23, a plurality of semiconductor memory parts 24, a plurality of DRAMs (Dynamic Random Access Memory) 25, a plurality of capacitors 26, and a plurality of thermal connecting members 27 (refer to FIG. 2). Figure 3

[0043] The substrate 21 is a printed wiring board. The substrate 21 includes an insulating base material and a wiring pattern provided on the insulating base material. The substrate 21 is a plate shape along the X direction and the Y direction. The substrate 21 has a first region 21a and a second region 21b. The first region 21a is, for example, a region between the center CB of the substrate 21 in the X direction and an end portion on the +X direction side of the substrate 21. The second region 21b is, for example, a region between the center CB of the substrate 21 in the X direction and an end portion on the -X direction side of the substrate 21. The substrate 21 has a first surface S1 and a second surface S2. The first surface S1 is a surface facing the +Z direction. The second surface S2 is a surface on the side opposite to the first surface S1 and facing the -Z direction. However, the first region 21a and the second region 21b are not limited to the above examples. For example, the first region 21a and the second region 21b can be arranged on the +X direction side compared to the above examples. For example, a part of the second region 21b can be located on the +X direction side more than the center CB of the substrate 21 in the X direction.

[0044] The external bonding connector 22 is an electrical connecting portion provided on the substrate 21. The external bonding connector 22 is provided on the end portion on the -X direction side of the substrate 21. The external bonding connector 22 is exposed outside the housing 10 via the opening portion 10a of the second end portion 10e2 of the housing 10. The external bonding connector 22 has a plurality of metal terminals 22a arranged in the Y direction. The external bonding connector 22 can be connected to a connector of a host device.

[0045] ​The controller 23 is a control component mounted on the substrate 21. The controller 23 generally controls the entire semiconductor memory device 1. For example, the controller 23 can control data writing, reading, or erasing to the plurality of semiconductor memory components 24. The controller 23 is mounted on the second region 21b of the substrate 21. The controller 23 is mounted on the first surface S1 of the substrate 21. The controller 23 is a component that generates heat when in operation. The amount of heat generated by the controller 23 is larger than that generated by the semiconductor memory components 24.

[0046] The semiconductor memory components 24 are semiconductor packages including nonvolatile semiconductor memory chips. The semiconductor memory components 24 are, for example, NAND (Not AND) type flash memories. The semiconductor memory components 24 can also be NOR (Not OR) type memories, MRAM (Magnetoresistive Random Access Memory), resistive type memories, or the like. The plurality of semiconductor memory components 24 are mounted on the first region 21a of the substrate 21. The plurality of semiconductor memory components 24 include a plurality of first semiconductor memory components 24A mounted on the first surface S1 of the substrate 21, and second semiconductor memory components 24B mounted on the second surface S2 of the substrate 21. The semiconductor memory components 24 are components that generate heat when in operation.

[0047] The DRAMs 25 are semiconductor packages including volatile semiconductor memory chips. The DRAMs 25 are used as data buffers, and temporarily store, for example, write target data received from a host device, or read target data read from one or more semiconductor memory components 24. The plurality of DRAMs 25 are mounted on the second surface S2 of the substrate 21. However, one or more or all of the DRAMs 25 can be mounted on the first surface S1 of the substrate 21 instead of the second surface S2 of the substrate 21.

[0048] The capacitor 26 is a component that accumulates electric charge and is capable of releasing the accumulated electric charge. The capacitor 26 has a power backup function for the purpose of data protection at the time of unexpected power cutoff. For example, a plurality of capacitors 26 supply power to the controller 23, the plurality of semiconductor memory components 24, and the plurality of DRAMs 25 for a fixed period of time in the case where the power supply from the host device is unexpectedly cut off. The capacitor 26 is mounted on the first surface S1 of the substrate 21. However, one or more or all of the capacitors 26 can be mounted on the second surface S2 of the substrate 21 instead of the first surface S1 of the substrate 21. The plurality of capacitors 26 are arranged side by side in the X direction or the Y direction. The plurality of capacitors 26 are arranged in the X direction between the controller 23 and the plurality of semiconductor memory components 24. The capacitor 26 is an example of an "electronic component". However, the electronic component arranged in the X direction between the controller 23 and the semiconductor memory component 24 is not limited to the capacitor 26, and can be another electronic component.

[0049] Figure 3 is along the Figure 1 is a cross-sectional view of the F3-F3 line of the semiconductor storage device 1 shown in FIG. 1.

[0050] The thermal connection component 27 is a component that includes a material having excellent thermal conductivity and transmits heat between components. The thermal connection component 27 includes a first thermal connection component 27A, a plurality of second thermal connection components 27B, a plurality of third thermal connection components 27C, and a plurality of fourth thermal connection components 27D.

[0051] The first thermal connection component 27A is arranged between the controller 23 and the second region 11b of the first main wall 11 of the housing 10. The first thermal connection component 27A transmits a portion of the heat emitted from the controller 23 to the second region 11b of the first main wall 11 of the housing 10.

[0052] The second thermal connection component 27B is arranged between the first semiconductor memory component 24A and the first region 11a of the first main wall 11 of the housing 10. The second thermal connection component 27B transmits a portion of the heat emitted from the first semiconductor memory component 24A to the first region 11a of the first main wall 11 of the housing 10.

[0053] The third thermal connection component 27C is arranged between the second semiconductor memory component 24B and the second main wall 12 of the housing 10. The third thermal connection component 27C transmits a portion of the heat emitted from the second semiconductor memory component 24B to the second main wall 12 of the housing 10.

[0054] The fourth thermal connection component 27D is arranged between the DRAM 25 and the second main wall 12 of the housing 10. The fourth thermal connection component 27D transmits a portion of the heat emitted from the DRAM 25 to the second main wall 12 of the housing 10.

[0055] <3. Heat Dissipation Structure>

[0056] Next, the heat dissipation structure 40 will be described.

[0057] Figure 4 is a perspective view that partially disassembles the configuration associated with the heat dissipation structure 40.

[0058] The heat dissipation structure 40 is provided to the outer surface 11s of the first main wall 11 and is exposed to the outside of the housing 10. The heat dissipation structure 40 has a plurality of first heat dissipation fins 41, a plurality of second heat dissipation fins 42, and a flow control plate 43.

[0059] <3.1 First Heat Dissipation Fin>

[0060] The first heat dissipation fin 41 is a plate portion that rises in the +Z direction from the outer surface 11s of the first main wall 11. The first heat dissipation fin 41 extends in the X direction. The first heat dissipation fin 41 is a plate portion in the X direction and the Z direction. The plurality of first heat dissipation fins 41 are arranged side by side in the Y direction with a gap g1 between each other. The plurality of first heat dissipation fins 41 are parallel to each other. The plurality of first heat dissipation fins 41 are provided to the first region 11a of the first main wall 11. The plurality of first heat dissipation fins 41 are provided integrally with the housing 10 and are made of metal. For example, heat is transferred from the first semiconductor memory part 24A to the plurality of first heat dissipation fins 41 via the second thermal connection member 27B.

[0061] The plurality of first heat dissipation fins 41 include a first heat dissipation fin 41B at the +Y direction side and a first heat dissipation fin 41C at the -Y direction side. The height of the first heat dissipation fin 41B and the first heat dissipation fin 41C with respect to the outer surface 11s of the first main wall 11 is only the thickness of the top plate portion 51 of the flow control plate 43 described below, compared to the height of the other first heat dissipation fin 41A included in the plurality of first heat dissipation fins 41. Thus, in the case where the top plate portion 51 of the flow control plate 43 overlaps the first heat dissipation fin 41A in the Z direction, the +Z direction height of the top plate portion 51, the +Z direction height of the first heat dissipation fin 41B, and the +Z direction height of the first heat dissipation fin 41C are consistent. For example, one flat surface is formed by the +Z direction end surface of the top plate portion 51, the +Z direction end surface of the first heat dissipation fin 41B, and the +Z direction end surface of the first heat dissipation fin 41C.

[0062] <3.2 Second Heat Dissipation Fin>

[0063] The second heat sink 42 is a plate portion that rises in the +Z direction from the outer surface 11s of the first main wall 11. The second heat sink 42 extends along the X direction. The second heat sink 42 is a plate portion along the X direction and the Z direction. A plurality of second heat sinks 42 are arranged side by side in the Y direction with gaps g2 between them. The plurality of second heat sinks 42 are parallel to each other. The plurality of second heat sinks 42 are provided in the second region 11b of the first main wall 11. The plurality of second heat sinks 42 are provided integrally with the housing 10 and are made of metal. Heat is transferred from the controller 23 to the plurality of second heat sinks 42, for example, via the first thermal connection member 27A.

[0064] In the present embodiment, the plurality of second heat sinks 42 are away from the plurality of first heat sinks 41 in the X direction. Thereby, a separation flow path SC is formed between the plurality of second heat sinks 42 and the plurality of first heat sinks 41. The separation flow path SC is a space that extends along the Y direction between the plurality of second heat sinks 42 and the plurality of first heat sinks 41. The width W3 of the separation flow path SC in the X direction is larger than the width W1 of the gap g1 between the plurality of first heat sinks 41 in the Y direction, and is larger than the width W2 of the gap g2 between the plurality of second heat sinks 42 in the Y direction.

[0065] <3.3 Flow control plate>

[0066] The flow control plate 43 is formed as a different individual from the housing 10, for example, and is mounted to the plate member of the plurality of first heat sinks 41 or the plurality of second heat sinks 42. The flow control plate 43 is made of metal or synthetic resin, for example. The flow control plate 43 is a member that changes the flow direction of at least one of the air flow between the plurality of first heat sinks 41 and the air flow between the plurality of second heat sinks 42. In the present embodiment, the flow control plate 43 has a ceiling portion 51 and a cutoff portion 52.

[0067] (Ceiling portion)

[0068] The ceiling portion 51 is a plate portion along the X direction and the Y direction. The ceiling portion 51 is arranged on the +Z direction side with respect to the plurality of first heat sinks 41. The ceiling portion 51 is a member that suppresses the air flow flowing in the gap g1 between the plurality of first heat sinks 41 from merging with the air flow toward the plurality of second heat sinks 42. In the present embodiment, the ceiling portion 51 has a first ceiling portion 51a and a second ceiling portion 51b.

[0069] The first ceiling portion 51a is arranged on the +Z direction side with respect to the separation flow path SC. The first ceiling portion 51a covers at least a part of the separation flow path SC from the opposite side of the first main wall 11. In the present embodiment, the first ceiling portion 51a covers the entire separation flow path SC from the opposite side of the first main wall 11. The first ceiling portion 51a is an example of the "second covering portion".

[0070] AsFigure 1 As shown, an opening portion 61 is defined between the end portion of the +Y direction side of the first top plate portion 51a and the first main wall 11. The opening portion 61 is open toward the +Y direction and communicates the separation flow path SC with the outside. The opening portion 61 is, for example, a rectangle whose four sides are defined by the first top plate portion 51a, the first main wall 11, the first fin 41B, and the following intercepting portion 52. The size W11 of the opening portion 61 in the X direction is longer than the size W12 of the opening portion 61 in the Z direction. The opening portion 61 is an example of the "first opening portion". However, the size W11 of the opening portion 61 in the X direction can also be shorter than the size W12 of the opening portion 61 in the Z direction.

[0071] Similarly, an opening portion 62 is defined between the end portion of the -Y direction side of the first top plate portion 51a and the first main wall 11. The opening portion 62 is open toward the -Y direction and communicates the separation flow path SC with the outside. The opening portion 62 is, for example, a rectangle whose four sides are defined by the first top plate portion 51a, the first main wall 11, the first fin 41C, and the following intercepting portion 52. The size W11 of the opening portion 62 in the X direction is longer than the size W12 of the opening portion 62 in the Z direction.

[0072] As shown, the second top plate portion 51b extends from the end portion of the +X direction side of the first top plate portion 51a toward the +X direction. The second top plate portion 51b is disposed on the +Z direction side with respect to the plurality of first fins 41. The second top plate portion 51b is an example of the "third covering portion". Figure 4

[0073] The second top plate portion 51b covers at least a portion of the gap g1 between the plurality of first fins 41 from the opposite side of the first main wall 11. The "covers at least a portion of the gap between the plurality of first fins" in the present application is not limited to the case where at least a portion of each gap between all of the first fins is covered, but can also apply to the case where at least a portion (for example, a portion in the X direction) of each gap between several fins included in the plurality of first fins is covered. In the present embodiment, the second top plate portion 51b is provided so as to extend in the X direction over the entire length of the first fin 41. In the present embodiment, the second top plate portion 51b covers the gap g1 between all of the first fins 41 from the opposite side of the first main wall 11.

[0074] In the present embodiment, a notch 51c1 that avoids the first fin 41B is provided at the end portion of the +Y direction side of the top plate portion 51. A notch 51c2 that avoids the first fin 41C is provided at the end portion of the -Y direction side of the top plate portion 51. The top plate portion 51 is embedded between the first fin 41B and the first fin 41C and is in contact with the +Z direction end portion of the plurality of first fins 41.

[0075] ​The top plate portion 51 is fixed to the first fins 41B and 41C at both ends by, for example, press fitting, rivet processing, or interference fit. However, the method of fixing the top plate portion 51 is not limited to the example described above, and the top plate portion 51 can be fixed by other mechanisms or methods such as a screw.

[0076] (shutoff portion)

[0077] The shutoff portion 52 is a plate portion along the Y direction and the Z direction. The shutoff portion 52 extends from the end portion of the first top plate portion 51a on the -X direction side toward the -Z direction. For example, the shutoff portion 52 is formed by preparing one plate material including the top plate portion 51 and the shutoff portion 52, and bending the shutoff portion 52 with respect to the top plate portion 51.

[0078] The shutoff portion 52 is disposed on the -X direction side with respect to the plurality of first fins 41. The shutoff portion 52 is a member that suppresses the inflow of air flowing through the gap g1 between the plurality of first fins 41 to the gap g2 between the plurality of second fins 42. The shutoff portion 52 is an example of a "first cover portion".

[0079] Figure 5 is a plate portion along the Figure 3 A cross-sectional view of the semiconductor storage device 1 taken along the F5-F5 line is shown. The shutoff portion 52 is disposed between the plurality of first fins 41 and the plurality of second fins 42 in the X direction. The shutoff portion 52 covers at least a portion of the gap g2 between the plurality of second fins 42 when viewed from the X direction. The "cover at least a portion of the gap between the plurality of second fins" in the present application is not limited to the case where at least a portion of each gap between all of the second fins is covered, and can also apply to the case where at least a portion (for example, a portion in the Z direction or a portion in the Y direction) of each gap between several fins included in the plurality of second fins is covered. In the present embodiment, the shutoff portion 52 covers the gap g2 between all of the second fins 42 when viewed from the X direction.

[0080] In the present embodiment, the shutoff portion 52 is disposed at the end portion on the -X direction side of the separation flow path SC. The shutoff portion 52 is adjacent to the end portion 42el on the +X direction side of the plurality of second fins 42. The end portion 42el on the +X direction side of the second fin 42 is an end portion toward the first fin 41.

[0081] <4. Effects>

[0082] Figure 6is a sectional view showing an example of an environment in which the semiconductor storage device 1 is used. The host device 2 has a housing 2a. A plurality of semiconductor storage devices 1 are arranged side by side in the Z direction within the housing 2a. The gap between the plurality of semiconductor storage devices 1 overlapping in the Z direction is relatively narrow. Likewise, the gap between each semiconductor storage device 1 and the inner surface of the housing 2a is relatively narrow. Therefore, if there is a place where the flow path is expanded, the air flowing around the semiconductor storage device 1 easily flows along the expanded flow path.

[0083] Figure 7 is a diagram for explaining the operation of the semiconductor storage device 1. Around the semiconductor storage device 1, an air flow flowing in the -X direction is supplied by a blower (not shown) included in the host device 2.

[0084] A part of the air flow supplied to the surroundings of the semiconductor storage device 1 (refer to Figure 7 in FIG. 10, hereinafter referred to as "air flow Al") flows into the gap gl between the plurality of first fins 41 and flows in the -X direction in the gap gl between the plurality of first fins 41. The air flow Al flows between the first main wall 11 of the housing 10 and the top plate portion 51 of the flow control plate 43. By this, the plurality of first fins 41 are cooled, and the heat dissipation of the first semiconductor storage part 24A is promoted.

[0085] The air flow Al, after passing through the gap gl between the plurality of first fins 41, collides with the intercepting portion 52 of the flow control plate 43 at the -X direction side end of the branch flow path SC. The air flow Al changes the flow direction by colliding with the intercepting portion 52 of the flow control plate 43.

[0086] For example, a part of the air flow Al changes the flow direction in the +Y direction by colliding with the intercepting portion 52, flows in the +Y direction in the branch flow path SC, and flows out from the opening portion 61 to the outside of the heat dissipation structure 40. The air flow Al flowing out from the opening portion 61 merges with the air flow flowing outside the semiconductor storage device 1 and flows in the -X direction.

[0087] On the other hand, another part of the air flow Al changes the flow direction in the -Y direction by colliding with the intercepting portion 52, flows in the -Y direction in the branch flow path SC, and flows out from the opening portion 62 to the outside of the heat dissipation structure 40. The air flow Al flowing out from the opening portion 62 merges with the air flow flowing outside the semiconductor storage device 1 and flows in the -X direction.

[0088] Another part of the air flow supplied to the surroundings of the semiconductor storage device 1 (refer to Figure 7the fine line arrow A2 in FIG. 1, hereinafter referred to as "air flow A2") does not flow into the gap g1 between the plurality of first heat dissipation fins 41, but flows on the +Z direction side with respect to the top plate portion 51 of the flow control plate 43. That is, in the plurality of semiconductor storage devices 1 (refer to FIG. 1) arranged in the Z direction, the air flow A2 flows in the gap between the top plate portion 51 of the flow control plate 43 of one semiconductor storage device 1 and the second main wall 12 of another semiconductor storage device 1 located on the +Z direction side with respect to the semiconductor storage device 1. Figure 6

[0089] The air flow A2, after passing through the end portion of the top plate portion 51 of the flow control plate 43 on the -X direction side, flows into the gap g2 between the plurality of second heat dissipation fins 42. The air flow A2, which flows into the gap g2 between the plurality of second heat dissipation fins 42, flows in the -X direction in the gap g2 between the plurality of second heat dissipation fins 42. Thereby, the plurality of second heat dissipation fins 42 are cooled, and the heat dissipation of the controller 23 is promoted. The air flow A2, after passing through the gap g2 between the plurality of second heat dissipation fins 42, directly flows in the -X direction.

[0090] <5. Advantage>

[0091] As a comparative example, a case where the plurality of first heat dissipation fins 41 and the plurality of second heat dissipation fins 42 are continuously formed is considered. In the configuration of this comparative example, the air warmed by the heat of the first semiconductor memory part 24A, which flows through the gap g1 between the plurality of first heat dissipation fins 41, flows into the gap g2 between the plurality of second heat dissipation fins 42. Therefore, there is a case where the heat dissipation of the controller 23 is not easily promoted.

[0092] In the present embodiment, the heat dissipation structure 40 of the semiconductor storage device 1 has the plurality of first heat dissipation fins 41, the plurality of second heat dissipation fins 42, and the cutoff portion 52. The plurality of second heat dissipation fins 42 are distanced from the plurality of first heat dissipation fins 41 in the X direction. The cutoff portion 52 is arranged between the plurality of first heat dissipation fins 41 and the plurality of second heat dissipation fins 42, and covers at least a part of the gap g2 between the plurality of second heat dissipation fins 42 when viewed from the X direction.

[0093] According to such a configuration, at least a part of the air flow through the gap g1 between the plurality of first heat dissipation fins 41 is inhibited from flowing into the gap g2 between the plurality of second heat dissipation fins 42 by the cutoff portion 52. As a result, with respect to the gap g2 between the plurality of second heat dissipation fins 42, other air flow having a lower temperature than the air flow through the gap g1 between the plurality of first heat dissipation fins 41 flows in. Therefore, compared with the comparative example, the cooling of the plurality of second heat dissipation fins 42 is easily promoted, and the heat dissipation of the controller 23 is easily promoted. Therefore, it is possible to seek the improvement of the heat dissipation of the semiconductor storage device 1.

[0094] ​In the present embodiment, the heat dissipation structure 40 has a first ceiling portion 51a that covers at least a portion of the space (separation flow path SC) between the plurality of first heat dissipation fins 41 and the plurality of second heat dissipation fins 42 from opposite sides of the housing 10. According to such a configuration, it is possible to further suppress the inflow of the air flow through the gap g1 between the plurality of first heat dissipation fins 41 to the gap g2 between the plurality of second heat dissipation fins 42.

[0095] In the present embodiment, the first ceiling portion 51a has an opening portion 61, 62 that opens in the Y direction and communicates the separation flow path SC with the outside between the housing 10. According to such a configuration, it is possible to smoothly flow out to the outside of the heat dissipation structure 40 the air flow that has flowed into the separation flow path SC through the gap g1 between the plurality of first heat dissipation fins 41. Thereby, it is possible to further suppress the inflow of the air flow through the gap g1 between the plurality of first heat dissipation fins 41 to the gap g2 between the plurality of second heat dissipation fins 42.

[0096] In the present embodiment, the heat dissipation structure 40 has a second ceiling portion 51b that covers at least a portion of the gap g1 between the plurality of first heat dissipation fins 41 from opposite sides of the housing 10. According to such a configuration, it is possible to suppress the air flow flowing in the gap g1 between the plurality of first heat dissipation fins 41 from flowing out from the gap g1 between the plurality of first heat dissipation fins 41 to the +Z direction and merging with the other air flow toward the plurality of second heat dissipation fins 42. Thereby, it is possible to further suppress the inflow of the air flow flowing in the gap g1 between the plurality of first heat dissipation fins 41 to the gap g2 between the plurality of second heat dissipation fins 42.

[0097] In the present embodiment, the cutoff portion 52 is adjacent to the +X direction side end portion 42e1 of the plurality of second heat dissipation fins 42. According to such a configuration, it is easy to ensure that the opening size of the opening portion 61, 62 is large. Thereby, it is possible to more smoothly flow out to the outside the air flow flowing in the separation flow path SC.

[0098] Further, it is also possible to provide a fifth thermal connection member 27E (refer to FIG. 6) as one of the thermal connection members 27 between the ceiling portion 51 and the +Z direction end portion of the plurality of first heat dissipation fins 41. Figure 4 If the fifth thermal connection member 27E is provided, it is easy to transfer to the ceiling portion 51 a portion of the heat of the first semiconductor storage device 24A that is transferred to the plurality of first heat dissipation fins 41, and it is possible to further improve the heat dissipation property.

[0099] <6. Variations>

[0100] Next, several variations of the first embodiment will be described. The configurations in each of the variations are the same as those of the first embodiment except for the following description.

[0101] (First Modification)

[0102] Figure 8 is a plan view showing the semiconductor storage device 1A of the first modification. The heat dissipation structure 40A of the semiconductor storage device 1A of the first modification has a flow control plate 43A in place of the flow control plate 43. The flow control plate 43A has a flow blocking portion 52A.

[0103] In the present modification, the flow blocking portion 52A is arranged in the gap g2 between the plurality of second heat dissipation fins 42. For example, the flow blocking portion 52A has a plurality of insertion portions 52Aa which are inserted into the gap g2 between the plurality of second heat dissipation fins 42. The plurality of insertion portions 52Aa are arranged in the gap g2 between the plurality of second heat dissipation fins 42 in a manner in which the insertion portions 52Aa are in parallel with the end portions 42el of the plurality of second heat dissipation fins 42 on the +X direction side in the Y direction. The flow blocking portion 52A covers at least a part of the gap g2 between the plurality of second heat dissipation fins 42 when viewed from the X direction. In the present embodiment, the flow blocking portion 52A covers all of the gaps g2 between the plurality of second heat dissipation fins 42 when viewed from the X direction.

[0104] According to such a configuration, it is also possible to suppress the inflow of the air flow through the gap g1 between the plurality of first heat dissipation fins 41 to the gap g2 between the plurality of second heat dissipation fins 42. Therefore, it is easy to promote the heat dissipation of the controller 23, and it is possible to seek the improvement of the heat dissipation property of the semiconductor storage device 1.

[0105] (Second Modification)

[0106] Figure 9 is a perspective view showing the semiconductor storage device 1B of the second modification. The heat dissipation structure 40B of the semiconductor storage device 1B of the second modification has a flow control plate 43Ba and a second top plate portion 43Bb in place of the flow control plate 43.

[0107] The flow control plate 43Ba has a first top plate portion 51a and a flow blocking portion 52. The first top plate portion 51a and the flow blocking portion 52 are the same as the first top plate portion 51a and the flow blocking portion 52 of the first embodiment. In the present modification, the first top plate portion 51a is provided as a different member from the second top plate portion 51b.

[0108] The second top plate portion 43Bb is a member corresponding to the second top plate portion 51b of the first embodiment. In the present modification, the second top plate portion 43Bb is integrally formed as a member connected together with the plurality of first heat dissipation fins 41.

[0109] According to such a configuration, since the second top plate portion 43Bb is integrated with the plurality of first heat sinks 41, a part of heat transferred from the first semiconductor memory part 24A to the plurality of first heat sinks 41 easily passes from the plurality of first heat sinks 41 to the second top plate portion 43Bb. Therefore, there is a case where heat dissipation of the first semiconductor memory part 24A can be further promoted.

[0110] (Third Modification Example)

[0111] Figure 10 is a perspective view showing a semiconductor storage device 1C of the third modification example. The heat dissipation structure 40C of the semiconductor storage device 1C of the third modification example has a flow control plate 43C in place of the flow control plate 43. The flow control plate 43C has a top plate portion 51 and a cutoff portion 52.

[0112] The cutoff portion 52 is away from the end portion 42el of the plurality of second heat sinks 42 on the +X direction side in the X direction. In the present modification example, there is a space SF between the cutoff portion 52 and the end portion 42el of the plurality of second heat sinks 42 on the +X direction side. The space SF is open toward the +Z direction, the +Y direction, and the -Y direction.

[0113] The gap g2 between the plurality of second heat sinks 42 is open toward the +X direction at the end portion 42el of the plurality of second heat sinks 42 on the +X direction side, due to the space SF between the end portion 42el of the plurality of second heat sinks 42 on the +X direction side and the cutoff portion 52. The gap g2 between the plurality of second heat sinks 42 is communicated with the space SF in the X direction, and is communicated with the outside via the space SF.

[0114] According to such a configuration, compared with the case where the cutoff portion 52 and the end portion 42el of the plurality of second heat sinks 42 on the +X direction side are adjacent, the air flow flowing on the +Z direction side with respect to the top plate portion 51 easily flows into the gap g2 between the plurality of second heat sinks 42 via the space SF. Thereby, heat dissipation of the controller 23 can be further promoted.

[0115] (Fourth Modification Example)

[0116] Figure 11 is a perspective view showing a semiconductor storage device 1D of the fourth modification example. The heat dissipation structure 40D of the semiconductor storage device 1D of the fourth modification example has a flow control plate 43D in place of the flow control plate 43. The flow control plate 43D has a top plate portion 51D and a cutoff portion 52D.

[0117] The top plate portion 51D is the same as the second top plate portion 51b of the first embodiment. For example, the top plate portion 51D extends over the end portion of the plurality of first heat sinks 41 on the +X direction side and the end portion of the plurality of first heat sinks 41 on the -X direction side.

[0118] The intercepting portion 52D is connected to the end portion of the top plate portion 5 ID on the -X direction side. The intercepting portion 52D is inclined with respect to the X direction in such a manner that it is located on the -Z direction side as it advances toward the -X direction. The intercepting portion 52D is, for example, a circular arc shape (a circular arc shape bulging toward the +Z direction side) in which the inclination with respect to the X direction becomes larger as it advances toward the -X direction. However, the intercepting portion 52D can also be a flat plate shape in which the inclination with respect to the X direction is fixed, or a circular arc shape (a circular arc shape bulging toward the -Z direction side) in which the inclination with respect to the X direction becomes smaller as it advances toward the -X direction. The end portion of the intercepting portion 52D on the -X direction side is in contact with the first main wall 11 and between the plurality of first fins 41 and the plurality of second fins 42. The intercepting portion 52D covers the gap g2 between the plurality of second fins 42 when viewed from the X direction. The opening portions 61, 62 are defined between the intercepting portion 52D and the first main wall 11.

[0119] In this modification, by the intercepting portion 52D being inclined with respect to the X direction, there is a space SF between the intercepting portion 52D and the end portion 42el on the +X direction side of the plurality of second fins 42. The gap g2 between the plurality of second fins 42 is open toward the X direction at the end portion 42el on the +X direction side of the plurality of second fins 42. The gap g2 between the plurality of second fins 42 is in communication with the space SF in the X direction, and is in communication with the outside via the space SF.

[0120] According to such a configuration, by the intercepting portion 52D being inclined with respect to the X direction, the air flow flowing on the +Z direction side with respect to the top plate portion 5 ID easily flows along the intercepting portion 52D into the gap g2 between the plurality of second fins 42. Thus, heat dissipation of the controller 23 can be further promoted.

[0121] (Fifth Modification)

[0122] Figure 12 is a perspective view that shows the semiconductor storage device 1E of the fifth modification. The heat dissipation structure 40E of the semiconductor storage device 1E of the fifth modification has a flow control plate 43E in place of the flow control plate 43. The flow control plate 43E has an intercepting portion 52E and a top plate portion 5 IE.

[0123] In this modification, there is no top plate portion on the +Z direction side of the plurality of first fins 41. The gap g1 between the plurality of first fins 41 is open toward the +Z direction.

[0124] The +X direction end of the flow-blocking section 52E is connected to the first main wall 11 between the plurality of first heat sinks 41 and the plurality of second heat sinks 42. The flow-blocking section 52E is inclined relative to the X direction in such a way that it is located on the +Z direction side as it moves in the -X direction. The flow-blocking section 52E is, for example, an arc shape in which the inclination relative to the X direction increases as it moves in the -X direction (an arc shape protruding towards the -Z direction side). However, the flow-blocking section 52E may also be a flat plate with a fixed inclination relative to the X direction, or an arc shape in which the inclination relative to the X direction decreases as it moves in the -X direction (an arc shape protruding towards the +Z direction side).

[0125] The top plate portion 51E is a plate portion extending along both the X and Y directions. The top plate portion 51E is disposed on the +Z direction side relative to the plurality of second heat sinks 42. The top plate portion 51E covers at least a portion of the gap g2 between the plurality of second heat sinks 42 from the side opposite to the first main wall 11. In this embodiment, the top plate portion 51E is provided along the entire length of the second heat sinks 42 in the X direction. In this variation, the top plate portion 51E covers all the gaps g2 between the second heat sinks 42 from the side opposite to the first main wall 11. The top plate portion 51E is a component that suppresses the flow of air through the gap g1 between the plurality of first heat sinks 41 from the +Z direction side into the gap g2 between the plurality of second heat sinks 42.

[0126] In this variation, the flow-blocking portion 52E is inclined relative to the X direction, and a space SJ exists between the flow-blocking portion 52E and the +X direction side ends 42e1 of the plurality of second heat sinks 42. The gap g2 between the plurality of second heat sinks 42 communicates with the space SJ in the X direction at the +X direction side ends 42e1 of the plurality of second heat sinks 42.

[0127] An opening 65 is defined between the +Y direction end of the flow-blocking section 52E and the first main wall 11. The opening 65 opens in the +Y direction and communicates the space SJ with the outside. Similarly, an opening 66 is defined between the -Y direction end of the flow-blocking section 52E and the first main wall 11. The opening 66 opens in the -Y direction and communicates the space SJ with the outside. Thus, the gap g2 between the plurality of second heat sinks 42 communicates with the outside through the space SJ and the openings 65 and 66.

[0128] Figure 13 This is a perspective diagram used to illustrate the function of the semiconductor memory device 1E. A portion of the airflow supplied to the semiconductor memory device 1E (see reference). Figure 13 The thick arrow B1 (hereinafter referred to as "airflow B1") flows into the gap g1 between the plurality of first heat sinks 41, and flows in the -X direction within the gap g1 between the plurality of first heat sinks 41. This cools the plurality of first heat sinks 41, promoting heat dissipation of the first semiconductor memory component 24A.

[0129] After passing through the gap g1 between the multiple first heat sinks 41, the airflow B1 collides with the intercepting section 52E. The airflow B1 changes its flow direction by colliding with the intercepting section 52E. For example, a portion of the airflow B1 changes its flow direction by colliding with the intercepting section 52E and moves along the intercepting section 52E towards the +Z direction. The airflow B1 moving towards the +Z direction flows in the -X direction relative to the top plate section 51E on the +Z direction side.

[0130] Another portion of the airflow supplied to the area surrounding the semiconductor memory device 1 (see reference) Figure 13 The thin arrow B2 (hereinafter referred to as "airflow B2") flows in the -X direction relative to the plurality of first heat sinks 41 on the +Y or -Y direction side. Airflow B2 reaches the +Y or -Y direction side of the intercepting section 52E and flows through the openings 65, 66 and the space SJ into the gap g2 between the plurality of second heat sinks 42. The air flowing into the gap g2 between the plurality of second heat sinks 42 flows in the -X direction between the top plate section 51E and the first main wall 11 and through the gap g2 between the plurality of second heat sinks 42. This cools the plurality of second heat sinks 42, promoting heat dissipation of the controller 23.

[0131] With this configuration, at least a portion of the air passing through the gap g1 between the plurality of first heat sinks 41 is prevented from flowing into the gap g2 between the plurality of second heat sinks 42 by the intercepting portion 52. Therefore, it is possible to improve the heat dissipation of the semiconductor memory device 1E.

[0132] (Second Implementation)

[0133] Next, the second embodiment will be described. The second embodiment differs from the first embodiment in that the first main wall 11 of the housing 10 has openings 81 and 82. Except for the following description, the configuration is the same as that of the first embodiment.

[0134] Figure 14 This is a perspective view showing the semiconductor memory device 1F according to the second embodiment. The heat dissipation structure 40F of the semiconductor memory device 1F in this embodiment is the same as that in the first embodiment, and has a flow control plate 43.

[0135] Figure 15 This is a top view showing the semiconductor memory device 1F. In this embodiment, the second region 11b of the first main wall 11 has a central region 71, a first side region 72, and a second side region 73. The central region 71 is located at the center of the second region 11b in the Y direction. The first side region 72 is located on the +Y direction side relative to the central region 71. The second side region 73 is located on the -Y direction side relative to the central region 71.

[0136] In the present embodiment, the plurality of second heat dissipation fins 42 include a plurality of first length fins 42A, a plurality of second length fins 42B, and a plurality of third length fins 42C.

[0137] The plurality of first length fins 42A are provided in the central region 71. The plurality of first length fins 42A each has a first dimension (first length) LI in the X direction. The end portion of the +X direction side of the plurality of first length fins 42A is, for example, contiguous with the intercept portion 52 of the flow control plate 43.

[0138] The plurality of second length fins 42B are provided in the first side region 72. The plurality of second length fins 42B each has a second dimension (second length) L2 in the X direction. The second dimension L2 is shorter than the first dimension LI. The end portion of the +X direction side of the plurality of second length fins 42B is located on the -X direction side compared with the end portion of the +X direction side of the plurality of first length fins 42A. The end portion of the +X direction side of the plurality of second length fins 42B is away from the intercept portion 52 of the flow control plate 43 in the X direction.

[0139] The plurality of third length fins 42C are provided in the second side region 73. The plurality of third length fins 42C each has a third dimension (third length) L3 in the X direction. The third dimension L3 is shorter than the first dimension LI. The third dimension L3 is, for example, the same as the second dimension L2. The end portion of the +X direction side of the plurality of third length fins 42C is located on the -X direction side compared with the end portion of the +X direction side of the plurality of first length fins 42A. The end portion of the +X direction side of the plurality of third length fins 42C is away from the intercept portion 52 of the flow control plate 43 in the X direction.

[0140] In the present embodiment, the second region lib of the first main wall 11 has an opening portion 81 and an opening portion 82. The opening portion 81 and the opening portion 82 each pass through the first main wall 11 in the Z direction and communicate the inside and the outside of the housing 10. The opening portion 81 and the opening portion 82 are each an air vent through which air is able to flow between the outside and the inside of the housing 10.

[0141] The opening portion 81 is provided in the first side region 72. At least a portion of the opening portion 81 faces, when viewed in the Z direction, a region of the substrate 21 between the controller 23 and the first semiconductor memory part 24A. For example, at least a portion of the opening portion 81 faces, when viewed in the Z direction, a region of the substrate 21 between the controller 23 and the capacitor 26. In the present embodiment, a portion of the opening portion 81 faces, when viewed in the Z direction, the controller 23. The opening portion 81 is an example of a “second opening portion”.

[0142] In this embodiment, the opening portion 81 is adjacent to the flow blocking portion 52 of the flow control plate 43 in the X direction. The opening portion 81 is located between the plurality of second length fins 42B and the plurality of first heat dissipation fins 41 in the X direction when viewed in the Z direction. The opening portion 81 is located between the plurality of second length fins 42B and the flow blocking portion 52 of the flow control plate 43 in the X direction when viewed in the Z direction. The size W21 of the opening portion 81 in the X direction is longer than the size W22 of the opening portion 81 in the Y direction. However, the size W21 of the opening portion 81 in the X direction can be shorter than the size W22 of the opening portion 81 in the Y direction.

[0143] The opening portion 82 is provided in the second lateral region 73. At least a portion of the opening portion 82 faces a region between the controller 23 and the first semiconductor memory part 24A in the substrate 21 when viewed in the Z direction. For example, at least a portion of the opening portion 82 faces a region between the controller 23 and the capacitor 26 in the substrate 21 when viewed in the Z direction. In this embodiment, a portion of the opening portion 82 faces the controller 23 when viewed in the Z direction.

[0144] In this embodiment, the opening portion 82 is adjacent to the flow blocking portion 52 of the flow control plate 43 in the X direction. The opening portion 82 is located between the plurality of third length fins 42C and the plurality of first heat dissipation fins 41 in the X direction when viewed in the Z direction. The opening portion 82 is located between the plurality of third length fins 42C and the flow blocking portion 52 of the flow control plate 43 in the X direction when viewed in the Z direction. The size W23 of the opening portion 82 in the X direction is longer than the size W24 of the opening portion 82 in the Y direction.

[0145] In the second embodiment, the heat dissipation structure 40F has a first wall portion 91 and a second wall portion 92.

[0146] The first wall portion 91 is provided at an end portion of the plurality of second length fins 42B on the +X direction side. The first wall portion 91 covers at least a portion of the gaps g2 between the plurality of second length fins 42B when viewed in the X direction. The so-called "covering at least a portion of the gaps between the plurality of second length fins" in this application is not limited to a case where at least a portion of each gap is covered with respect to all of the gaps between the plurality of second length fins, but can also apply to a case where at least a portion (for example, a portion in the Z direction or a portion in the Y direction) of each gap is covered with respect to the gaps between several heat dissipation fins included in the plurality of second length fins. In this embodiment, the first wall portion 91 covers all of the gaps g2 between the plurality of second length fins 42B when viewed in the X direction. Furthermore, the first wall portion 91 does not necessarily come into contact with the plurality of second length fins 42B. The first wall portion 91 can be arranged to be spaced apart from the plurality of second length fins 42B on the +X direction side. The first wall portion 91 is an example of the "fourth covering portion".

[0147] Similarly, the second wall portion 92 is provided at the end portion of the plurality of third length fins 42C on the +X direction side. The second wall portion 92 covers at least a portion of the gap g2 between the plurality of third length fins 42C when viewed from the X direction. In the present embodiment, the second wall portion 92 covers all of the gaps g2 between the plurality of third length fins 42C when viewed from the X direction. Further, the second wall portion 92 does not necessarily come into contact with the plurality of third length fins 42C. The second wall portion 92 can also be disposed apart from the plurality of third length fins 42C on the +X direction side.

[0148] (Action)

[0149] Figure 16 is a cross-sectional view for explaining the action of the semiconductor storage device 1F. In the present embodiment, the opening portion 81 and the opening portion 82 are provided. Therefore, a portion of the air flowing outside the housing 10 (refer to the thick line arrow C1 in FIG. 1, hereinafter referred to as "air flow C1") flows into the inside of the housing 10 via the opening portion 81 or the opening portion 82. The air flow C1 flows out to the outside of the housing 10 from the opening portion 10a of the second end portion 10e2 of the housing 10 through the periphery of the controller 23. Thereby, the controller 23 is cooled. Figure 16

[0150] In the present embodiment, since the flow control plate 43 including the intercepting portion 52 is provided, the air flow through the gap g1 between the plurality of first heat dissipation fins 41 is bent in the Y direction by the intercepting portion 52, so it is less likely to flow into the inside of the housing 10 via the opening portion 81 and the opening portion 82. Instead, the cool air flowing outside the plurality of first heat dissipation fins 41 flows into the inside of the housing 10 via the opening portion 81 and the opening portion 82, through the periphery of the controller 23. Thereby, the controller 23 is cooled.

[0151] In the present embodiment, the capacitor 26 is a relatively high-height component. The mounting height H2 of the capacitor 26 with respect to the first surface S1 of the substrate 21 is higher than the mounting height H1 of the controller 23 with respect to the first surface S1 of the substrate 21. Therefore, in the case where the opening portion 10b that is open to the outside is provided at the first end portion 10e1 of the housing 10, there is a case where the air flowing in from the first end portion 10e1 of the housing 10 does not easily flow to the controller 23 inside the housing 10. However, in the present embodiment, a portion of the air flowing outside the housing 10 flows into the inside of the housing 10 via the opening portion 81 and the opening portion 82, through the periphery of the controller 23. Thereby, the controller 23 is cooled.

[0152] (Action)

[0153] ​In the present embodiment, the housing 10 has an opening portion 81 that is open toward the Z direction and that communicates the inside of the housing 10 with the outside. At least a portion of the opening portion 81 faces, when viewed from the Z direction, a region of the substrate 21 between the controller 23 and the first semiconductor memory part 24A. According to such a configuration, it is possible to introduce air outside the housing 10 to the controller 23. Thereby, it is possible to directly cool the controller 23, and further promote heat dissipation of the controller 23.

[0154] In the present embodiment, the plurality of second heat dissipation fins 42 include a plurality of first length fins 42A having a first size L1 in the X direction, and a plurality of second length fins 42B having a second size L2 shorter than the first size L1 in the X direction. The opening portion 81 is located, when viewed from the Z direction, between the plurality of second length fins 42B and the plurality of first heat dissipation fins 41. According to such a configuration, it is possible to increase the heat dissipation area of the second heat dissipation fins 42 in the region overlapping with the controller 23. Thereby, it is possible to further promote heat dissipation of the controller 23.

[0155] In the present embodiment, the plurality of first length fins 42A are disposed in a region overlapping with the controller 23 in the Z direction. Thereby, a portion of heat emitted from the controller 23 is conducted to the plurality of first length fins 42A via the first heat connecting member 27A, and dissipated via the plurality of first length fins 42A. Thereby, it is possible to further promote heat dissipation of the controller 23.

[0156] In the present embodiment, the heat dissipation structure 40F has a first wall portion 91 covering, when viewed from the X direction, at least a portion of the gap g2 between the plurality of second length fins 42B. According to such a configuration, a portion of the air flow flowing around the semiconductor storage device 1 easily collides with the first wall portion 91, and enters the inside of the housing 10 from the opening portion 81. Therefore, there is a case where it is possible to further improve heat dissipation.

[0157] (Variations)

[0158] Next, several variations of the second embodiment will be described. In each of the variations, the configuration is the same as that of the second embodiment except for the following description.

[0159] (First Variation)

[0160] Figure 17is a perspective view showing the semiconductor storage device 1G of the first modification. The heat dissipation structure 40G of the semiconductor storage device 1G of the first modification does not have the first wall portion 91 and the second wall portion 92. The gap g2 between the plurality of second length fins 42B is open toward the +X direction at the end portion of the plurality of second length fins 42B on the +X direction side. In the present modification, there is a space SF between the cutoff portion 52 and the end portion of the plurality of second length fins 42B on the +X direction side. The gap g2 between the plurality of second length fins 42B communicates with the space SF.

[0161] Likewise, the gap g2 between the plurality of third length fins 42C is open toward the +X direction at the end portion of the plurality of third length fins 42C on the +X direction side. In the present modification, there is a space SF between the cutoff portion 52 and the end portion of the plurality of third length fins 42C on the +X direction side. The gap g2 between the plurality of third length fins 42C communicates with the space SF.

[0162] According to such a configuration, a part of the air current flowing around the semiconductor storage device 1 easily flows from the end portion of the plurality of second length fins 42B on the +X direction side to the gap g2 between the plurality of second length fins 42B. Therefore, there is a case where heat dissipation of the controller 23 is easily promoted, and further improvement of heat dissipation is sought.

[0163] (Second Modification)

[0164] Figure 18 is a perspective view showing the semiconductor storage device 1H of the second modification. The semiconductor storage device 1H of the second modification has a first air guide portion 101 and a second air guide portion 102.

[0165] The first air guide portion 101 is disposed outside the housing 10. The first air guide portion 101 has a support plate 101a and a plurality of inclined plates 101b supported by the support plate 101a. The support plate 101a is attached to the second heat sink 42 or the housing 10. The plurality of inclined plates 101b are disposed side by side in the X direction. The plurality of inclined plates 101b overlap the opening portion 81 in the Z direction. Each inclined plate 101b is inclined with respect to the X direction in such a manner as to be located on the -Z direction side as it advances toward the -X direction. A part of the air current flowing in the X direction outside the housing 10 collides with each inclined plate 101b. Thereby, the flow direction of the part of the air current flowing outside the housing 10 is changed in such a manner as to be directed toward the opening portion 81.

[0166] Similarly, the second air guide 102 is disposed outside the housing 10. The second air guide 102 has a support plate 102a and a plurality of inclined plates 102b supported by the support plate 102a. The support plate 102a is mounted on the second heat sink 42 or the housing 10. The plurality of inclined plates 102b are arranged side by side in the X direction. The plurality of inclined plates 102b overlap with the opening 82 in the Z direction. Each inclined plate 102b is inclined relative to the X direction in such a way that it is located on the -Z direction side as it moves in the -X direction. A portion of the airflow flowing in the X direction outside the housing 10 collides with each inclined plate 102b. As a result, the flow direction of a portion of the airflow flowing outside the housing 10 changes toward the opening 82.

[0167] (effect)

[0168] Figure 19 This diagram illustrates the function of the semiconductor memory device 1H. It shows a portion of the airflow outside the housing 10 (see reference). Figure 19 The thick arrow D1 (hereinafter referred to as "airflow D1") in the diagram, through collision with the inclined plate 101b of the first air guide 101 or the inclined plate 102b of the second air guide 102, becomes an airflow toward the -Z direction side, flowing into the interior of the housing 10 from the opening 81 or the opening 82. Airflow D1 flows out of the housing 10 from the opening 10a of the second end 10e2 of the housing 10 around the controller 23. This cools the controller 23.

[0169] (advantage)

[0170] In this embodiment, the heat dissipation structure 40H has an inclined plate 101b disposed on the outside of the housing 10, overlapping the opening 81 in the Z direction, and inclined such that it approaches the opening 81 as it moves in the -X direction. With this configuration, a portion of the airflow flowing outside the housing 10 collides with the inclined plate 101b, causing more air to flow into the interior of the housing 10. This further promotes heat dissipation of the controller 23. Furthermore, if multiple inclined plates 101b are provided, dust or dirt is less likely to enter the interior of the housing 10 from the opening 81.

[0171] The above describes several implementation methods and variations. However, the implementation methods and variations are not limited to the examples described. For example, the implementation methods and variations can also be combined with each other.

[0172] According to at least one embodiment described above, the heat dissipation structure has: a plurality of first heat dissipation fins each extending along a second direction; a plurality of second heat dissipation fins apart from the plurality of first heat dissipation fins in the second direction and each extending along the second direction; and a first cover portion disposed between the plurality of first heat dissipation fins and the plurality of second heat dissipation fins or in a gap between the plurality of second heat dissipation fins and covering at least a part of the gap between the plurality of second heat dissipation fins when viewed in the second direction. According to such a configuration, improvement in heat dissipation performance can be sought.

[0173] The embodiments of the present application have been described, but these embodiments are presented as examples and are not intended to limit the scope of the application. These embodiments can be implemented in other various ways, and various omissions, substitutions, and changes can be made without departing from the scope of the application. These embodiments or variations thereof are included in the scope or spirit of the application and are also included in the scope of the application and equivalents thereof recited in the claims.

[0174] [Explanation of Symbols]

[0175] 1, 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H semiconductor storage device

[0176] 10 housing

[0177] 11 first main wall

[0178] 11a first region

[0179] 11b second region

[0180] 21 substrate

[0181] 23 controller

[0182] 24 semiconductor memory element

[0183] 26 capacitor

[0184] 40, 40A, 40B, 40C, 40D, 40E, 40F, 40G, 40H heat dissipation structure

[0185] 41 first heat dissipation fin

[0186] 42 second heat dissipation fin

[0187] 43 flow control plate

[0188] 51 top plate portion

[0189] 51a first top plate portion (second cover portion)

[0190] 51b second top plate portion (third cover portion)

[0191] 52 intercepting portion (1st covering portion)

[0192] 61 opening portion (1st opening portion)

[0193] 62 opening portion

[0194] 81 opening portion (2nd opening portion)

[0195] 82 opening portion

[0196] 91 1st wall portion (4th covering portion)

[0197] 92 2nd wall portion

[0198] 101b inclined plate

[0199] 102b inclined plate

Claims

1. A semiconductor storage device, comprising: a housing; a substrate housed in the housing; a semiconductor memory component mounted on the substrate; a controller mounted on the substrate and capable of controlling the semiconductor memory component; and a heat dissipation structure provided in the housing and exposed to an outside of the housing; the housing having: a first region overlapping the semiconductor memory component in a first direction as a thickness direction of the substrate; and a second region overlapping the controller in the first direction; the heat dissipation structure having: a plurality of first heat dissipation fins provided in the first region and each extending in a second direction from the semiconductor memory component toward the controller; a plurality of second heat dissipation fins provided in the second region, away from the plurality of first heat dissipation fins in the second direction, and each extending in the second direction; and a first cover portion disposed between the plurality of first heat dissipation fins and the plurality of second heat dissipation fins or in a gap between the plurality of second heat dissipation fins and covering at least a part of a gap between the plurality of second heat dissipation fins when viewed in the second direction.

2. The semiconductor storage device according to claim 1, wherein the heat dissipation structure further has a second cover portion covering at least a part of a space between the plurality of first heat dissipation fins and the plurality of second heat dissipation fins from opposite sides of the housing.

3. The semiconductor storage device according to claim 2, wherein the second cover portion is connected to the first cover portion.

4. The semiconductor storage device according to claim 2 or 3, wherein the heat dissipation structure has a first opening portion opening to a third direction intersecting the first direction and the second direction between the second cover portion and the housing.

5. The semiconductor storage device according to claim 2 or 3, wherein the heat dissipation structure further has a third cover portion covering at least a part of a gap between the plurality of first heat dissipation fins from opposite sides of the housing.

6. The semiconductor storage device according to claim 5, wherein the third cover portion is connected to the second cover portion.

7. The semiconductor storage device according to any one of claims 1 to 3, wherein the plurality of second heat dissipation fins have end portions toward the plurality of first heat dissipation fins, and the first cover portion is adjacent to the end portions of the plurality of second heat dissipation fins.

8. The semiconductor storage device according to any one of claims 1 to 3, wherein the first cover portion is away from the plurality of second heat dissipation fins in the second direction, and a gap between the plurality of second heat dissipation fins communicates with a space between the plurality of second heat dissipation fins and the first cover portion in the second direction.

9. The semiconductor storage device according to any one of claims 1 to 3, wherein the housing has a second opening portion opening to the first direction and communicating an inside of the housing with the outside, at least a part of the second opening portion facing a region between the controller and the semiconductor memory component in the substrate when viewed in the first direction. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ 10. The semiconductor storage device according to claim 9, wherein the plurality of second fins include a plurality of first length fins having a first size in the second direction, and a plurality of second length fins having a second size shorter than the first size in the second direction, the second opening portion is located between the plurality of second length fins and the plurality of first fins when viewed from the first direction.

11. The semiconductor storage device according to claim 10, wherein the second opening portion is located between the plurality of second length fins and the first cover portion when viewed from the first direction.

12. The semiconductor storage device according to claim 10, wherein the heat dissipation structure further has a fourth cover portion covering at least a part of a gap between the plurality of second length fins when viewed from the second direction.

13. The semiconductor storage device according to claim 10, wherein a gap between the plurality of second length fins communicates with a space between the plurality of second length fins and the first cover portion in the second direction.

14. The semiconductor storage device according to claim 9, wherein the heat dissipation structure further has an inclined plate overlapping the second opening portion in the first direction and inclined so as to approach the second opening portion as proceeding toward the second direction.

15. A semiconductor storage device comprising: a housing; a substrate housed in the housing; a semiconductor memory component mounted on the substrate; a controller mounted on the substrate and capable of controlling the semiconductor memory component; and a heat dissipation structure provided in the housing and exposed to an outside of the housing; the housing has a first region overlapping the semiconductor memory component in a first direction as a thickness direction of the substrate, and a second region overlapping the controller in the first direction; the heat dissipation structure has: a plurality of first fins provided in the first region and respectively extending in a second direction from the semiconductor memory component toward the controller; and a plurality of second fins provided in the second region, apart from the plurality of first fins, and respectively extending in the second direction; the housing has an opening portion opened toward the first direction, and at least a part of the opening portion faces a region between the controller and the semiconductor memory component in the substrate when viewed from the first direction.

16. The semiconductor storage device according to claim 15, wherein the plurality of second fins include a plurality of first length fins having a first size in the second direction, and a plurality of second length fins having a second size shorter than the first size in the second direction, the opening portion is located between the plurality of second length fins and the plurality of first fins when viewed from the first direction. ​ ​ ​

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