Pulse drive circuit, lidar front-end transmitting circuit

Abstract

The nanosecond pulse driving circuit of the high-power semiconductor laser diode array provided in the embodiment of the application is applied to a laser radar front-end transmitting circuit and comprises a BOOST boosting circuit, an LDO linear power supply, a gate driver, an N-MOS switch tube, a pulse narrowing buffer and an analog multiplexer. The pulse narrowing buffer is electrically connected with the analog multiplexer. The analog multiplexer is electrically connected with a plurality of gate drivers. Each gate driver is connected with an N-MOS switch tube. The N-MOS switch tube is used for connecting an external laser diode. The LDO linear power supply is electrically connected with the analog multiplexer, the gate driver and the pulse narrowing buffer respectively and supplies power. The BOOST boosting circuit is electrically connected with the N-MOS switch tube to supply power for the laser diode. The N-MOS switch tube not only has a high switching speed, but also can be used for expanding a larger laser diode array. The circuit can be widely used for driving a high-power narrow pulse semiconductor laser diode array.

Description

Technical Field

[0001] This invention relates to the field of semiconductor circuits, and in particular to a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array and a front-end transmitting circuit for a lidar. Background Technology

[0002] Semiconductor laser diodes (SLDs) are widely used in optoelectronic products due to their small size, low cost, and ease of use, especially in optical communication and optical measurement. In laser communication, SLDs are the primary component for converting electrical signals into optical signals; almost all optical transmitters use SLDs. In optical measurement, SLDs are widely used in laser ranging, laser scanning, and lidar. In recent years, with the rise of autonomous driving technology, lidar has become a research hotspot in the measurement field. The pulsed laser emitting circuit, as a core circuit, is particularly important in its design. High-power pulsed lasers can achieve long-distance measurements, but to ensure eye safety, the average output power of the laser must be limited. To increase the measurement distance while ensuring eye safety, it is necessary to increase the laser power while reducing the pulse width.

[0003] Existing pulsed laser driving circuits suffer from technical problems such as wide pulse width, low pulse repetition frequency, low pulse power, small number of driving lasers, and slow switching speed. Summary of the Invention

[0004] In view of this, the present invention provides a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array and a lidar front-end transmitting circuit, which not only has a fast switching speed, but can also be expanded to control a larger laser diode array, and can be widely used to drive high-power narrow-pulse semiconductor laser diode arrays.

[0005] In a first aspect, the present invention provides a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, including a BOOST boost circuit, an LDO linear power supply, a gate driver, an N-MOS switch, a pulse narrowing buffer, and an analog multiplexer.

[0006] The pulse narrowing buffer is electrically connected to the analog multiplexer, and the analog multiplexer is electrically connected to multiple gate drivers. Each gate driver is connected to one of the N-MOS switches, and the N-MOS switches are used to connect to an external laser diode.

[0007] The LDO linear power supply is electrically connected to and supplies power to the analog multiplexer, the gate driver, and the pulse narrowing buffer, respectively. The BOOST boost circuit is electrically connected to the N-MOS switch so that the N-MOS switch supplies power to the laser diode.

[0008] As an optional solution, an external power supply is also included, which is electrically connected to and supplies power to the LDO linear power supply and the BOOST boost circuit, respectively.

[0009] As an optional solution, there are 8 gate drivers and 8 N-MOS switches, and the N-MOS switches are electrically connected to the gate drivers in a one-to-one correspondence.

[0010] As an optional solution, an external controller is also included. The external controller is electrically connected to the pulse narrowing buffer and the analog multiplexer, respectively. The external controller is used to provide a PWM square wave excitation signal. The PWM square wave excitation signal is input to the pulse narrowing buffer for pulse width adjustment and then output to the gate driver. The gate driver drives and controls the N-MOS switch to perform high-speed switching to control the laser diode to output pulsed laser.

[0011] The analog multiplexer selects its output channel based on the selection signal from the external controller.

[0012] As an alternative, the external controller can be a signal generator, a microcontroller, or a field-programmable gate array (FPGA).

[0013] As an optional solution, the analog multiplexer is composed of two 4-to-1 multiplexer chips.

[0014] Secondly, embodiments of the present invention provide a lidar front-end transmitting circuit, including the nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array as described above.

[0015] The nanosecond-level pulse driving circuit and lidar front-end transmitting circuit for a high-power semiconductor laser diode array provided in this embodiment of the invention include a BOOST boost circuit, an LDO linear power supply, a gate driver, an N-MOS switch, a pulse narrowing buffer, and an analog multiplexer. The pulse narrowing buffer 8 is electrically connected to the analog multiplexer, and the analog multiplexer is electrically connected to multiple gate drivers 4. Each gate driver is connected to one N-MOS switch, which is used to connect to an external laser diode. The LDO linear power supply is electrically connected to and supplies power to the analog multiplexer, the gate drivers, and the pulse narrowing buffer, respectively. The BOOST boost circuit is electrically connected to the N-MOS switch so that the N-MOS switch supplies power to the laser diode. It can achieve a pulse current with an operating frequency of up to 100kHz, an output pulse of 4ns, and a peak operating current of up to 30A. It can control the pulse output of eight laser diodes with different wavelengths in turn, offering not only fast switching speed but also the ability to expand the control scale of larger laser diode arrays. It can be widely used to drive high-power narrow-pulse semiconductor laser diode arrays. Attached Figure Description

[0016] Figure 1 This is a schematic block diagram of a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array provided in an embodiment of the present invention;

[0017] Figure 2 This is a schematic diagram of the principle of the LDO linear power supply circuit in a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, provided in an embodiment of the present invention.

[0018] Figure 3 This is a schematic diagram of the BOOST boost circuit in a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, provided in an embodiment of the present invention.

[0019] Figure 4 This is a schematic diagram of the high-speed gate driver and MOS switch circuit in a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, provided in an embodiment of the present invention.

[0020] Figure 5 This is a schematic diagram of a pulse narrowing buffer circuit for a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, provided in an embodiment of the present invention.

[0021] Figure 6 This is a schematic diagram of the principle of an analog multiplexer in a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, provided in an embodiment of the present invention.

[0022] Figure label:

[0023] 1. External power supply; 2. DC-DC BOOST boost circuit; 3. LDO linear power supply; 4. High-speed gate driver; 5. N-MOS switch; 6. Semiconductor laser diode; 7. External controller; 8. Pulse narrowing buffer; 9. Analog multiplexer;

[0024] U10, ASM1117-5.0 chip; Power connector; U9, LM3478 chip; Q9, TPCA8016 N-channel power MOSFET; D9, SS26FL Schottky diode; L1, 100uH power inductor; RP1, potentiometer; U1, LMG1025 chip; Q1, EPC2215 N-channel power MOSFET; D1, DFLS2100 Schottky diode; U16, U17, U18, U1274LVC1G04 chip; U19, 74LVC1G08 chip; U11, ADG704 chip; PWM-IN, IPEX coaxial cable connector; Select connector; Rx, resistor; Cx, capacitor. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] The terms "first," "second," "third," "fourth," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] Combination Figure 1As shown, this embodiment of the invention provides a nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, including a BOOST boost circuit 2, an LDO linear power supply 3, a gate driver 4, an N-MOS switch 5, a pulse narrowing buffer 8, and an analog multiplexer 9;

[0028] The pulse narrowing buffer 8 is electrically connected to the analog multiplexer 9, and the analog multiplexer 9 is electrically connected to multiple gate drivers 4. Each gate driver 4 is connected to one N-MOS switch 5, and the N-MOS switch 5 is used to connect to an external laser diode 6.

[0029] The LDO linear power supply 3 is electrically connected to and supplies power to the analog multiplexer 9, the gate driver 4 and the pulse narrowing buffer 8 respectively. The BOOST boost circuit 2 is electrically connected to the N-MOS switch 5 so that the N-MOS switch 5 supplies power to the laser diode 6.

[0030] It should be noted that the laser diode 6 mentioned here is not necessarily part of the driving circuit provided in the embodiments of the present invention. This is mentioned here for the convenience of explaining the connection relationship, and will not be elaborated on below.

[0031] In some embodiments, an external power supply 1 is also included. The external power supply 1 is electrically connected to and supplies power to the LDO linear power supply 3 and the BOOST boost circuit 2, respectively. It should be noted that the laser diode 6 and the external power supply 1 mentioned here are not necessarily part of the driving circuit provided in the embodiments of the present invention. This is mentioned here for the convenience of explaining the connection relationship, and will not be described in detail below.

[0032] In the nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array 6 provided in this embodiment of the invention, the external controller 7 is electrically connected to the pulse narrowing buffer 8, the N-MOS switch 5 is electrically connected to the laser diode 6, the gate driver 4 is electrically connected to the N-MOS switch 5, the pulse narrowing buffer 8 is electrically connected to the gate driver 4, the LDO linear power supply 3 is electrically connected to the gate driver 4 and the pulse narrowing buffer 8, the BOOST boost circuit 2 is electrically connected to the MOS switch 5, and the external power supply 1 is electrically connected to the BOOST boost circuit 2 and the LDO linear power supply 3. After power-on, the external controller 7 provides a PWM square wave excitation signal to this driving circuit, for example, 100ns@100kHz. The PWM square wave excitation signal is sent to the pulse narrowing buffer 8 and becomes a pulse width of 2ns-10ns. The specific pulse width is determined by the circuit settings. In this embodiment, the output pulse width is set to 3.7ns. The 3.7ns pulse width is input to the gate driver 4 to drive the N-MOS switch 5, controlling the high-speed switching action of the N-MOS switch 5 to control the laser diode 6 to output pulsed laser. The LDO linear power supply 3 steps down the voltage of the external power supply 1 to 5V to power the pulse narrowing buffer 8 and the gate driver 4. The BOOST boost circuit 2 boosts the voltage of the external power supply 1 to 20V-50V to power the laser diode 6. Adjusting the output voltage can control the output power of the pulsed laser.

[0033] It should be noted that the number of gate drivers and N-MOS switches, as well as the number of channels of the analog multiplexer 9, are determined according to the number of laser diodes to be driven. In this embodiment, to drive 8 laser diodes, 8 gate drivers and 8 N-MOS switches can be selected. The N-MOS switches are electrically connected to the gate drivers in a one-to-one correspondence. The number of channels of the analog multiplexer 9 is selected as 8 channels. Multiple multiplexers can also be combined. This is not limited here.

[0034] In this embodiment, the analog multiplexer 9 is composed of two 4-to-1 multiplexer chips, which can drive an 8-tube laser diode array. The output wavelengths of the 8 laser diodes are different and they are turned on in turn. The output pulsed laser light is deflected by a grating, which can be applied to solid-state lidar scanning imaging scenarios.

[0035] In some embodiments, an external controller 7 is also included. The external controller 7 provides a pulse excitation source for the drive circuit, namely, a PWM square wave excitation signal with a pulse frequency up to 100kHz and a pulse width of arbitrary size. An external power supply 1 provides a DC power supply for the drive circuit, with an input requirement of DC 8V-16V and a current >2A. The external controller is electrically connected to the pulse narrowing buffer and the analog multiplexer 9, respectively. The external controller is used to provide the PWM square wave excitation signal. The PWM square wave excitation signal is input to the pulse narrowing buffer for pulse width adjustment and then output to the gate driver. The gate driver drives and controls the N-MOS switch to perform high-speed switching to control the laser diode to output pulsed laser. The analog multiplexer 9 selects the output channel based on the address selection signal of the external controller. The external controller does not necessarily have to be part of the drive circuit provided in this embodiment of the invention. It is introduced here for the convenience of explaining the connection relationship and will not be described in detail below.

[0036] In some embodiments, the external controller is a signal generator, a microcontroller, or a field-programmable gate array (FPGA). In this embodiment, a signal generator is selected as the external controller.

[0037] To facilitate understanding of the circuit modules in the nanosecond-level pulse driving circuit for high-power semiconductor laser diode arrays provided in this embodiment of the invention, including the LDO linear power supply 3, BOOST boost power supply 2, gate driver 4, N-MOS switch 5, pulse narrowing buffer 8, and analog multiplexer 9, each circuit module will be explained in detail below.

[0038] Combination Figure 2 As shown, the structure of the LDO3 linear power supply is described in detail. The LDO3 linear power supply uses an ASM1117-5.0 (U10) to step down the input voltage from 8V-16V to 5V, providing a stable 5V power supply for the relevant digital circuits. Figure 2 The Power terminal is for connecting 8V-16V power (VIN). Capacitor C45 is used to reduce fluctuations in the input power (VIN). Capacitors C46 and C47 are filter capacitors for the output voltage. Resistor R40 is used to connect power ground (PGND) and signal ground (GND).

[0039] Combination Figure 3 As shown, the BOOST boost circuit is used to provide a higher drive voltage to the semiconductor laser diode. The BOOST boost circuit LM3478(U9) can be a DC-DC boost converter control chip from Texas Instruments (TI), and requires an external N-MOSFET to form the BOOST boost circuit. Figure 3The basic BOOST circuit topology consists of a switching transistor (Q9), a Schottky diode (D9), a power inductor (L1), and a capacitor. Resistor R39 is the current sampling resistor; here, the output current is set to 200mA, and the calculated value of resistor R39 is set to 100mΩ. Pin 3 (FB) of the LM3478 (U9) is used to set the output voltage, consisting of resistor R34 and potentiometer RP1. The voltage across FB is 1.26V. Therefore, the output voltage formula is:

[0040]

[0041] Where V FB The voltage on FB is 1.26V. The output voltage and output power of the semiconductor laser diode can be adjusted by adjusting RP1. Pin 2 (COMP) of the BOOST boost circuit LM3478 (U9) is the compensation pin. Adding a resistor and a capacitor combination connected to this pin provides the compensation control loop. Specific parameters can be found in the calculation formulas in the chip datasheet. The capacitors (C40, C41, C42, C43) are also energy storage capacitors. The high-power pulse of the pulsed laser diode is achieved by providing a large current through the instantaneous discharge of the capacitor. The following is a theoretical calculation: assuming the BOOST boost circuit output voltage is 50V, and a 30A, 5ns pulse current needs to be provided to the semiconductor laser diode, the required charge is:

[0042] △Q=I·△t=30A·5ns=1.5×10 -7 C

[0043] The output voltage change caused by instantaneous discharge is:

[0044]

[0045] The output voltage change caused by instantaneous discharge is 0.08V, which is 0.16% compared to the output voltage change of 50V. The impact on power supply fluctuations can be ignored.

[0046] Combination Figure 4The diagram shows a schematic of the circuit for gate driver 4 and N-MOS switch 5. The gate driver, LMG1025(U1), is a high-speed gate driver from Texas Instruments (TI), capable of achieving an extremely fast propagation delay of 2.5ns and a minimum pulse width of 1ns. Pin 1 of the LMG1025(U1) is the positive input pin for the pulse signal, pin 3 is the power input pin, and pin 2 is the ground pin. Capacitors C1 and C3 are filter capacitors. Pin 6 is the negative input pin for the pulse signal (grounded in this circuit). Outputs 4 and 5 are connected to the gate of the N-MOS switch EPC2215(Q1) through a 0-ohm resistor. The N-MOS switch EPC2215(Q1) is a gallium nitride (GaN) field-effect transistor from EPC Energy Conversion Corporation (EPC). GaN field-effect transistors have higher switching speeds than silicon field-effect transistors, making them well-suited for high-speed switching applications. Pin 2 of the N-MOS switch EPC2215 (Q1) is connected to signal ground (GND), and pins 4 and 6 are connected to power ground (PGND). This forms a common ground near the MOS transistor to prevent the potential rise caused by a large current on power ground (PGND) from affecting signal ground (GND). A Schottky diode (D1) is used to suppress reverse electromotive force. Resistors (R1, R2) quickly release the charge in the semiconductor laser diode, accelerating the turn-off speed. Simultaneously, when the circuit is not in operation, they connect the positive and negative terminals of the semiconductor laser diode together to prevent the PN junction from breaking down due to external static electricity, thus protecting the semiconductor laser diode. Capacitors (C5, C6) are soldered near the semiconductor laser diode, serving as filters and energy storage. Pads AN and KA1 are connected to the positive and negative terminals of the semiconductor laser diode, respectively.

[0047] Combination Figure 5The diagram shows a schematic of the pulse narrowing buffer 8. The pulse narrowing buffer is implemented using the propagation delay of gate circuits. In this embodiment, Texas Instruments (TI) single-NOT gate chips 74LVC1G04 (U16, U17, U18) are used. The propagation delay of the 74LVC1G04 pulse narrowing buffer at room temperature and a 5V power supply is 2.5ns, and the delay consistency is good. This embodiment uses three 74LVC1G04s. The number of 74LVC1G04s can be selectively soldered according to the required delay duration. The propagation delay of three 74LVC1G04s is 7.5ns. Since the pulse waveform is a spike-shaped waveform, the pulse width is calculated based on the full width at half maximum (FWHM) of the waveform. The FWHM of the propagation delay of three 74LVC1G04s is approximately 3.7ns. When using an odd number of NOT gates (74LVC1G04), an AND gate logic is required to obtain a narrow pulse signal. Here, a Texas Instruments (TI) single AND gate chip 74LVC1G08 (U19) is used to achieve the narrow pulse signal output. When using an even number of NOT gates (74LVC1G04), an XOR gate logic is required to obtain the narrow pulse signal. A Texas Instruments (TI) single XOR gate chip 74LVC1G86 can be used to achieve the narrow pulse signal output. The capacitors (C52, C53, C54, C55) in the pulse narrowing buffer are decoupling capacitors for the chip; one is soldered to the power supply bypass of each logic chip. Resistor R41 is a pull-down resistor to prevent the semiconductor laser diode from burning out due to the MOS switch turning on when there is no signal input and the pin is floating. PWM-IN is an IPEX shielded cable connector used to connect the excitation pulse.

[0048] Combination Figure 6 The diagram shows a schematic of the circuit principle of the analog multiplexer 9. In this embodiment, the analog multiplexer 9 uses two Analog Devices (ADI) 4-to-1 multiplexer chips ADG704 to drive eight laser diodes 6. One pulse signal (Pulse_In) can be selected as eight pulse output signals (Pulse_Out1 to Pulse_Out8). The NOT gate U12 is used to select chips U11 and U13, and together with the address pins of U11 and U13, forms a 3-bit address (INC, INB, INA). Controlling the level values ​​of these three pins determines the output channel. Since the channel switching speed of the ADG704 is less than 50ns, fast switching within a 50ns range can be achieved.

[0049] The nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array provided in this embodiment of the invention includes a BOOST boost circuit 2, an LDO linear power supply 3, a gate driver 4, an N-MOS switch 5, a pulse narrowing buffer 8, and an analog multiplexer 9. The pulse narrowing buffer 8 is electrically connected to the analog multiplexer 9, and the analog multiplexer 9 is electrically connected to multiple gate drivers 4. Each gate driver 4 is connected to one N-MOS switch 5. The N-MOS switch 5 is used to connect to an external laser diode 6. The LDO linear power supply 3 is electrically connected to and supplies power to the analog multiplexer 9, the gate drivers 4, and the pulse narrowing buffer 8, respectively. The BOOST boost circuit 2 is electrically connected to the N-MOS switch 5 so that the N-MOS switch 5 supplies power to the laser diode 6. It can achieve a working frequency of up to 100kHz, an output pulse of 4ns (2ns-10ns selectable), and a peak working current of up to 30A. It can control the pulse output of 8 laser diodes with different wavelengths in turn. It not only has a fast switching speed, but can also be expanded to control a larger laser diode array. It can be widely used to drive high-power narrow-pulse semiconductor laser diode arrays.

[0050] Accordingly, this embodiment of the invention provides a lidar front-end transmitting circuit, including the nanosecond-level pulse driving circuit for high-power semiconductor laser diode arrays as described above, which can be widely used to drive high-power narrow-pulse semiconductor laser diode arrays and is applicable to solid-state lidar scanning imaging scenarios.

[0051] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A nanosecond-level pulse driving circuit for a high-power semiconductor laser diode array, characterized by, The BOOST voltage boosting circuit, the LDO linear power supply, the gate driver, the N-MOS switch tube, the pulse narrowing buffer and the analog multiplexer are included. The pulse narrowing buffer is electrically connected with the analog multiplexer, and the analog multiplexer is electrically connected with a plurality of gate drivers, each of which is connected with an N-MOS switch tube. The LDO linear power supply is electrically connected with the analog multiplexer, the gate driver and the pulse narrowing buffer to supply power, and the BOOST voltage boosting circuit is electrically connected with the N-MOS switch tube to supply power to the laser diode. An external power supply is electrically connected with the LDO linear power supply and the BOOST voltage boosting circuit to supply power, and the voltage of the direct current power supply provided by the external power supply is 8V-16V. An external controller is electrically connected with the pulse narrowing buffer and the analog multiplexer, and the external controller is used to provide a PWM square wave excitation signal. The BOOST voltage boosting circuit boosts the voltage of the external power supply to 20V-50V. The BOOST voltage boosting circuit comprises a DC-DC voltage conversion control chip, a potentiometer RP1, a switch tube Q9, a Schottky diode D9, a power inductor L1, a capacitor C40, a capacitor C41, a capacitor C42, a capacitor C43, a capacitor C44, a resistor R34, a resistor R36, a resistor R39, and a resistor R37. The ISEN end of the DC-DC voltage conversion control chip is connected to one end of the resistor R37. The other end of the resistor R37 is connected to one end of the resistor R39. The other end of the resistor R39 is connected to the power ground PGND. One end of the capacitor C44 is connected to the ISEN end of the DC-DC voltage conversion control chip. The other end of the capacitor C44 is connected to the power ground PGND. The gate of the switch tube Q9 is connected to the DR end of the DC-DC voltage conversion control chip. The source of the switch tube Q9 is connected to the other end of the resistor R37. The drain of the switch tube Q9 is connected to the external power supply through the power inductor L1. The external power supply is connected to the VIN end of the DC-DC voltage conversion control chip. One end of the Schottky diode D9 is connected to the drain of the switch tube Q9. The other end of the Schottky diode D9 is connected to one end of the potentiometer RP1. The other end of the potentiometer RP1 is connected to the FB end of the DC-DC voltage conversion control chip. The voltage of the FB end is 1.26V. The FB end of the DC-DC voltage conversion control chip is connected to the power ground PGND through the resistor R34. The sliding end of the potentiometer RP1 is short-circuited to the other end of the potentiometer RP1. The sliding end of the potentiometer RP1 is connected to the other end of the Schottky diode D9 through the resistor R36. The other end of the Schottky diode D9 outputs a voltage V bus The other end of the Schottky diode D9 and the power ground PGND have the capacitor C40, the capacitor C41, the capacitor C42, and the capacitor C43 connected in parallel. The total capacitance of the capacitor C40, the capacitor C41, the capacitor C42, and the capacitor C43 is 188μF. ， V FB is 1.26 V, the output voltage V is adjusted by adjusting the potentiometer RP1 bus ; The gate driver is LMG1025, and the N-MOS switch tube is a gallium nitride field effect tube EPC2215. The pulse width of the PWM square wave excitation signal input to the pulse narrowing buffer is 100ns, and the pulse width of the output signal of the pulse narrowing buffer is 2ns-10ns. The analog multiplexer selects the output channel based on the selection signal of the external controller, and the analog multiplexer includes two 4-to-1 multiplexer chips ADG704, and the channel switching speed of the multiplexer chip ADG704 is less than 50ns.

2. The nanosecond-level pulse driving circuit for high-power semiconductor laser diode arrays according to claim 1, characterized in that, The gate driver is 8, and the N-MOS switch tube is 8, and the N-MOS switch tube is electrically connected with the gate driver one by one.

3. The nanosecond pulse driving circuit for high power semiconductor laser diode array according to claim 1, wherein, The PWM square wave excitation signal is input to the pulse narrowing buffer for pulse width adjustment and then output to the gate driver, the gate driver drives and controls the N-MOS switch tube to perform high-speed switching action to control the laser diode to output pulsed laser.

4. The nanosecond pulse driving circuit for high power semiconductor laser diode arrays according to claim 3, characterized in that, The external controller is a signal generator, a single-chip microcomputer or a field programmable logic gate array FPGA.

5. A ladar front-end transmit circuit, comprising: The nanosecond-level pulse driving circuit for the high-power semiconductor laser diode array includes the nanosecond-level pulse driving circuit for the high-power semiconductor laser diode array according to any one of claims 1 to 4.

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