A multi-channel accelerator power drive system and method

Abstract

The present invention relates to a multi-channel accelerator power drive system and method, comprising a digital low-level system, a solid-state radio frequency power source, a radio frequency power synthesizer, a directional coupler group, and an input coupler. The digital low-level system is used to generate an RF excitation signal for each solid-state radio frequency power source; receive an extraction signal of radio frequency power in the cavity output by an RFQ cavity sampling antenna; adjust the amplitude and phase of the RF excitation signal of each solid-state radio frequency power source; the solid-state radio frequency power source is used to amplify and output corresponding radio frequency power according to the RF excitation signal; the radio frequency power synthesizer is used to synthesize the radio frequency powers output by two corresponding solid-state radio frequency power sources; the directional coupler group is used to couple and extract the corresponding synthesized radio frequency power, and output the extracted signal to the digital low-level system as a feedback signal; the input coupler is used to couple the radio frequency power to the RFQ cavity and reflect reflected power caused by mismatching. The present invention can be widely applied in the field of particle accelerators.

Description

Technical Field

[0001] The present invention relates to the field of particle accelerators, and in particular to a multi-channel accelerator power driving system and method. Background Art

[0002] Using room-temperature RFQ (radio frequency quadrupole accelerator) as the injector is a commonly used design scheme for heavy ion linear accelerators. Because RFQ has complex beam modulation functions such as focusing and acceleration, it is necessary to control the field flatness of each section of the cavity. In addition to special designs in the design stage, the use of multiple high-power input couplers to feed RF power can balance the field-building power fed between multiple sections of the cavity and reduce the feed power of a single input coupler, thereby reducing the design and processing difficulty of the coupler and improving the working stability and reliability of the high-power input coupler.

[0003] Using multiple solid-state generators (SSAs) to combine power output can achieve high-power RF power output (hundreds of kilowatts), which is used to drive the RFQ and establish the required high-frequency electric field. However, traditional solutions often use analog power combining, which requires complex power balancing between the power source units. If operating at different power levels, the power combining balance performance cannot be guaranteed. Summary of the Invention

[0004] In view of the above problems, the object of the present invention is to provide a multi-channel accelerator power driving system and method that can ensure power synthesis balance performance.

[0005] To achieve the above-mentioned object, the present invention adopts the following technical solutions: On the one hand, a multi-channel accelerator power drive system is provided, comprising a digital low-level system, a solid-state radio frequency power source, a radio frequency power combiner, a directional coupler group and an input coupler;

[0006] The digital low-level system is used to generate an RF excitation signal for each of the solid-state RF power sources; receive an extraction signal of the RF power in the cavity output by the RFQ cavity sampling antenna; and adjust the amplitude and phase of the RF excitation signal of each of the solid-state RF power sources according to the feedback signal of the directional coupler group and the extraction signal of the RF power in the cavity;

[0007] The solid-state RF power source is used to amplify and output corresponding RF power according to the RF excitation signal;

[0008] The radio frequency power combiner is used to combine the radio frequency powers output by the two corresponding solid-state radio frequency power sources;

[0009] The directional coupler group is used to couple and extract the corresponding synthesized radio frequency power, and output the extracted signal to the digital low-level system as a feedback signal;

[0010] The input coupler is used to couple radio frequency power to the RFQ cavity and reflect reflected power caused by mismatching.

[0011] Furthermore, the digital low-level system is respectively connected to the input ends of several solid-state RF power sources, and several solid-state RF power sources are grouped as a power source group in pairs. The output end of each solid-state RF power source in the power source group is respectively connected to the input end of a corresponding RF power combiner; the output end of each RF power combiner is respectively connected to the input end of the corresponding directional coupler group, and the forward extraction output end and the reverse extraction output end of each directional coupler group are respectively connected to the digital low-level system, and the output end of each directional coupler group is respectively connected to the RFQ cavity through the RF power transmission feed pipe and the input coupler.

[0012] Furthermore, each of the directional coupler groups includes a forward directional coupler and a reverse directional coupler;

[0013] The forward directional coupler is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the forward power characteristics, and output the extracted signal to the digital low-level system as a feedback signal to determine the output power amplitude balance and phase synchronization degree borne by each of the solid-state RF power sources;

[0014] The reverse directional coupler is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the reverse power characteristics, and output the extracted signal to the digital low-level system as a feedback signal to determine the degree of reflected power amplitude balance and phase synchronization borne by each of the solid-state RF power sources.

[0015] Furthermore, the digital low-level system includes an FPGA system, a DAC channel and an ADC channel;

[0016] The ADC channel is used to receive the feedback signals of the forward directional coupler and the reverse directional coupler and the extraction signal of the radio frequency power in the cavity, and output them to the FPGA system after performing analog-to-digital conversion;

[0017] The FPGA system is used to analyze and process each input signal to obtain error information and obtain an RF excitation signal for each solid-state RF power source; compare the feedback signals of the forward directional coupler and the reverse directional coupler with the extraction signal of the RF power in the cavity, perform balance adjustment between the cabinets of the solid-state RF power source, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source;

[0018] The DAC channel is used to perform digital-to-analog conversion on the RF excitation signal obtained by the FPGA system and output the converted signal to the corresponding solid-state RF power source.

[0019] Furthermore, the FPGA system is provided with a data receiving module, a balance adjustment module and a data output module;

[0020] The data receiving module is used to receive the feedback signals of the forward directional coupler and the reverse directional coupler output by the ADC channel and the extraction signal of the radio frequency power in the cavity;

[0021] The balance adjustment module is used to perform balance adjustment between the cabinets of the solid-state RF power source according to the feedback signals of the forward directional coupler and the reverse directional coupler and the extraction signal of the RF power in the cavity, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source;

[0022] The data output module is used to output the adjusted RF excitation signal to the DAC channel.

[0023] Furthermore, the number of the DAC channels is the same as the number of the RF power combiner, the forward directional coupler, the reverse directional coupler and the input coupler.

[0024] Furthermore, the number of the ADC channels is at least 9 channels.

[0025] On the other hand, a multi-channel accelerator power driving method is provided, comprising:

[0026] The digital low-level system generates an RF excitation signal for each solid-state RF power source and outputs the signal to each solid-state RF power source;

[0027] Each solid-state RF power source amplifies and outputs corresponding RF power to the corresponding RF power combiner according to the RF excitation signal;

[0028] Each RF power combiner combines the RF powers output by the corresponding two solid-state RF power sources and outputs the combined RF power to the main line input end of the corresponding directional coupler group;

[0029] Each directional coupler group couples and extracts the synthesized RF power, and outputs the extracted signal to the digital low-level system as a feedback signal;

[0030] The digital low-level system receives the extraction signal of the radio frequency power in the cavity output by the RFQ cavity sampling antenna;

[0031] The digital low-level system balances the output power between the cabinets of the solid-state RF power source based on the feedback signal extracted by the directional coupler group and the extracted signal of the RF power in the cavity, and adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source.

[0032] Furthermore, each directional coupler group couples and extracts the synthesized RF power, and outputs the extracted signal to the digital low-level system as a feedback signal, including:

[0033] Each forward directional coupler couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information that characterizes the forward power characteristics;

[0034] Each reverse directional coupler couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information that characterizes the reverse power characteristics;

[0035] The main line output end of each directional coupler group outputs RF power to the RFQ cavity through the RF power transmission feed tube and the input coupler, and extracts the signal from the cavity sampling point of the RFQ cavity to the digital low-level system as a feedback signal.

[0036] Furthermore, the digital low-level system balances the output power between the cabinets of the solid-state RF power source based on the feedback signal extracted by the directional coupler group and the extracted signal of the RF power in the cavity, and adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source, including:

[0037] The ADC channel receives the feedback signals from the forward directional coupler and the reverse directional coupler, as well as the extracted signal of the RF power in the cavity, and performs analog-to-digital conversion before outputting it to the FPGA system.

[0038] The FPGA system compares the feedback signals from the forward and reverse directional couplers, as well as the RF power extraction signal from the cavity, to balance the solid-state RF power source cabinets, adjust the amplitude and phase of the RF excitation signal for each solid-state RF power source, and output it to the DAC channel.

[0039] The DAC channel performs digital-to-analog conversion on the balanced RF excitation signal and outputs it to the corresponding solid-state RF power source.

[0040] The present invention has the following advantages due to the adoption of the above technical solution:

[0041] 1. The present invention can achieve precise adjustment of the amplitude and phase of each RF excitation signal output to the solid-state RF power source, thereby making the output power of each solid-state RF power source cabinet consistent and maximizing the RF power synthesis efficiency.

[0042] 2. The power output balance adjustment process in the present invention needs to solve two main problems: one is the amplitude balance of each synthesis, and the other is the phase balance of each synthesis. The balance of the amplitude of each synthesis can be achieved by adjusting the balance between the output power of the solid-state RF power source cabinet and the synthesized power between cabinets, and by adjusting the amplitude of the RF excitation signal input by each cabinet; the phase balance adjustment of each synthesis requires adjusting the output phase of each solid-state RF power source to maximize the output power and determine the consistency of the synthesized phase, which is achieved by adjusting the phase of the RF excitation signal input by each cabinet.

[0043] 3. The present invention can control the power drive of a multi-channel accelerator with more than 8 channels or less than 8 channels by increasing or decreasing the number of output channels.

[0044] In summary, the present invention can be widely used in the field of particle accelerators. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present invention. Throughout the drawings, the same reference numerals are used to denote the same components. In the drawings:

[0046] Figure 1 This is a schematic diagram of the system structure provided by an embodiment of the present invention;

[0047] Figure 2 This is a schematic diagram of a low-level driving multi-channel power source provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0049] It should be understood that the terms used herein are for the purpose of describing specific example embodiments only and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "comprise", "include", "contain" and "have" are inclusive and therefore specify the presence of stated features, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring them to be performed in the specific order described or illustrated, unless the order of execution is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0050] Although the terms first, second, third, etc. can be used in the text to describe multiple elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms can only be used to distinguish an element, component, region, layer or section from another region, layer or section. Unless the context clearly indicates otherwise, terms such as "first", "second" and other numerical terms do not imply order or sequence when used in the text. Therefore, the first element, component, region, layer or section discussed below can be referred to as the second element, component, region, layer or section without departing from the teaching of the example embodiments.

[0051] The multi-channel accelerator power drive system and method provided in embodiments of the present invention are used to control the balanced feeding of RF power between the power coupling channels of an RFQ cavity fed with power by a multi-channel coupler. A digital low-level system is used to control the output of multiple RF excitation signals. In this digital low-level system, an FPGA system 11 is used to solve the problems of power synthesis and balanced output of multiple solid-state RF power sources, as well as balanced feeding of the RFQ multi-channel input coupler.

[0052] Example 1

[0053] like Figure 1 、 Figure 2 As shown, this embodiment provides a multi-channel accelerator power drive system, including a digital low-level system 1, a solid-state RF power source 2 (SSA), an RF power synthesizer 3, a directional coupler group 4, an RF power transmission feed pipe 5 and an input coupler 6.

[0054] When the output power of a single solid-state RF power source 2 cannot meet the target power, it is necessary to use a synthesis method of multiple solid-state RF power sources 2. Among them, the output power is maximized when the amplitude and phase are equal when two-by-two synthesis is used. This embodiment is specifically described by taking 8 solid-state RF power sources 2 driving the RFQ of 4-way input couplers 6 as an example.

[0055] The digital low-level system 1 is connected to the inputs of eight solid-state RF power sources 2, which are grouped in pairs. The output of each solid-state RF power source 2 in the power source group is connected to the input of a corresponding RF power combiner 3. The output of each RF power combiner 3 is connected to the input of a corresponding directional coupler group 4. The forward extraction output and reverse extraction output of each directional coupler group 4 are connected to the digital low-level system 1. The output of each directional coupler group 4 is connected to the RFQ cavity 7 via an RF power transmission feeder 5 and an input coupler 6.

[0056] The digital low-level system 1 is used to generate an RF excitation signal for each solid-state RF power source 2; receive the extraction signal of the RF power in the cavity output by the RFQ cavity sampling antenna; and balance the output power between the cabinets of the solid-state RF power source 2 based on the feedback signal extracted by the directional coupler group 4 and the extraction signal of the RF power in the cavity, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source 2 to achieve equal amplitude and phase power input at the input end of the RF power synthesizer 3.

[0057] The solid-state RF power source 2 is used to amplify and output corresponding RF power according to the RF excitation signal output by the digital low-level system 1 to achieve optimal power synthesis output.

[0058] The RF power combiner 3 is used to combine the RF powers outputted by the two corresponding solid-state RF power sources 2 .

[0059] The directional coupler group 4 is used to couple and extract the corresponding synthesized radio frequency power, and output the extracted signal to the digital low-level system 1 as a feedback signal.

[0060] The input coupler 6 is used to couple the RF power to the RFQ cavity 7 and reflect the reflected power caused by the mismatch, serving as an output medium for the RF power from the transmission line to the RFQ cavity 7 .

[0061] In a preferred embodiment, each directional coupler group 4 includes a forward directional coupler 41 and a reverse directional coupler 42. For an ideal directional coupler, the extraction output end (such as c, h) can output the forward extraction signal and the reverse extraction signal at the same time. However, in actual applications, it is difficult to make the isolation between the two ends very high. Poor isolation means that the other party's signal will be coupled and superimposed, making it difficult to distinguish. Therefore, usually only one of the extraction outputs is taken (it can be considered that one of the paths is optimized to reduce the other party's signal coupling and superposition to an acceptable level), and the other extraction output is matched with a 50Ohm termination. If it is not processed, the signal will be reflected and also superimposed on the required output. If you want to obtain more accurate forward and reverse extraction signals, you need a pair of directional couplers, that is, to form a group of directional coupler groups 4.

[0062] The input end a of each forward directional coupler 41 is connected to the output end of the corresponding RF power combiner 3, the output end b of each forward directional coupler 41 is connected to the input end e of the corresponding reverse directional coupler 42, the output end of each reverse directional coupler 42 is connected to the RFQ cavity 7 through the RF power transmission feed pipe 5 and the input coupler 6, the forward extraction output end c of each forward directional coupler 41 and the reverse extraction output end h of the corresponding reverse directional coupler 42 are connected to the digital low-level system 1, and the isolation port d of each forward directional coupler 41 and the isolation port g of the corresponding reverse directional coupler 42 are connected to the matched load.

[0063] The forward directional coupler 41 is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the forward power characteristics, and output the extracted signal to the digital low-level system 1 as a feedback signal to determine the output power amplitude balance and phase synchronization degree borne by each solid-state RF power source 2.

[0064] The reverse directional coupler 42 is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the reverse power characteristics, and output the extracted signal to the digital low-level system 1 as a feedback signal to determine the degree of balance of the reflected power amplitude and the degree of phase synchronization borne by each solid-state RF power source 2.

[0065] In a preferred embodiment, Figure 2 As shown, the digital low-level system 1 includes an FPGA (field programmable gate array) system 11, a DAC (digital-to-analog conversion) channel 12, and an ADC (analog-to-digital conversion) channel 13, wherein the number of DAC channels 12 is the same as the number of the RF power synthesizer 3, the forward directional coupler 41, the reverse directional coupler 42, and the input coupler 6, and the number of ADC channels 13 is at least 9 channels, which can be implemented by multiple ADC chips.

[0066] The output of the FPGA system 11 is connected to the input of each DAC channel 12 and ADC channel 13. The output of each DAC channel 12 is connected to the excitation input of two solid-state RF power sources 2. The inputs of two ADC channels 13 are connected to the coupled extraction outputs of the corresponding forward directional coupler 41 and reverse directional coupler 42. The input of the other ADC channel 13 is directly connected to the RFQ cavity 7. The output of each ADC channel 13 is connected to the input of the FPGA system 11.

[0067] The ADC channel 13 is used to receive the feedback signals from the forward directional coupler 41 and the reverse directional coupler 42 and the extraction signal of the RF power in the cavity, and output the received signals to the FPGA system 11 after performing analog-to-digital conversion.

[0068] The FPGA system 11 is used to analyze and process each input signal to obtain error information and obtain the RF excitation signal of each solid-state RF power source 2; the input power balance adjustment is to compare the feedback signals of the forward directional coupler 41 and the reverse directional coupler 42 and the extraction signal of the RF power in the cavity, perform balance adjustment between the cabinets of the solid-state RF power source 2, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source 2.

[0069] The DAC channel 12 is used to perform digital-to-analog conversion on the RF excitation signal obtained by the FPGA system 11 and output the converted signal to the corresponding solid-state RF power source 2 .

[0070] Specifically, the FPGA system 11 is provided with a data receiving module, a balance adjustment module and a data output module.

[0071] The data receiving module is used to receive the feedback signals of the forward directional coupler 41 and the reverse directional coupler 42 output by the ADC channel 13 and the extraction signal of the radio frequency power in the cavity.

[0072] The balance adjustment module is used to perform balance adjustment between the cabinets of the solid-state RF power source 2 based on the feedback signals from the forward directional coupler 41 and the reverse directional coupler 42, as well as the RF power extraction signal within the cavity, thereby adjusting the amplitude and phase of the RF excitation signal of each solid-state RF power source 2. It should be noted that the balance adjustment module can use an algorithm disclosed in the prior art to perform balance adjustment, and the specific process is not further described here.

[0073] The data output module is used to output the adjusted RF excitation signal to the DAC channel 12.

[0074] In a preferred embodiment, the solid-state RF power source 2 (SSA) can adopt a combination of multiple units with general linearity and general consistency; the RF power synthesizer 3 can adopt a combination with general balance and general consistency; the forward directional coupler 41 needs to adopt a combination with good isolation and general coupling consistency; the reverse directional coupler 42 needs to adopt a combination with good isolation and general coupling consistency; the input coupler 6 can adopt a combination with general consistency but requires a high consistency of coupling.

[0075] Example 2

[0076] This embodiment provides a multi-channel accelerator power driving method, including the following steps:

[0077] 1) The digital low-level system 1 generates an RF excitation signal for each solid-state RF power source 2 and outputs the signal to each solid-state RF power source 2 .

[0078] 2) Each solid-state RF power source 2 amplifies and outputs corresponding RF power to the corresponding RF power combiner 3 according to the RF excitation signal.

[0079] 3) Each RF power combiner 3 combines the RF powers outputted by the corresponding two solid-state RF power sources 2 , and outputs the combined RF power to the main line input end of the corresponding directional coupler group 4 .

[0080] 4) Each directional coupler group 4 couples and extracts the synthesized RF power, and outputs the extracted signal to the digital low-level system 1 as a feedback signal, specifically:

[0081] 4.1) Each forward directional coupler 41 couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information that characterizes the forward power characteristics.

[0082] 4.2) Each reverse directional coupler 42 couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information representing the reverse power characteristics.

[0083] 4.3) The main line output end of each directional coupler group 4 outputs RF power through the RF power transmission feed tube 5 and the input coupler 6 to couple to the RFQ cavity 7, and the extracted signal is output from the cavity sampling point of the RFQ cavity 7 to the digital low-level system 1 as a feedback signal.

[0084] 5) The digital low-level system 1 receives the extraction signal of the RF power in the cavity output by the RFQ cavity sampling antenna.

[0085] 6) The digital low-level system 1 balances the output power between the cabinets of the solid-state RF power source 2 according to the feedback signal extracted by the directional coupler group 4 and the extracted signal of the RF power in the cavity, and adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source 2, and enters step 2), specifically:

[0086] 6.1) The ADC channel 13 receives the feedback signals from the forward directional coupler 41 and the reverse directional coupler 42 as well as the extracted signal of the RF power in the cavity, performs analog-to-digital conversion, and outputs the result to the FPGA system 11.

[0087] 6.2) The FPGA system 11 compares the feedback signals from the forward directional coupler 41 and the reverse directional coupler 42 with the extracted signal of the RF power in the cavity, performs balance adjustment between the cabinets of the solid-state RF power source 2, adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source 2, and outputs it to the DAC channel 12.

[0088] 6.3) The DAC channel 12 performs digital-to-analog conversion on the balanced RF excitation signal and outputs it to the corresponding solid-state RF power source 2.

[0089] The above embodiments are only used to illustrate the present invention, wherein the structure, connection mode and manufacturing process of each component can be changed. Any equivalent transformations and improvements based on the technical solution of the present invention should not be excluded from the scope of protection of the present invention.

Claims

1. A multi-channel accelerator power drive system, characterized in that: Includes digital low-level system, solid-state RF power source, RF power combiner, directional coupler set and input coupler; The digital low-level system is used to generate an RF excitation signal for each of the solid-state RF power sources; receive an extraction signal of the RF power in the cavity output by the RFQ cavity sampling antenna; and adjust the amplitude and phase of the RF excitation signal of each of the solid-state RF power sources according to the feedback signal of the directional coupler group and the extraction signal of the RF power in the cavity; The solid-state RF power source is used to amplify and output corresponding RF power according to the RF excitation signal; The radio frequency power combiner is used to combine the radio frequency powers output by the two corresponding solid-state radio frequency power sources; The directional coupler group is used to couple and extract the corresponding synthesized radio frequency power, and output the extracted signal to the digital low-level system as a feedback signal; The input coupler is used to couple the radio frequency power to the RFQ cavity and reflect the reflected power caused by the mismatch; Each of the directional coupler groups includes a forward directional coupler and a reverse directional coupler; The forward directional coupler is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the forward power characteristics, and output the extracted signal to the digital low-level system as a feedback signal to determine the output power amplitude balance and phase synchronization degree borne by each of the solid-state RF power sources; The reverse directional coupler is used to couple and extract the corresponding synthesized RF power to obtain amplitude and phase information characterizing the reverse power characteristics, and output the extracted signal to the digital low-level system as a feedback signal to determine the degree of reflected power amplitude balance and phase synchronization borne by each of the solid-state RF power sources.

2. A multi-channel accelerator power drive system according to claim 1, characterized in that: The digital low-level system is respectively connected to the input ends of several solid-state RF power sources, and several solid-state RF power sources are grouped in pairs as a power source group. The output end of each solid-state RF power source in the power source group is respectively connected to the input end of a corresponding RF power combiner; the output end of each RF power combiner is respectively connected to the input end of the corresponding directional coupler group, and the forward extraction output end and the reverse extraction output end of each directional coupler group are respectively connected to the digital low-level system, and the output end of each directional coupler group is respectively connected to the RFQ cavity through the RF power transmission feed pipe and the input coupler.

3. The multi-channel accelerator power drive system according to claim 1, characterized in that: The digital low-level system includes an FPGA system, a DAC channel and an ADC channel; The ADC channel is used to receive the feedback signals of the forward directional coupler and the reverse directional coupler and the extraction signal of the radio frequency power in the cavity, and output them to the FPGA system after performing analog-to-digital conversion; The FPGA system is used to analyze and process each input signal to obtain error information and obtain an RF excitation signal for each solid-state RF power source; compare the feedback signals of the forward directional coupler and the reverse directional coupler with the RF power extraction signal in the cavity, perform balance adjustment between the cabinets of the solid-state RF power source, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source; The DAC channel is used to perform digital-to-analog conversion on the RF excitation signal obtained by the FPGA system and output the converted signal to the corresponding solid-state RF power source.

4. A multi-channel accelerator power drive system as claimed in claim 3, characterized in that: The FPGA system is provided with a data receiving module, a balance adjustment module and a data output module; The data receiving module is used to receive the feedback signals of the forward directional coupler and the reverse directional coupler output by the ADC channel and the extraction signal of the radio frequency power in the cavity; The balance adjustment module is used to perform balance adjustment between the cabinets of the solid-state RF power source according to the feedback signals of the forward directional coupler and the reverse directional coupler and the extraction signal of the RF power in the cavity, and adjust the amplitude and phase of the RF excitation signal of each solid-state RF power source; The data output module is used to output the adjusted RF excitation signal to the DAC channel.

5. The multi-channel accelerator power drive system according to claim 3, characterized in that: The number of the DAC channels is the same as the number of the radio frequency power combiner, the forward directional coupler, the reverse directional coupler and the input coupler.

6. A multi-channel accelerator power drive system as claimed in claim 3, characterized in that: The number of the ADC channels is at least 9.

7. A multi-channel accelerator power driving method, characterized in that: include: The digital low-level system generates an RF excitation signal for each solid-state RF power source and outputs the signal to each solid-state RF power source; Each solid-state RF power source amplifies and outputs the corresponding RF power to the corresponding RF power combiner according to the RF excitation signal; Each RF power combiner combines the RF powers output by the corresponding two solid-state RF power sources and outputs the combined RF power to the main line input end of the corresponding directional coupler group; Each directional coupler group couples and extracts the synthesized RF power, and outputs the extracted signal to the digital low-level system as a feedback signal; The digital low-level system receives the extraction signal of the radio frequency power in the cavity output by the RFQ cavity sampling antenna; The digital low-level system balances the output power between the cabinets of the solid-state RF power source based on the feedback signal extracted by the directional coupler group and the extracted signal of the RF power in the cavity, and adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source; Each directional coupler group couples and extracts the synthesized RF power, and outputs the extracted signal to the digital low-level system as a feedback signal, including: Each forward directional coupler couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information that characterizes the forward power characteristics; Each reverse directional coupler couples and extracts the corresponding synthesized RF power to obtain amplitude and phase information that characterizes the reverse power characteristics; The main line output end of each directional coupler group outputs RF power to the RFQ cavity through the RF power transmission feed tube and the input coupler, and extracts the signal from the cavity sampling point of the RFQ cavity to the digital low-level system as a feedback signal.

8. A multi-channel accelerator power driving method according to claim 7, characterized in that: The digital low-level system balances the output power between the cabinets of the solid-state RF power source based on the feedback signal extracted by the directional coupler group and the extracted signal of the RF power in the cavity, and adjusts the amplitude and phase of the RF excitation signal of each solid-state RF power source, including: The ADC channel receives the feedback signals from the forward directional coupler and the reverse directional coupler, as well as the extracted signal of the RF power in the cavity, and performs analog-to-digital conversion before outputting it to the FPGA system. The FPGA system compares the feedback signals from the forward and reverse directional couplers, as well as the RF power extraction signal from the cavity, to balance the solid-state RF power source cabinets, adjust the amplitude and phase of the RF excitation signal for each solid-state RF power source, and output it to the DAC channel. The DAC channel performs digital-to-analog conversion on the balanced RF excitation signal and outputs it to the corresponding solid-state RF power source.

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