Display panel driving method and display device

Abstract

This invention discloses a driving method and display device for a display panel. The driving method for the display panel includes: receiving a target display grayscale; searching a data voltage lookup table for a data voltage group corresponding to the target display grayscale; wherein the data voltage lookup table stores multiple display grayscales and data voltage groups corresponding one-to-one with each display grayscale; each data voltage group includes at least two data voltages, and each of the at least two data voltages corresponds one-to-one with at least two subframes; and using all the data voltages in the data voltage group to drive data within the corresponding subframe. Accordingly, a novel analog-to-digital hybrid driving method for a display panel is realized. Since the time length of each subframe is fixed, no additional Clear signal is required, thus eliminating the need for a corresponding GOA circuit for the Clear signal, simplifying the GOA circuit setup, facilitating narrow bezel design of the display panel, and reducing the need to consume excessive logic resources in the driver chip for the Clear signal, thereby achieving low cost.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a driving method and display device for a display panel. Background Technology

[0002] With the continuous development of display technology, people have increasingly higher requirements for display panels. Among these, high resolution, high refresh rate, low power consumption, and narrow bezels are key areas of focus. To achieve these beneficial effects, existing technologies have proposed various driving methods for display panels, such as analog driving, digital driving, or hybrid analog-digital driving.

[0003] Among them, analog driving is prone to color deviation and the display panel consumes a lot of power; digital driving can solve the technical problems of color deviation and high power consumption, but it is not easy to achieve high resolution and high refresh rate; hybrid analog-digital driving can combine the advantages of analog driving and digital driving, but it is not conducive to achieving narrow bezel design of display panel and has a high cost. Summary of the Invention

[0004] This invention provides a driving method and display device for a display panel to improve the problems of large bezels and high costs associated with mixed analog-to-digital (MADC) driving.

[0005] In a first aspect, embodiments of the present invention provide a driving method for a display panel, wherein each display frame includes at least two subframes; the driving method includes:

[0006] The target display grayscale is received, and the corresponding data voltage group is searched in the data voltage lookup table; wherein, the data voltage lookup table stores multiple display grayscales and data voltage groups that correspond one-to-one with the display grayscales, the display grayscales cover all the target display grayscales, and the data voltage group includes at least two data voltages, and the at least two data voltages correspond one-to-one with the at least two subframes;

[0007] Data driving is performed within the corresponding subframe using all the data voltages in the data voltage group.

[0008] Optionally, before searching for the data voltage group corresponding to the target display grayscale in the data voltage lookup table, the method further includes:

[0009] An initial lookup table is established; wherein, the initial lookup table includes multiple data voltages and display grayscale corresponding to different numbers of subframes for the data voltages;

[0010] A data voltage lookup table is established by combining the display grayscale, the data voltage, and the number of subframes in the initial lookup table.

[0011] Optionally, the number of data voltages in the initial lookup table is M, and the number of subframes is N;

[0012] The grayscale value displayed when the number of subframes corresponding to the m-th data voltage is n*m is n*m; where M≥m≥0, N≥n≥2, and M, m, N and n are all positive integers.

[0013] Preferably, the number of M and N is limited by a range.

[0014] Optionally, establishing a data voltage lookup table includes:

[0015] Determine all the display grayscale levels required for the display panel to display;

[0016] In the initial lookup table, at least one combination of the display gray levels corresponding to the display gray level is searched sequentially; the sum of all the display gray levels in the combination is equal to the display gray level.

[0017] Based on the data voltage corresponding to the grayscale and the number of its subframes in the initial lookup table, establish the data voltage group corresponding to the grayscale;

[0018] Preferably, if the number of data voltages corresponding to the combination of display gray levels is less than the number of subframes, then 0 gray level is used to pad the number of subframes.

[0019] Optionally, the initial lookup table contains multiple combinations of display grayscale corresponding to the display grayscale, and the combination in which the sum of the number of subframes corresponding to all the display grayscales is less than or equal to the number of subframes of the display panel is selected;

[0020] Preferably, the combination that minimizes the sum of the number of subframes corresponding to all the displayed grayscale levels and maximizes the data voltage is selected;

[0021] Alternatively, select the combination with the fewest types of data voltages corresponding to all of the aforementioned display grayscale levels, where different types of data voltages are different magnitudes of data voltages;

[0022] Alternatively, select the combination of the largest and smallest display gray levels corresponding to all the aforementioned display gray levels, where the difference between the two display gray levels is the magnitude of the difference between the two display gray levels;

[0023] Alternatively, select a combination of all the displayed gray levels that are sorted from smallest to largest, where the difference between any two adjacent displayed gray levels is small.

[0024] Optionally, the relationship between the data voltages of each subframe in the combination of display grayscale levels includes at least one of the following:

[0025] Data voltage increases from small to large, data voltage decreases from large to small, data voltage increases first and then decreases, and data voltage decreases first and then increases.

[0026] Optionally, each display frame is divided into at least two subframes, and each subframe has an equal light emission duration.

[0027] Optionally, the display panel includes pixel circuits arranged in an array, and the data voltage is applied to the pixel circuits to generate a corresponding driving current, thereby driving the light-emitting device to emit light.

[0028] Optionally, the pixel circuit includes a 2T1C pixel circuit or a 7T1C pixel circuit;

[0029] Preferably, the 2T1C pixel circuit includes: a storage capacitor, a driving transistor, and a data writing transistor;

[0030] The first terminal of the storage capacitor is connected to the first terminal of the driving transistor, and the second terminal of the storage capacitor is connected to the gate of the driving transistor.

[0031] The first terminal of the driving transistor is connected to a first power supply signal, the second terminal of the driving transistor is connected to the first terminal of the light-emitting device, and the second terminal of the light-emitting device is connected to a second power supply signal.

[0032] The first terminal of the data writing transistor is connected to a data signal, the second terminal of the data writing transistor is connected to the gate of the driving transistor, and the gate of the data writing transistor is connected to a first scan signal.

[0033] Preferably, the 7T1C pixel circuit includes a storage capacitor, a driving transistor, a data writing transistor, a compensation transistor, a first initialization transistor, a second initialization transistor, a first light-emitting control transistor, and a second light-emitting control transistor.

[0034] The first terminal of the storage capacitor is connected to the first terminal of the driving transistor, and the second terminal of the storage capacitor is connected to the gate of the driving transistor.

[0035] The first terminal of the driving transistor is connected to the first terminal of the first light-emitting control transistor, the second terminal of the first light-emitting control transistor is connected to a first power supply signal, the second terminal of the driving transistor is connected to the first terminal of the second light-emitting control transistor, the second terminal of the second light-emitting control transistor is connected to the first terminal of the light-emitting device, and the second terminal of the light-emitting device is connected to a second power supply signal; the gates of the first light-emitting control transistor and the gates of the second light-emitting control transistor are both connected to light-emitting control signals.

[0036] The first terminal of the data writing transistor is connected to a data signal, the second terminal of the data writing transistor is connected to the first terminal of the driving transistor, and the gate of the data writing transistor is connected to a first scan signal.

[0037] The first terminal of the compensation transistor is connected to the gate of the driving transistor, the second terminal of the compensation transistor is connected to the second terminal of the driving transistor, and the gate of the compensation transistor is connected to the first scan signal.

[0038] The first terminal of the first initialization transistor is connected to an initialization signal, the second terminal of the first initialization transistor is connected to the gate of the driving transistor, and the gate of the first initialization transistor is connected to a second scan signal.

[0039] The first terminal of the second initialization transistor is connected to the initialization signal, the second terminal of the second initialization transistor is connected to the first terminal of the light-emitting device, and the gate of the second initialization transistor is connected to the second scan signal.

[0040] Secondly, embodiments of the present invention also provide a display device, including a driver chip and a display panel, wherein the driver chip drives the display panel using the driving method for the display panel as described in the first aspect above.

[0041] The display panel driving method and display panel provided in this invention divide each display frame into at least two sub-frames. After receiving a target display grayscale, the corresponding data voltage group for the target display grayscale is searched in a data voltage lookup table, and all data voltages in the data voltage group are used for data driving within the corresponding sub-frame. The data voltage lookup table stores multiple display grayscales and data voltage groups that correspond one-to-one with each display grayscale. Each data voltage group includes at least two data voltages, which correspond one-to-one with the at least two sub-frames. Thus, a new analog-to-digital hybrid driving method for a display panel is realized. The duration of each sub-frame is fixed, eliminating the need for additional gate control signals, such as Clear signals, to control the duration of the sub-frames. This eliminates the need for additional gate driving circuits (e.g., GOA circuits), simplifying the GOA circuit setup of the display panel and facilitating narrow bezel designs. Furthermore, this invention avoids consuming excessive logic resources in the driver chip due to the provision of Clear signals, thus contributing to low cost. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the structure of a pixel driving circuit driven by analog-digital hybrid technology in the prior art;

[0043] Figure 2 yes Figure 1The diagram shows the driving timing of the pixel driving circuit within a display frame.

[0044] Figure 3 This is a flowchart illustrating a driving method for a display panel provided in an embodiment of the present invention;

[0045] Figure 4 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0046] Figure 5 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0047] Figure 6 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0048] Figure 7 This is a flowchart illustrating a method for establishing a data voltage lookup table according to an embodiment of the present invention.

[0049] Figure 8 This is a flowchart illustrating another method for driving a display panel provided in an embodiment of the present invention;

[0050] Figure 9 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Detailed Implementation

[0051] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0052] As mentioned in the background section, analog drives are prone to color shifts and have high power consumption in display panels, while digital drives are not easy to achieve high resolution and high refresh rates. The inventors have discovered that the specific reasons are as follows:

[0053] The luminance of an analog-driven display is determined by the current magnitude (current density); the higher the current, the higher the luminance, and vice versa. For example, the data voltage range corresponding to grayscale levels from 0 to 255 is quite large, and the luminous efficiency of the light-emitting device varies significantly under different current densities. In particular, the luminous efficiency is very low at low current densities, resulting in high power consumption of the display panel. Furthermore, large variations in current density lead to significant changes in the color coordinates of the light-emitting device, making the display panel prone to color shifts.

[0054] Digital driving operates on a multi-subframe basis, with the current in each subframe being either a set value or zero. The brightness is primarily determined by the emission time. Therefore, digital driving can solve color shift and power consumption issues, but it requires a high refresh rate, making high resolution difficult to achieve. Taking 8-bit digital driving as an example: a frame is divided into 8 subframes, meaning the display panel needs to be scanned 8 times within one frame. The time allocated to each subframe is relatively short. To ensure sufficient charging time for each row in each subframe, the scan time for each row cannot be too short. Since the refresh rate of the display panel is negatively correlated not only with the scan time per row but also with the number of rows on the display panel, ensuring sufficient scan time for each row limits the number of rows on the display panel, thus restricting the resolution of the display panel.

[0055] Hybrid analog-to-digital (HMD) drivers can combine the advantages of both analog and digital drivers, but they are not conducive to achieving narrow bezel designs for display panels and are also more expensive. For example, Figure 1 This is a schematic diagram of an existing pixel driving circuit that can employ mixed analog-digital driving. Figure 2 yes Figure 1 The diagram shows the driving timing of the pixel driving circuit within a display frame. (Combined with...) Figure 1 and Figure 2 The pixel driving circuit is a 3T1C pixel driving circuit, including transistors T1, T2, and T3, and a storage capacitor C. The first terminal of transistor T1 is connected to the data voltage Vdata, the second terminal of transistor T1 is connected to the gate of transistor T3, the gate of transistor T1 is connected to the Scan signal, the first terminal of transistor T3 is connected to the first power supply signal VDD, the second terminal of transistor T3 is connected to the first terminal of the light-emitting device D, the second terminal of the light-emitting device D is connected to the second power supply signal VSS, the first terminal of transistor T2 is connected to the gate of transistor T3, the second terminal of transistor T2 is connected to the initialization signal VREF, the gate of transistor T2 is connected to the Clear signal, the first terminal of storage capacitor C is connected to the first terminal of transistor T3, and the second terminal of storage capacitor C is connected to the gate of transistor T3. The horizontal axis of this driving timing diagram is time, and the vertical axis is the number of rows (ROW) of the display panel.

[0056] Taking a display frame consisting of four subframes as an example, starting from the lighting time t1 of the first subframe: the Scan signal is sequentially written to transistor T1 of each row of pixel circuits, controlling transistor T1 to conduct, and the data voltage Vdata is written to the gate of transistor T3, thus lighting up the light-emitting device; starting from the turning-off time t2, the Clear signal is sequentially written to transistor T2 of each row of pixel circuits, controlling transistor T2 to conduct, and the initialization signal VREF is written to the gate of transistor T3, thus turning off the light-emitting device. Similarly, in the second subframe, starting from the lighting time t3, the light-emitting device lights up row by row, and starting from the turning-off time t4, the light-emitting device turns off row by row; in the third subframe, starting from the lighting time t5, the light-emitting device lights up row by row, and starting from the turning-off time t6, the light-emitting device turns off row by row; in the fourth subframe, starting from the lighting time t7, the light-emitting device lights up row by row, and starting from the turning-off time t8, the light-emitting device turns off row by row.

[0057] In this design, the data voltage Vdata controls the brightness of the light-emitting device, and the time difference between time t1 and time t2 is the light-emitting time of the device in that subframe. This time difference is controlled by the Scan and Clear signals. This hybrid analog-digital driving method requires two sets of scan driving circuits (GOA circuits) to be set up separately for the Scan and Clear signals. Compared with existing analog and digital driving methods, an additional GOA circuit is required, which is not conducive to the implementation of narrow bezel designs for display panels. Furthermore, the Clear signal waveform has multiple different pulse widths within a display frame, causing the driver IC to consume more logic resources to output the Clear signal, resulting in higher costs.

[0058] In view of this, embodiments of the present invention provide a driving method and display device for a display panel to improve the problems of large bezels and high costs associated with mixed analog-to-digital driving. Figure 3 This is a flowchart illustrating a display panel driving method provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 5 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention. Each display frame of the display panel includes at least two sub-frames, as shown in the reference diagram. Figure 3 The driving methods for the display panel include:

[0059] S11. Receive the target display grayscale and search for the corresponding data voltage group of the target display grayscale in the data voltage lookup table; wherein, the data voltage lookup table stores multiple display grayscales and data voltage groups that correspond one-to-one with the display grayscales, the display grayscales cover all target display grayscales, and the data voltage group includes at least two data voltages, and the at least two data voltages correspond one-to-one with at least two subframes.

[0060] Specifically, in combination Figure 4and Figure 5 The display panel includes a non-display area NAA and a display area AA. The non-display area NAA contains a driver chip 10. The display area AA contains pixel circuits PX arranged in an array. Each pixel circuit PX is electrically connected to a light-emitting device D, which can be an LED, μLED, or OLED, etc.

[0061] The pixel circuit PX includes a storage capacitor C, a driving transistor M0, and a data writing transistor M1. The first terminal of the storage capacitor C is connected to the first terminal of the driving transistor M0, and the second terminal of the storage capacitor C is connected to the gate of the driving transistor M0. The first terminal of the driving transistor M0 is connected to a first power supply signal VDD, and the second terminal of the driving transistor M0 is connected to the first terminal of the light-emitting device D. The second terminal of the light-emitting device D is connected to a second power supply signal VSS. The first terminal of the data writing transistor M1 is connected to a data signal, and the second terminal of the data writing transistor M1 is connected to the gate of the driving transistor M0. The gate of the data writing transistor M1 is connected to a first scan signal Scan1.

[0062] Display grayscale refers to the brightness of the light-emitting device D as perceived by the human eye within a display frame, while target display grayscale refers to the target display brightness of the light-emitting device D. The target display grayscale of the light-emitting device D can be generated and output by the driver chip 10. For example, the range of the target display grayscale of the light-emitting device D is 0 to 255 grayscale levels. The data voltage lookup table is a table storing multiple display grayscale levels and multiple data voltage groups of the light-emitting device D. One display grayscale level corresponds to one data voltage group, and the number of data voltages contained in a data voltage group corresponds to the number of subframes. The data voltage lookup table is shown in Table 1. For example, the display grayscale includes grayscale levels 0 to 255, thus covering all target display grayscale levels. The display frame is divided into four subframes, and the data voltage group includes four data voltages, each corresponding one-to-one with one of the four subframes. For instance, the data voltage lookup table includes a display grayscale section and a data voltage group section. The display grayscale section includes 256 display grayscale levels from 0 to 255, arranged vertically in Table 1. The data voltage group includes data voltages corresponding to four sub-frames. The setting of these data voltages is related to the displayed grayscale, and the combination of the data voltages of the four sub-frames can achieve that displayed grayscale. Specifically, Vdata0 represents the data voltage required when the light-emitting device is in a dark state; Vdata1 represents the data voltage required to illuminate only one sub-frame when the light-emitting device's brightness is 1 grayscale in a display frame; and so on, with Vdata67 representing the data voltage required to illuminate only one sub-frame when the light-emitting device's brightness is 67 grayscale in a display frame. That is, when the light-emitting device needs to display 1 grayscale, it only needs to be illuminated in one sub-frame, while the light-emitting device is in a dark state in other sub-frames, and the data voltage within the illuminated sub-frame is Vdata1. It can be understood that since a sub-frame is 1 / 4 of the display frame, the light-emitting time is reduced compared to existing analog drives. To achieve the perceived brightness of 1 grayscale by the human eye, the data voltage needs to be increased. Therefore, Vdata1 is greater than the data voltage corresponding to 1 grayscale in analog drives. This embodiment of the invention helps to narrow the range of data voltages, thereby improving color shift and power consumption issues.

[0063] There are several ways to combine the data voltages of the four subframes. They can all be data voltages Vdata0, all be non-zero grayscale data voltages (e.g., Vdata1 to Vdata67), or a combination of Vdata0 and non-zero grayscale data voltages. For example, grayscale 0 corresponds to four data voltages: Vdata0, Vdata0, Vdata0, and Vdata0. Grayscale 1 corresponds to four data voltages: Vdata1, Vdata0, Vdata0, and Vdata0. Grayscale 255 corresponds to four data voltages: Vdata67, Vdata67, Vdata67, and Vdata54, because 255 = 67 + 67 + 67 + 54. The three Vdata67 values ​​correspond to the first, second, and third subframes, respectively, and Vdata54 corresponds to the fourth subframe.

[0064] Table 1

[0065]

[0066] S12. Data driving is performed using all data voltages in the data voltage group within the corresponding sub-frame. For example, as shown in Table 1, all data voltages in the data voltage group include data voltages corresponding to four sub-frames. If the received target display grayscale is 255, by looking up the table in Table 1, 255 grayscale corresponds to a data voltage group horizontally. This data voltage group includes four data voltages: Vdata67, Vdata67, Vdata67, and Vdata54. These four data voltages are the data voltages corresponding to each sub-frame. Based on the correspondence between each data voltage and each sub-frame, data driving is performed using the four data voltages within the corresponding sub-frames to make the luminous brightness of the light-emitting device D correspond to its target display grayscale. Specifically, Vdata67 is used for data driving in its corresponding first sub-frame, Vdata67 is used for data driving in its corresponding second sub-frame, Vdata67 is used for data driving in its corresponding third sub-frame, and Vdata54 is used for data driving in its corresponding fourth sub-frame. Figure 4 As can be seen, the display panel includes pixel circuits arranged in an array. The grayscale of the corresponding light-emitting devices of each pixel circuit is not the same. It is necessary to look up the corresponding data voltage group for each light-emitting device in a table.

[0067] Figure 6 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention. Combined with... Figures 4 to 6For example, the display panel includes P rows of pixel circuits PX, where the first row of pixel circuits PX corresponds to the first scan signal Scan1_1, the second row of pixel circuits PX corresponds to the first scan signal Scan1_2, ..., the (P-1)th row of pixel circuits PX corresponds to the first scan signal Scan1_P-1, and the Pth row of pixel circuits PX corresponds to the first scan signal Scan1_P. The display frame is divided into four subframes, namely the first subframe SF1, the second subframe SF2, the third subframe SF3, and the fourth subframe SF4.

[0068] Within the first subframe SF1, the driver chip 10 sends a start signal STV, a first clock signal CLK1, and a second clock signal CLK2 to the GOA circuit. The GOA circuit then sequentially outputs first scan signals Scan1_1, Scan1_2, ..., Scan1_P-1, and Scan1_P to each row of pixel circuits PX on the display panel, completing the data driving within the first subframe SF1 of each data voltage group. Similarly, within the second subframe SF2, the third subframe SF3, or the fourth subframe SF4, the driver chip 10 sends a start signal STV, a first clock signal CLK1, and a second clock signal CLK2 to the GOA circuit. The driver chip then sequentially outputs first scan signals Scan1_1, Scan1_2, ..., Scan1_P-1, and Scan1_P to each row of pixel circuits PX on the display panel, completing the data driving within the second subframe SF2, the third subframe SF3, or the fourth subframe SF4 of each data voltage group. The display panel does not scan when the starting STV signal is high, and scans when the starting STV signal is low. The period of the clock signal is 2H.

[0069] As described above, the display panel driving method provided in this embodiment of the invention implements a novel analog-to-digital hybrid driving method for display panels by including at least two sub-frames in the display frame and establishing a data voltage lookup table for each sub-frame. Since the duration of each sub-frame is fixed, no additional Clear signal is required, thus eliminating the need for a corresponding GOA circuit for the Clear signal. This simplifies the setup of the display panel's GOA circuit and facilitates narrow bezel designs. Furthermore, this embodiment of the invention avoids consuming excessive logic resources in the driver chip to provide the Clear signal, contributing to low cost.

[0070] Based on the above embodiments, as shown in Table 1, optionally, for ease of understanding, the data voltage lookup table further includes a subframe grayscale selection section. The subframe division method of the subframe grayscale selection section is the same as that of the data voltage group section. The value of each subframe in the subframe grayscale selection section corresponds to the grayscale level of the data voltage display. The sum of the grayscale levels of all subframes is the display grayscale level of a display frame. For example, the display grayscale is grayscale 1. Grayscale 1 is implemented by a subframe grayscale combination of 1+0+0+0, wherein the subframe displaying grayscale 1 can be in the first subframe, and other subframes display grayscale 0; the subframe displaying grayscale 1 can also be in the second (or third, or fourth) subframe, and other subframes display grayscale 0.

[0071] Based on the above embodiments, there are alternative ways to establish the data voltage lookup table. Several of them will be described below, but they are not intended to limit the present invention.

[0072] Figure 7 This is a flowchart illustrating a method for establishing a data voltage lookup table according to an embodiment of the present invention. (Refer to...) Figure 7 The methods for establishing a data voltage lookup table include:

[0073] S21. Establish an initial lookup table; wherein, the initial lookup table includes multiple data voltages and display grayscale corresponding to different numbers of subframes for the data voltages.

[0074] The initial lookup table establishes the correspondence between data voltage, number of subframes, and display grayscale. If the data voltage remains constant, the display grayscale increases with the increase in the number of subframes; conversely, if the data voltage remains constant, the display grayscale decreases with the decrease in the number of subframes.

[0075] The assignment of display grayscale values ​​for data voltages corresponding to different numbers of subframes can be varied. In one embodiment of the present invention, optionally, if the number of data voltages in the initial lookup table is M and the number of subframes is N, then the display grayscale value for the m-th data voltage corresponding to n subframes is n*m; where M≥m≥0, N≥n≥2, and M, m, N, and n are all positive integers. This embodiment of the present invention uses this assignment method to assign data voltage values ​​corresponding to different numbers of subframes, making the assignment method simple and easy to implement.

[0076] For example, Table 2 is an initial lookup table provided in an embodiment of the present invention. Data voltages are arranged vertically from smallest to largest, and the number of displayed subframes is arranged horizontally from smallest to largest. Taking a display frame divided into four subframes as an example, when n=4, "n subframes" includes "1 subframe", "2 subframes", "3 subframes", and "4 subframes". When M=68, the number of data voltages is 68, namely the first data voltage Vdata0, the second data voltage Vdata1, ..., the m-th data voltage Vdatam-1, ..., the 68th data voltage Vdata67. The definitions of Vdata0 to Vdata67 are the same as in Table 1, and Table 1 can be obtained from Table 2. For example, within a display frame, if only one subframe uses the 54th data voltage Vdata54 for data driving, and all other subframes are 0, the corresponding display grayscale is 1×54=54. Within a single display frame, the grayscale level is 2×54=108 when the 54th data voltage Vdata54 is used for data driving in 2 subframes, 3×54=162 when the 54th data voltage Vdata54 is used for data driving in 3 subframes, and 4×54=216 when the 54th data voltage Vdata54 is used for data driving in 4 subframes.

[0077] Table 2

[0078]

[0079] S22. Based on the display grayscale, data voltage and number of subframes in the initial lookup table, combine the data voltages to establish a data voltage lookup table.

[0080] Specifically, the data voltage lookup table stores the correspondence between display grayscale levels and data voltage groups. Each data voltage group contains the correspondence between subframes and data voltages. Therefore, the data voltage groups corresponding to the display grayscale levels can be combined based on the display grayscale levels, the number of subframes, and the data voltages in the initial lookup table, thus completing the establishment of the data voltage lookup table. For example, if the display grayscale level is 54, the initial lookup table finds a data voltage Vdata54 with 1 subframe; correspondingly, the data voltage group is one Vdata54 and three Vdata0. It can also find a data voltage Vdata27 with 2 subframes; correspondingly, the data voltage group is two Vdata27 and two Vdata0. Furthermore, it can find a data voltage Vdata18 with 3 subframes; correspondingly, the data voltage group is three Vdata18 and one Vdata0. When establishing the data voltage lookup table, one of the above data voltage groups can be selected.

[0081] As shown in Table 2, the initial lookup table only covers the display grayscale for different numbers of subframes when displaying a single data voltage, and does not include all display grayscale levels from 0 to 255. Since the data voltages of each subframe within a display frame can be different, data voltage groups are obtained by combining the display grayscale levels from the initial lookup table. For example, if the display grayscale is 255, the initial lookup table finds a combination of display grayscale 201 and display grayscale 54. Specifically, the number of subframes for Vdata67 is 3, and the number of subframes for Vdata54 is 1. The data voltage group consists of three Vdata67 subframes and one Vdata54 subframe. The entire data voltage lookup table is then established in the same manner.

[0082] The technical solution of this invention establishes an initial lookup table before establishing a data voltage lookup table, thereby obtaining the correspondence between display grayscale, data voltage, and the number of subframes. This provides a basis for establishing the correspondence between display grayscale and data voltage groups, that is, it provides multiple possibilities for the correspondence between display grayscale and data voltage groups, so as to facilitate the efficient establishment of the data voltage lookup table.

[0083] Figure 8 This is a schematic flowchart of another display panel driving method provided in an embodiment of the present invention. (See reference) Figure 8 Based on the above embodiments, optionally, the driving method for the display panel includes:

[0084] S31. Establish an initial lookup table; wherein, the initial lookup table includes multiple data voltages and display grayscale corresponding to different numbers of subframes for the data voltages.

[0085] S32. Determine all display grayscale levels required when the display panel is used.

[0086] For example, determine that all required display gray levels are gray levels 0 to 255.

[0087] S33. Search sequentially in the initial lookup table for at least one combination of display gray levels corresponding to the display gray levels; the sum of all display gray levels in the combination is equal to the display gray level.

[0088] Specifically, by combining Table 2 and Table 1, the process of finding at least one combination of display gray levels corresponding to the display gray level in the initial lookup table is also the process of selecting the display gray level for each subframe, that is, determining the display gray levels corresponding to the four subframes under the corresponding display gray levels.

[0089] For example, referring to Table 2, at least one combination of display gray levels corresponding to display gray level 255 is a combination of display gray level 201 and display gray level 54, and the sum of display gray level 201 and display gray level 54 is equal to display gray level 255.

[0090] Optionally, there are multiple combinations of display grayscale corresponding to the display grayscale in the initial lookup table. Select the combination in which the sum of the number of subframes corresponding to all display grayscales is less than or equal to the number of subframes of the display panel.

[0091] For example, referring to Table 2, the combination of at least one display grayscale corresponding to grayscale 255 can also be a combination of display grayscale 54, display grayscale 134, display grayscale 50, and display grayscale 17. Display grayscale 54 corresponds to one subframe, display grayscale 134 corresponds to two subframes, display grayscale 50 corresponds to one subframe, and display grayscale 17 corresponds to one subframe. Thus, the sum of the number of subframes corresponding to all display grayscales is 5, while the display panel has 4 subframes. The sum of the number of subframes corresponding to all display grayscales is greater than the number of subframes on the display panel. Here, the sum of the number of subframes corresponding to all display grayscales refers to the sum of the number of subframes corresponding to all non-zero display grayscales. In the combination of display grayscale 201 and display grayscale 54 corresponding to display grayscale 255, display grayscale 201 corresponds to three subframes, and display grayscale 54 corresponds to one subframe. The sum of the number of subframes corresponding to all display grayscales is exactly equal to the number of subframes on the display panel. To ensure reliable display of grayscale, at least one combination of display grayscale 255 is selected as a combination of display grayscale 201 and display grayscale 54, that is, a combination in which the sum of the number of subframes corresponding to all display grayscales is less than or equal to the number of subframes of the display panel.

[0092] Preferably, the combination with the smallest sum of the number of subframes corresponding to all displayed gray levels and the largest data voltage is selected; wherein, the sum of the number of subframes corresponding to all displayed gray levels refers to the sum of the number of subframes corresponding to all non-zero displayed gray levels.

[0093] For example, a combination of at least one display grayscale corresponding to display grayscale 4 can be a combination of display grayscale 2 and display grayscale 2, or a combination consisting only of display grayscale 4. In the combination of display grayscale 2 and display grayscale 2, each of the two display grayscale 2 can correspond to one subframe, so the sum of the number of subframes is 2. In the combination consisting only of display grayscale 4, display grayscale 4 can correspond to one subframe, so the sum of the number of subframes is 1. To ensure a simpler driving method for the display panel, the combination with the smallest sum of the number of subframes corresponding to all display grayscales is selected, i.e., the combination consisting only of display grayscale 4 is selected. Furthermore, in the combination of display grayscale 2 and display grayscale 2, the data voltage corresponding to each of the two display grayscale 2 is Vdata2, while in the combination of display grayscale 4, the data voltage corresponding to display grayscale 4 is Vdata4. Since the largest data voltage between Vdata2 and Vdata4 is Vdata4, the combination containing Vdata4 is selected, i.e., the combination consisting only of display grayscale 4.

[0094] In other embodiments, a combination of the largest and smallest display gray levels corresponding to all display gray levels can be selected, where the difference between the two display gray levels is the magnitude of the difference between the two display gray levels.

[0095] For example, referring to Table 2, the combination of at least one display gray level corresponding to display gray level 255 can also be a combination of display gray level 60, display gray level 61, display gray level 67, and display gray level 67. Compared to the combination of display gray level 55, display gray level 66, display gray level 67, and display gray level 67, the difference between display gray level 67 and display gray level 60 is smaller in the combination of display gray level 60, display gray level 61, display gray level 67, and display gray level 67, which can make the current density more concentrated. Therefore, the combination of display gray level 60, display gray level 61, display gray level 67, and display gray level 67 is selected, that is, the combination in which the difference between the maximum and minimum display gray levels corresponding to all the aforementioned display gray levels is small.

[0096] In other embodiments, a combination with fewer types of data voltages corresponding to all grayscale levels can be selected, and different types of data voltages are data voltages of different magnitudes.

[0097] For example, the combination of at least one display grayscale corresponding to display grayscale 4 can be a combination of display grayscale 1, display grayscale 1, display grayscale 1, and display grayscale 1. Compared to the combination of display grayscale 1, display grayscale 1, display grayscale 1, and display grayscale 1, the combination of display grayscale 3 and display grayscale 1 has more types of data voltages. Choosing the combination of display grayscale 1, display grayscale 1, display grayscale 1, and display grayscale 1—that is, choosing the combination with fewer types of data voltages corresponding to all display grayscales—is beneficial for achieving a more concentrated current density.

[0098] In other embodiments, a combination is selected in which all display gray levels are sorted from smallest to largest and the differences between adjacent display gray levels are relatively small.

[0099] For example, at least one combination of display gray levels corresponding to display gray level 255 can also be a combination of display gray level 58, display gray level 63, display gray level 67, and display gray level 67. The combinations of display gray levels 58, 63, 67, and 67, ordered from smallest to largest, are display gray levels 58, 63, 67, and 67. The differences between adjacent display gray levels include display gray levels 5, 4, and 0, i.e., 63-58=5, 67-63=4, and 67-67=0. Similarly, the combinations of display gray levels 55, 66, 67, and 67, ordered from smallest to largest, are display gray levels 55, 66, 67, and 67. The grayscale level 67 is shown. The differences between two adjacent grayscale levels include grayscale levels 11, 1, and 0. It can be seen that, compared with the combination of grayscale levels 55, 66, 67, and 67, the combination of grayscale levels 58, 63, 67, and 67, after sorting all grayscale levels from smallest to largest, has smaller differences between adjacent grayscale levels. Therefore, choosing the combination of grayscale levels 58, 63, 67, and 67 is beneficial for reducing the power consumption noise of the display panel.

[0100] S34. Based on the data voltage corresponding to the gray level and the number of its subframes displayed in the initial lookup table, establish a data voltage group corresponding to the gray level.

[0101] For example, by combining Table 2 and Table 1, we can see that grayscale 201 is driven by Vdata67 data within three consecutive subframes, and grayscale 54 is driven by Vdata54 data within one subframe. Thus, grayscale 255 can be driven by Vdata54 data within one subframe and by Vdata67 data within three subframes. Therefore, we can establish the data voltage group corresponding to grayscale 255 as Vdata54, Vdata67, Vdata67, and Vdata67, with each of these groups corresponding to one subframe.

[0102] Preferably, if the number of data voltages corresponding to the combination of gray levels is less than the number of subframes, then 0 gray level is used to pad the number of subframes.

[0103] For example, by combining Table 2 and Table 1, the combination of at least one display grayscale corresponding to display grayscale 2 constitutes display grayscale 2. Display grayscale 2 is implemented by Vdata2 within one subframe. In this case, the number of data voltages corresponding to the combination of display grayscales is 1, while the number of subframes is 4. Therefore, display grayscale 0 can be used to fill in the gaps. Display grayscale 0 is implemented by Vdata0 within any number of subframes. Thus, display grayscale 2 can be implemented by Vdata2 within one subframe and Vdata0 within three subframes. Therefore, the data voltage group corresponding to display grayscale 2 can be established as Vdata2, Vdata0, Vdata0, and Vdata0, with each of Vdata2, Vdata0, Vdata0, and Vdata0 corresponding to one subframe.

[0104] Optionally, the relationship between data voltages among subframes in the grayscale combination includes at least one of the following: data voltage from small to large, data voltage from large to small, data voltage increasing then decreasing, and data voltage decreasing then increasing. The purpose of this setting is that, after determining the grayscale combination, the correspondence between data voltage and subframes can be varied, allowing for flexible configuration.

[0105] For example, referring to Table 1, the data voltage group 100 corresponding to grayscale 255 includes four data voltages: Vdata54, Vdata67, Vdata67, and Vdata67. Each of Vdata54, Vdata67, Vdata67, and Vdata67 corresponds to a subframe. The subframe corresponding to Vdata54 can be arbitrarily selected from the four subframes, namely the first subframe, the second subframe, the third subframe, and the fourth subframe. Similarly, the subframe corresponding to Vdata67 can also be arbitrarily selected from the first subframe, the second subframe, the third subframe, and the fourth subframe. Table 1 is only an example to illustrate that Vdata54, Vdata67, Vdata67, and Vdata67 correspond to the first subframe, the second subframe, the third subframe, and the fourth subframe, respectively.

[0106] S35. Receive the target display grayscale and search for the corresponding data voltage group of the target display grayscale in the data voltage lookup table; wherein, the data voltage lookup table stores multiple display grayscales and data voltage groups that correspond one-to-one with the display grayscales; the data voltage group includes at least two data voltages, and the at least two data voltages correspond one-to-one with at least two subframes.

[0107] S36. Use all data voltages in the data voltage group to drive the data in the corresponding subframe.

[0108] As described above, steps S31 to S36 complete the data voltage lookup table and the data driving process based on the data voltage lookup table, realizing a novel analog-to-digital hybrid driving method for display panels. The time length of each subframe is fixed, eliminating the need for an additional Clear signal and thus eliminating the need for a corresponding GOA circuit, simplifying the GOA circuit setup and facilitating narrow bezel designs for the display panel. Furthermore, this embodiment of the invention does not require excessive logic resources in the driver chip for the Clear signal, contributing to low cost.

[0109] In the above embodiments, optionally, each display frame is divided into at least two subframes on average, and the light emission duration of each subframe is equal. This setting is beneficial to simplify the assignment of display grayscale values ​​when the data voltage corresponds to different numbers of subframes. At this time, when the number of subframes is N, the light emission duration of each subframe is T / N, and the light emission duration of n subframes is n*(T / N), where T is the duration of a display frame.

[0110] In the above embodiments, optionally, at least two subframes are not evenly divided, and the emission duration of each subframe is not exactly equal. This arrangement allows for a wider selection of data voltage groups, thereby improving the flexibility of the drive design.

[0111] The above embodiments exemplify the division of the display frame into four subframes, which is not intended to limit the invention. In other embodiments, the display frame may be divided into two, three, five, or more subframes, which can be set as needed in practical applications.

[0112] Optionally, in the above embodiments, the data voltage lookup table is stored in the driver chip 10.

[0113] It should be noted that in this embodiment of the invention, after the range of grayscale is determined, the settings of M and N are complementary, that is, M can also be determined after N is determined. The number of M and N can be selected according to the actual situation: the larger N is, the more beneficial it is to increase the data voltage of low grayscale, but the charging time of each row of pixels on the display panel is shorter, and more physical space is needed to build a larger data voltage lookup table.

[0114] It should be noted that in the above embodiments, the driving method is described using a 2T1C pixel circuit as an example, which is not intended to limit the present invention. In other embodiments, the driving method is also applicable to a 7T1C pixel circuit.

[0115] Figure 9 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, for reference. Figure 9Preferably, the 7T1C pixel circuit includes: a storage capacitor C, a driving transistor M0, a data writing transistor M1, a compensation transistor M2, a first initialization transistor M3, a second initialization transistor M6, a first light-emitting control transistor M4, and a second light-emitting control transistor M5; the first terminal of the storage capacitor C is connected to the first terminal of the driving transistor M0, and the second terminal of the storage capacitor C is connected to the gate of the driving transistor M0; the first terminal of the driving transistor M0 is connected to the first terminal of the first light-emitting control transistor M4, and the second terminal of the first light-emitting control transistor M4 is connected to a first power supply signal VDD; the second terminal of the driving transistor M0 is connected to the first terminal of the second light-emitting control transistor M5, and the second terminal of the second light-emitting control transistor M5 is connected to the first terminal of the light-emitting device D, and the second terminal of the light-emitting device D is connected to a second power supply signal VSS; the gates of the first light-emitting control transistor M4 and the second light-emitting control transistor M5 are both connected to a light-emitting control signal EM;

[0116] The first terminal of the data writing transistor M1 is connected to the data signal, the second terminal of the data writing transistor M1 is connected to the first terminal of the driving transistor M0, and the gate of the data writing transistor M1 is connected to the first scan signal Scan1; the first terminal of the compensation transistor M2 is connected to the gate of the driving transistor M0, the second terminal of the compensation transistor M2 is connected to the second terminal of the driving transistor M0, and the gate of the compensation transistor M2 is connected to the first scan signal Scan1; the first terminal of the first initialization transistor M3 is connected to the initialization signal VREF, the second terminal of the first initialization transistor M3 is connected to the gate of the driving transistor M0, and the gate of the first initialization transistor M3 is connected to the second scan signal Scan2; the first terminal of the second initialization transistor M6 is connected to the initialization signal VREF, the second terminal of the second initialization transistor M6 is connected to the first terminal of the light-emitting device D, and the gate of the second initialization transistor M6 is connected to the second scan signal Scan2.

[0117] The initial lookup table, data voltage lookup table, and data voltage group selection for the 7T1C pixel circuit are the same as those for the 2T1C pixel circuit. Unlike the 2T1C pixel circuit's driving method, the 7T1C pixel circuit's driving process in each subframe includes an initialization phase, a data writing phase, and a light emission phase. The driving process in each subframe is similar to existing technologies and will not be elaborated upon here.

[0118] It should also be noted that the display panel driving method provided in the embodiments of the present invention is also applicable to modified circuits of 2T1C pixel circuits, modified circuits of 7T1C pixel circuits, and other forms of pixel circuits, and the present invention does not limit them.

[0119] This invention also provides a display device. The display device can be a Micro LED, OLED, or other display device. The display device includes a driver chip and a display panel. The driver chip drives the display panel using the driving method for the display panel provided in any of the above embodiments. The display device and the driving method for the display panel provided in this invention belong to the same inventive concept and therefore can achieve the same technical effects; repeated descriptions are unnecessary.

[0120] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A driving method for a display panel, characterized in that, Each display frame includes at least two subframes; the driving method includes: The target display grayscale is received, and the corresponding data voltage group is searched in the data voltage lookup table; wherein, the data voltage lookup table stores multiple display grayscales and data voltage groups that correspond one-to-one with the display grayscales, the display grayscales cover all the target display grayscales, and the data voltage group includes at least two data voltages, and the at least two data voltages correspond one-to-one with the at least two subframes; Data driving is performed within the corresponding subframe using all data voltages in the data voltage group. Before searching the data voltage group corresponding to the target display grayscale in the data voltage lookup table, the process also includes: An initial lookup table is established; wherein, the initial lookup table includes multiple data voltages and display grayscale corresponding to different numbers of subframes for the data voltages; Based on the display grayscale, the data voltage, and the number of subframes in the initial lookup table, a data voltage lookup table is established by combining the data voltages. The initial lookup table contains M data voltages, and the number of subframes is N; The display grayscale corresponding to the m-th data voltage when the number of subframes is n is: Where M≥m≥0, N≥n≥2, and M, m, N and n are all positive integers.

2. The driving method for the display panel according to claim 1, characterized in that, Establishing a data voltage lookup table includes: Determine all the display grayscale levels required for the display panel to display; In the initial lookup table, at least one combination of the display gray levels corresponding to the display gray level is searched sequentially; the sum of all the display gray levels in the combination is equal to the display gray level. Based on the data voltage corresponding to the displayed grayscale and the number of its subframes in the initial lookup table, a data voltage group corresponding to the displayed grayscale is established.

3. The driving method for the display panel according to claim 2, characterized in that, If the number of data voltages corresponding to the combination of display gray levels is less than the number of subframes, then 0 gray level is used to pad the number of subframes.

4. The driving method for the display panel according to claim 3, characterized in that, There are multiple combinations of display grayscale corresponding to the display grayscale in the initial lookup table. Select the combination in which the sum of the number of subframes corresponding to all the display grayscales is less than or equal to the number of subframes of the display panel.

5. The driving method for a display panel according to claim 4, characterized in that, Select the combination that minimizes the sum of the number of subframes corresponding to all the displayed gray levels and maximizes the data voltage; Alternatively, select the combination with the fewest types of data voltages corresponding to all of the aforementioned display grayscale levels, where different types of data voltages are different magnitudes of data voltages; Alternatively, select the combination of the largest and smallest display gray levels corresponding to all the aforementioned display gray levels, where the difference between the two display gray levels is the magnitude of the difference between the two display gray levels; Alternatively, select a combination of all the displayed gray levels that are sorted from smallest to largest, where the difference between any two adjacent displayed gray levels is small.

6. The driving method for a display panel according to claim 3, characterized in that, The relationship between the data voltages of each subframe in the combination of display grayscale includes at least one of the following: Data voltage increases from small to large, data voltage decreases from large to small, data voltage increases first and then decreases, and data voltage decreases first and then increases.

7. The driving method for a display panel according to claim 1, characterized in that, Each display frame is divided into at least two subframes, and each subframe has an equal light emission duration.

8. The driving method for a display panel according to claim 1, characterized in that, The display panel includes pixel circuits arranged in an array. The data voltage is applied to the pixel circuits to generate a corresponding driving current, which drives the light-emitting device to emit light.

9. The driving method for a display panel according to claim 8, characterized in that, The pixel circuit includes a 2T1C pixel circuit or a 7T1C pixel circuit.

10. The driving method for a display panel according to claim 9, characterized in that, The 2T1C pixel circuit includes: a storage capacitor, a driving transistor, and a data writing transistor; The first terminal of the storage capacitor is connected to the first terminal of the driving transistor, and the second terminal of the storage capacitor is connected to the gate of the driving transistor. The first terminal of the driving transistor is connected to a first power supply signal, the second terminal of the driving transistor is connected to the first terminal of the light-emitting device, and the second terminal of the light-emitting device is connected to a second power supply signal. The first terminal of the data writing transistor is connected to a data signal, the second terminal of the data writing transistor is connected to the gate of the driving transistor, and the gate of the data writing transistor is connected to a first scan signal.

11. The driving method for a display panel according to claim 9, characterized in that, The 7T1C pixel circuit includes a storage capacitor, a driving transistor, a data writing transistor, a compensation transistor, a first initialization transistor, a second initialization transistor, a first light-emitting control transistor, and a second light-emitting control transistor. The first terminal of the storage capacitor is connected to the first terminal of the driving transistor, and the second terminal of the storage capacitor is connected to the gate of the driving transistor. The first terminal of the driving transistor is connected to the first terminal of the first light-emitting control transistor, the second terminal of the first light-emitting control transistor is connected to a first power supply signal, the second terminal of the driving transistor is connected to the first terminal of the second light-emitting control transistor, the second terminal of the second light-emitting control transistor is connected to the first terminal of the light-emitting device, and the second terminal of the light-emitting device is connected to a second power supply signal; the gates of the first light-emitting control transistor and the gates of the second light-emitting control transistor are both connected to light-emitting control signals. The first terminal of the data writing transistor is connected to a data signal, the second terminal of the data writing transistor is connected to the first terminal of the driving transistor, and the gate of the data writing transistor is connected to a first scan signal. The first terminal of the compensation transistor is connected to the gate of the driving transistor, the second terminal of the compensation transistor is connected to the second terminal of the driving transistor, and the gate of the compensation transistor is connected to the first scan signal. The first terminal of the first initialization transistor is connected to an initialization signal, the second terminal of the first initialization transistor is connected to the gate of the driving transistor, and the gate of the first initialization transistor is connected to a second scan signal. The first terminal of the second initialization transistor is connected to the initialization signal, the second terminal of the second initialization transistor is connected to the first terminal of the light-emitting device, and the gate of the second initialization transistor is connected to the second scan signal.

12. A display device, characterized in that, It includes a driver chip and a display panel, wherein the driver chip drives the display panel using the driving method of the display panel as described in any one of claims 1-11.

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