Three-phase current sampling equipment and systems, methods, and non-volatile storage media

By sampling and differentially amplifying the three-phase current through an inverter circuit, a sampling circuit, and a differential amplifier circuit, the problem of low sampling frequency caused by complex processor calculations is solved, and high-precision three-phase current sampling and control are achieved.

CN116577548BActive Publication Date: 2026-03-10GREE ELECTRIC APPLIANCE INC OF ZHUHAI
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-05-10
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In existing technologies, the processor needs to perform complex calculations each time it reads the three-phase current sample value, resulting in a low sampling frequency and affecting sampling accuracy and control accuracy.

Method used

By employing an inverter circuit, a sampling circuit, and a differential amplifier circuit, the computational complexity of the processor is reduced and the sampling frequency is increased by sampling and differentially amplifying the current of any two phases in the three-phase current.

Benefits of technology

This achieves increased sampling frequency, improved sampling accuracy and control precision, simplifies the processor's computational burden, and improves the current sampling efficiency of the three-phase inverter.

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Abstract

This application discloses a three-phase current sampling device, system, method, and non-volatile storage medium. The sampling device includes an inverter circuit, a sampling circuit, a differential amplifier circuit, and a processor. The inverter circuit is connected to the sampling circuit. The sampling circuit, connected to the differential amplifier circuit, is used to sample the current of any two phases of the three-phase current separately. The differential amplifier circuit, connected to the processor, is used to perform differential amplification on the sampled signal of the current of any one phase of the two phases to obtain a first signal; and to perform differential amplification on the sampled signals of the current of any two phases to obtain a second signal. The processor, connected to the inverter circuit, is used to control the output waveform of the inverter circuit based on the first and second signals. This application solves the technical problem that the low sampling frequency caused by the processor performing complex calculations each time a sample value is read, thus affecting the sampling accuracy, is due to the high sampling frequency.
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Description

Technical Field

[0001] This application relates to the field of current sampling technology, and more specifically, to a three-phase current sampling device, system, method, and non-volatile storage medium. Background Technology

[0002] In motor drives and three-phase inverters, current sampling serves as the foundation for three-phase inverter control, playing a crucial role. Common phase current sampling methods include three-resistor current sampling, two-resistor current sampling, and single-resistor current sampling. The sampled current value instantaneously represents one or more of the three-phase current values. Subsequent control of the three-phase inverter requires Clark and Park conversions within the MCU, followed by subtraction with the target value for PID control. The MCU outputs a PWM signal to control the inverter's output, ensuring it produces ideal current and voltage waveforms.

[0003] However, the MCU needs to perform complex calculations every time it reads a sample value. The calculation speed is obviously negatively correlated with the sampling frequency, and the reduction of the sampling frequency will affect the sampling accuracy and the control accuracy.

[0004] There is currently no effective solution to the above problems. Summary of the Invention

[0005] This application provides a three-phase current sampling device, system, method, and non-volatile storage medium to at least solve the technical problem that the sampling frequency is low and thus affects the sampling accuracy because the processor performs complex calculations every time it reads a sample value.

[0006] According to one aspect of the embodiments of this application, a three-phase current sampling device is provided, comprising: an inverter circuit, a sampling circuit, a differential amplifier circuit, and a processor. The inverter circuit, connected to the sampling circuit, is used to convert a single-phase current supplied by an external power source into a three-phase current. The sampling circuit, connected to the differential amplifier circuit, is used to sample the current of any two phases of the three-phase current separately to obtain sampling signals, and inputs the sampling signals to the differential amplifier circuit. The differential amplifier circuit, connected to the processor, is used to perform differential amplification on the sampling signal of the current of any one phase of any two phases to obtain a first signal; and to perform differential amplification on the sampling signals of the current of any two phases to obtain a second signal. The processor, connected to the inverter circuit, is used to control the output waveform of the inverter circuit based on the first and second signals.

[0007] Optionally, the sampling circuit includes: a first sampling circuit and a second sampling circuit, wherein the first sampling circuit includes at least: a first sampling resistor for sampling a first current, wherein the first current is the current of any one phase of the three-phase current; the second sampling circuit includes at least: a second sampling resistor for sampling a second current, wherein the second current is the current of any two phases of the current other than the first current.

[0008] Optionally, the differential amplifier circuit includes a first differential amplifier circuit and a second differential amplifier circuit, wherein the first differential amplifier circuit is used to perform differential amplification operation on the first current to obtain a first signal; and the second differential amplifier circuit is used to perform differential amplification operation on the first current and the second current to obtain a second signal.

[0009] Optionally, the first differential amplifier circuit includes: a first current-limiting element, a second current-limiting element, a third current-limiting element, and a first operational amplifier. The first current-limiting element is connected in series with the first sampling resistor to form a first series circuit, which is connected to the first input terminal of the first operational amplifier. The second current-limiting element is connected in parallel with the first sampling resistor to form a first parallel circuit, which is connected to the second input terminal of the first operational amplifier. The third current-limiting element is disposed between the input and output terminals of the first operational amplifier and connected in parallel with the first parallel circuit to return the first output signal of the first operational amplifier to the second input terminal, thereby forming negative feedback. The first operational amplifier receives the first current and differentially amplifies it to obtain a first signal.

[0010] Optionally, the first differential amplifier circuit further includes: a first bias circuit, connected in parallel with the first series circuit, for providing a bias voltage to the first operational amplifier.

[0011] Optionally, the second differential amplifier circuit includes: a fourth current-limiting element, a fifth current-limiting element, a sixth current-limiting element, and a second operational amplifier. The fourth current-limiting element is connected in series with the first sampling resistor to form a second series circuit, which is connected to the third input terminal of the second operational amplifier. The fifth current-limiting element is connected in series with a second parallel circuit formed by the first and second sampling resistors to form a third series circuit, which is connected to the fourth input terminal of the second operational amplifier. The sixth current-limiting element is disposed between the input and output terminals of the second operational amplifier and connected in parallel with the third series circuit. It is used to return the second output signal of the second operational amplifier to the fourth input terminal to form negative feedback. The second operational amplifier is used to receive the first current and the second current, and differentially amplify the first current and the second current to obtain the second signal.

[0012] Optionally, the second sampling and amplification circuit further includes a second bias circuit, connected in parallel with the second series circuit, for providing a bias voltage to the second operational amplifier.

[0013] Optionally, the resistance values ​​of the first sampling resistor and the second sampling resistor are equal.

[0014] According to another aspect of the embodiments of this application, a three-phase current sampling system is also provided, including: an external power supply, a three-phase current sampling device, and an electrical device, wherein the external power supply is connected to the three-phase current sampling device and the electrical device respectively, and is used to provide single-phase power to the electrical device; the three-phase current sampling device is used to convert single-phase power into three-phase power and sample the three-phase power; and the electrical device is used to operate on the three-phase power.

[0015] According to another aspect of the embodiments of this application, a three-phase current sampling method is also provided, applied to a three-phase current sampling device, comprising: sampling the current of any two phases of the three-phase current separately to obtain sampling signals; performing differential amplification operation on the sampling signal of the current of any one phase of the current of any two phases to obtain a first signal; performing differential amplification operation on the sampling signals of the current of any two phases to obtain a second signal; and performing coordinate transformation and pulse width modulation on the first signal and the second signal to obtain a target signal for controlling the output waveform of the inverter circuit.

[0016] According to another aspect of the embodiments of this application, a non-volatile storage medium is also provided, the storage medium including a stored program, wherein the program, when running, controls the device where the storage medium is located to execute the above-mentioned three-phase current sampling method.

[0017] In this embodiment, an inverter circuit, a sampling circuit, a differential amplifier circuit, and a processor are employed. The inverter circuit, connected to the sampling circuit, converts the single-phase current supplied by an external power source into a three-phase current. The sampling circuit, connected to the differential amplifier circuit, samples the current of any two phases of the three-phase current separately to obtain sampling signals, and inputs these sampling signals to the differential amplifier circuit. The differential amplifier circuit, connected to the processor, performs differential amplification on the sampling signal of any one phase of the current from any two phases to obtain a first signal; and performs differential amplification on the sampling signals of the current from any two phases to obtain a second signal. The processor, connected to… The inverter circuit is connected to control the output waveform of the inverter circuit based on the first signal and the second signal. By performing differential amplification on the sampled signal of the current in any one of the two phases of the current, the first signal is obtained, and by performing differential amplification on the sampled signal of the current in any two phases of the current, the second signal is obtained. The processor controls the output waveform of the inverter circuit based on the first signal and the second signal, thereby reducing the computational complexity of the processor and thus achieving the technical effect of increasing the sampling frequency and improving the sampling accuracy. This solves the technical problem that the low sampling frequency caused by the processor performing complex calculations every time a sample value is read, which affects the sampling accuracy. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0019] Figure 1 This is a schematic diagram of the structure and control flow of a three-phase current sampling system based on relevant technologies;

[0020] Figure 2 This is a structural diagram of a three-phase current sampling device according to an embodiment of this application;

[0021] Figure 3 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0022] Figure 4 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0023] Figure 5 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0024] Figure 6 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0025] Figure 7 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0026] Figure 8 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application;

[0027] Figure 9 This is a structural diagram of a first differential amplifier circuit according to an embodiment of this application;

[0028] Figure 10 This is a structural diagram of a second differential amplifier circuit according to an embodiment of this application;

[0029] Figure 11 This is a structural diagram of a three-phase current sampling system according to an embodiment of this application;

[0030] Figure 12 This is a structural diagram of another three-phase current sampling system according to an embodiment of this application;

[0031] Figure 13 This is a flowchart of a three-phase current sampling method according to an embodiment of this application. Detailed Implementation

[0032] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0033] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0034] Figure 1This is a schematic diagram of the structure and control flow of a three-phase current sampling system based on relevant technologies. Q1 to Q6 are six MOSFETs or IGBTs, serving as power switches in the full-bridge inverter. They are used to invert the DC power supplied by the external power source P, converting it into the three-phase AC power required by the electrical equipment. PMSM or BLDC represents the three-phase electrical equipment, either a permanent magnet synchronous motor or a brushless DC motor. RS1 is the sampling resistor for phase A current, used to sample the phase A current. RS2 is the sampling resistor for phase B current, used to sample the phase B current. Operational amplifier 1 is the sampling amplifier for phase A current, used to differentially amplify the phase A current. Operational amplifier 2 is the sampling amplifier for phase B current, used to differentially amplify the phase B current. The MCU is the inverter's control chip, which reads the sampled values ​​amplified by the operational amplifiers, calculates the corresponding phase current, and then, through coordinate transformation and corresponding control methods, finally outputs a PWM signal to drive the inverter.

[0035] In related technologies, the sampled current value is instantaneously one or more of the current values ​​of phases A, B, and C. Subsequent control of the three-phase inverter requires Clark and Park conversions in the MCU, followed by subtraction with the target value and PID control. The MCU outputs a PWM signal to control the inverter's output, ensuring ideal current and voltage waveforms. However, the MCU needs to perform calculations each time a sampled value is read. The sampling and calculation speed limits the sampling frequency, preventing it from being too high. The sampling frequency often affects the sampling accuracy and control precision. To address this issue, this application provides a related solution, detailed below.

[0036] Figure 2 This is a structural diagram of a three-phase current sampling device according to an embodiment of this application, such as... Figure 2 As shown, the device includes: an inverter circuit 2, a sampling circuit 4, a differential amplifier circuit 6, and a processor 8, wherein,

[0037] Inverter circuit 2, connected to sampling circuit 4, is used to convert single-phase current supplied by external power supply into three-phase current.

[0038] Sampling circuit 4, connected to differential amplifier circuit 6, is used to sample the current of any two phases of the three-phase current separately to obtain the sampling signal, and input the sampling signal to differential amplifier circuit 6;

[0039] The differential amplifier circuit 6, connected to the processor 8, is used to perform differential amplification on the sampled signal of the current in any one of the two phases of the current to obtain a first signal; and to perform differential amplification on the sampled signal of the current in any two phases to obtain a second signal.

[0040] The processor 8 is connected to the inverter circuit 2 and is used to control the output waveform of the inverter circuit 2 based on the first signal and the second signal.

[0041] According to an optional embodiment of this application, the inverter circuit 2 converts the DC power supplied by an external power source into three-phase AC power required by the three-phase electrical equipment. AC power refers to an electrical signal that alternates between positive and negative signals in the time domain and has a relatively high frequency. For example, three-phase AC power includes phase A, phase B, and phase C. Optionally, the inverter circuit 2 includes six MOSFETs or IGBTs as power switching transistors in the full-bridge inverter. A MOSFET, also known as a metal-oxide-semiconductor field-effect transistor, is a semiconductor device that uses MOS capacitors to establish a channel.

[0042] Sampling circuit 4 is used to sample the three-phase alternating current. The sampling current includes a first sampling current and a second sampling current. The first sampling current includes the X-phase current, and the second sampling current includes the X-phase current and the Y-phase current. The X-phase is any one of phases A, B, and C, and the Y-phase is any one of phases A, B, and C other than phase X. For example, the first sampling current is the A-phase current, and the second sampling current is the B-phase current; or, the first sampling current is the B-phase current, and the second sampling current is the C-phase current; or, the first sampling current is the A-phase current, and the second sampling current is the C-phase current.

[0043] For example, the sampling currents are phase A current and phase B current. The differential amplifier circuit 6 is used to differentially amplify the phase A current to obtain an amplified signal including the phase A current, i.e., the first signal; it is also used to amplify the phase A current and phase B current to obtain an amplified signal including the difference between the phase A current and phase B current, i.e., the second signal.

[0044] Processor 8 is the control chip of the inverter. Processor 8 reads the first and second signals output by the operational amplifier circuit, calculates the corresponding Clark coordinate current, and then outputs a PWM signal to drive the inverter through coordinate transformation and corresponding control mode.

[0045] The Clark transform is a mathematical method for converting between three-phase and two-phase signals. The Clark transform decomposes a three-phase sinusoidal signal into a DC component aligned with the zero-degree axis (also known as the A / B / C axis) and a rotating magnetic field. Simultaneously, the Clark transform yields fundamental vectors (α, β), which can be further processed for functions such as feedback calculations. Specifically, for sinusoidal voltage or current parameters ABC, when performing the Clark transform, first, classification is required. Similar to a nearest-neighbor convolutional sampling (AD) sampler, three analog input data sources ABC are acquired. The sum of these inputs is balanced to zero by considering the power of each element of the ABC signal within a discrete frame. Then, the three input values ​​are multiplied by an appropriate scaling factor and subjected to complex calculations to obtain two output values, α and β. These outputs represent the vector lengths resulting from projecting the original signal along a specific coordinate system into a new space. The final results represent the vector information required for visualizing the original three-phase system in a two-dimensional plane.

[0046] According to the above device, by performing differential amplification operation on the sampling signal of the current in any one of the two phases of the current, a first signal is obtained, and by performing differential amplification operation on the sampling signals of the current in any two phases, a second signal is obtained. The processor 8 controls the output waveform of the inverter circuit 2 based on the first and second signals, thereby reducing the computational complexity of the processor 8 and achieving the technical effect of increasing the sampling frequency and thus improving the sampling accuracy.

[0047] In addition, the above-mentioned equipment is simple and easy to implement, makes current sampling of three-phase inverters more convenient, and has high reliability.

[0048] Figure 3 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 3 As shown, the sampling circuit 4 includes: a first sampling circuit 40 and a second sampling circuit 42, wherein,

[0049] The first sampling circuit 40 includes at least: a first sampling resistor 402 for sampling a first current, wherein the first current is the current of any one phase of the three-phase current; the second sampling circuit 42 includes at least: a second sampling resistor 422 for sampling a second current, wherein the second current is the current of any two phases of the current other than the first current.

[0050] For example, the first sampling resistor 402 is used to sample the phase A current to obtain I. a The second sampling resistor 422 is used to sample the B-phase current to obtain I. b The first sampling resistor 402 and the second sampling resistor 422 have the same resistance value, which is set as RS.

[0051] Figure 4 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 4 As shown, the differential amplifier circuit 6 includes a first differential amplifier circuit 60 and a second differential amplifier circuit 62, wherein,

[0052] The first differential amplifier circuit 60 is used to perform differential amplification on the first current to obtain the first signal; the second differential amplifier circuit 62 is used to perform differential amplification on the first current and the second current to obtain the second signal.

[0053] Differential amplification is a signal processing technique used to increase the amplitude of an input signal. The differential amplifier circuit 6 is a basic analog circuit capable of amplifying and outputting the difference between two input signals. For example, the first differential amplifier circuit 60 is used to amplify the difference between I and I signals. a Differential amplification is performed, and the second differential amplifier circuit 62 is used to amplify I. a and I b Perform differential amplification.

[0054] Figure 5 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 5 As shown, the first differential amplifier circuit 60 includes: a first current limiting element 602, a second current limiting element 604, a third current limiting element 606, and a first operational amplifier 608, wherein,

[0055] The first current limiting element 60 is connected in series with the first sampling resistor 402 to form a first series circuit, which is connected to the first input terminal of the first operational amplifier 608. The second current limiting element 604 is connected in parallel with the first sampling resistor 402 to form a first parallel circuit, which is connected to the second input terminal of the first operational amplifier 608. The third current limiting element 606 is disposed between the input and output terminals of the first operational amplifier 608 and is connected in parallel with the first parallel circuit. It is used to return the first output signal of the first operational amplifier 608 to the second input terminal to form negative feedback. The first operational amplifier 608 is used to receive the first current and differentially amplify the first current to obtain the first signal.

[0056] As an optional embodiment of this application, the first current limiting element 602 and the second current limiting element 604 are differential input resistors with equal resistance values, denoted as 'a'; the third current limiting element 606 is the feedback resistor in the differential amplifier circuit 6, denoted as K1*a.

[0057] An operational amplifier is a high-gain DC differential amplifier circuit that can convert minute signals into voltage output signals that meet the requirements.

[0058] Figure 6 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 6 As shown, the first differential amplifier circuit 60 further includes a first bias circuit 6010, which is connected in parallel with the first series circuit and is used to provide a bias voltage to the first operational amplifier 608.

[0059] It's understandable that the bias voltage in a differential amplifier circuit refers to the voltage applied to ensure a good response from the input signal of the differential pair. Generally, it doesn't change with the input signal. During differential amplifier operation, controlling the bias voltage can improve gain, enhance operating point stability, and suppress spurious interference. Common biasing methods include fixed DC bias and dynamic adaptive bias. Fixed DC bias involves applying a constant voltage across the differential pair to control the output node to resemble the quiescent operating point of a power amplifier. If no external AC signal is input, the differential reference line (i.e., the output) will remain at this static position, meaning the gain is optimal.

[0060] The first bias circuit 6010 includes a bias voltage source U. ref , and U ref The corresponding bias resistor. In summary, the output value U of the first operational amplifier 608... o1 =U ref +K1*RS*I a . Will U o1 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the phase A current I can be obtained. a =(U o1 -U ref ) / (K1*RS), through the Clark transform, we obtain I. α =I a =(U o1 -U ref ) / (K1*RS).

[0061] Figure 7 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 7 As shown, the second differential amplifier circuit 62 includes: a fourth current-limiting element 622, a fifth current-limiting element 624, a sixth current-limiting element 626, and a second operational amplifier 628, wherein,

[0062] The fourth current-limiting element 622 is connected in series with the first sampling resistor 402 to form a second series circuit, which is connected to the third input terminal of the second operational amplifier 628. The fifth current-limiting element 624 is connected in series with the second parallel circuit formed by the first sampling resistor 402 and the second sampling resistor 422 to form a third series circuit, which is connected to the fourth input terminal of the second operational amplifier 628. The sixth current-limiting element 626 is disposed between the input and output terminals of the second operational amplifier 628 and is connected in parallel with the third series circuit. It is used to return the second output signal of the second operational amplifier 628 to the fourth input terminal to form negative feedback. The second operational amplifier 628 is used to receive the first current and the second current, and differentially amplify the first current and the second current to obtain the second signal.

[0063] As another optional embodiment of this application, the fourth current limiting element 622 and the fifth current limiting element 624 are differential input resistors with equal resistance values, and their resistance values ​​are both set to b; the sixth current limiting element 626 is a feedback resistor in the differential amplifier circuit 6, and its resistance value is set to K2*b.

[0064] Figure 8 This is a structural diagram of another three-phase current sampling device according to an embodiment of this application, such as... Figure 8 As shown, the second sampling and amplification circuit also includes a second bias circuit 6210, which is connected in parallel with the second series circuit and is used to provide a bias voltage to the second operational amplifier 628.

[0065] In an optional embodiment, the second bias circuit 6210 includes a bias voltage source U. ref , and U ref The corresponding bias resistor. The output value U of the second operational amplifier 628. o2 =U ref +K2*RS*(I b -I a ). Will U o2 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the current difference (I) between phase B and phase A can be obtained. b -I a )=(U o2 -U ref ) / (K2*RS), Simplified And thus obtain

[0066] In summary, this application eliminates the need for current reconstruction and Clark transformation within the MCU; I can be obtained directly through simple calculations using operational amplifiers and the MCU. α and I β.

[0067] Figure 9 This is a structural diagram of a first differential amplifier circuit according to an embodiment of this application, such as... Figure 9 As shown, RS1 is the A-phase current sampling resistor, with a resistance value of RS; R11 and R12 are differential input resistors with equal resistance values, both denoted as a; R13 is the feedback resistor, with a resistance value of K1*a; R10 is the bias voltage U. ref The bias resistor is used to provide the bias voltage; op-amp 1 is a sampling amplifier for the A-phase current, used for sampling and amplifying the A-phase current.

[0068] The output value U of op-amp 1 o1 =U ref +K1*RS*I a . Will U o1 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the phase A current I can be obtained. a =(U o1 -U ref ) / (K1*RS), through the Clark transform, we obtain I. α =I a =(U o1 -U ref ) / (K1*RS).

[0069] Figure 10 This is a structural diagram of a second differential amplifier circuit according to an embodiment of this application, such as... Figure 10 As shown, RS1 is the A-phase current sampling resistor, RS2 is the B-phase current sampling resistor, and the resistance value of RS1 and RS2 is set to RS; R21 and R22 are differential input resistors with equal resistance values, and their resistance values ​​are set to b; R23 is the feedback resistor, and its resistance value is set to K2*b; R20 is the bias voltage U. ref The bias resistor is used to provide the bias voltage; op-amp 2 is a sampling amplifier for the A-phase current and the B-phase current, used for sampling and amplifying the A-phase current and the B-phase current.

[0070] The output value U of op-amp 2 o2 =U ref +K2*RS*(I b -I a ). Will U o2 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the current difference (I) between phase B and phase A can be obtained. b -I a )=(U o2 -U ref ) / (K2*RS), Simplified And thus obtain

[0071] Figure 11 This is a structural diagram of a three-phase current sampling system according to an embodiment of this application, as shown below. Figure 11 As shown, the system includes: an external power supply 1102, a three-phase current sampling device 1104, and electrical equipment 1106, wherein,

[0072] An external power supply 1102 is connected to a three-phase current sampling device 1104 and an electrical device 1106, respectively, and is used to provide single-phase power to the electrical device 1106.

[0073] The three-phase current sampling device 1104 is Figure 2 The sampling device shown is used to convert single-phase electricity into three-phase electricity and to sample the three-phase electricity.

[0074] Electrical equipment 1106 is used for operation on three-phase electricity.

[0075] Figure 12 This is a structural diagram of another three-phase current sampling system according to an embodiment of this application, such as... Figure 12 As shown, the system includes: a motor module, an inverter module, a sampling resistor module, an operational amplifier module, and an MCU computing module.

[0076] The motor module is the load at the three-phase output terminal, which is the electrical appliance;

[0077] An inverter module is used to convert direct current into three-phase alternating voltage or current required by electrical appliances.

[0078] The sampling resistor module is used to sample the inverter current and output the signal to the operational amplifier module;

[0079] The operational amplifier module is used to amplify the current signal and transmit the amplified value to the MCU;

[0080] The MCU calculation module is used to calculate the sampled signal and adjust it according to the corresponding algorithm to output the corresponding inverter's switching gate signal.

[0081] Specifically, the output value U of operational amplifier 1 o1 =U ref +K1*RS*I a . Will U o1 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the phase A current I can be obtained. a =(U o1 -U ref ) / (K1*RS), through CLARK transformation, to obtain I α =I a =(U o1 -U ref) / (K1*RS).

[0082] The output value U of op-amp 2 o2 =U ref +K2*RS*(I b -I a ). Will U o2 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the current difference (I) between phase B and phase A can be obtained. b -I a )=(U o2 -U ref ) / (K2*RS), Simplified And thus obtain The MCU outputs a PWM signal to control the inverter's output, enabling the inverter to output ideal current and voltage waveforms.

[0083] According to the above system, by performing differential amplification on the sampling signal of the current in any one of the two phases of the current, a first signal is obtained, and by performing differential amplification on the sampling signal of the current in any two phases, a second signal is obtained. The processor controls the output waveform of the inverter circuit based on the first and second signals, thereby reducing the computational complexity of the processor and achieving the technical effect of increasing the sampling frequency and thus improving the sampling accuracy.

[0084] Figure 13 This is a flowchart of a three-phase current sampling method according to an embodiment of this application, such as... Figure 13 As shown, the method includes:

[0085] Step S1302: Sample the current of any two phases of the three-phase current to obtain the sampled signal.

[0086] Step S1304: Perform differential amplification on the sampled signal of the current in any one of the two current phases to obtain the first signal.

[0087] Step S1306: Perform differential amplification on the sampled signals of the currents of any two phases to obtain the second signal.

[0088] Step S1308: Perform coordinate transformation and pulse width modulation on the first signal and the second signal to obtain the target signal used to control the output waveform of the inverter circuit 2.

[0089] As an optional embodiment of this application, the A-phase current is sampled through the first sampling resistor 402 to obtain I. a The B-phase current is sampled using the second sampling resistor 422 to obtain I. bThe resistance values ​​of the first sampling resistor 402 and the second sampling resistor 422 are equal, and are set as RS.

[0090] Through the first differential amplifier circuit 60, I... a Differential amplification is performed, and I is amplified through the second differential amplifier circuit 62. a and I b Perform differential amplification.

[0091] Let the differential input resistor in the first differential amplifier circuit 60 have a resistance value of a, and the feedback resistor have a resistance value of K1*a; let the differential input resistor in the second differential amplifier circuit 62 have a resistance value of b, and the feedback resistor have a resistance value of K2*b.

[0092] to I a Perform differential amplification to obtain U o1 =U ref +K1*RS*I a That is, the first signal; for I b Perform differential amplification to obtain U o2 =U ref +K2*RS*(I b -I a ), that is, the second signal.

[0093] Will U o1 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the phase A current I can be obtained. a =(U o1 -U ref ) / (K1*RS), through CLARK transformation, to obtain I α =I a =(U o1 -U ref ) / (K1*RS); This will change U o2 The input is fed into the MCU, and after sampling and processing by the MCU's ADC, the current difference (I) between phase B and phase A can be obtained. b -I a )=(U o2 -U ref ) / (K2*RS), Simplified And thus obtain to I α and I β Pulse width modulation is performed to obtain the target signal used to control the output waveform of inverter circuit 2.

[0094] This application also provides a non-volatile storage medium, which includes a stored program, wherein the program, when running, controls the device where the storage medium is located to execute the above-mentioned three-phase current sampling method.

[0095] The non-volatile storage medium performs the following functions: sampling the current of any two phases of the three-phase current separately to obtain sampling signals; performing differential amplification on the sampling signal of any one phase of the current of any two phases to obtain a first signal; performing differential amplification on the sampling signals of the current of any two phases to obtain a second signal; and performing coordinate transformation and pulse width modulation on the first and second signals to obtain a target signal used to control the output waveform of the inverter circuit.

[0096] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0097] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0098] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0099] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0100] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0101] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to related technologies, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0102] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A sampling device of a three-phase current, characterized by, The application relates to an inverter circuit, a sampling circuit, a differential amplification circuit and a processor, wherein, the inverter circuit is connected with the sampling circuit and is used for converting single-phase current provided by an external power supply into three-phase current; the sampling circuit is connected with the differential amplification circuit and is used for respectively sampling current of any two phases in the three-phase current to obtain sampling signals and inputting the sampling signals into the differential amplification circuit; the differential amplification circuit is connected with the processor and is used for performing differential amplification operation on the sampling signals of the current of any one phase in the any two phases to obtain a first signal and performing differential amplification operation on the sampling signals of the any two phases to obtain a second signal; the processor is connected with the inverter circuit and is used for controlling output waveforms of the inverter circuit based on the first signal and the second signal; the sampling circuit comprises a first sampling circuit and a second sampling circuit, wherein, The processor is further configured to calculate the current of the phase corresponding to the second signal by the following formula : ; wherein, is a difference between the sampled signals of the arbitrary two-phase currents, is a current of the phase corresponding to the first signal. The processor is further configured to perform coordinate transformation based on the current corresponding to the phase of the first signal and generate a target signal for controlling an output waveform of the inverter circuit.

2. The sampling device of three-phase currents according to claim 1, characterized in that, the first sampling circuit at least comprises a first sampling resistor used for sampling a first current, wherein the first current is the current of any one phase in the three-phase current; the second sampling circuit at least comprises a second sampling resistor used for sampling a second current, wherein the second current is the current of a phase other than the first current in the any two phases. the differential amplification circuit comprises a first differential amplification circuit and a second differential amplification circuit, wherein, 3. The sampling device of three-phase currents according to claim 2, characterized in that, the first differential amplification circuit is used for performing differential amplification operation on the first current to obtain a first signal; the second differential amplification circuit is used for performing differential amplification operation on the first current and the second current to obtain a second signal. the first differential amplification circuit comprises a first current-limiting element, a second current-limiting element, a third current-limiting element and a first operational amplifier, wherein, 4. The sampling device of three-phase currents according to claim 3, characterized in that, the first current-limiting element is connected in series with the first sampling resistor to form a first series circuit, and the first series circuit is connected with a first input end of the first operational amplifier; the second current-limiting element is connected in parallel with the first sampling resistor to form a first parallel circuit, and the first parallel circuit is connected with a second input end of the first operational amplifier; the third current-limiting element is arranged between the input end and the output end of the first operational amplifier and is connected in parallel with the first parallel circuit, is used for returning a first output signal of the first operational amplifier to the second input end to form a negative feedback, and the first operational amplifier is used for receiving the first current and performing differential amplification on the first current to obtain the first signal. the first differential amplification circuit further comprises a first bias circuit connected in parallel with the first series circuit and used for providing a bias voltage to the first operational amplifier.

5. The sampling device of three-phase currents according to claim 4, characterized in that, the second differential amplification circuit comprises a fourth current-limiting element, a fifth current-limiting element, a sixth current-limiting element and a second operational amplifier, wherein, 6. The sampling device of three-phase currents according to claim 5, characterized in that, the fourth current-limiting element is connected in series with the first sampling resistor to form a second series circuit, and the second series circuit is connected with a third input end of the second operational amplifier; the fifth current-limiting element is connected in parallel with the second sampling resistor to form a second parallel circuit, and the second parallel circuit is connected with a fourth input end of the second operational amplifier; The fifth current-limiting element is connected in series with a second parallel circuit formed by the first sampling resistor and the second sampling resistor, forming a third series circuit, and the third series circuit is connected with a fourth input end of a second operational amplifier; The sixth current-limiting element is arranged between the input end and the output end of the second operational amplifier, is connected in parallel with the third series circuit, and is used for returning a second output signal of the second operational amplifier to the fourth input end to form a negative feedback; The second operational amplifier is used for receiving the first current and the second current, and performing differential amplification on the first current and the second current to obtain the second signal.

7. The sampling device of claim 6, the second sampling and amplifying circuit further comprising: A second bias circuit is connected in parallel with the second series circuit, and is used for providing a bias voltage to the second operational amplifier.

8. The sampling device of claim 6, wherein the three-phase current is a three-phase AC current. The first sampling resistor and the second sampling resistor have equal resistance values. ​ 9. A sampling system of a three-phase current, characterized by The application relates to a three-phase current sampling device and a power utilization device. The external power supply is connected with the three-phase current sampling device and the power utilization device respectively, and is used for providing single-phase power to the power utilization device. The three-phase current sampling device is the sampling device in any one of claims 1 to 8, and is used for converting the single-phase power into three-phase power and sampling the three-phase power. The power utilization device is used for operating on the three-phase power. The method is applied to the three-phase current sampling device in any one of claims 1 to 8, and comprises the following steps:

10. A method of sampling a three-phase current, characterized by, sampling currents of any two phases in the three-phase current respectively to obtain sampling signals; performing differential amplification operation on the sampling signal of the current of any one phase of the any two phases to obtain a first signal; performing differential amplification operation on the sampling signals of the any two phases to obtain a second signal; performing coordinate transformation and pulse width modulation on the first signal and the second signal to obtain a target signal used for controlling an output waveform of an inverter circuit. The non-volatile storage medium comprises a stored program, wherein the program controls a device in which the non-volatile storage medium is arranged to perform the three-phase current sampling method in claim 10 when the program is running.

11. A non-volatile storage medium, comprising: ​

Citation Information

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