Wafer crack detection method and device, electronic equipment and storage medium

Abstract

The application discloses a wafer crack detection method and device, electronic equipment and storage medium, and belongs to the technical field of crack detection. The wafer crack detection method comprises the following steps: obtaining a difference image by comparing and analyzing a to-be-detected wafer image and a standard wafer image; constructing a plurality of sub-images in the difference image based on a dynamic programming method; performing path searching on each sub-image to obtain a sub-path; merging the sub-paths to obtain a first crack path; and obtaining a crack based on the first crack path. The method obtains a difference image by comparing and analyzing a to-be-detected wafer image and a standard wafer image, and then adopts a dynamic programming method to split the crack detection of the difference image into the crack detection of a plurality of sub-images, so that the difficulty of crack detection is reduced, and the accuracy of crack detection is improved.

Description

Technical Field

[0001] This application belongs to the field of crack detection technology, specifically relating to a wafer crack detection method, apparatus, electronic device, and storage medium. Background Technology

[0002] The semiconductor industry is the core of the information technology industry, a strategic, fundamental, and pioneering industry supporting economic and social development and safeguarding national security. With the development of semiconductor large-scale integrated circuit manufacturing processes and technical requirements, wafer inspection equipment has emerged. One of the purposes of wafer inspection is to detect defects on wafers. However, due to the wide variety of defect types, different detection algorithms are required for different defect types. Cracks, as a type of defect, generally occur during surface polishing or slicing, and usually affect the connectivity of wafer circuits, making them a relatively serious defect. However, the large span, uneven thickness, and inconsistent contrast of cracks increase the difficulty of their detection. To ensure comprehensive detection of cracks on wafers, new crack detection algorithms need to be developed.

[0003] Currently, there are two main algorithms for crack detection. One is the differential defect detection method, which subtracts a standard image from the image to be detected to obtain a differential image, and then compares it with a given contrast threshold; images exceeding the threshold are identified as defects. The other is the adaptive threshold or local threshold defect detection method, which analyzes the grayscale values ​​of the image to be detected to determine its difference from the neighborhood or the overall background; images with large differences are identified as defects. Existing crack detection schemes suffer from high detection difficulty and low accuracy. Summary of the Invention

[0004] The purpose of this application is to provide a wafer crack detection method, apparatus, electronic device, and storage medium to solve the problem of the difficulty in wafer crack detection.

[0005] According to a first aspect of the embodiments of this application, a wafer crack detection method is provided, the method comprising:

[0006] Difference images are obtained by comparing and analyzing images of the wafer under test and standard wafers;

[0007] Multiple sub-images are constructed from the difference image based on a dynamic programming method;

[0008] For each of the sub-images, a path lookup is performed to obtain the sub-path;

[0009] The sub-paths are merged to obtain the first crack path;

[0010] The crack is obtained based on the first crack path.

[0011] In some optional embodiments of this application, multiple sub-images are constructed in the difference image, including:

[0012] Construct the sub-image cropping box;

[0013] The sub-image cropping box is controlled to move horizontally and vertically on the difference image according to horizontal and vertical step sizes to crop the sub-image;

[0014] Wherein, the horizontal step size is less than the width of the sub-image cropping box, and the vertical step size is less than the height of the sub-image cropping box.

[0015] In some optional embodiments of this application, a path lookup is performed on each of the sub-images to obtain a sub-path, including:

[0016] Repeat the following steps M times for each of the sub-images:

[0017] Starting from the top left corner of the sub-image, find the target path with the highest energy that is not marked, either from top to bottom or from left to right.

[0018] Mark the current target path as the sub-path;

[0019] Where M is a positive integer.

[0020] In some optional embodiments of this application, a path lookup is performed on each of the sub-images to obtain a sub-path, including:

[0021] Obtain the transpose of each of the sub-images;

[0022] The following steps are repeated M1 times for each of the sub-images:

[0023] Starting from the top left corner of the sub-image, find the first target path with the highest energy that is not marked, proceeding from top to bottom;

[0024] Mark the current first target path as the sub-path;

[0025] The following steps are repeated M2 times for each of the transposed images:

[0026] Starting from the top left corner of the transposed image, find the second target path with the highest energy that is not marked from top to bottom;

[0027] The current second target path is marked as the sub-path.

[0028] In some optional embodiments of this application, a difference image is obtained by comparing and analyzing the image of the wafer under test with a standard wafer image, including:

[0029] Obtain n sample images;

[0030] The standard wafer image is obtained by obtaining the mean value of the n sample images;

[0031] The standard deviation of the n sample images is obtained to obtain the standard deviation image;

[0032] The difference image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer;

[0033] The standard deviation image is obtained by subtracting the difference image from the standard deviation image.

[0034] The standard difference image is used as the difference image.

[0035] In some optional embodiments of this application, a difference image is obtained by comparing and analyzing the image of the wafer under test with a standard wafer image, including:

[0036] Obtain n sample images;

[0037] The standard wafer image is obtained by obtaining the mean value of the n sample images;

[0038] The difference image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer;

[0039] The difference image is used as the difference image.

[0040] In some optional embodiments of this application, obtaining the crack based on the first crack path includes:

[0041] The grayscale value of the first crack path on the differential image is obtained. The differential image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer.

[0042] The second crack path is obtained by removing points with gray values ​​less than the contrast from the first crack path;

[0043] The second crack path with a path length greater than a preset length is obtained as the target crack path;

[0044] The target crack path is taken as the crack.

[0045] In some optional embodiments of this application, before constructing multiple sub-images in the standard difference image based on the dynamic programming method, the method further includes:

[0046] The standard difference image is optimized using Radon transform.

[0047] In some optional embodiments of this application, the standard difference image is optimized by Radon transform, including:

[0048] The standard difference image is subjected to Radon transform to obtain the projected image;

[0049] Obtain the bright spots on the projected image;

[0050] The angle conversion is obtained based on the pixel values ​​of the aforementioned highlights;

[0051] The number of longitudinal cracks N1 and the number of transverse cracks N2 are obtained based on the conversion angle.

[0052] The optimized standard difference image is obtained by performing Radon transform and inverse Radon transform on the standard difference image based on the transformation angle.

[0053] Where M1 = N1, M2 = N2.

[0054] In some optional embodiments of this application, it also includes:

[0055] Obtain the minimum bounding rectangle of the crack;

[0056] The cracks are filtered based on the length, width, and area of ​​the minimum bounding rectangle to obtain the displayed cracks;

[0057] The crack is displayed on the image of the wafer under test.

[0058] In some optional embodiments of this application, it also includes:

[0059] The defect type displaying the crack is generated based on the aspect ratio and duty cycle of the minimum bounding rectangle;

[0060] The defect type is displayed on the image of the wafer under test.

[0061] According to a second aspect of the embodiments of this application, a wafer crack detection device is provided, comprising:

[0062] The comparison module is used to obtain difference images by comparing and analyzing the image of the wafer under test with a standard wafer image;

[0063] The planning module is used to construct multiple sub-images in the standard difference image based on a dynamic programming method;

[0064] The search module is used to perform path search for each of the sub-images to obtain a sub-path;

[0065] A merging module is used to merge the sub-paths to obtain a first crack path;

[0066] The acquisition module is used to acquire the crack based on the first crack path.

[0067] According to a third aspect of the embodiments of this application, an electronic device is provided, which may include:

[0068] processor;

[0069] Memory used to store processor-executable instructions;

[0070] The processor is configured to execute instructions to implement the wafer crack detection method as shown in any embodiment of the first aspect.

[0071] According to a fourth aspect of the embodiments of this application, a storage medium is provided, which, when the instructions in the storage medium are executed by a processor of an information processing device or a server, causes the information processing device or server to implement the wafer crack detection method as shown in any embodiment of the first aspect.

[0072] The above-mentioned technical solution of this application has the following beneficial technical effects:

[0073] The wafer crack detection method provided in this application obtains a difference image by comparing and analyzing the image of the wafer to be tested with a standard wafer image. Then, a dynamic programming method is used to decompose the crack detection of the difference image into crack detection of multiple sub-images, thereby reducing the difficulty of crack detection and improving the accuracy of crack detection. Attached Figure Description

[0074] Figure 1 This is a schematic flowchart of a wafer crack detection method according to an exemplary embodiment of this application;

[0075] Figure 2 This is a flowchart illustrating step S102 in an exemplary embodiment of this application;

[0076] Figure 3 This is a flowchart illustrating step S103 in an exemplary embodiment of this application;

[0077] Figure 4 This is a flowchart illustrating step S103 in another exemplary embodiment of this application;

[0078] Figure 5 This is a schematic diagram of the longitudinal crack detection principle in an exemplary embodiment of this application;

[0079] Figure 6 This is a schematic diagram of the transverse crack detection principle in an exemplary embodiment of this application;

[0080] Figure 7 This is a flowchart illustrating step S101 in an exemplary embodiment of this application;

[0081] Figure 8a This is an image of the wafer under test in an exemplary embodiment of this application;

[0082] Figure 8b This is a standard wafer image from an exemplary embodiment of this application;

[0083] Figure 8cThis is a standard deviation image in an exemplary embodiment of this application;

[0084] Figure 9 This is the process of generating the standard deviation image in an exemplary embodiment of this application;

[0085] Figure 10 This is a differential image in an exemplary embodiment of this application;

[0086] Figure 11 This is a standard difference image in an exemplary embodiment of this application;

[0087] Figure 12 This is a flowchart illustrating step S101 in another exemplary embodiment of this application;

[0088] Figure 13 This is a flowchart illustrating step S105 in an exemplary embodiment of this application;

[0089] Figure 14 This is a schematic diagram of the Radon transformation process in an exemplary embodiment of this application;

[0090] Figure 15 This is a schematic diagram of the Radon transformation in an exemplary embodiment of this application;

[0091] Figure 16 This is a schematic diagram of the result of the Radon transformation in an exemplary embodiment of this application;

[0092] Figure 17 This is a schematic diagram showing the results of performing Radon transformation from three different angles in an exemplary embodiment of this application;

[0093] Figure 18 This is a schematic diagram illustrating the crack display process in an exemplary embodiment of this application;

[0094] Figure 19 This is a schematic diagram illustrating a crack in an exemplary embodiment of this application;

[0095] Figure 20 This is a schematic diagram of the minimum bounding rectangle in an exemplary embodiment of this application;

[0096] Figure 21 This is a schematic diagram illustrating the process of crack display in another exemplary embodiment of this application;

[0097] Figure 22 This is a schematic diagram of crack detection results in an exemplary embodiment of this application;

[0098] Figure 23 This is a schematic diagram of the structure of a wafer crack detection device according to an exemplary embodiment of this application;

[0099] Figure 24This is a schematic diagram of the electronic device structure in an exemplary embodiment of this application;

[0100] Figure 25 This is a schematic diagram of the hardware structure of an electronic device in an exemplary embodiment of this application. Detailed Implementation

[0101] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to specific embodiments and accompanying drawings. It should be understood that these descriptions are merely exemplary and not intended to limit the scope of this application. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of this application.

[0102] The accompanying drawings illustrate layer structure diagrams according to embodiments of this application. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0103] Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0104] In the description of this application, it should be noted that the terms "first", "second", and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0105] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0106] Research has revealed that the crack detection schemes in related technologies have one or more of the following problems: (1) When acquiring the differential image, due to issues such as blurred and offset image edges, the differential image obtained by subtracting from the standard image contains a lot of noise on the edges. This noise will be judged as a defect in subsequent crack detection. (2) It is greatly affected by background interference, especially the detection scheme based on adaptive threshold or local threshold cannot be applied to crack detection on wafers with complex backgrounds. (3) Due to the uneven crack thickness, inconsistent contrast, and large span of the crack, the existing detection scheme has the problem of missing detection and detecting fractures in cracks with indistinct features.

[0107] The wafer crack detection method, wafer crack detection device, electronic device, and storage medium provided in this application will be described in detail below with reference to the accompanying drawings and through specific embodiments and application scenarios.

[0108] like Figure 1 As shown, in a first aspect of this application, a wafer crack detection method is provided, which may include:

[0109] Step S101: Obtain the difference image by comparing and analyzing the image of the wafer under test with the image of the standard wafer;

[0110] Step S102: Construct multiple sub-images from the difference images using a dynamic programming method;

[0111] Step S103: Perform path lookup for each sub-image to obtain the sub-path;

[0112] Step S104: Merge the sub-paths to obtain the first crack path;

[0113] Step S105: Obtain the crack based on the first crack path.

[0114] In this embodiment, the standard wafer image is used to represent a wafer image without cracks, and the difference image is used to represent the difference between the wafer image under test and the standard wafer image. All wafer images, including the wafer image under test, the standard wafer image, and the difference image, are grayscale images. Dynamic programming is a method of solving complex problems by decomposing the original problem into relatively simple subproblems. It is often used for problems with overlapping subproblems and optimal substructure properties. The core idea lies in the decomposition of subproblems, making corresponding problem decisions for each subproblem to achieve the best result for the entire process. Because cracks have a large span, crack detection using difference images as units often results in problems such as missing cracks with low contrast and incomplete crack detection. In this embodiment, crack detection of difference images is decomposed into path finding of multiple sub-images. The path finding difficulty of a single sub-image is lower than that of crack detection of difference images, thus reducing the detection difficulty. The path finding accuracy of a single sub-image is higher than that of crack detection of difference images, thus improving the detection accuracy. By merging sub-paths, the first crack path suspected to be a crack can be initially screened, and the crack can be obtained by analyzing the first crack path. In this embodiment, partially overlapping sub-paths can be merged to obtain the first crack path. Points on the first crack path can be evaluated and verified, and points that do not meet the conditions can be removed, thus obtaining the crack. This embodiment employs the concept of dynamic programming to perform block detection on the difference image, abandoning the existing detection method that classifies pixel grayscale values ​​based on thresholds. This reduces the problem of missed detections, and block-based detection and analysis is more accurate and efficient than directly analyzing the entire difference image.

[0115] like Figure 2As shown, in some embodiments, step S102 may include:

[0116] Step S1021: Construct the sub-image cropping box;

[0117] Step S1022: Control the sub-image cropping box to move horizontally and vertically on the difference image according to the horizontal step size and the vertical step size to crop the sub-image;

[0118] The horizontal step size is less than the width of the sub-image cropping box, and the vertical step size is less than the height of the sub-image cropping box.

[0119] In this embodiment, the sub-image cropping box is rectangular. Taking the union of all sub-images and removing duplicates yields the difference image. This embodiment limits the horizontal step size to be less than the width of the sub-image cropping box and the vertical step size to be less than the height of the sub-image cropping box, causing adjacent sub-images to partially overlap. This helps improve the continuity of the subsequent merging of the first crack path and avoids the first crack path from breaking.

[0120] like Figure 3 As shown, in some embodiments, step S103 may include:

[0121] Step S1031: Repeat the following steps M times for each sub-image:

[0122] Starting from the top left corner of the sub-image, find the target path with the highest energy that is not marked, either from top to bottom or from left to right.

[0123] Mark the current target path as a subpath;

[0124] Where M is a positive integer.

[0125] In this embodiment, when the crack direction is vertical, the target path is searched from top to bottom starting from the top left corner of the sub-image; when the crack direction is horizontal, the target path is searched from left to right starting from the top left corner of the sub-image. M is used to represent the number of cracks. The direction and number of cracks can be obtained through Radon transform.

[0126] like Figure 4 As shown, in some embodiments, step S103 may include:

[0127] Step S1032: Obtain the transpose of each sub-image;

[0128] Step S1033: Repeat the following steps M1 times for each sub-image:

[0129] Starting from the top left corner of the sub-image, find the first target path with the highest energy that is not marked from top to bottom;

[0130] Mark the current first target path as a subpath;

[0131] Step S1034: Repeat the following steps M2 times for each transposed image:

[0132] Starting from the top left corner of the transposed image, find the second target path with the highest energy that is not marked from top to bottom;

[0133] Mark the current second target path as a subpath.

[0134] Crack detection is mainly divided into two types based on the direction of the crack to be detected: X-direction and Y-direction. In this embodiment, the X-direction is longitudinal, and the Y-direction is transverse. When transverse and longitudinal cracks coexist, such as... Figure 5 As shown, the detection of longitudinal cracks is first performed based on dynamic programming. The dashed rectangle represents the cutoff box. The cutoff box is moved across the difference image to capture sub-images. Each sub-image represents a sub-problem block in the dynamic programming. Cracks are searched along the direction of the black spikes in each sub-image. Since multiple cracks may exist in a single wafer image, the number of search paths in each sub-image is set to M1, where M1 represents the number of longitudinal cracks. Specifically, M1 path searches are performed on the current sub-image. Each time, starting from the top left corner of the sub-image, the first target path with the highest energy and not yet marked is searched from top to bottom according to the principle of maximum energy sum. Each found first target path is marked as a sub-path to ensure that the next found first target path with the highest energy sum is not one that has already been found. The path search is then performed on the next sub-image. After traversing all sub-images, multiple sub-paths meeting the conditions in the X direction are obtained, which are the suspected crack paths in the X direction. Figure 6 As shown, based on the dynamic programming approach, crack detection is then performed on the transverse direction. Since the detection strategy for cracks in the Y direction is the same as that in the X direction, to avoid repetitive programming and improve detection efficiency, this embodiment transposes the sub-image in the Y direction and then performs the same detection operation as in the X direction. After obtaining the second target path in the Y direction, the horizontal and vertical coordinates of the points on the second target path can be interchanged. Marking the interchanged second target path as a sub-path yields the detection result in the Y direction. Merging the detection results of the sub-image and the transposed image yields the final sub-path detection result.

[0135] like Figure 7 As shown, in some embodiments, step S101 may include:

[0136] Step S1010: Obtain n sample images;

[0137] Step S1011: Obtain the average value of n sample images to obtain a standard wafer image;

[0138] Step S1012: Obtain the standard deviation of n sample images to get the standard deviation image;

[0139] Step S1013: Subtract the image of the wafer to be tested from the image of the standard wafer to obtain a differential image;

[0140] Step S1014: Subtract the difference image from the standard deviation image to obtain the standard deviation image;

[0141] Step S1015: Use the standard difference image as the difference image.

[0142] like Figure 8a , 8b As shown in Figure 8c, the image of the wafer under test, the standard wafer image, and the standard deviation image are all grayscale images. Cracks in the image of the wafer under test are typically long and thin, with large spans, uneven thickness, and inconsistent contrast. These properties make crack detection in complex backgrounds more difficult. To address these issues, this embodiment introduces a standard deviation image as a difference image. The standard deviation image is generated during the generation of the standard image, specifically as follows: Figure 9 As shown, the mean and standard deviation (Std) of the points at corresponding positions on the n sample images used to generate the standard wafer image are calculated to obtain a standard deviation image with the same size as the standard wafer image. The calculation is shown in formulas (1) and (2).

[0143]

[0144]

[0145] The difference image is obtained by subtracting the image of the wafer under test from the image of the standard wafer. The calculation formula is as follows:

[0146] I 差分图像 =I 待测晶圆图像 -I 标准晶圆图像 (3)

[0147] The difference results are as follows Figure 10 As shown, the defective part is revealed.

[0148] The edges of the difference image are optimized, and a difference operation is performed with the standard deviation image to obtain... Figure 11 The standard difference image.

[0149] I 标准差分图像 =I 差分图像 -I 标准差图像 (4)

[0150] The standard difference image is then used as the difference image for subsequent detection.

[0151] In related technologies, when acquiring differential images, issues such as blurred and offset edges of the wafer image under test can easily lead to a lot of edge noise in the differential image obtained when subtracting it from the standard wafer image. This noise is easily mistaken for cracks in subsequent crack detection. This embodiment reduces the interference of background noise and removes contour noise by performing a difference operation between the differential image and the standard deviation image, making it particularly suitable for wafer images under test with complex backgrounds.

[0152] like Figure 12 As shown, in some embodiments, step S101 may include:

[0153] Step S1016: Obtain n sample images;

[0154] Step S1017: Obtain the average value of n sample images to obtain a standard wafer image;

[0155] Step S1018: Subtract the image of the wafer to be tested from the image of the standard wafer to obtain a differential image;

[0156] Step S1019: Use the difference image as the difference image.

[0157] In this embodiment, a differential image containing cracks can be obtained by subtracting the image of the wafer under test from a standard wafer image. The processing is simple and helps to save computing resources, and it is especially suitable for wafer images with simple backgrounds.

[0158] like Figure 13 As shown, in some embodiments, step S105 may include:

[0159] Step S1051: Obtain the grayscale value of the first crack path on the differential image, which is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer;

[0160] Step S1052: Remove points with gray values ​​less than the contrast from the first crack path to obtain the second crack path;

[0161] Step S1053: Obtain a second crack path with a path length greater than a preset length as the target crack path;

[0162] Step S1054: Treat the target crack path as the crack.

[0163] Specifically, the gray value of each point on the first crack path in the differential image is first judged based on a pre-set contrast. The judgment formula is as follows:

[0164]

[0165] If the grayscale value is lower than the contrast, it means that the point is not a crack and is removed from the first crack path; otherwise, it is retained. This process updates the number of points on each first crack path to obtain the second crack path.

[0166] Then, the number of points on each second crack path is checked. If the path length (i.e., the number of points on the path) is less than the set number N, the result is determined. If the second crack path is not selected, it will be removed; otherwise, it will be retained and used as the target crack path. The formula for this selection is:

[0167]

[0168] The above two steps yield the updated target crack path.

[0169] Depend on Figure 11 The difference results show that finer cracks become less noticeable after the difference process, and are often overlooked in subsequent detection, leading to missed detections. To enable the detection of finer cracks, in some embodiments, the difference image is first optimized using Radon transform to obtain a difference image with more distinct crack features, and then the optimized difference image is used for subsequent detection.

[0170] like Figure 14 As shown, before step S102, the following steps are also included:

[0171] Step S1001: Perform Radon transform on the standard difference image to obtain the projected image;

[0172] Step S1002: Obtain the bright spots on the projected image;

[0173] Step S1003: Obtain the conversion angle based on the pixel values ​​of the bright spots;

[0174] Step S1004: Obtain the number of longitudinal cracks N1 and the number of transverse cracks N2 based on the transformation angle;

[0175] Step S1005: Perform Radon transform and inverse Radon transform on the standard difference image based on the transformation angle to obtain the optimized standard difference image;

[0176] Where M1 = N1, M2 = N2.

[0177] In this embodiment, the number of bright spots represents the number of cracks, and the pixel value of the bright spots is used to characterize the direction of the cracks. Based on the pixel value and the number of bright spots, the number of vertical cracks N1 and the number of horizontal cracks N2 can be obtained. In the subsequent detection step S1033, the number of vertical cracks N1 can be used as the number of vertical sub-path searches M1, and in the subsequent detection step S1034, the number of horizontal cracks N2 can be used as the number of horizontal sub-path searches M2. This embodiment can preliminarily determine the number of vertical and horizontal cracks through Radon transform, which helps to reduce the computational load of subsequent crack search and avoids wasting computational resources due to excessive sub-path searches. In addition, the parameters of Radon transform and inverse Radon transform are obtained using an optimal selection method, determined by evaluating the occurrence and quantity changes of bright spots on the projection plane, which is beneficial for accurate and complete crack detection. Applying Radon transform and inverse Radon transform to the standard difference image can improve the clarity of the cracks.

[0178] Specifically, such as Figure 15 As shown, the Radon transform is applied to crack detection by projecting the difference image onto another plane. According to the principle diagram and formula (5) of the Radon transform, each point of each line on the difference image corresponds to the same point on the other plane. In this way, the presence of straight lines on the difference image can be determined by the accumulation of points on the other plane. Finally, the number and direction of straight lines are determined based on the number of bright spots and their coordinate values ​​in the Radon transform result.

[0179]

[0180] Figure 16 The left image shows the Radon transform result. Based on the number of bright spots, we can tell that there are two straight lines in the original image, with directions of approximately 93 degrees and 95 degrees.

[0181] Figure 17 The results of the inverse transform after performing the Radon transform from three different angles are shown, along with... Figure 11 By comparison, it can be seen that the crack texture is clearer when the angle of change is 90 degrees.

[0182] This embodiment employs a linear detection method based on Radon transform for finer cracks, which solves the problems of incomplete detection in existing schemes and the lack of crack detection and breakage caused by the limitation of control conditions during post-processing.

[0183] like Figure 18 As shown, in some embodiments, it also includes:

[0184] Step S106: Obtain the minimum bounding rectangle of the crack;

[0185] Step S107: Filter the cracks based on the length, width and area of ​​the minimum bounding rectangle to obtain the displayed cracks;

[0186] Step S108: Display the crack on the image of the wafer to be tested.

[0187] Specifically, such as Figure 19 As shown, points along the target crack path are first assigned values ​​to obtain a binary image of the crack. Crack location is then performed based on the crack contour in the binary image. The perimeter (Girth) of the image contour is defined as the sum of the number of pixels enclosing the contour boundary, calculated using the following formula:

[0188]

[0189] The area of ​​an image contour is defined as the sum of the number of image pixels contained within the contour (excluding the contour itself), and the formula is as follows:

[0190]

[0191] Where R represents the pixel range of the contour region.

[0192] Since cracks are often irregular, the minimum bounding rectangle of the crack in the binarized image is obtained, and the length and width of the crack are calculated based on this minimum bounding rectangle. First, the maximum and minimum values ​​of the horizontal and vertical coordinates are obtained based on the pixel coordinates of region R, thus determining the size of the bounding rectangle and obtaining the coordinates of its four vertices, such as... Figure 20 As shown. The formula for calculating the length of the crack is:

[0193]

[0194] The formula for calculating width is:

[0195]

[0196] The selected cracks are displayed on the image of the wafer under test. To better demonstrate the detection effect, the position of the crack can be shifted in the X direction. This embodiment can achieve comprehensive detection of cracks, including finer cracks, with good results.

[0197] like Figure 21 As shown, in some embodiments, it also includes:

[0198] Step S109: Generate the defect type that displays the crack based on the aspect ratio and duty cycle of the minimum bounding rectangle;

[0199] Step S110: Display the defect type on the image of the wafer to be tested.

[0200] Specifically, crack detection is performed based on the configured crack type. The crack detection criteria include the length, width, and area of ​​the minimum bounding rectangle, as well as the logical relationship (AND / OR) between them. Other optional attributes can be configured, such as the aspect ratio, duty cycle, whether it is an edge defect, or whether it is a noise defect (a defect with a width of 1). Based on the set defect conditions, defects that satisfy all constraints are ultimately detected. Figure 22 As shown, cracks that meet the control conditions are marked and output on the image of the wafer under test, and the type and properties of the cracks are output.

[0201] like Figure 23 As shown, in a second aspect of the embodiments of this application, a wafer crack detection device is provided, comprising:

[0202] Comparison module 11 is used to obtain a difference image by comparing and analyzing the image of the wafer under test with the image of a standard wafer;

[0203] Planning module 12 is used to construct multiple sub-images in a standard difference image based on a dynamic programming method;

[0204] The lookup module 13 is used to perform path lookup for each sub-image to obtain the sub-path;

[0205] Merging module 14 is used to merge sub-paths to obtain the first crack path;

[0206] The acquisition module 15 is used to acquire the crack based on the first crack path.

[0207] The wafer crack detection device in this application embodiment can also be a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This application embodiment does not impose specific limitations.

[0208] The wafer crack detection device provided in this application embodiment can implement all the processes of the wafer crack detection method provided in any of the above embodiments. To avoid repetition, it will not be described again here.

[0209] Optionally, such as Figure 24 As shown, this application embodiment also provides an electronic device 1100, including a processor 1101, a memory 1102, and a program or instructions stored in the memory 1102 and executable on the processor 1101. When the program or instructions are executed by the processor 1101, they implement the various processes of the above-described wafer crack detection method embodiment and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0210] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0211] Figure 25 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of this application.

[0212] The electronic device 1200 includes, but is not limited to, components such as: radio frequency unit 1201, network module 1202, audio output unit 1203, input unit 1204, sensor 1205, display unit 1206, user input unit 1207, interface unit 1208, memory 1209, and processor 1210.

[0213] Those skilled in the art will understand that the electronic device 1200 may also include a power supply (such as a battery) for supplying power to various components. The power supply may be logically connected to the processor 1210 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system. Figure 16 The electronic device structure shown does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0214] It should be understood that, in this embodiment, the input unit 1204 may include a graphics processing unit (GPU) 12041 and a microphone 12042. The GPU 12041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode. The display unit 1206 may include a display panel 12061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, etc. The user input unit 1207 includes a touch panel 12071 and other input devices 12072. The touch panel 12071 is also called a touch screen. The touch panel 12071 may include a touch detection device and a touch controller. Other input devices 12072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, joysticks, etc., which will not be described in detail here. The memory 1209 can be used to store software programs and various data, including but not limited to applications and operating systems. Processor 1210 may integrate an application processor and a modem processor. The application processor mainly handles the operating system, user interface, and applications, while the modem processor mainly handles wireless communication. It is understood that the modem processor may also not be integrated into processor 1210.

[0215] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described wafer crack detection method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0216] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0217] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above-described wafer crack detection method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0218] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0219] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0220] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0221] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A method for detecting wafer cracks, characterized in that, include: Difference images are obtained by comparing and analyzing images of the wafer under test and standard wafers; The difference image is subjected to Radon transform to obtain the projected image; Obtain the bright spots on the projected image; The angle conversion is obtained based on the pixel values ​​of the aforementioned highlights; The number of longitudinal cracks N1 and the number of transverse cracks N2 are obtained based on the conversion angle. The optimized difference image is obtained by performing Radon transform and inverse Radon transform on the difference image based on the transformation angle. Where M1=N1, M2=N2, M1 is the number of times the vertical sub-path is searched, and M2 is the number of times the horizontal sub-path is searched; Multiple sub-images are constructed from the difference image based on a dynamic programming method; For each of the sub-images, a path lookup is performed to obtain the sub-path; The sub-paths are merged to obtain the first crack path; The crack is obtained based on the first crack path.

2. The wafer crack detection method according to claim 1, characterized in that, Multiple sub-images are constructed from the difference image, including: Construct the sub-image cropping box; The sub-image cropping box is controlled to move horizontally and vertically on the difference image according to horizontal and vertical step sizes to crop the sub-image; Wherein, the horizontal step size is less than the width of the sub-image cropping box, and the vertical step size is less than the height of the sub-image cropping box.

3. The wafer crack detection method according to claim 1, characterized in that, For each of the sub-images, a path lookup is performed to obtain a sub-path, including: Repeat the following steps M times for each of the sub-images: Starting from the top left corner of the sub-image, find the target path with the highest energy that is not marked, either from top to bottom or from left to right. Mark the current target path as the sub-path; Where M is a positive integer.

4. The wafer crack detection method according to claim 1, characterized in that, For each of the sub-images, a path lookup is performed to obtain a sub-path, including: Obtain the transpose of each of the sub-images; The following steps are repeated M1 times for each of the sub-images: Starting from the top left corner of the sub-image, find the first target path with the highest energy that is not marked, proceeding from top to bottom; Mark the current first target path as the sub-path; The following steps are repeated M2 times for each of the transposed images: Starting from the top left corner of the transposed image, find the second target path with the highest energy that is not marked from top to bottom; The current second target path is marked as the sub-path.

5. A wafer crack detection method according to any one of claims 1-4, characterized in that, Difference images were obtained by comparing and analyzing the images of the wafer under test with those of a standard wafer, including: Obtain n sample images; The standard wafer image is obtained by obtaining the mean value of the n sample images; The standard deviation of the n sample images is obtained to obtain the standard deviation image; The difference image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer; The standard deviation image is obtained by subtracting the difference image from the standard deviation image. The standard difference image is used as the difference image.

6. A wafer crack detection method according to any one of claims 1-4, characterized in that, Difference images were obtained by comparing and analyzing the images of the wafer under test with those of a standard wafer, including: Obtain n sample images; The standard wafer image is obtained by obtaining the mean value of the n sample images; The difference image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer; The difference image is used as the differential image.

7. The wafer crack detection method according to claim 1, characterized in that, The crack is obtained based on the first crack path, including: The grayscale value of the first crack path on the differential image is obtained, wherein the differential image is obtained by subtracting the image of the wafer to be tested from the image of the standard wafer; The second crack path is obtained by removing points with gray values ​​less than the contrast from the first crack path; The second crack path with a path length greater than a preset length is obtained as the target crack path; The target crack path is taken as the crack.

8. The wafer crack detection method according to claim 1, characterized in that, Also includes: Obtain the minimum bounding rectangle of the crack; The cracks are filtered based on the length, width, and area of ​​the minimum bounding rectangle to obtain the displayed cracks; The crack is displayed on the image of the wafer under test.

9. A wafer crack detection method according to claim 8, characterized in that, Also includes: The defect type displaying the crack is generated based on the aspect ratio and duty cycle of the minimum bounding rectangle; The defect type is displayed on the image of the wafer under test.

10. A wafer crack detection device, characterized in that, A wafer crack detection method according to any one of claims 1-9 includes: The comparison module is used to obtain difference images by comparing and analyzing the image of the wafer under test with a standard wafer image; The planning module is used to construct multiple sub-images in the difference image based on the dynamic programming method; The search module is used to perform path search for each of the sub-images to obtain a sub-path; A merging module is used to merge the sub-paths to obtain a first crack path; The acquisition module is used to acquire the crack based on the first crack path.

11. An electronic device, characterized in that, include: A processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein the program or instructions, when executed by the processor, implement a wafer crack detection method as described in any one of claims 1-9.

12. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement a wafer crack detection method as described in any one of claims 1-9.

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