A graphene back gate electrode terahertz wave modulator and a manufacturing method thereof

Abstract

The application discloses a manufacturing method of a graphene back gate electrode terahertz wave modulator, which comprises the following steps: growing and transferring a first layer of graphene; photoetching a graphene back gate pattern; photoetching a back gate electrode pattern and preparing a back gate electrode; growing a medium layer; growing and transferring a second layer of graphene; photoetching a graphene strip pattern and preparing a graphene strip; photoetching an open resonant ring pattern and preparing an open resonant ring metal. The application discloses a terahertz wave modulator, which comprises a high-resistance substrate, a graphene back gate electrode layer and a high-K gate medium layer which are sequentially bonded from bottom to top; the high-K gate medium layer is provided with an array of graphene strips and an open resonant ring metal, the open resonant ring metal is arranged around the graphene strips and is in physical contact with the graphene strips. The application constructs a back gate electrode on a single layer of graphene, thereby getting rid of the absorption of a conductive substrate to terahertz waves and effectively improving the modulation efficiency of the terahertz wave modulator to terahertz waves.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor terahertz photoelectric technology, in particular to a graphene back gate electrode terahertz wave modulator and a manufacturing method thereof. BACKGROUND

[0002] Graphene has a zero band gap and a linear energy band dispersion relationship, has a terahertz wave band, and has an extremely wide spectral response range. By means of chemical or electrostatic doping, the carrier concentration and Fermi level of graphene can be effectively changed, and graphene can be used for high-speed adjustable optical devices. Compared with the two-dimensional electron gas of traditional III-V semiconductor, the adjustable range of the carrier concentration of graphene is higher than 1 order of magnitude, so graphene has a unique advantage in the research of terahertz modulators, can realize dynamic modulation of terahertz waves, realizes dynamic spectrum management, and provides a new idea and scheme for developing higher-performance terahertz modulators.

[0003] In the prior art, the graphene transistor terahertz modulator usually uses a conventional conductive substrate as the back gate electrode of the transistor. However, for a transmission type terahertz wave modulation, the back gate electrode made of a conventional conductive substrate has strong absorption and reflection of the irradiated terahertz wave, which leads to a significant reduction in the transmitted terahertz wave signal and affects the terahertz wave modulation efficiency. SUMMARY

[0004] Technical problem to be solved

[0005] The conventional conductive substrate has strong absorption and reflection of terahertz waves, so that the transmission type terahertz wave modulator which pursues the intensity of the transmitted terahertz wave signal cannot achieve the required terahertz wave modulation intensity after passing through the back gate electrode made of the conventional conductive substrate.

[0006] The purpose of the present application is to provide a terahertz wave modulator with a graphene-made back gate electrode, which has a lower absorption degree of the terahertz wave signal intensity.

[0007] Technical scheme

[0008] The present application discloses a manufacturing method of a graphene back gate electrode terahertz wave modulator, comprising the following steps:

[0009] Step one, growth and transfer of the first layer of graphene: a first single-layer graphene is grown on a Cu substrate by chemical vapor deposition, after evaporating a first Au film with a thickness of 45-55 nm on the first single-layer graphene, the Cu substrate is etched and removed, and then the first single-layer graphene and the first Au film thereon are transferred to a high-resistance substrate by wet transfer;

[0010] Step 2: Photolithography of the graphene back grid pattern: The graphene back grid pattern is defined on the surface of the first Au film using planar photolithography. After the photoresist outside the graphene back grid pattern is removed using sol-gel technology, the first Au film outside the graphene back grid pattern area is removed by etching with an etch solution. Then, the graphene material outside the graphene back grid pattern is removed by dry oxidation. Finally, the photoresist inside the graphene back grid pattern is removed using sol-gel stripping technology.

[0011] Step 3: Photolithography of the back gate electrode pattern and fabrication of the back gate electrode: The back gate electrode pattern is defined using planar photolithography on the first Au film within the graphene back gate pattern and on the high-resistivity substrate outside the graphene back gate pattern. The back gate electrode pattern includes a first constituent region located within the graphene back gate pattern for connecting the electrode and the graphene; and a second region located outside the graphene back gate pattern for mounting the test electrode. After the pattern definition is completed, Ti / Au / Ti layers with a thickness ratio of 18-22 nm: 180-220 nm: 9-11 nm are deposited sequentially to complete metallization. Then, the photoresist and the deposited metal on the back gate electrode pattern are removed using sol-gel stripping technology, and the deposited metal remaining within the electrode pattern forms the back gate electrode. Finally, the gold film on the graphene surface outside the back gate electrode pattern is removed by etching with a gold etching solution, completing the back gate electrode fabrication process.

[0012] Step 4: Growth of the dielectric layer: A 10-30 nm high-k gate dielectric layer is grown on the surface inside and outside the completed graphene back gate pattern using the ALD method.

[0013] Step 5: Growth and transfer of the second graphene layer: The second monolayer graphene is grown on the Cu substrate by chemical vapor deposition. After depositing a second Au film with a thickness of 45-55 nm on the second monolayer graphene, the Cu substrate is etched away. Then, the deposited second monolayer graphene and the second Au film on it are transferred to the high-k gate dielectric by wet transfer.

[0014] Step 6: Photolithography of graphene strip patterns and preparation of graphene strips: Graphene strip patterns are defined on the surface of the second Au film using planar photolithography and development technology. The Au film outside the patterned area is removed by etching with an etchant solution. The graphene material outside the patterned area is removed by dry oxidation. The photoresist inside the graphene strip pattern is removed by sol-gel stripping technology. The second Au film inside the graphene strip pattern is removed by etching with an etchant solution, thus completing the preparation of the graphene strips.

[0015] Step 7: Photolithography of the aperture resonator pattern and fabrication of the aperture resonator metal: The aperture resonator pattern is defined using planar photolithography. The aperture resonator pattern includes several aperture resonator rings arranged in an array around a graphene strip, with each aperture resonator ring in physical contact with the graphene strip it surrounds. After the aperture resonator pattern is defined, Ti / Au layers with a thickness ratio of 18-22 nm:180-220 nm are sequentially deposited on the surface of the component to complete metallization. Then, the metal outside the aperture resonator pattern is peeled off using sol-gel lift-off technology, and the metal remaining inside the aperture resonator pattern constitutes the aperture resonator metal, thus completing the fabrication of the terahertz wave modulator.

[0016] Preferably, the corrosion solution is a potassium iodide solution with a component ratio of KI:I2:H2O = 500g:150g:5000ml, and the corrosion removal lasts for 10-15 seconds.

[0017] Preferably, the high-k gate dielectric is Al2O3 or HfO2.

[0018] Preferably, the sol-exfoliation technique involves first immersing the sample in an acetone solution for 60 minutes to remove the photoresist, then transferring the sample to an ethanol solution for 10 minutes, finally washing the sample in deionized water, and then drying the sample surface using a nitrogen gun.

[0019] Preferably, the resistivity of the high-resistivity substrate is ≥10000Ωcm.

[0020] This application discloses a terahertz wave modulator with a graphene back gate electrode, comprising a high-resistivity substrate, a graphene back gate electrode layer, and a high-k gate dielectric layer bonded sequentially from bottom to top; the high-k gate dielectric layer is provided with an array of graphene strips and an open-ring metal, the open-ring metal surrounding the graphene strips and in physical contact with the graphene strips.

[0021] Preferably, the graphene back gate electrode layer (2) is a single layer of graphene on which the back gate electrode is prepared.

[0022] Beneficial effects: This application eliminates the absorption of terahertz waves by the conductive substrate by constructing the back gate electrode on a single layer of graphene, instead of the traditional process of constructing the back gate electrode on a conductive substrate layer, which is required for terahertz wave modulators. This effectively improves the modulation efficiency of terahertz waves by the terahertz wave modulator. Attached Figure Description

[0023] Figure 1 This is a flowchart of the testing method in this application;

[0024] Figure 2 This is a schematic diagram of the graphene back-gate terahertz wave modulator structure in the embodiments of this application;

[0025] Figure 3 This is a modulation depth map of the graphene back-gate terahertz wave modulator in the embodiments of this application;

[0026] Figure 4 This is a 3dB modulation rate diagram of the graphene back-gate terahertz wave modulator in the embodiments of this application;

[0027] Figure label explanation: In Figure 2 In the structure, 1 is a high-resistivity substrate, 2 is a graphene back gate electrode layer, 3 is a high-K gate dielectric layer, 4 is a graphene strip, and 5 is an open resonant ring metal. Detailed Implementation

[0028] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0029] like Figure 1 As shown, the specific steps of the graphene back-gate terahertz wave modulator are as follows:

[0030] (1) Growth and transfer of the first layer of graphene: The first monolayer of graphene was grown on a Cu substrate by chemical vapor deposition. After depositing a 50 nm thick first Au film on the first monolayer of graphene, the Cu substrate was removed by etching with an acidic solution. Then, the first monolayer of graphene and the first Au film on it were transferred to a high-resistivity substrate by wet transfer.

[0031] (2) Photolithography of graphene back grid pattern: The graphene back grid pattern is defined on the surface of the first Au film using planar photolithography development technology. After the photoresist outside the pattern is removed by sol-gel technology, the first Au film outside the graphene back grid pattern area is removed by etching with a potassium iodide gold etching solution with a solution ratio of KI:I2:H2O=500g:150g:5000ml for 10-15s. Then the graphene material outside the graphene back grid pattern is removed by dry oxidation. Finally, the photoresist inside the pattern is removed by sol-gel stripping technology.

[0032] (3) Photolithography of back gate electrode pattern and fabrication of back gate electrode: The back gate electrode pattern is defined by planar photolithography on the first Au film inside the graphene back gate pattern and the high-resistivity substrate outside the graphene back gate pattern. The back gate electrode pattern includes a first component region located inside the graphene back gate pattern for connecting the electrode and the graphene; and a second region located outside the graphene back gate pattern for mounting the test electrode. After the pattern definition is completed, Ti / Au / Ti metal layers with thicknesses of 20nm:200nm:10nm are deposited sequentially to complete the metallization. Then, the photoresist outside the back gate electrode pattern and the deposited metal on it are removed by sol-gel stripping technology. The deposited metal retained inside the electrode pattern forms the back gate electrode. Then, the gold-corrosion solution with a solution ratio of KI:I2:H2O=500g:150g:5000ml is used to etch for 10-15s to remove the first Au film on the graphene surface outside the back gate electrode pattern, thus completing the back gate electrode fabrication process.

[0033] (4) Growth medium layer: A 20 nm high K Al2O3 gate medium layer is grown on the surface inside and outside the completed graphene back gate pattern using the ALD method;

[0034] (5) Growth and transfer of the second layer of graphene: The second monolayer of graphene was grown on the Cu substrate by chemical vapor deposition. After depositing a second Au film with a thickness of 50 nm on the second monolayer of graphene, the Cu substrate was removed by etching with an acidic solution. Then, the deposited second monolayer of graphene and the second Au film on it were transferred to the Al2O3 high-K gate dielectric by wet transfer.

[0035] (6) Photolithography of graphene strip patterns and preparation of graphene strips: The graphene strip pattern is defined on the surface of the second Au film using planar photolithography and development technology. The second Au film outside the pattern area is removed by etching with a potassium iodide gold etch solution with a solution ratio of KI:I2:H2O=500g:150g:5000ml for 10-15s. The graphene material outside the pattern area is removed by dry oxidation. The photoresist inside the graphene strip pattern is removed by sol-gel peeling technology. The second Au film inside the graphene strip pattern is removed by etching with a potassium iodide gold etch solution with a solution ratio of KI:I2:H2O=500g:150g:5000ml for 10-15s, thus completing the preparation of graphene strips.

[0036] (7) Photolithography of the open-ring resonator pattern and fabrication of the open-ring resonator metal: The open-ring resonator pattern is defined using planar photolithography and development technology. The open-ring resonator pattern includes several elementary open-ring resonators arranged in an array and surrounding the graphene strip. Each open-ring resonator is in physical contact with the graphene strip it surrounds. After the open-ring resonator pattern is defined, Ti / Au metal layers with thicknesses of 20nm and 200nm are deposited sequentially on the surface of the element to complete the metalization. Then, the metal outside the open-ring resonator pattern is peeled off by sol-gel peeling technology. The metal remaining in the open-ring resonator pattern constitutes the open-ring resonator metal, thus completing the fabrication of the terahertz wave modulator.

[0037] The sol-and-peel technique involves first immersing the sample in an acetone solution for 60 minutes to remove the photoresist, then transferring the sample to an ethanol solution for 10 minutes, finally washing the sample in deionized water, and then drying the sample surface using a nitrogen gun.

[0038] The final structure of the graphene back-gate terahertz modulator is as follows: Figure 2 As shown. The modulation depth and 3dB modulation rate of the fabricated graphene back-gate terahertz modulator were characterized, and the results are as follows. Figure 3 and Figure 4 .

Claims

1. A method for manufacturing a terahertz wave modulator with a graphene back gate electrode, characterized in that, Includes the following steps: Step 1: Growth and transfer of the first graphene layer: The first monolayer of graphene is grown on a Cu substrate by chemical vapor deposition. After depositing a first Au film with a thickness of 45-55 nm on the first monolayer of graphene, the Cu substrate is etched away. Then, the first monolayer of graphene and the first Au film on it are transferred to a high-resistivity substrate by wet transfer. Step 2: Photolithography of the graphene back grid pattern: The graphene back grid pattern is defined on the surface of the first Au film using planar photolithography. After the photoresist outside the graphene back grid pattern is removed using sol-gel technology, the first Au film outside the graphene back grid pattern area is removed by etching with an etch solution. Then, the graphene material outside the graphene back grid pattern is removed by dry oxidation. Finally, the photoresist inside the graphene back grid pattern is removed using sol-gel stripping technology. Step 3: Photolithography of the back gate electrode pattern and fabrication of the back gate electrode: The back gate electrode pattern is defined using planar photolithography on the first Au film within the graphene back gate pattern and on the high-resistivity substrate outside the graphene back gate pattern. The back gate electrode pattern includes a first constituent region located within the graphene back gate pattern for connecting the electrode and the graphene; and a second region located outside the graphene back gate pattern for mounting the test electrode. After the pattern definition is completed, Ti / Au / Ti layers with a thickness ratio of 18-22 nm: 180-220 nm: 9-11 nm are deposited sequentially to complete the metallization. Then, the photoresist and the deposited metal on the back gate electrode pattern are removed using sol-gel stripping technology. The deposited metal remaining within the electrode pattern forms the back gate electrode. Then, the gold film on the graphene surface outside the back gate electrode pattern is removed by etching with a gold etching solution to complete the back gate electrode fabrication process. Step 4: Growth of the dielectric layer: A 10-30 nm high-k gate dielectric layer is grown on the surface inside and outside the completed graphene back gate pattern using the ALD method. Step 5: Growth and transfer of the second graphene layer: The second monolayer graphene is grown on the Cu substrate by chemical vapor deposition. After depositing a second Au film with a thickness of 45-55 nm on the second monolayer graphene, the Cu substrate is etched away. Then, the deposited second monolayer graphene and the second Au film on it are transferred to the high-k gate dielectric by wet transfer. Step 6: Photolithography of graphene strip patterns and preparation of graphene strips: Graphene strip patterns are defined on the surface of the second Au film using planar photolithography and development technology. The Au film outside the patterned area is removed by etching with an etchant solution. The graphene material outside the patterned area is removed by dry oxidation. The photoresist inside the graphene strip pattern is removed by sol-gel stripping technology. The second Au film inside the graphene strip pattern is removed by etching with an etchant solution, thus completing the preparation of the graphene strips. Step 7: Photolithography of the aperture resonant ring pattern and fabrication of the aperture resonant ring metal: The aperture resonant ring pattern is defined using planar photolithography. The aperture resonant ring pattern includes several aperture resonant rings arranged in an array around a graphene strip, with each aperture resonant ring in physical contact with the graphene strip it surrounds. After the aperture resonant ring pattern is defined, Ti / Au layers with a thickness ratio of 18-22 nm:180-220 nm are deposited sequentially on the surface of the element to complete metallization. Then, the metal outside the aperture resonant ring pattern is peeled off using sol-gel lift-off technology, and the metal remaining inside the aperture resonant ring pattern constitutes the aperture resonant ring metal, thus completing the fabrication of the terahertz wave modulator. The terahertz modulator prepared by the above method includes a high-resistivity substrate (1), a graphene back gate electrode layer (2), and a high-K gate dielectric layer (3) bonded sequentially from bottom to top. The high-K gate dielectric layer (3) is provided with an array of graphene strips (4) and an open resonant ring metal (5). The open resonant ring metal (5) surrounds the graphene strips (4) and is in physical contact with the graphene strips (4).

2. The modulator manufacturing method according to claim 1, characterized in that, The corrosion solution is a potassium iodide solution with a component ratio of KI:I2:H2O = 500g:150g:5000ml, and the corrosion removal lasts for 10-15 seconds.

3. The modulator manufacturing method according to claim 1, characterized in that, The high-K gate dielectric is Al2O3 or HfO2.

4. The modulator manufacturing method according to claim 1, characterized in that, The sol-exfoliation technique involves first immersing the sample in an acetone solution for 60 minutes to remove the photoresist, then transferring the sample to an ethanol solution for 10 minutes, finally washing the sample in deionized water, and then drying the sample surface using a nitrogen gun.

5. The modulator manufacturing method according to claim 1, characterized in that, The resistivity of the high-resistivity substrate is ≥10000Ω•cm.

6. The modulator manufacturing method according to claim 1, characterized in that, The graphene back gate electrode layer (2) is a single layer of graphene on which the back gate electrode is prepared.

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