Motor control system control method, device, storage medium and vehicle

Abstract

The application discloses a kind of control method, device, storage medium and vehicle of motor control system.The method comprises: obtaining the working state of motor control system;In response to the working state being fault state, control programmable chip of motor control system and logic chip of motor control system enter fault detection state;In response to programmable chip successfully entering fault detection state, and logic chip successfully enters fault detection state, the pulse width modulation signal of programmable chip and the pulse width modulation signal of logic chip are carried out logic operation, and operation result is obtained, wherein, operation result is used to represent the correlation between the pulse width modulation signal of programmable chip and the pulse width modulation signal of logic chip;Based on operation result, control motor control system, and obtain control result.The application solves the technical problem that the safety of motor control is lower.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of motor control, in particular to a control method and device of a motor control system, a storage medium and a vehicle. BACKGROUND

[0002] At present, in the safety protection of the current motor controller, the direct current of the vehicle-mounted battery is usually inverted into three-phase alternating current for driving the motor to rotate and driving the vehicle to run. However, when the motor controller or the motor fails during the running of the vehicle, the vehicle cannot run according to the indication of the motor controller, and the phenomenon of vehicle emergency stop or failure to control the normal running of the vehicle occurs, thereby causing the technical problem of low safety of motor control.

[0003] At present, no effective solution has been proposed for the above technical problem of low safety of motor control. SUMMARY

[0004] The embodiments of the present application provide a control method and device of a motor control system, a storage medium and a vehicle to at least solve the technical problem of low safety of motor control.

[0005] According to an aspect of the embodiments of the present application, a control method of a motor control system is provided. The method can include: obtaining a working state of the motor control system; in response to the working state being a fault state, controlling a programmable chip of the motor control system and a logic chip of the motor control system to enter a fault detection state; in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, performing logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip to obtain an operation result, wherein the operation result is used to represent the correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip; and based on the operation result, controlling the motor control system to obtain a control result.

[0006] Optionally, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, performing logical operation on the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to obtain an operation result includes: inputting the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to a target logic chip for AND operation to obtain the operation result.

[0007] Optionally, based on the operation result, the motor control system is controlled to obtain a control result, including: in response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip and the logic chip to obtain the control result; and in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip or the logic chip to obtain the control result.

[0008] Optionally, in response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip and the logic chip to obtain a control result, including: the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are output to a driving unit of the motor control system, and the driving unit controls the motor control system by the programmable chip and the logic chip to obtain the control result.

[0009] Optionally, in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip or the logic chip to obtain a control result, including: a power unit of the motor control system is controlled to change a state of a switch of the power unit, and states of the programmable chip and the logic chip are detected to obtain a detection result; in response to the detection result being that the programmable chip is in a fault state, the motor control system is controlled by the logic chip to obtain the control result; and in response to the detection result being that the logic chip is in a fault state, the motor control system is controlled by the programmable chip to obtain the control result.

[0010] Optionally, the working state of the motor control system is obtained, including: a state of the motor control system is detected to obtain the working state.

[0011] According to an aspect of an embodiment of the present application, a control device of a motor control system is provided. The device can include: an obtaining unit configured to obtain a working state of the motor control system; a first control unit configured to, in response to the working state being a fault state, control a programmable chip of the motor control system and a logic chip of the motor control system to enter a fault detection state; an operation unit configured to, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, perform a logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip to obtain an operation result, wherein the operation result is used to represent a correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip; and a second control unit configured to, based on the operation result, control the motor control system to obtain a control result.

[0012] According to another aspect of the embodiments of the present application, a computer readable storage medium is also provided. The computer readable storage medium includes a stored program, wherein the program, when executed by a device in which the computer readable storage medium is located, controls the device to perform the control method of the motor control system according to the embodiments of the present application.

[0013] According to another aspect of the embodiments of the present application, a processor is also provided. The processor is configured to execute a program, wherein the program, when executed by the processor, performs the control method of the motor control system according to the embodiments of the present application.

[0014] According to another aspect of the embodiments of the present application, a vehicle is also provided. The vehicle is configured to perform the control method of the motor control system according to the embodiments of the present application.

[0015] In the embodiments of the present application, the working state of the motor control system is acquired, and it is determined whether the working state of the motor control system is a fault state. If the working state is the fault state, the programmable chip of the motor control system and the logic chip of the motor control system are controlled to enter a fault detection state. After the programmable chip successfully enters the fault detection state and the logic chip successfully enters the fault detection state, the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are logically operated to obtain an operation result. Whether the pulse width modulation signal of the programmable chip is consistent with the pulse width modulation signal of the logic chip is determined to determine which chip is used to control the motor control system to obtain a control result. Thus, the purpose of double safety logic protection is achieved, and the technical problem of low safety of motor control is solved, and the technical effect of improving the safety of motor control is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0016] The accompanying drawings, which are included to provide a further understanding of the present application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and together with the description serve to explain the present application. In the drawings:

[0017] Figure 1 is a flowchart of a control method of a motor control system according to an embodiment of the present application;

[0018] Figure 2 is a schematic diagram of a safety protection circuit of a motor controller according to an embodiment of the present application;

[0019] Figure 3 is a schematic diagram of an internal circuit of a digital logic chip according to an embodiment of the present application;

[0020] Figure 4 is a schematic diagram of a control device of a motor control system according to an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts should fall within the scope of the present application.

[0022] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units does not necessarily have to be limited to only those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to the process, method, product, or device.

[0023] Embodiment 1

[0024] According to an embodiment of the present application, a control method of a motor control system is provided. It should be noted that the steps shown in the flowchart of the drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical sequence is shown in the flowchart, in some cases, the steps shown or described herein can be executed in an order different from that shown herein.

[0025] Figure 1 is a flowchart of a control method of a motor control system according to an embodiment of the present application, which can include the following steps:

[0026] Step S101, obtaining the working state of the motor control system.

[0027] In the technical scheme provided in step S101 of the present application, the motor control system can be a motor controller, and the working state can be used to indicate that a drive unit or a power unit in the motor control system has failed.

[0028] Optionally, the motor control system can invert the direct current of the vehicle-mounted battery into three-phase alternating current, thereby driving the motor to rotate and driving the vehicle to run. The working state of the motor control system is detected in real time when the motor control system is in the running process, so that the latest working state of the motor control system can be obtained.

[0029] In step S102, in response to the working state being the fault state, the programmable chip of the motor control system and the logic chip of the motor control system are controlled to enter a fault detection state.

[0030] In the technical solution provided in step S102 of the present application, the programmable chip of the motor control system can be a complex programmable logic chip (CPLD), and the logic chip of the motor control system can be a digital logic chip.

[0031] Optionally, after obtaining the working state of the motor control system, in response to the working state being the fault state, the CPLD of the motor control system and the digital logic chip of the motor control system are controlled to enter the fault detection state. For example, whether the working state of the motor control system is the fault state is judged. If the working state is the fault state, the CPLD of the motor control system and the digital logic chip of the motor control system are controlled to enter the fault detection state. If the working state is not the fault state, the CPLD of the motor control system and the digital logic chip of the motor control system do not need to enter the fault detection state. This is only an example and is not limited.

[0032] Optionally, if the CPLD enters the fault detection state, the fault signal is latched, and the control unit of the motor control system is waited to read and clear the fault. The control unit sends a reset (Reset) or fault clear (Fault_Clear) signal according to the state of the CPLD. The CPLD enters the working mode and outputs a pulse width modulation (PWM) signal or performs an active short circuit function according to the fault type.

[0033] Optionally, if the digital logic chip enters the fault detection state, the PWM signal output is turned to a high resistance state according to the fault signal, the circuit is safely turned off, and the control unit detects the fault signal. According to the fault type, an active short circuit function is performed or the digital logic chip is set to a high resistance state.

[0034] In step S103, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are logically operated to obtain an operation result.

[0035] In the technical solution provided in step S103 of the present application, the pulse width modulation signal can be a PWM signal, the logical operation can be an AND operation, and the operation result can be used to represent the correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip.

[0036] Optionally, after the programmable chip of the motor control system and the logic chip of the motor control system are controlled to enter the fault detection state in response to the working state being the fault state, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are logically operated to obtain an operation result, for example, whether the CPLD successfully enters the fault detection state is judged and whether the digital logic chip successfully enters the fault detection state is judged, if the CPLD successfully enters the fault detection state and the digital logic chip successfully enters the fault detection state, the PWM signal of the CPLD and the PWM signal of the digital logic chip are logically operated to obtain the correlation between the PWM signal of the CPLD and the PWM signal of the digital logic chip, which is only used as an example and is not limited.

[0037] Step S104, based on the operation result, the motor control system is controlled to obtain a control result.

[0038] In the technical scheme provided by the above step S104 of the present application, the above control of the motor control system can be used to represent the safety protection of the motor control system, and the above control result can be used to represent the result of the safety protection of the motor control system.

[0039] Optionally, after the programmable chip of the motor control system and the logic chip of the motor control system are controlled to enter the fault detection state in response to the working state being the fault state, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are logically operated to obtain an operation result, for example, whether the CPLD successfully enters the fault detection state is judged and whether the digital logic chip successfully enters the fault detection state is judged, if the CPLD successfully enters the fault detection state and the digital logic chip successfully enters the fault detection state, the PWM signal of the CPLD and the PWM signal of the digital logic chip are logically operated to obtain the correlation between the PWM signal of the CPLD and the PWM signal of the digital logic chip, which is only used as an example and is not limited.

[0040] The steps S101 to S104 of the application above acquire the working state of the motor control system, judge whether the working state of the motor control system is a fault state, if the working state is a fault state, control the programmable chip of the motor control system and the logic chip of the motor control system to enter a fault detection state, after the programmable chip successfully enters the fault detection state and the logic chip successfully enters the fault detection state, perform logical operation on the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to obtain an operation result, determine which chip to use to control the motor control system according to whether the pulse width modulation signal of the programmable chip is consistent with the pulse width modulation signal of the logic chip, and obtain a control result, so as to achieve the purpose of double safety logic protection, and further solve the technical problem of low safety of motor control, and achieve the technical effect of improving the safety of motor control.

[0041] The above method of the embodiment will be further introduced below.

[0042] As an optional embodiment, in step S103, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, performing logical operation on the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to obtain an operation result, including: inputting the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip into a target logic chip for AND operation to obtain an operation result.

[0043] In the embodiment, the above target logic chip can be another digital logic chip in the motor control system.

[0044] Optionally, after the working state is the fault state, the programmable chip of the motor control system and the logic chip of the motor control system are controlled to enter the fault detection state, the PWM signal of the CPLD and the PWM signal of the digital logic chip are input into another digital logic chip in the motor control system, and logical AND operation is performed on the two PWM signals in the digital logic chip, so as to obtain the correlation between the PWM signal of the CPLD and the PWM signal of the digital logic chip.

[0045] Optionally, by inputting the PWM signal of the CPLD and the PWM signal of the digital logic chip into the AND gate of the target logic chip, logical AND operation is performed on the two PWM signals to obtain a result corresponding to the AND operation, and the correlation between the PWM signal of the CPLD and the PWM signal of the digital logic chip is determined according to the result.

[0046] As an optional embodiment, in step S104, the motor control system is controlled based on the operation result to obtain a control result, including: in response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip and the logic chip to obtain the control result; and in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip or the logic chip to obtain the control result.

[0047] In this embodiment, the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip can be used to indicate that the PWM signal of the CPLD is consistent with the PWM signal of the digital logic chip, and the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip can be used to indicate that the PWM signal of the CPLD is inconsistent with the PWM signal of the digital logic chip.

[0048] Optionally, after the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are logically operated in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, and an operation result is obtained, whether the PWM signal of the CPLD is consistent with the PWM signal of the digital logic chip can be determined to determine which chip is used to safely protect the motor control system. If the PWM signal of the CPLD is consistent with the PWM signal of the digital logic chip, the motor control system is safely protected by the CPLD and the digital logic chip to obtain a corresponding control result. If the PWM signal of the CPLD is inconsistent with the PWM signal of the digital logic chip, the motor control system is safely protected by the CPLD or the digital logic chip to obtain a corresponding control result.

[0049] As an optional embodiment, in response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by the programmable chip and the logic chip to obtain a control result, including: the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip are output to a driving unit of the motor control system, and the driving unit controls the motor control system by the programmable chip and the logic chip to obtain the control result.

[0050] In this embodiment, if the PWM signal of the CPLD is consistent with the PWM signal of the digital logic chip, the PWM signal of the CPLD and the PWM signal of the digital logic chip are output to the driving unit of the motor control system, and the driving unit controls the motor control system by the CPLD and the digital logic chip to obtain a corresponding control result.

[0051] Optionally, if the PWM signal of the CPLD is consistent with the PWM signal of the digital logic chip, it can be indicated that the motor control system is fault-free, or it can be indicated that the CPLD and the digital logic chip are fault-free, but overvoltage, overcurrent, short circuit, upper and lower bridge arm faults and the like occur.

[0052] As an optional embodiment, in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, the motor control system is controlled by using the programmable chip or the logic chip to obtain a control result, including: controlling the power unit of the motor control system to change the state of the switch of the power unit, and detecting the state of the programmable chip and the logic chip to obtain a detection result; in response to the detection result being that the programmable chip is in a fault state, the motor control system is controlled by using the logic chip to obtain a control result; and in response to the detection result being that the logic chip is in a fault state, the motor control system is controlled by using the programmable chip to obtain a control result.

[0053] In this embodiment, if the PWM signal of the CPLD is inconsistent with the PWM signal of the digital logic chip, the power unit of the motor control system is controlled to change the state of the switch of the power unit, and the state of the CPLD and the digital logic chip is detected to obtain a detection result, if the detection result is that the CPLD is in a fault state, the motor control system is controlled by using the digital logic chip to obtain a corresponding control result, and if the detection result is that the digital logic chip is in a fault state, the motor control system is controlled by using the CPLD to obtain a corresponding control result.

[0054] Optionally, if the PWM signal of the CPLD is inconsistent with the PWM signal of the digital logic chip, the power supply unit of the motor control system is disconnected from the power supply of the chip that has failed, while the chip that has not failed continues to work, so as to achieve the purpose of double safety logic protection.

[0055] As an optional embodiment, in step S101, the working state of the motor control system is obtained, including: detecting the state of the motor control system to obtain the working state.

[0056] In this embodiment, when the motor control system is in the running process, the working state of the motor control system is detected in real time by a detection device, so as to obtain the latest working state of the motor control system, wherein the detection device can include a current sensor, a voltage sensor and a speed sensor, etc., which are only exemplified here and are not limited in particular.

[0057] The embodiment obtains the working state of the motor control system, judges whether the working state of the motor control system is a fault state, controls the programmable chip of the motor control system and the logic chip of the motor control system to enter a fault detection state if the working state is a fault state, and performs logic operation on the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip after the programmable chip successfully enters the fault detection state and the logic chip successfully enters the fault detection state, obtains an operation result, determines which chip is used to control the motor control system according to whether the pulse width modulation signal of the programmable chip is consistent with the pulse width modulation signal of the logic chip, and obtains a control result, thereby solving the technical problem of low safety of motor control and achieving the technical effect of improving the safety of motor control.

[0058] Embodiment 2

[0059] The technical solutions of the embodiments of the application will be described below in conjunction with preferred embodiments.

[0060] In the current safety protection of the motor controller, the direct current of the vehicle-mounted battery is usually inverted into three-phase alternating current for driving the motor to rotate and driving the vehicle to run. However, when the motor controller or the motor fails during the running of the vehicle, the vehicle cannot run according to the indication of the motor controller, and the vehicle may suddenly stop or cannot be controlled to run normally, thereby causing the technical problem of low safety of motor control. Therefore, a control method of a motor control system is needed to ensure that the safety of motor control can be improved.

[0061] In a related technology, a motor switching control method is disclosed, which includes: obtaining function requirement information of a motor to be controlled; generating a function setting code according to the function requirement information, and setting an application macro of a frequency converter through the function setting code; switching and connecting the frequency converter to the motor to be controlled, and reading motor control instructions in the set application macro; and adjusting the running parameters of the motor to be controlled according to the motor control instructions by using the frequency converter, wherein the running parameters include performance setting parameters, motor setting parameters and function setting parameters. However, the motor switching control method only obtains the function requirement of the motor to be controlled, then customizes the function parameters of the application macro according to the function requirement, and controls the function of the motor to be controlled according to the application macro set adaptively, which cannot reuse the CPLD and the digital chip, cannot detect the fault of the driving motor synchronously, and thus cannot ensure that the safety of motor control can be improved.

[0062] However, the embodiment of the present application proposes a safety protection method for a motor controller, through multiplexing of CPLD and digital chips, synchronous detection of driving motor failure can be realized, when one kind of chip fails, the other kind of chip can continue to work, the purpose of realizing double safety logic protection is achieved, the technical problem of low safety of motor control is solved, and the technical effect of improving the safety of motor control is realized.

[0063] Figure 2 is a schematic diagram of a safety protection circuit of a motor controller according to the embodiment of the present application, as Figure 2 shown, the power supply unit 201 can communicate with the control unit 202, the control unit 202 can communicate with the CPLD 203, the control unit 202 can communicate with the digital logic chip 204, the CPLD 203 and the digital logic chip 204 can respectively communicate with the digital logic chip 205, the digital logic chip 205 can communicate with the driving unit 206, the driving unit 206 can communicate with the power unit 207, the power unit 207 can communicate with the bus voltage sampling unit 208, and the power unit 207 can communicate with the current sampling unit 209.

[0064] Optionally, the power supply unit 201 can transmit a power (Power) signal to the control unit 202, the CPLD 203 and the digital logic chip 204, the power supply unit 201 can communicate with the control unit 202 through a serial peripheral interface (Serial Peripheral Interface, SPI for short), the control unit 202 can transmit a reset (Reset) signal, a fault clear (Fault_Clear) signal and a PWM signal to the CPLD 203, the CPLD 203 can transmit a fault (Fault) signal to the control unit 202, the control unit 202 can transmit a set (Set) signal, an active short-circuit enable (ASC_EN) signal and a PWM signal to the digital logic chip 204, the digital logic chip 204 can transmit a fault (Fault) signal to the control unit 202, the CPLD 203 can transmit the output PWM signal to the digital logic chip 205, and the digital logic chip 204 can transmit the output PWM signal to the digital logic chip 205.

[0065] Optionally, the PWM signal of the CPLD 203 and the PWM signal of the digital logic chip 204 are logically ANDed in the digital logic chip 205, when the signals of the two are consistent, the normal output is output to the driving unit 206, and when the signals of the two are inconsistent, the PWM is pulled down through AND operation.

[0066] Optionally, the driving unit 206 can transmit the upper bridge arm fault (Fault_T) signal, the lower bridge arm fault (Fault_B) signal and the short circuit (ASC) signal to the CPLD 203, the CPLD 203 can transmit the ASC_EN signal to the driving unit 206, the bus voltage sampling unit 208 can transmit the sampling voltage (Voltage) signal to the CPLD 203, the current sampling unit 209 can transmit the sampling current (Current) signal to the CPLD 203, the driving unit 206 can transmit the upper bridge arm fault (Fault_T) signal, the lower bridge arm fault (Fault_B) signal and the short circuit (ASC) signal to the digital logic chip 204, the bus voltage sampling unit 208 can transmit the sampling voltage (Voltage) signal to the digital logic chip 204, and the current sampling unit 209 can transmit the sampling current (Current) signal to the digital logic chip 204.

[0067] Optionally, the power unit 207 can include 6 switch tubes Q1 to Q6, and the above-mentioned switch tubes Q1 to Q6 can be controlled by 6 PWM signals, for example, if the PWM for controlling the switch tube Q1 is high level, the PWM for controlling the switch tube Q2 is high level, and the PWM for controlling the switch tube Q6 is high level, the switch tube Q1 is turned on, the switch tube Q2 is turned on, and the switch tube Q6 is turned on; if the PWM for controlling the switch tube Q2 is high level, the PWM for controlling the switch tube Q3 is high level, and the PWM for controlling the switch tube Q4 is high level, the switch tube Q2 is turned on, the switch tube Q3 is turned on, and the switch tube Q4 is turned on; if the PWM for controlling the switch tube Q1 is high level, the PWM for controlling the switch tube Q5 is high level, and the PWM for controlling the switch tube Q6 is high level, the switch tube Q1 is turned on, the switch tube Q5 is turned on, and the switch tube Q6 is turned on, and different switch combinations alternately generate three-phase alternating current to drive the motor to run.

[0068] Figure 3 is a schematic diagram of an internal circuit of a digital logic chip according to an embodiment of the present application, as Figure 3 shown, the Fault_T signal, the Fault_B signal, the Voltage signal, the Current signal and the ASC signal can be input into the encoder 301, and the output signal of the encoder 301 can be connected to a control unit, wherein the control unit can output the Reset signal or the ASC_EN signal according to the state of the fault signal.

[0069] Optionally, the control unit can implement active short circuit in different fault states according to the encoder signal (for example, active short circuit is performed in the ASC fault-free state, the control unit detects that the ASC is at a high level and then sends the ASC_EN signal, otherwise the active short circuit function is not performed). The above signals are simultaneously input into the AND gate 302, and the output is connected to the control pin of the driver 303 through the NOT gate The Set signal is directly connected to another pin of the driver 303 The upper and lower bridge arm fault signals and the active short circuit enable signal are connected to the 6-way PWM signal through the AND gate 1 and the AND gate 2 after being connected to a Schottky diode.

[0070] Table 1: Function table of the driver

[0071]

[0072] Optionally, the function table of the driver is as shown in the above table, any one of the pins and is pulled high, and the output is all in a high resistance state. In the digital logic chip 204, the priority of the Set signal is higher, if the control unit sends a high level Set signal, the pin is at a high level, the driver outputs all in a high resistance state, realizing the safety protection of the motor controller; when the upper and lower bridge arms fail, short circuit, overcurrent, overvoltage and other faults occur, the fault signal is at a low level, the AND gate outputs a low level, which is converted into a high level by the NOT gate and input into the pin , the driver outputs all in a high resistance state, realizing the safety protection of the motor controller; if the bridge arm of the power unit fails, the active short circuit function is performed according to the different bridge arm faults. When the upper bridge arm fails (Fault_T) and the lower bridge arm is fault-free, the control unit sends a high level ASC_EN signal, the AND gate 1 outputs a low level, and the AND gate 2 outputs a high level, the three phases of the lower bridge arm are all pulled high, realizing the active short circuit of the lower bridge arm; when the lower bridge arm fails (Fault_B) and the upper bridge arm is fault-free, the control unit sends a high level active short circuit enable signal, the AND gate 1 outputs a high level, and the AND gate 2 outputs a low level, the three phases of the upper bridge arm are all pulled high, realizing the active short circuit of the upper bridge arm.

[0073] In this embodiment, the motor control system is set by setting the power supply unit, the control unit, the driving unit, the power unit, the digital logic chip, the CPLD, and the information sampling unit. In the completed motor control system, the CPLD and the digital logic chip are multiplexed to synchronously detect the driving motor fault, when one of the chips fails, the other chip can continue to work normally, thereby solving the technical problem that the safety of the motor control is low, and achieving the technical effect that the safety of the motor control can be improved.

[0074] Embodiment 3

[0075] According to an embodiment of the present application, a control device of a motor control system is also provided. It should be noted that the control device of the motor control system can be used to execute the control method of the motor control system in embodiment 1.

[0076] Figure 4 is a schematic diagram of a control device of a motor control system according to an embodiment of the present application. As shown in Figure 4 the control device 400 of the motor control system can include an acquisition unit 401, a first control unit 402, an operation unit 403 and a second control unit 404.

[0077] The acquisition unit 401 is configured to acquire a working state of the motor control system.

[0078] The first control unit 402 is configured to, in response to the working state being a fault state, control a programmable chip of the motor control system and a logic chip of the motor control system to enter a fault detection state.

[0079] The operation unit 403 is configured to, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, perform logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip to obtain an operation result, wherein the operation result is used to represent a correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip.

[0080] The second control unit 404 is configured to control the motor control system based on the operation result to obtain a control result.

[0081] Optionally, the operation unit 403 can include an operation module configured to input the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to a target logic chip for AND operation to obtain the operation result.

[0082] Optionally, the second control unit 404 can include a first response module configured to, in response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, control the motor control system by using the programmable chip and the logic chip to obtain the control result; and a second response module configured to, in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, control the motor control system by using the programmable chip or the logic chip to obtain the control result.

[0083] Optionally, the first response module can comprise a first control submodule for outputting the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to a driving unit of the motor control system, controlling the driving unit to control the motor control system by using the programmable chip and the logic chip, and obtaining a control result.

[0084] Optionally, the second response module can comprise a second control submodule for controlling a power unit of the motor control system to change a state of a switch of the power unit, detecting states of the programmable chip and the logic chip, and obtaining a detection result; a first response submodule for, in response to the detection result being that the programmable chip is in a fault state, controlling the motor control system by using the logic chip, and obtaining a control result; and a second response submodule for, in response to the detection result being that the logic chip is in a fault state, controlling the motor control system by using the programmable chip, and obtaining a control result.

[0085] Optionally, the acquisition unit 401 can comprise a detection module for detecting a state of the motor control system, and obtaining a working state.

[0086] In this embodiment, the acquisition unit is configured to acquire a working state of the motor control system; the first control unit is configured to, in response to the working state being a fault state, control a programmable chip of the motor control system and a logic chip of the motor control system to enter a fault detection state; the operation unit is configured to, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, perform logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip, and obtain an operation result, where the operation result is used to represent a correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip; and the second control unit is configured to control the motor control system based on the operation result, and obtain a control result, thereby solving the technical problem of low safety of motor control and achieving the technical effect of improving the safety of motor control.

[0087] Embodiment 4

[0088] According to the embodiments of the present application, a computer readable storage medium is also provided, which comprises a stored program, where the program performs the control method of the motor control system in the embodiment 1 when executed.

[0089] Embodiment 5

[0090] According to the embodiments of the present application, a processor is also provided, which is used to run a program, where the program performs the control method of the motor control system in the embodiment 1 when executed by the processor.

[0091] Embodiment 6

[0092] According to the embodiment of the present application, a vehicle is also provided for performing the control method of any one of the motor control systems in Embodiment 1.

[0093] The above-mentioned embodiment numbers of the present application are only for description, and do not represent the advantages or disadvantages of the embodiments.

[0094] In the above-mentioned embodiments of the present application, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0095] In several embodiments provided in the present application, it should be understood that the disclosed technical contents can be implemented by other ways. Among them, the above-mentioned device embodiments are only schematic, for example, the division of units can be a logical function division, and actual implementation can have another division way, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or modules shown or discussed can be indirect coupling or communication connection through some interfaces, and can be electrical or other forms.

[0096] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed to multiple units. Part or all of the units can be selected according to actual needs to achieve the purpose of the present embodiment scheme.

[0097] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be realized in the form of hardware or in the form of software functional unit.

[0098] If the integrated unit is realized in the form of software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such understanding, the technical scheme of the present application or the essential part or all or part of the technical scheme which makes contribution to the prior art can be embodied in the form of software product, which is stored in a storage medium and includes a plurality of instructions for making a computer device (which can be a personal computer, a server or a network device, etc.) execute all or part of the steps of the method of each embodiment of the present application. The above-mentioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disk or optical disk and various program code storage media.

[0099] The above merely preferred embodiments of the present application, it should be noted that for those of ordinary skill in the art, without departing from the principles of the present application, can also make a number of improvements and refinements, these improvements and refinements should also be considered within the scope of the present application.

Claims

1. A control method of an electric motor control system, characterized by, The method comprises: acquiring a working state of the motor control system; in response to the working state being a fault state, controlling a programmable chip of the motor control system and a logic chip of the motor control system to enter a fault detection state; in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, performing logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip to obtain an operation result, wherein the operation result is used to represent a correlation between the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip; based on the operation result, controlling the motor control system to obtain a control result; wherein based on the operation result, controlling the motor control system to obtain a control result comprises: in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, using the programmable chip or the logic chip to control the motor control system to obtain the control result; in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, using the programmable chip or the logic chip to control the motor control system to obtain the control result comprises: controlling a power unit of the motor control system to change a state of a switch of the power unit, and detecting states of the programmable chip and the logic chip to obtain a detection result; in response to the detection result being that the programmable chip is in a fault state, using the logic chip to control the motor control system to obtain the control result; in response to the detection result being that the logic chip is in a fault state, using the programmable chip to control the motor control system to obtain the control result; the method further comprises: in response to the programmable chip entering the fault detection state, a control unit of the motor control system sends a reset signal or a fault clearing signal according to a state of the programmable chip, the programmable chip enters a working mode and outputs a pulse width modulation signal or performs an active short circuit function according to a fault type of the programmable chip; in response to the logic chip entering the fault detection state, the pulse width modulation signal output is converted to a high impedance state according to a fault signal, and the control unit performs an active short circuit function according to a fault type of the logic chip or sets the logic chip to the high impedance state.

2. The method of claim 1, wherein, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, performing logical operation on a pulse width modulation signal of the programmable chip and a pulse width modulation signal of the logic chip to obtain an operation result comprises: inputting the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip into a target logic chip for AND operation to obtain the operation result.

3. The method of claim 1, wherein, Control the motor control system based on the operation result to obtain a control result, including: In response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, control the motor control system by using the programmable chip and the logic chip to obtain the control result.

4. The method of claim 3, wherein, In response to the pulse width modulation signal of the programmable chip being consistent with the pulse width modulation signal of the logic chip, control the motor control system by using the programmable chip and the logic chip to obtain the control result, including: Output the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to the driving unit of the motor control system, and control the driving unit to control the motor control system by using the programmable chip and the logic chip to obtain the control result.

5. The method of claim 1, wherein, Obtain the working state of the motor control system, including: Detect the state of the motor control system to obtain the working state.

6. A control device of an electric motor control system characterized by comprising: Including: An obtaining unit is configured to obtain the working state of the motor control system; A first control unit is configured to, in response to the working state being a fault state, control the programmable chip of the motor control system and the logic chip of the motor control system to enter a fault detection state; An operation unit is configured to, in response to the programmable chip successfully entering the fault detection state and the logic chip successfully entering the fault detection state, perform logical operation on the pulse width modulation signal of the programmable chip and the pulse width modulation signal of the logic chip to obtain an operation result, wherein the operation result is used to represent the correlation between the pulse width modulation signal and the pulse width modulation signal; A second control unit is configured to control the motor control system based on the operation result to obtain a control result; The second control unit is further configured to, in response to the pulse width modulation signal of the programmable chip being inconsistent with the pulse width modulation signal of the logic chip, control the motor control system by using the programmable chip or the logic chip to obtain the control result; The second control unit is further configured to control a power unit of the motor control system to change the state of a switch of the power unit, and detect the state of the programmable chip and the logic chip to obtain a detection result; in response to the detection result being that the programmable chip is in a fault state, control the motor control system by using the logic chip to obtain the control result; and in response to the detection result being that the logic chip is in a fault state, control the motor control system by using the programmable chip to obtain the control result; The first control unit is further configured to, in response to the programmable chip entering the fault detection state, send a reset signal or a fault clearing signal according to a state of the programmable chip, and the control unit of the motor control system enters a working mode and outputs a pulse width modulation signal or performs an active short circuit function according to a fault type of the programmable chip; in response to the logic chip entering the fault detection state, output the pulse width modulation signal to a high impedance state according to a fault signal, and simultaneously perform an active short circuit function according to a fault type of the logic chip or set the logic chip to the high impedance state by the control unit.

7. A computer readable storage medium characterized by The computer readable storage medium comprises a stored program, wherein the program controls a device where the computer readable storage medium is located to execute the control method of the motor control system according to any one of claims 1 to 5 when the program is running.

8. A processor, comprising: The processor is configured to run a program, wherein the program is executed to perform the control method of the motor control system according to any one of claims 1 to 5 when the program is run by the processor.

9. A vehicle characterized by comprising: The vehicle is configured to perform the control method of the motor control system according to any one of claims 1 to 5.

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