Method, device and equipment for controlling a three-chip redundant automotive brake controller

Abstract

The application relates to the technical field of automobile control, in particular to a control method, device and equipment of a three-chip redundant automobile brake controller, the automobile brake controller comprising a main controller, a first auxiliary controller and a second auxiliary controller, wherein the method comprises the following steps: detecting a current working state of the main controller; judging whether the current working state meets preset failure conditions; if the current working state meets the preset failure conditions, performing brake control on the automobile based on the first auxiliary controller and / or the second auxiliary controller, otherwise, performing brake control on the automobile based on only the main controller. Thus, the problem that vehicle functions cannot be maintained when a key chip of a brake system fails is solved, redundancy backup is realized, safety and reliability are increased, and the chip resource requirement for the auxiliary chip is reduced.

Description

Technical Field

[0001] This application relates to the field of automotive control technology, and in particular to a control method, device and equipment for a three-chip redundant automotive brake controller. Background Technology

[0002] Controller circuit boards are widely used in consumer, industrial, and automotive sectors, serving as the hardware platform for numerous control systems. In automotive braking systems, the controller is a key core component, responsible for calculating, processing, executing, and releasing commands for the overall system.

[0003] However, most existing automotive brake controllers use a single master control chip, with a single MCU (Microcontroller Unit) handling the entire circuit. When this MCU fails, all braking is lost, the controller cannot perform calculations, and the actuators do not receive corresponding instructions, resulting in poor safety performance and an inability to maintain functionality when a fault occurs. This issue urgently needs to be addressed. Summary of the Invention

[0004] This application provides a control method, device, and equipment for a three-chip redundant automotive brake controller, which solves the problem that vehicle functions cannot be maintained when a key chip in the braking system fails, thereby increasing safety and reliability and reducing the chip resource requirements for auxiliary chips.

[0005] The first aspect of this application provides a control method for a three-chip redundant automotive brake controller. The automotive brake controller includes a main controller, a first auxiliary controller, and a second auxiliary controller. The method includes the following steps: detecting the current operating state of the main controller; determining whether the current operating state meets a preset failure condition; if the current operating state meets the preset failure condition, then braking control of the vehicle is performed based on the first auxiliary controller and / or the second auxiliary controller; otherwise, braking control of the vehicle is performed only based on the main controller.

[0006] Optionally, the control method of the above-mentioned three-chip redundant automotive brake controller further includes: acquiring a first signal collected by the main controller, a second signal collected by the first auxiliary controller, and a third signal collected by the second auxiliary controller; calculating the average signal value of the first signal, the second signal, and the third signal, and selecting a first target signal and a second target signal that are closest to the average signal value from the first signal, the second signal, and the third signal; and performing brake control based on the first target signal and the second target signal.

[0007] Optionally, the first auxiliary controller and the main controller communicate using pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

[0008] Optionally, the second auxiliary controller communicates with the main controller using the PWM signal and the IIC signal.

[0009] A second aspect of this application provides a control device for a three-chip redundant automotive brake controller. The automotive brake controller includes a main controller, a first auxiliary controller, and a second auxiliary controller. The device includes: a detection module for detecting the current operating state of the main controller; a judgment module for judging whether the current operating state meets a preset failure condition; and a first control module for performing braking control on the vehicle based on the first auxiliary controller and / or the second auxiliary controller if the current operating state meets the preset failure condition, otherwise performing braking control on the vehicle only based on the main controller.

[0010] Optionally, the control device of the above-mentioned three-chip redundant automotive brake controller further includes: an acquisition module, used to acquire a first signal collected by the main controller, a second signal collected by the first auxiliary controller, and a third signal collected by the second auxiliary controller; a calculation module, used to calculate the average signal value of the first signal, the second signal, and the third signal, and to filter out a first target signal and a second target signal that are closest to the average signal value from the first signal, the second signal, and the third signal; and a second control module, used to perform braking control based on the first target signal and the second target signal.

[0011] Optionally, the first auxiliary controller and the main controller communicate using pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

[0012] Optionally, the second auxiliary controller communicates with the main controller using the PWM signal and the IIC signal.

[0013] A third aspect of this application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the control method of the three-chip redundant automotive brake controller as described in the above embodiments.

[0014] A fourth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which is executed by a processor to implement the control method of the three-chip redundant automotive brake controller as described in the above embodiments.

[0015] This application detects the current operating state of the main controller. When the current operating state meets preset failure conditions, braking control of the vehicle is performed based on the first auxiliary controller and / or the second auxiliary controller; otherwise, braking control of the vehicle is performed solely based on the main controller. This solves the problem of vehicle functionality failing when a critical chip in the braking system malfunctions, increasing safety and reliability while reducing the chip resource requirements for auxiliary chips.

[0016] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0017] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0018] Figure 1 This is a flowchart illustrating a control method for a three-chip redundant automotive brake controller according to an embodiment of this application.

[0019] Figure 2 This is a schematic block diagram of a control method for a three-chip redundant automotive brake controller according to an embodiment of this application.

[0020] Figure 3 This is an example diagram of a control device for a three-chip redundant automotive brake controller according to an embodiment of this application;

[0021] Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0022] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0023] The following description, with reference to the accompanying drawings, describes a control method, apparatus, and device for a three-chip redundant automotive brake controller according to embodiments of this application. Addressing the problem mentioned in the background art where vehicle functionality cannot be maintained when a critical chip in the braking system fails, this application provides a control method for a three-chip redundant automotive brake controller. In this method, by detecting the current operating state of the main controller, if the current operating state meets preset failure conditions, braking control of the vehicle is performed based on a first auxiliary controller and / or a second auxiliary controller; otherwise, braking control of the vehicle is performed solely based on the main controller. This solves the problem of vehicle functionality not being maintained when a critical chip in the braking system fails, increasing safety and reliability while reducing the chip resource requirements for auxiliary chips.

[0024] Specifically, Figure 1 This is a flowchart illustrating a control method for a three-chip redundant automotive brake controller provided in an embodiment of this application.

[0025] like Figure 1 As shown, the control method of this three-chip redundant automotive brake controller includes the following steps:

[0026] In step S101, the current operating status of the main controller is detected. The operating status includes the running status and the failure status.

[0027] Optionally, in some embodiments, the first auxiliary controller communicates with the main controller using pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

[0028] Optionally, in some embodiments, the second auxiliary controller communicates with the main controller using PWM signals and IIC signals.

[0029] The vehicle brake controller includes a main controller, a first auxiliary controller, and a second auxiliary controller.

[0030] like Figure 2 As shown, the main controller is a 32-bit MCU, while the first and second auxiliary controllers are both 16-bit MCUs. One MCU controls the ESC (Electronic-Stability-Controller) module for vehicle braking, and the other MCU controls the EPB (Electronic Parking Brake) module for vehicle braking. Normally, the first and second auxiliary controllers only acquire signals and do not perform control. Internal communication is not done via CAN, but through pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals to communicate with the main MCU. This results in low data signal transmission volume and ensures safety and reliability.

[0031] Specifically, such as Figure 2 As shown, a 16-bit MCU pin is connected to the bridge drive circuit, warning light, vehicle speed / wheel speed hardwired output interface, wheel speed interface, enable module, power supply module, and CAN communication module, respectively. A 32-bit MCU pin is connected to two 16-bit MCUs, monitoring module, wheel speed interface, warning light, PWM pulse width modulation circuit, vehicle speed / wheel speed hardwired output interface, enable module, power supply module, CAN communication module, magnetoelectric wheel speed signal processor, and watchdog timer, respectively. Another 16-bit MCU is connected to the PWM pulse width modulation circuit, vehicle speed / wheel speed hardwired output interface, wheel speed interface, and warning light, respectively.

[0032] Furthermore, it should be understood that an MCU includes at least random access memory (RAM), read-only memory (ROM), and a central processing unit (CPU). This application performs status checks on the MCU's RAM, ROM, and CPU respectively to determine the current operating state of the main controller.

[0033] In step S102, it is determined whether the current working state meets the preset failure conditions.

[0034] Specifically, in this embodiment, the RAM region to be detected in the MCU is first determined, and the data read from the RAM region is compared with the preset input detection value. If the comparison is inconsistent, it indicates that there is an abnormality in the RAM; otherwise, it indicates that there is no abnormality in the RAM.

[0035] Furthermore, the sequence code of the data to be tested is determined from the program storage area, and the corresponding check code is determined. The check code is compared with the pre-stored check code. If the comparison is inconsistent, it indicates that there is an abnormality in the ROM; otherwise, it indicates that there is no abnormality in the ROM.

[0036] Furthermore, the data read from the register to be tested is compared with the pre-input test value. If the comparison is inconsistent, it indicates that the CPU is abnormal; otherwise, it indicates that the CPU is not abnormal.

[0037] If at least one of the MCU's random access memory (RAM), read-only memory (ROM), or central processing unit (CPU) malfunctions, the current operating state of the main controller is determined to be a failure state, i.e., the preset failure condition is met.

[0038] In step S103, if the current working state meets the preset failure conditions, the vehicle is braked based on the first auxiliary controller and / or the second auxiliary controller; otherwise, the vehicle is braked based only on the main controller.

[0039] Optionally, in some embodiments, the control method of the above-described three-chip redundant automotive brake controller further includes: acquiring a first signal collected by the main controller, a second signal collected by the first auxiliary controller, and a third signal collected by the second auxiliary controller; calculating the average signal value of the first signal, the second signal, and the third signal, and selecting a first target signal and a second target signal that are closest to the average signal value from the first signal, the second signal, and the third signal; and performing brake control based on the first target signal and the second target signal.

[0040] It should be understood that in this application embodiment, the main controller collects the first signal, the first auxiliary controller collects the second signal, and the second auxiliary controller collects the third signal. This application embodiment uses an odd-number voting mechanism to calculate the odd-number average signal value of the first, second, and third signals, and filters out the first target signal and the second closest second target signal that are closest to the average signal value. If the closest first target signal and the second closest second target signal are determined to be correct, the controller corresponding to the first target signal and the second target signal is switched to perform braking control, thus avoiding incorrect judgments with even numbers. When the main controller fails, the first and second auxiliary controllers will intervene to perform braking control, achieving redundancy backup. Otherwise, the braking control of the vehicle is performed only through the main controller.

[0041] The control method for a three-chip redundant automotive brake controller proposed in this application detects the current operating state of the main controller. When the current operating state meets preset failure conditions, braking control of the vehicle is performed based on the first auxiliary controller and / or the second auxiliary controller; otherwise, braking control of the vehicle is performed only based on the main controller. This solves the problem that vehicle functionality cannot be maintained when a critical chip in the braking system fails. By collecting odd-numbered signals, fault diagnosis is aided, increasing safety and reliability while reducing the chip resource requirements for auxiliary chips.

[0042] Next, referring to the accompanying drawings, a control device for a three-chip redundant automotive brake controller according to an embodiment of this application is described.

[0043] Figure 3 This is a block diagram of the control device of the three-chip redundant automotive brake controller according to an embodiment of this application.

[0044] The vehicle brake controller includes a main controller, a first auxiliary controller, and a second auxiliary controller.

[0045] like Figure 3 As shown, the control device 10 of the three-chip redundant automotive brake controller includes: a detection module 100, a judgment module 200, and a first control module 300.

[0046] The detection module 100 is used to detect the current working state of the main controller; the judgment module 200 is used to judge whether the current working state meets the preset failure conditions; the first control module 300 is used to perform braking control on the vehicle based on the first auxiliary controller and / or the second auxiliary controller if the current working state meets the preset failure conditions, otherwise, to perform braking control on the vehicle based only on the main controller.

[0047] Optionally, in some embodiments, the control device 10 of the above-mentioned three-chip redundant automotive brake controller further includes: an acquisition module for acquiring a first signal collected by the main controller, a second signal collected by the first auxiliary controller, and a third signal collected by the second auxiliary controller; a calculation module for calculating the average signal value of the first signal, the second signal, and the third signal, and filtering out a first target signal and a second target signal that are closest to the average signal value from the first signal, the second signal, and the third signal; and a second control module for performing braking control based on the first target signal and the second target signal.

[0048] Optionally, in some embodiments, the first auxiliary controller communicates with the main controller using pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

[0049] Optionally, in some embodiments, the second auxiliary controller communicates with the main controller using PWM signals and IIC signals.

[0050] It should be noted that the explanation of the control method embodiment for the three-chip redundant automotive brake controller described above also applies to the control device of the three-chip redundant automotive brake controller in this embodiment, and will not be repeated here.

[0051] The control device for a three-chip redundant automotive brake controller proposed in this application detects the current operating state of the main controller. When the current operating state meets preset failure conditions, braking control is performed on the vehicle based on the first auxiliary controller and / or the second auxiliary controller; otherwise, braking control is performed on the vehicle based solely on the main controller. This solves the problem of vehicle functionality failing when a critical chip in the braking system malfunctions, increasing safety and reliability while reducing the chip resource requirements for auxiliary chips.

[0052] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include:

[0053] The memory 401, the processor 402, and the computer program stored on the memory 401 and capable of running on the processor 402.

[0054] When the processor 402 executes the program, it implements the control method of the three-chip redundant automobile brake controller provided in the above embodiment.

[0055] Furthermore, electronic devices also include:

[0056] Communication interface 403 is used for communication between memory 401 and processor 402.

[0057] The memory 401 is used to store computer programs that can run on the processor 402.

[0058] The memory 401 may include high-speed RAM memory, and may also include non-volatile memory, such as at least one disk storage device.

[0059] If the memory 401, processor 402, and communication interface 403 are implemented independently, then the communication interface 403, memory 401, and processor 402 can be interconnected via a bus to complete communication between them. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be divided into address buses, data buses, control buses, etc. For ease of representation, Figure 4 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0060] Optionally, in a specific implementation, if the memory 401, processor 402, and communication interface 403 are integrated on a single chip, then the memory 401, processor 402, and communication interface 403 can communicate with each other through an internal interface.

[0061] Processor 402 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application.

[0062] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the control method of the three-chip redundant automotive brake controller described above.

[0063] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0064] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0065] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or N executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0066] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0067] It should be understood that the various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0068] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0069] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0070] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. A control method of a three-chip redundant automotive brake controller, characterized by, The automobile brake controller comprises a main controller, a first auxiliary controller and a second auxiliary controller, wherein the method comprises the following steps: detecting a current working state of the main controller; determining whether the current working state meets a preset failure condition; if at least one of a random access memory (RAM) or a read-only memory (ROM) or a central processing unit (CPU) of the main controller is abnormal, it is determined that the current working state of the main controller meets the preset failure condition; if the current working state meets the preset failure condition, the automobile is controlled to brake based on the first auxiliary controller and / or the second auxiliary controller, otherwise, the automobile is controlled to brake based only on the main controller; further comprising: acquiring a first signal collected by the main controller, a second signal collected by the first auxiliary controller and a third signal collected by the second auxiliary controller; calculating odd average signal values of the first signal, the second signal and the third signal, and screening a first target signal closest to the odd average signal values and a second target signal next closest to the odd average signal values from the first signal, the second signal and the third signal; and controlling to brake according to the first target signal and the second target signal; IIC signals are directly transmitted between the main controller and the second auxiliary controller, and between the main controller and the first auxiliary controller, PWM signals are transmitted between the main controller and the first auxiliary controller through a pre-drive circuit and a bridge drive circuit, and PWM signals are transmitted between the main controller and the second auxiliary controller through a motor drive and a valve drive.

2. The method of claim 1, wherein, The first auxiliary controller and the main controller communicate by using pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

3. The method of claim 2, wherein, The second auxiliary controller and the main controller communicate by using the PWM signals and the IIC signals.

4. A control device of a three-chip redundant automotive brake controller, characterized by, The automobile brake controller comprises a main controller, a first auxiliary controller and a second auxiliary controller, wherein the device comprises: a detection module configured to detect a current working state of the main controller; a determination module configured to determine whether the current working state meets a preset failure condition; if at least one of a random access memory (RAM) or a read-only memory (ROM) or a central processing unit (CPU) of the main controller is abnormal, it is determined that the current working state of the main controller meets the preset failure condition; a first control module configured to, if the current working state meets the preset failure condition, control the automobile to brake based on the first auxiliary controller and / or the second auxiliary controller, otherwise, control the automobile to brake based only on the main controller; further comprising: an acquisition module configured to acquire a first signal collected by the main controller, a second signal collected by the first auxiliary controller and a third signal collected by the second auxiliary controller; a calculation module configured to calculate odd average signal values of the first signal, the second signal and the third signal, and screen a first target signal closest to the odd average signal values and a second target signal next closest to the odd average signal values from the first signal, the second signal and the third signal; and a control module configured to control to brake according to the first target signal and the second target signal. a calculation module, configured to calculate odd average signal values of the first signal, the second signal and the third signal, and to screen a first target signal closest to the odd average signal values and a second target signal next closest from the first signal, the second signal and the third signal; and a second control module, configured to perform brake control according to the first target signal and the second target signal; IIC signals are directly transmitted between the main controller and the second auxiliary controller, and between the main controller and the first auxiliary controller, PWM signals are transmitted between the main controller and the first auxiliary controller through a pre-drive circuit and a bridge drive circuit, and are transmitted between the main controller and the second auxiliary controller through a motor drive and a valve drive.

5. The apparatus of claim 4, wherein, The first auxiliary controller and the main controller communicate through pulse width modulation (PWM) signals and integrated circuit bus (IIC) signals.

6. The apparatus of claim 5, wherein, The second auxiliary controller and the main controller communicate through the PWM signals and the IIC signals.

7. An electronic device, comprising: comprising a memory and a processor; The processor executes executable program codes stored in the memory to run programs corresponding to the executable program codes, so as to implement the control method of the three-chip redundant automobile brake controller according to any one of claims 1-3.

8. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 7. The program is executed by the processor to implement the control method of the three-chip redundant automobile brake controller according to any one of claims 1-3.

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