Package carrier with high aspect ratio via hole and processing method thereof

Through the X-shaped hole and layer-by-layer drilling packaging load plate processing method, the problems of limited copper thickness and poor recesses of the through hole are solved, and the high rigidity and precision wiring of the carrier plate are achieved, which is suitable for multi-layer board design.

CN116646254BActive Publication Date: 2025-08-08JIANGSU PROVISION ELECTRONICS CO LTD
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Patent Information

Application Number
CN202310632562.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-05-31
Publication Date
2025-08-08
Estimated Expiration
2043-05-31

AI Technical Summary

Technical Problem

In the existing packaging substrate process, the copper thickness of the through holes is limited, which cannot meet the fine line design, and the electroplating of through holes or blind holes is likely to cause poor recesses, which cannot meet the requirements of sensitive components for carrier plate rigidity and wiring density.

Method used

The X-shaped hole and layer-by-layer drilling method are adopted to control the copper thickness and insulating layer thickness through laser, electroplating and micro-etching reduction steps to form high aspect ratio conducting holes. The thickening step can design the insulating layer thickness according to requirements to ensure the rigidity of the carrier plate and the precision of wiring.

Benefits of technology

The thickness of the copper foil layer of the carrier plate is adjustable, which meets the needs of fine lines and prevents poor recesses. The carrier plate has high rigidity and precise wiring capabilities, which is suitable for multi-layer board design.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to a package substrate with high-aspect-ratio vias and a processing method thereof. The processing method includes substrate preparation, a first laser pre-treatment, a first laser drilling, a first debonding and copper deposition, a first via-filling and electroplating, micro-etching and copper reduction, grinding, browning, thickening, a second laser pre-treatment, a second laser drilling, a second debonding and copper deposition, a second via-filling and electroplating, outer layer circuitry, an outer solder mask, surface treatment, molding to obtain a finished substrate, finished product testing, finished product inspection, and packaging for shipment. The substrate obtained by this processing method has an unlimited dielectric thickness, i.e., the thickness of the insulating layer, meeting the rigidity requirements of sensitive components.
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Description

Technical Field

[0001] The present application relates to a packaging carrier, and in particular to a packaging carrier with a high-aspect-ratio via hole and a processing method thereof. Background Art

[0002] With the continuous development of technology, the demand for wiring density of packaging substrates is getting higher and higher. One development trend is to make products thin and small in size, thereby reducing packaging space and increasing packaging density; another trend is to make the substrate medium thick and rigid to meet the requirements of sensitive components for substrate rigidity.

[0003] With the increasing demand for higher wiring density, vias are gradually taking over flip-chip pads or wire bonding pads. This creates a need for flatness at the via locations to meet the requirements of flip-chip or wire bonding. Currently, three mainstream processes are available for through-holes on pads: resin plugging (POFV), blind via plating, and through-hole plating. POFV has the disadvantage of limited copper thickness, typically requiring a copper thickness ≥25μm, making it inadequate for fine-line designs. Blind via plating is also limited by dielectric thickness. Currently, in the packaging substrate field, dielectric thicknesses of ≤200μm are commonly used. Excessively thick dielectrics can lead to unavoidable via dents and difficulty reducing copper thickness, making fine-line designs unsuitable. Through-hole plating also has the disadvantages of dielectric thickness limitations and increased copper thickness while flattening the vias. To meet thin copper designs, a grinding and degreasing process must be added after via plating, resulting in poor copper thickness uniformity across the board and impacting circuit etching. Summary of the Invention

[0004] In order to overcome the above-mentioned defects, the present application provides a method for processing a package carrier with a high-aspect-ratio via. The thickness of the carrier obtained by this processing method, i.e., the thickness of the insulating layer, is not restricted, thus meeting the requirements of sensitive components for carrier rigidity.

[0005] The technical solution adopted by this application to solve its technical problems is:

[0006] A method for processing a package carrier with a high-aspect-ratio via comprises the following steps:

[0007] Prepare substrate: prepare substrate with first insulating layer;

[0008] The first laser pre-treatment: pre-treat the substrate to facilitate subsequent laser drilling;

[0009] First laser drilling: Drilling a through hole in the first insulating layer using laser;

[0010] The first debonding and copper deposition: remove the waste residue generated by the laser process and deposit copper to form a seed layer;

[0011] First hole filling plating: fill the through hole with copper using electroplating method;

[0012] Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-6μm;

[0013] Grinding: remove the surface copper to leave only the copper plug hole, and roughen the surface of the first insulating layer;

[0014] Browning: Roughens the copper surface at the plug hole, increases the bonding strength between the copper surface and the laminated insulation layer, and reduces reliability risks;

[0015] Thickening: Pressing a second insulating layer on both sides of the first insulating layer to increase the thickness of the insulating layer to obtain a thickened board;

[0016] Second laser pre-treatment: pre-treat the thickened plate to facilitate subsequent laser treatment;

[0017] Second laser drilling: using laser to drill blind holes in the second insulating layer;

[0018] Second time of desizing and copper deposition: remove the waste residue produced by the laser process and deposit copper to form a seed layer;

[0019] Second hole filling electroplating: Use electroplating to fill the blind holes with copper to obtain a semi-finished board;

[0020] Post-process: The semi-finished board is processed in the following steps in sequence: outer layer circuit, outer layer solder mask, surface treatment, forming into finished carrier board, finished product testing, finished product inspection and packaging for shipment;

[0021] According to the requirement of the thickness of the insulating layer in the finished carrier board, the micro-etching and copper reduction step can be repeated until the second hole filling and electroplating step.

[0022] Optionally, in the micro-etching copper reduction process: the remaining copper thickness is controlled at 2-3 μm; in the second laser drilling process, the blind holes on both sides of the through hole are arranged symmetrically along the center point of the through hole, and the thickness of the second insulating layer is less than 40 μm.

[0023] Optionally, after a semi-finished board is produced by a second hole-filling electroplating, the semi-finished board is subjected to the following treatments N times: inner layer circuits, browning, lamination and layer addition, micro-etching and copper reduction, laser windowing, laser blind holes, laser drilling, degumming and copper deposition, and hole-filling electroplating. Finally, the semi-finished board after the layer addition is subjected to post-processing to obtain a multi-layer finished carrier board, where N ≥ 1 and N is an integer.

[0024] Optionally, in the process of preparing the substrate, the substrate includes a first insulating layer and first copper foil layers respectively provided on the front and back sides of the first insulating layer, the first copper foil layers are ordinary copper foil layers or ultra-thin copper foil layers, wherein the ordinary copper foil layer has a thickness of 9 μm to 35 μm, and the ultra-thin copper foil layer has a thickness of 2 μm to 6 μm;

[0025] or,

[0026] In the process of preparing the substrate, the substrate includes a first insulating layer and release films laminated on the front and back surfaces of the first insulating layer, that is, the substrate is a base-free copper substrate.

[0027] Optionally, when the first copper foil layer is a common copper foil layer, the first laser pre-treatment process includes:

[0028] Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0029] Laser hole opening: laser hole opening is made on the first copper foil layer by etching;

[0030] Alternatively, when the first copper foil layer is an ultra-thin copper foil layer, the first laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking;

[0031] Alternatively, when the substrate is a baseless copper substrate, the first laser pre-treatment process includes: peeling off the release film.

[0032] Optionally, in the first laser drilling, the through hole is an X-shaped hole, the waist diameter of the X-shaped hole is D1, and the diameters of both ends of the X-shaped hole are D2, wherein 30 μm≤D1≤0.7*D2.

[0033] Optionally, in the thickening step: the second copper foil layer, the second insulating layer, the substrate, the second insulating layer, and the second copper foil layer are stacked in this order and pressed into a thickened board, wherein the second copper foil layer is an ordinary copper foil layer or an ultra-thin copper foil layer, wherein the thickness of the ordinary copper foil layer is 9 μm to 35 μm, and the thickness of the ultra-thin copper foil layer is 2 μm to 6 μm;

[0034] Alternatively, in the thickening step: the second insulating layer, the substrate, and the second insulating layer are stacked in this order and pressed into a thickened plate, wherein a release film is attached to the second insulating layer.

[0035] Optionally, when the second copper foil layer is a common copper foil layer, the second laser pre-treatment process includes:

[0036] Micro-etching to reduce copper: reduce the copper thickness before electroplating and ultimately control the copper thickness after electroplating;

[0037] Laser hole opening: laser hole opening is made on the second copper foil layer by etching;

[0038] Alternatively, when the second copper foil layer is an ultra-thin copper foil layer, the second laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking;

[0039] Alternatively, when a release film is attached to the second insulating layer, the second laser pre-treatment process includes: peeling off the release film.

[0040] Optionally, in the first resist removal and copper deposition process and the second resist removal and copper deposition process, the seed layer can be manufactured by using a copper deposition process or a shot blasting process, and a flash plating process is further included after the seed layer is manufactured.

[0041] The present application also provides a package carrier having a high-aspect-ratio via hole, which is manufactured using the package carrier processing method.

[0042] The beneficial effects of this application are:

[0043] 1) The thickness of the wiring copper foil layer in the carrier obtained by this processing method can be selected according to the demand for the appropriate insulation layer thickness. The final copper foil thickness in the carrier can reach less than 10μm, thus solving the problem of copper thickness limitation in the existing POFV process, meeting the production of fine circuits, and the obtained product has the characteristics of good rigidity and precise wiring.

[0044] 2) In this processing method, the through holes are made of X-shaped holes and drilled layer by layer to prevent the occurrence of excessive depression in the filled holes, thereby solving the problem of depression caused by traditional through hole or blind hole filling electroplating;

[0045] 3) In this processing method, the thickness of the insulating layer can be arbitrarily designed through the thickening step, thereby obtaining a carrier with a thick insulating dielectric layer and good rigidity, meeting the rigidity requirements of sensitive components for the carrier, thereby solving the problem of limited dielectric thickness in traditional through-hole filling electroplating.

[0046] 4) This processing method can obtain double-layer or multi-layer carrier boards with high aspect ratio conductive holes, which can meet the design requirements of thicker dielectric and thicker copper plug holes and meet the reliability requirements; at the same time, the obtained carrier board has a thinner copper layer and can meet the needs of precision wiring. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 This is a schematic structural diagram of the finished carrier board in Example 1 of the present application;

[0048] Figure 2 This is a schematic structural diagram of the substrate in Example 1 of the present application;

[0049] Figure 3 This is a schematic structural diagram of the thickened plate in Example 1 of the present application;

[0050] Figure 4This is a schematic structural diagram of the semi-finished plate in Example 1 of the present application;

[0051] Figure 5 This is a schematic structural diagram of the finished carrier board in Example 2 of the present application;

[0052] Figure 6 This is a schematic structural diagram of the finished carrier board in Example 3 of the present application;

[0053] In the figure: 10-substrate, 11-first insulating layer, 12-first copper foil layer, 13-through hole, 20-thickened board, 21-second insulating layer, 22-second copper foil layer, 30-semi-finished board, 31-blind hole, 40-carrier board. DETAILED DESCRIPTION

[0054] The following will be combined with the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0055] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the following drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the objects used in this way can be interchanged where appropriate, so that the embodiments of the application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0056] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship of a device or feature to other devices or features as shown in the figures. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figures. For example, if the device in the drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0057] A method for processing a package carrier with a high-aspect-ratio via comprises the following steps:

[0058] Prepare substrate: Prepare a substrate 10 having a first insulating layer 11;

[0059] First laser pre-treatment: pre-treating the substrate 10 to facilitate subsequent laser drilling;

[0060] First laser drilling: drilling a through hole 13 on the first insulating layer 11 using a laser;

[0061] The first debonding and copper deposition: remove the waste residue generated by the laser process and deposit copper to form a seed layer;

[0062] First hole filling electroplating: using electroplating method to fill the through hole 13 with copper;

[0063] Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-6μm;

[0064] Grinding: removing the surface copper and leaving only the copper plug hole, while roughening the surface of the first insulating layer 11;

[0065] Browning: Roughens the copper surface at the plug hole, increases the bonding strength between the copper surface and the laminated insulation layer, and reduces reliability risks;

[0066] Thickening: Pressing a second insulating layer 21 on both sides of the first insulating layer 11 to increase the thickness of the insulating layer to obtain a thickened plate 20;

[0067] Second laser pre-treatment: pre-treating the thickened plate 20 to facilitate subsequent laser treatment;

[0068] Second laser drilling: using laser to drill blind holes 31 on the second insulating layer 21;

[0069] Second time of desizing and copper deposition: remove the waste residue produced by the laser process and deposit copper to form a seed layer;

[0070] Second hole filling electroplating: The blind holes 31 are filled with copper by electroplating to obtain a semi-finished board 30;

[0071] Post-process: The semi-finished board 30 is processed in the following steps in sequence: outer layer circuit, outer layer solder mask, surface treatment, forming into a finished carrier board 40, finished product testing, finished product inspection and packaging for shipment;

[0072] The micro-etching and copper reduction steps can be repeated until the second hole-filling and electroplating step, depending on the required insulation layer thickness of the finished carrier board 40. That is, before the semi-finished board 30 undergoes post-processing, the first insulation layer can be thickened multiple times. The insulation layer thickness described here refers to the total thickness of the first insulation layer after thickening.

[0073] In the hole filling plating step, electroplating can achieve the following effects: 1) copper plugging the hole; 2) a layer of copper will be plated on the board surface at the same time.

[0074] In this processing method, the thickness of the insulating layer can be arbitrarily designed through the thickening step, thereby obtaining a carrier board with a thick insulating dielectric layer and good rigidity, which meets the requirements of sensitive components for carrier board rigidity; in this processing method, the thickness of the copper foil layer can be set according to requirements, and a thin copper layer can be obtained, thereby solving the problem of copper thickness being limited in traditional processes, meeting the production of fine and dense circuits, and the obtained product has the characteristics of good rigidity and precise wiring; in this processing method, the through holes adopt X-shaped holes and layer-by-layer drilling to prevent the occurrence of excessive depression in the filling holes, thereby solving the problem of poor depression caused by traditional through-hole or blind hole filling electroplating. This processing method can design the number of thickening times according to product requirements, so the thickness of the resulting carrier board is not limited, meeting the design requirements of thicker dielectric and thick copper plug holes, and meeting the reliability requirements of high aspect ratio conductive holes; at the same time, the obtained carrier board has a thinner copper layer, which meets the requirements of precise wiring.

[0075] In the micro-etching copper reduction process: the remaining copper thickness is controlled at 2-3 μm; in the second laser drilling process, the blind holes 31 on both sides of the through hole are arranged symmetrically along the center point of the through hole 13, such as Figure 3As shown, the blind holes 31 on the upper and lower sides of the through hole are symmetrically arranged along the waist of the through hole 13. The so-called waist of the through hole refers to the smallest diameter of the X-shaped hole. The thickness of the second insulating layer 21 is less than 40μm. For the hole filling electroplating process, the thicker the thickness of the dielectric layer, that is, the insulating layer, the thicker the copper that needs to be electroplated to fill the hole. Therefore, according to the substrate graphic wiring design, the thickness of the insulating layer of the wiring layer before the pressing can be controlled to match the surface copper design requirements. For example, the thickness of the pressed insulating layer can be controlled to be less than 40μm to meet the design requirement of the finished copper thickness less than 10μm. Of course, this is just an example. In actual application, the appropriate dielectric layer thickness can be selected according to the design requirement of the finished copper thickness.

[0076] After the semi-finished board 30 is produced by the second hole-filling electroplating, the semi-finished board 30 is subjected to the following processes N times: inner layer circuits, browning, lamination and layer addition, micro-etching and copper reduction, laser windowing, laser blind vias, laser drilling, desmearing and copper deposition, and hole-filling electroplating. Finally, the semi-finished board after layer addition is subjected to post-processing to obtain a multi-layer finished carrier board, where N ≥ 1 and N is an integer. When N is equal to 1, the resulting finished carrier board is a four-layer board, and by analogy, a multi-layer board with any number of layers can be obtained. Therefore, this process is suitable for the production of double-layer boards and multi-layer boards, thereby meeting the production requirements of various carrier boards. Double-layer boards are carrier boards with two layers of copper foil, and multi-layer boards are carrier boards with four or more layers of copper foil.

[0077] Take a four-layer board as an example: after the semi-finished board 30 is produced by the second hole filling electroplating, the semi-finished board 30 is sequentially processed as follows: inner layer circuit, browning, lamination and layer increase, micro-etching and copper reduction, laser window opening, laser blind hole, laser drilling, desizing and copper deposition, hole filling electroplating, outer layer circuit, outer layer solder mask, surface treatment, forming a four-layer finished carrier board, finished product testing, finished product inspection and packaging and shipment.

[0078] In the substrate preparation process, the substrate 10 includes a first insulating layer 11 and a first copper foil layer 12 respectively provided on the front and back sides of the first insulating layer 11, wherein the first copper foil layer 12 is an ordinary copper foil layer or an ultra-thin copper foil layer, wherein the thickness of the ordinary copper foil layer is 9 μm to 35 μm, and the thickness of the ultra-thin copper foil layer is 2 μm to 6 μm; optionally, the thickness of the ordinary copper foil layer is 9 μm, 12 μm, 17 μm, 35 μm, etc., and the thickness of the ultra-thin copper foil layer is 2 μm, 3 μm, 5 μm, etc.;

[0079] or,

[0080] In the substrate preparation process, the substrate 10 includes a first insulating layer 11 and release films laminated on both the front and back sides of the first insulating layer 11, that is, the substrate 10 is a baseless copper substrate. That is, the substrate 10 has the following states:

[0081] 1) Copper-free substrate: that is, a substrate 10 with release films pressed on both sides. During production, the release films can be directly peeled off to expose the insulating layer. Subsequently, holes are directly punched on the insulating layer, the adhesive is removed and copper is deposited, and the holes are filled with copper by electroplating to increase the surface copper.

[0082] 2) The insulation layer is laminated with ultra-thin copper foil;

[0083] 3) The insulation layer is laminated with ordinary copper foil.

[0084] In actual application, the type of substrate can be selected according to the thickness of the insulating layer. For example, an ultra-thick insulating layer can be matched with a release film or ultra-thin copper foil, while a thin insulating layer can be matched with ordinary copper foil.

[0085] When the first copper foil layer 12 is a common copper foil layer, the first laser pre-treatment process includes:

[0086] Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0087] Laser hole opening: laser hole opening is made on the first copper foil layer 12 by etching;

[0088] Alternatively, when the first copper foil layer 12 is an ultra-thin copper foil layer, the first laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking;

[0089] Alternatively, when the substrate 10 is a baseless copper substrate, the first laser pre-treatment process includes: peeling off the release film. LDD stands for Laser Direct Drilling.

[0090] During the first laser drilling, the through hole 13 is an X-shaped hole with a waist diameter of D1 and a diameter of D2 at each end. Here, 30 μm ≤ D1 ≤ 0.7*D2. This means the waist diameter of the X-shaped hole is the diameter of the thinnest part of the hole, while the diameters at each end are the diameter of the thickest part. Designing the X-shaped hole to this size facilitates electroplating plugging and prevents excessive hole filling depression.

[0091] In the thickening step: the second copper foil layer 22, the second insulating layer 21, the substrate 10, the second insulating layer 21 and the second copper foil layer 22 are stacked in this order and pressed into a thickened board 20, wherein the second copper foil layer 22 is an ordinary copper foil layer or an ultra-thin copper foil layer, wherein the thickness of the ordinary copper foil layer is 9μm to 35μm, and the thickness of the ultra-thin copper foil layer is 2μm to 6μm; optionally, the thickness of the ordinary copper foil layer is 9μm, 12μm, 17μm, 35μm, etc., and the thickness of the ultra-thin copper foil layer is 2μm, 3μm, 5μm, etc.

[0092] Alternatively, in the thickening step: the second insulating layer 21, the substrate 10 and the second insulating layer 21 are stacked in this order and pressed into a thickened plate 20, wherein a release film is adhered to the second insulating layer 21, that is, only the insulating layer is pressed in this thickening step, and the release film can be directly peeled off after pressing to expose the dielectric layer, that is, the insulating layer, and a diameter hole is punched in the exposed dielectric layer, and then the hole is plated through the degumming and copper deposition and electroplating processes to achieve the same function.

[0093] When the second copper foil layer 22 is a common copper foil layer, the second laser pre-treatment process includes:

[0094] Micro-etching to reduce copper: reduce the copper thickness before electroplating and ultimately control the copper thickness after electroplating;

[0095] Laser hole opening: laser hole opening is made on the second copper foil layer 22 by etching;

[0096] Alternatively, when the second copper foil layer 22 is an ultra-thin copper foil layer, the second laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking;

[0097] Alternatively, when a release film is attached to the second insulating layer 21, the second laser pre-treatment process includes: peeling off the release film. LDD stands for Laser Direct Drilling.

[0098] In both the first and second desizing and copper deposition processes, the seed layer can be produced using either copper deposition or shot blasting. Of course, other commonly used processes can also be used as long as they achieve equivalent functionality. Flash plating is also performed after the seed layer is produced. Using flash plating to deposit a copper layer as the base layer for via metallization is more conducive to X-hole filling and leveling operations.

[0099] A packaging carrier with a high-aspect-ratio conducting hole is manufactured by adopting the packaging carrier processing method.

[0100] Example 1:

[0101] The processing method of the package carrier includes the following steps:

[0102] S1: Prepare substrate: Figure 2 As shown, a substrate 10 is provided. The substrate 10 includes a first insulating layer 11 and first copper foil layers 12 respectively provided on the front and back sides of the first insulating layer 11. The first copper foil layer 12 is a common copper foil layer with a thickness of 12 μm.

[0103] S2: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0104] S3: Laser hole opening: laser hole opening is performed on the first copper foil layer 12 by etching;

[0105] S4: Laser X-hole: Drill a through hole 13 on the first insulating layer 11 by laser. The through hole 13 is an X-shaped hole. The waist diameter of the X-shaped hole is D1, and the diameters of the two ends of the X-shaped hole are D2. Among them, 30μm≤D1≤0.7*D2, so as to facilitate electroplating plugging and prevent the hole from being too large.

[0106] S5: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating, which is more conducive to filling the X-shaped hole;

[0107] S6: hole filling electroplating: filling the through hole 13 with copper using an electroplating method;

[0108] S7: Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-3μm;

[0109] S8: Grinding: remove the surface copper to leave only the copper plug hole, and roughen the surface of the insulation layer;

[0110] S9: Browning: Roughens the copper surface at the plug hole to increase the bonding strength between the copper surface and the laminated insulation layer, reducing the reliability risk;

[0111] S10: Thickening: e.g. Figure 3 As shown, the insulating dielectric layer is pressed on both sides to increase the thickness of the insulating layer to obtain the thickened board 20. Specifically, the second copper foil layer 22, the second insulating layer 21, the substrate 10, the second insulating layer 21 and the second copper foil layer 22 are stacked in this order and then pressed to form the thickened board 20, wherein the second copper foil layer 22 is a common copper foil layer with a thickness of 12 μm;

[0112] S11: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0113] S12: Laser hole opening: laser hole opening is performed on the second copper foil layer 22 by etching;

[0114] S13: Laser drilling: Drilling blind holes 31 on the second insulating layer 21 using laser drilling;

[0115] S14: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating to better fill the hole;

[0116] S15: Filling hole plating: Figure 4 As shown, the blind holes are filled with copper using an electroplating method to obtain a semi-finished board 30;

[0117] S16: Post-process: The semi-finished board 30 is processed in the following steps in sequence: outer layer circuit, outer layer solder mask, surface treatment, forming into a finished carrier board 40, finished product testing, finished product inspection and packaging for shipment;

[0118] like Figure 1 As shown, the carrier board 40 obtained in this embodiment is a double-layer board with the insulating layer thickened once.

[0119] Example 2:

[0120] The processing method of the package carrier includes the following steps:

[0121] S1: Prepare substrate: Figure 2 As shown, a substrate 10 is provided. The substrate 10 includes a first insulating layer 11 and first copper foil layers 12 respectively provided on the front and back sides of the first insulating layer 11. The first copper foil layer 12 is a common copper foil layer with a thickness of 12 μm.

[0122] S2: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0123] S3: Laser hole opening: laser hole opening is performed on the first copper foil layer 12 by etching;

[0124] S4: Laser X-hole: Drill a through hole 13 on the first insulating layer 11 by laser. The through hole 13 is an X-shaped hole. The waist diameter of the X-shaped hole is D1, and the diameters of the two ends of the X-shaped hole are D2. Among them, 30μm≤D1≤0.7*D2, so as to facilitate electroplating plugging and prevent the hole from being too large.

[0125] S5: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating, which is more conducive to filling the X-shaped hole;

[0126] S6: hole filling electroplating: filling the through hole 13 with copper using an electroplating method;

[0127] S7: Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-3μm;

[0128] S8: Grinding: remove the surface copper to leave only the copper plug hole, and roughen the surface of the insulation layer;

[0129] S9: Browning: Roughens the copper surface at the plug hole to increase the bonding strength between the copper surface and the laminated insulation layer, reducing the reliability risk;

[0130] S10: Thickening: e.g. Figure 3As shown, the insulating dielectric layer is pressed on both sides to increase the thickness of the insulating layer to obtain the thickened board 20. Specifically, the second copper foil layer 22, the second insulating layer 21, the substrate 10, the second insulating layer 21 and the second copper foil layer 22 are stacked in this order and then pressed to form the thickened board 20, wherein the second copper foil layer 22 is a common copper foil layer with a thickness of 12 μm;

[0131] S11: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0132] S12: Laser hole opening: laser hole opening is performed on the second copper foil layer 22 by etching;

[0133] S13: Laser drilling: Drilling blind holes 31 on the second insulating layer 21 using laser drilling;

[0134] S14: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating to better fill the hole;

[0135] S15: Filling hole plating: Figure 4 As shown, the blind holes are filled with copper using an electroplating method to obtain a semi-finished board 30;

[0136] Repeat steps S7-S15 for the semi-finished plate 30, i.e., thicken the semi-finished plate 30 again;

[0137] S16: Post-process: The semi-finished board 30 after the two thickening processes is sequentially processed through the following steps: outer layer circuit, outer layer solder mask, surface treatment, forming into a finished carrier board 40, finished product testing, finished product inspection and packaging for shipment;

[0138] like Figure 5 As shown, the carrier board 40 obtained in this embodiment is a double-layer board in which the insulating layer is thickened twice.

[0139] Example 3:

[0140] The processing method of the package carrier includes the following steps:

[0141] S1: Prepare substrate: Figure 2 As shown, a substrate 10 is provided. The substrate 10 includes a first insulating layer 11 and first copper foil layers 12 respectively provided on the front and back sides of the first insulating layer 11. The first copper foil layer 12 is a common copper foil layer with a thickness of 12 μm.

[0142] S2: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0143] S3: Laser hole opening: laser hole opening is performed on the first copper foil layer 12 by etching;

[0144] S4: Laser X-hole: Drill a through hole 13 on the first insulating layer 11 by laser. The through hole 13 is an X-shaped hole. The waist diameter of the X-shaped hole is D1, and the diameters of the two ends of the X-shaped hole are D2. Among them, 30μm≤D1≤0.7*D2, so as to facilitate electroplating plugging and prevent the hole from being too large.

[0145] S5: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating, which is more conducive to filling the X-shaped hole;

[0146] S6: Hole filling plating: Fill the through hole with copper using electroplating method;

[0147] S7: Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-3μm;

[0148] S8: Grinding: remove the surface copper to leave only the copper plug hole, and roughen the surface of the insulation layer;

[0149] S9: Browning: Roughens the copper surface at the plug hole to increase the bonding strength between the copper surface and the laminated insulation layer, reducing the reliability risk;

[0150] S10: Thickening: e.g. Figure 3 As shown, the insulating dielectric layer is pressed on both sides to increase the thickness of the insulating layer to obtain the thickened board 20. Specifically, the second copper foil layer 22, the second insulating layer 21, the substrate 10, the second insulating layer 21 and the second copper foil layer 22 are stacked in this order and then pressed to form the thickened board 20, wherein the second copper foil layer 22 is a common copper foil layer with a thickness of 12 μm;

[0151] S11: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction;

[0152] S12: Laser hole opening: laser hole opening is performed on the second copper foil layer 22 by etching;

[0153] S13: Laser drilling: Drilling blind holes 31 on the second insulating layer 21 using laser drilling;

[0154] S14: Remove glue and deposit copper: remove waste residue generated by the laser process and deposit copper to form a seed layer, and then perform flash plating to better fill the hole;

[0155] S15: Filling hole plating: Figure 4 As shown, the blind holes are filled with copper using an electroplating method to obtain a semi-finished board 30;

[0156] S16: After the inner layer circuit and browning treatment are performed on the semi-finished board 30, the semi-finished board 30 is double-sided pressed to obtain a four-layer board, and then the four-layer board is subjected to micro-etching and copper reduction, laser windowing, laser blind hole, laser drilling, desizing and copper deposition, and hole filling and electroplating. The double-sided pressing specifically comprises: laminating the second copper foil layer 22, the second insulating layer 21, the semi-finished board 30, the second insulating layer 21, and the second copper foil layer 22 in this order and pressing them into a build-up board with four copper foil layers, wherein the second copper foil layer 22 is a common copper foil layer with a thickness of 12 μm;

[0157] S17: Post-process: The four-layer board after the hole filling and electroplating is processed in the following steps in sequence: outer layer circuit, outer layer solder mask, surface treatment, forming into a finished carrier board 40, finished product testing, finished product inspection and packaging for shipment;

[0158] like Figure 6 As shown, the carrier board 40 obtained in this embodiment is a four-layer board which is a semi-finished board and has undergone one layer build-up process, and the insulating layer in the substrate 10 has undergone one thickening process.

[0159] It should be noted that those skilled in the art may make a number of modifications and improvements without departing from the concept of this application, and these modifications and improvements are all within the scope of protection of this application. Therefore, the scope of protection of this patent application shall be based on the appended claims.

Claims

1. A method for processing a package carrier having a high aspect ratio via hole, characterized in that: The steps include: Prepare a substrate: prepare a substrate (10) having a first insulating layer (11); First laser pre-treatment: pre-treating the substrate (10) to facilitate subsequent laser drilling; First laser drilling: drilling a through hole (13) on the first insulating layer (11) by laser drilling; The first debonding and copper deposition: remove the waste residue generated by the laser process and deposit copper to form a seed layer; First hole filling electroplating: using electroplating method to fill the through hole (13) with copper; Micro-etching and copper reduction: Use chemical solution to micro-etch and thin the surface copper thickness, and the remaining copper thickness is controlled at 2-6μm; Grinding: removing the surface copper to leave only the copper plug hole, and roughening the surface of the first insulating layer (11); Browning: Roughens the copper surface at the plug hole, increases the bonding strength between the copper surface and the laminated insulation layer, and reduces reliability risks; Thickening: pressing a second insulating layer (21) on both sides of the first insulating layer (11) to increase the thickness of the insulating layer to obtain a thickened plate (20); Second laser pre-treatment: pre-treating the thickened plate (20) to facilitate subsequent laser treatment; Second laser drilling: using laser to drill a blind hole (31) on the second insulating layer (21); Second time of desizing and copper deposition: remove the waste residue produced by the laser process and deposit copper to form a seed layer; Second hole filling electroplating: using electroplating method to fill the blind hole (31) with copper to obtain a semi-finished board (30); Post-process: the semi-finished board (30) is processed in sequence through the following steps: outer layer circuit, outer layer solder mask, surface treatment, forming into a finished carrier board (40), finished product testing, finished product inspection and packaging for shipment; According to the requirement of the thickness of the insulating layer in the finished carrier board (40), the micro-etching and copper reduction step can be repeated until the second hole filling and electroplating step; After the semi-finished board (30) is produced by the second hole filling electroplating, the semi-finished board (30) is subjected to the following processes N times: inner layer circuit, browning, lamination and layer increase, micro-etching and copper reduction, laser windowing, laser blind hole, laser drilling, desizing and copper deposition, and hole filling electroplating, and finally the semi-finished board after the layer increase is subjected to post-processing to obtain a multi-layer finished carrier board, wherein N ≥ 1, and N is an integer; In the first laser drilling, the through hole (13) is an X-shaped hole, the waist diameter of the X-shaped hole is D1, and the diameters of the two ends of the X-shaped hole are D2, wherein 30 μm≤D1≤0.7*D2; In the second laser drilling process, the blind holes (31) on both sides of the through hole are symmetrically arranged along the center point of the through hole (13), and the thickness of the second insulating layer (21) is less than 40 μm; In a substrate preparation process, the substrate (10) comprises a first insulating layer (11) and first copper foil layers (12) respectively arranged on the front and back sides of the first insulating layer (11), wherein the first copper foil layer (12) is a common copper foil layer or an ultra-thin copper foil layer, wherein the thickness of the common copper foil layer is 9 μm to 35 μm, and the thickness of the ultra-thin copper foil layer is 2 μm to 6 μm; or, In the substrate preparation process, the substrate (10) comprises a first insulating layer (11) and release films pressed onto the front and back sides of the first insulating layer (11), that is, the substrate (10) is a baseless copper substrate; When the first copper foil layer (12) is a common copper foil layer, the first laser pre-treatment process includes: Micro-etching and copper reduction: reduce the copper thickness before electroplating, and ultimately control the copper thickness after electroplating, maintaining a thin state to facilitate subsequent copper reduction; Laser hole opening: opening a laser hole window on the first copper foil layer (12) by etching; Alternatively, when the first copper foil layer (12) is an ultra-thin copper foil layer, the first laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking; Alternatively, when the substrate (10) is a baseless copper substrate, the first laser pre-treatment process includes: peeling off the release film; When the second copper foil layer (22) is a common copper foil layer, the second laser pre-treatment process includes: Micro-etching to reduce copper: reduce the copper thickness before electroplating and ultimately control the copper thickness after electroplating; Laser hole opening: opening a laser hole window on the second copper foil layer (22) by etching; Alternatively, when the second copper foil layer (22) is an ultra-thin copper foil layer, the second laser pre-treatment process includes: LDD browning: roughening the copper surface to facilitate laser copper breaking; Alternatively, when a release film is attached to the second insulating layer (21), the second laser pre-treatment process includes: peeling off the release film.

2. The method for processing a package carrier according to claim 1, wherein: In the micro-etching copper reduction process: the remaining copper thickness is controlled at 2-3μm.

3. The method for processing a package carrier according to claim 1, wherein: In the first resist removal and copper deposition process and the second resist removal and copper deposition process, the seed layer can be made by copper deposition process or shot blasting process, and the seed layer is also made by flash plating process.

4. A package carrier having a high aspect ratio via hole, characterized in that: The package carrier is processed by the processing method of any one of claims 1 to 3.

Citation Information

Patent Citations

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