A semiconductor device structure, a method of fabricating the same, and a radiation direction switching method

Abstract

The application provides a semiconductor device structure and a preparation method and a radiation direction switching method thereof, and the method comprises a one-dimensional silicon grating, a first phase change layer, a second phase change layer and an isolation layer; a first side surface of a silicon rod is perpendicular to an upper surface, and an included angle between a second side surface and a lower surface is less than 90 degrees; the upper surface of the silicon rod is provided with the first phase change layer, and the lower surface is provided with the second phase change layer; and the isolation layer wraps the silicon rod and fills a gap. The application realizes dynamic adjustable directional radiation by setting the phase change layer and cooperating with the silicon rod with the inclined side surface; in addition, the dynamic directional radiation adjustment is realized by using the structure of the semiconductor device itself, the complexity of the photoelectric structure is reduced, and the integrated application of the optical element is favorable; finally, the switching of the directional radiation by the phase change layer lays a foundation for the application of programmable logic optical paths.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit manufacturing technology, and in particular relates to a semiconductor device structure, its fabrication method, and a radiation direction switching method. Background Technology

[0002] The rapid development of high-performance communication chips has placed extremely high demands on the bandwidth and power consumption of on-chip interconnects. Traditional electrical interconnect technologies are gradually approaching their physical limits, while optical interconnect technologies and their chip systems based on optical physics and devices are important foundational technologies for future low-loss, high-speed communication applications.

[0003] Transistors, capable of controlling electrical signals, are fundamental to modern electronic devices. Similarly, in integrated optical systems, the control of light field radiation characteristics is fundamental to integrated optics. Different applications place varying requirements on the radiation characteristics of optical devices, including properties such as intensity, polarization, and direction. On-chip optoelectronic devices (such as lasers, lidar antennas, and grating couplers) require high-precision control of radiation direction.

[0004] Traditional methods rely on various types of mirrors, which are bulky and difficult to integrate, hindering the development of on-chip optical chips. Therefore, there is an urgent need for an easily integrated, dynamically adjustable directional radiation device to provide more possibilities for the development of integrated optics.

[0005] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating the understanding of those skilled in the art. It should not be assumed that the above technical solutions are known to those skilled in the art simply because these solutions have been described in the background section of this application. Summary of the Invention

[0006] In view of the shortcomings of the prior art, the purpose of this invention is to provide a semiconductor device structure, its fabrication method, and a radiation direction switching method to solve the problems of directional radiation optoelectronic devices in the prior art being unable to dynamically adjust directional radiation and being difficult to integrate.

[0007] To achieve the above objectives, the present invention provides a semiconductor device structure, the semiconductor device structure comprising: a one-dimensional silicon grating, a first phase change layer, a second phase change layer, and an isolation layer;

[0008] The one-dimensional silicon grating includes a plurality of parallel silicon rods, each silicon rod including an upper surface and a lower surface arranged in parallel; each silicon rod includes a first side and a second side arranged in parallel, the first side being perpendicular to the upper surface, and the second side having an angle of less than 90 degrees with the lower surface.

[0009] The upper surface of each silicon rod is provided with the first phase change layer, and the lower surface of each silicon rod is provided with the second phase change layer. The materials of the first phase change layer and the second phase change layer are phase change materials.

[0010] The insulating layer wraps around each of the silicon rods and fills the gaps between the silicon rods.

[0011] Optionally, the material of the first phase change layer and / or the second phase change layer is GeSbTe.

[0012] Optionally, the first phase change layer and / or the second phase change layer have a refractive index of 4-5 in the amorphous state and a refractive index of 5.4-6.8 in the crystalline state.

[0013] Optionally, the thickness of the first phase change layer and / or the second phase change layer is 17 nanometers to 25 nanometers.

[0014] Optionally, the angle between the second side surface and the lower surface is 72-80 degrees.

[0015] The present invention also provides a method for fabricating a semiconductor device structure, the method being used to fabricate any of the above-mentioned semiconductor device structures, the method comprising:

[0016] A substrate is provided, wherein the substrate comprises, from bottom to top, a substrate layer, an oxide layer and a silicon layer;

[0017] A first mask layer is disposed on the silicon layer;

[0018] A photoresist layer is formed on the first mask layer;

[0019] The photoresist layer is patterned to expose a portion of the first mask layer;

[0020] The exposed first mask layer is etched to expose a portion of the silicon layer;

[0021] The exposed silicon layer is etched to form a one-dimensional silicon grating composed of a plurality of parallel silicon rods, exposing a portion of the substrate. Each of the formed silicon rods includes an upper surface and a lower surface arranged relatively parallel to each other, and a first side surface and a second side surface arranged relatively parallel to each other. The first side surface is perpendicular to the upper surface, and the angle between the second side surface and the lower surface is less than 90°.

[0022] Remove the remaining first mask layer;

[0023] Remove the substrate layer and the oxide layer from the substrate;

[0024] A first phase change layer is disposed on the upper surface of the etched silicon layer, and a second phase change layer is disposed on the lower surface of the etched silicon layer;

[0025] An isolation layer is provided so that it wraps around each of the silicon rods and fills the gaps between the silicon rods.

[0026] Optionally, after removing the remaining first mask layer, the substrate layer is thinned on the back side; a hollow substrate is prepared and disposed on the back side of the substrate layer, with the hollow portion of the hollow substrate aligned with the remaining silicon layer after etching; the substrate layer and oxide layer exposed above the hollow portion are etched; after the first phase change layer and the second phase change layer are disposed, the hollow substrate, the remaining substrate layer and the oxide layer are removed.

[0027] Optionally, a protective layer is formed on the etched silicon layer before the substrate layer is thinned; the protective layer is removed after the substrate layer is thinned.

[0028] Optionally, the method for preparing the hollow substrate includes: providing a temporary substrate, depositing a silicon dioxide layer on the temporary substrate, and depositing a silicon nitride layer on the silicon dioxide layer; etching the silicon dioxide layer and the silicon nitride layer to form an etching window; depositing a second mask layer on the bottom surface of the temporary substrate, etching the temporary substrate through the etching window to expose the second mask layer; and removing the remaining silicon dioxide layer, silicon nitride layer, and second mask layer.

[0029] The present invention also provides a method for switching the radiation direction of a semiconductor device structure. The method is used to switch the radiation direction of any of the above-described semiconductor device structures. The method includes: switching the material states of the first phase change layer and the second phase change layer to switch the radiation direction of the unidirectional mode resonance state of the semiconductor device structure; when the first phase change layer and the second phase change layer are in an amorphous state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is upward radiation only; when the first phase change layer and the second phase change layer are in a crystalline state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is downward radiation only.

[0030] As described above, the semiconductor device structure, its fabrication method, and the radiation direction switching method of the present invention have the following beneficial effects:

[0031] This invention achieves dynamically adjustable directional radiation by setting a phase change layer in conjunction with a silicon rod on an inclined side.

[0032] This invention utilizes the structure of semiconductor devices to achieve dynamically directional radiation tunability, reducing the complexity of optoelectronic structures and facilitating the integrated application of optical components;

[0033] This invention lays the foundation for the application of programmable logic optical paths by switching directional radiation through a phase change layer. Attached Figure Description

[0034] Figure 1 The diagram shown is a schematic diagram of the semiconductor device structure in Embodiment 1 of the present invention.

[0035] Figure 2 The diagram shown is a schematic representation of the structure presented in step 1 of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0036] Figure 3 The diagram shown is a schematic representation of the structure presented in step 2 of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention, which involves setting the first mask layer.

[0037] Figure 4 The diagram shown is a schematic representation of the structure formed in step 3 of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention, which involves setting a photoresist layer.

[0038] Figure 5 The diagram shown is a schematic representation of the patterned photoresist layer in step 4 of the semiconductor device structure fabrication method according to Embodiment 2 of the present invention.

[0039] Figure 6 The diagram shows the structure of the semiconductor device structure fabrication method in Embodiment 2 of the present invention, specifically the etching of the first mask layer in step 5 and the etching of the silicon layer in step 6.

[0040] Figure 7 The diagram shown is a schematic representation of the structure after removing the first mask layer in step 7 of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0041] Figure 8 The diagram shown is a schematic representation of the structure obtained by removing the substrate layer and oxide layer in step 8 of the semiconductor device structure fabrication method according to Embodiment 2 of the present invention.

[0042] Figure 9 The diagram shows the structure of the semiconductor device structure fabrication method in embodiment two of the present invention, specifically step 9, which involves setting the first phase change layer and the second phase change layer.

[0043] Figure 10 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of the semiconductor device structure fabrication method in Embodiment 2 of the present invention, which involves thinning the substrate layer.

[0044] Figure 11 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of the semiconductor device structure fabrication method in Embodiment 2 of the present invention, which involves setting a hollow substrate.

[0045] Figure 12The diagram shown is a schematic representation of the structure of the substrate layer etched in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0046] Figure 13 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of the semiconductor device structure fabrication method according to Embodiment 2 of the present invention, which involves etching the oxide layer.

[0047] Figure 14 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention, which involves setting a first phase change layer and a second phase change layer.

[0048] Figure 15 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of setting a protective layer in the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0049] Figure 16 The diagram shown is a schematic representation of the structure obtained by removing the protective layer in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0050] Figure 17 The diagram shown is a schematic representation of the structure formed by setting a silicon dioxide layer and a silicon nitride layer in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0051] Figure 18 The diagram shown is a schematic representation of the structure formed by forming an etching window in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention.

[0052] Figure 19 The diagram shown is a schematic representation of the structure presented in step 9 of the optional example of the method for fabricating a semiconductor device structure according to Embodiment 2 of the present invention, which involves setting a second mask layer and penetrating a temporary substrate.

[0053] Figure 20 The diagram shows the structure of the semiconductor device structure fabrication method according to Embodiment 2 of the present invention, specifically the step 10 of setting the isolation layer.

[0054] Component designation explanation

[0055] Silicon rod; 111, upper surface; 112, lower surface; 113, first side surface; 114, second side surface; 121, first phase change layer; 122, second phase change layer; 130, isolation layer;

[0056] 210. Substrate; 211. Substrate layer; 212. Oxide layer; 213. Silicon layer; 221. First mask layer; 222. Photoresist layer; 223. Protective layer; 230. Hollowed-out substrate; 231. Hollowed-out portion; 232. BCB thin film; 233. Temporary substrate; 234. Silicon dioxide layer; 235. Silicon nitride layer; 236. Etching window; 237. Second mask layer. Detailed Implementation

[0057] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0058] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0059] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the accompanying drawings for devices in use or operation.

[0060] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0061] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex. Example

[0062] like Figure 1 As shown, the present invention provides a semiconductor device structure, the semiconductor device structure comprising: a one-dimensional silicon grating, a first phase change layer 121, a second phase change layer 122, and an isolation layer 130;

[0063] The one-dimensional silicon grating includes a plurality of parallel silicon rods 110, each silicon rod 110 including an upper surface 111 and a lower surface 112 arranged in parallel with each other; each silicon rod 110 includes a first side 113 and a second side 114 arranged in opposite directions, the first side 113 being perpendicular to the upper surface 111, and the second side 114 having an angle of less than 90 degrees with the lower surface 112.

[0064] The upper surface 111 of each silicon rod 110 is provided with the first phase change layer 121, and the lower surface 112 of each silicon rod 110 is provided with the second phase change layer 122. The materials of the first phase change layer 121 and the second phase change layer 122 are phase change materials.

[0065] The isolation layer 130 encloses each of the silicon rods 110 and fills the gaps between the silicon rods 110.

[0066] In one embodiment, the material of the isolation layer 130 is silicon dioxide.

[0067] In existing optical devices, the control of radiation direction often uses structures such as mirrors, which are bulky and difficult to integrate. This invention addresses this by placing a first phase change layer 121 and a second phase change layer 122 on the upper and lower surfaces 112 of a silicon rod 110 with tilted sides. By utilizing the tilted sides of the silicon rod 110 to break the 180-degree in-plane rotational symmetry, and leveraging the adjustable physical state of the phase change layers, the crystalline and amorphous states can be switched to achieve the switching of electromagnetic wave radiation direction within the silicon rod 110. Furthermore, since the switching of radiation direction is achieved using the semiconductor structure itself, there is no need for additional, bulky optical structures such as mirrors. This significantly reduces the complexity of the optical structure, facilitating the integrated application of optical devices and laying the foundation for the application of programmable logic optical circuits.

[0068] Specifically, when the first phase change layer 121 and the second phase change layer 122 are in an amorphous state, the downward radiation of the semiconductor device structure is prohibited due to the presence of integer topological charges, so that the electromagnetic waves transmitted within the device will only radiate upwards. Similarly, when the first phase change layer 121 and the second phase change layer 122 are in a crystalline state, the upward radiation of the semiconductor device structure is prohibited due to the presence of integer topological charges, so that the electromagnetic waves transmitted within the device will only radiate downwards. The silicon rod 110 on the tilted side can realize UGR (Unidirectional Guided Resonance) by breaking the 180-degree rotational symmetry in the plane. UGR is a resonance state that only allows electromagnetic waves to radiate in one direction, and can achieve the orientation of electromagnetic wave radiation direction by relying solely on the structure itself. Therefore, by adjusting the switching between the first phase change layer 121 and the second phase change layer 122 in the amorphous and crystalline states, the radiation direction of UGR is dynamically switched, thereby realizing the dynamic switching of the electromagnetic wave radiation direction within the semiconductor device structure. This allows the logic quantity in the optical path to be changed to 0 or 1, so as to realize a programmable logic optical path structure.

[0069] Specifically, the refractive index of the isolation layer 130 is less than that of the silicon layer 213.

[0070] In one embodiment, the material of the first phase change layer 121 and / or the second phase change layer 122 is GeSbTe.

[0071] This invention uses GeSbTe (GST) as the phase transition layer material, allowing the device to achieve a radiation suppression ratio of over 70 dB (radiation ratio > 10) regardless of whether GST is in a crystalline or amorphous state. 7 This ensures the directional radiation property and enables high-precision control of the radiation direction.

[0072] In one embodiment, the first phase change layer 121 and / or the second phase change layer 122 have a refractive index of 4-5 in the amorphous state and a refractive index of 5.4-6.8 in the crystalline state.

[0073] In one embodiment, the thickness of the first phase change layer 121 and / or the second phase change layer 122 is 17 nanometers to 25 nanometers.

[0074] In one embodiment, the first phase change layer 121 and the second phase change layer 122 are GSTs, each GST has a thickness of 19 nanometers, the total height of the GST and silicon rod 110 is 500 nanometers, the distance between the first side 113 of two adjacent silicon rods 110 is 772 nanometers, and the distance between the first phase change layers 121 of two adjacent silicon rods 110 is 358 nanometers.

[0075] In one embodiment, the angle between the second side surface 114 and the lower surface 112 is 72-80 degrees.

[0076] In one embodiment, the angle between the second side surface 114 and the lower surface 112 is 78 degrees.

[0077] By setting the refractive index of the phase change layer, the thickness of the phase change layer, and the angle between the second side surface 114 and the lower surface 112 within the aforementioned suitable range, the present invention ensures that the semiconductor device structure can achieve a high radiation suppression ratio while switching radiation directions.

[0078] Specifically, by adjusting the dimensions of the device structure and the refractive index of the materials in the device structure, the phase change layer can maintain its unidirectional radiation properties when switching between amorphous and crystalline states. Example

[0079] like Figures 2-20 As shown, the present invention also provides a method for fabricating a semiconductor device structure, wherein the method is used to fabricate any one of the semiconductor device structures in Example 1, and the fabrication method includes:

[0080] Step 1: Provide a substrate 210, wherein the substrate 210 comprises, from bottom to top, a substrate layer 211, an oxide layer 212 and a silicon layer 213;

[0081] Step 2: Deposit a first mask layer 221 on the silicon layer 213;

[0082] Step 3: Deposit a photoresist layer 222 on the first mask layer 221;

[0083] Step 4: Pattern the photoresist layer 222 to expose a portion of the first mask layer 221;

[0084] Step 5: Etch the exposed first mask layer 221 to expose a portion of the silicon layer 213;

[0085] Step 6: Etch the exposed silicon layer 213 to form a one-dimensional silicon grating composed of a plurality of parallel silicon rods 110, exposing part of the substrate 210. Each silicon rod 110 formed includes an upper surface 111 and a lower surface 112 arranged relatively parallel to each other, and a first side surface 113 and a second side surface 114 arranged relatively parallel to each other. The first side surface 113 is perpendicular to the upper surface 111, and the angle between the second side surface 114 and the lower surface 112 is less than 90°.

[0086] Step 7: Remove the remaining first mask layer 221;

[0087] Step 8: Remove the substrate layer 211 and the oxide layer 212 from the substrate 210;

[0088] Step 9: A first phase change layer 121 is formed on the upper surface 111 of the etched silicon layer 213, and a second phase change layer 122 is formed on the lower surface 112 of the etched silicon layer 213.

[0089] Step 10: Set an isolation layer 130 such that the isolation layer 130 wraps around each silicon rod 110 and fills the gaps between the silicon rods 110.

[0090] The method for fabricating the semiconductor device structure of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the above order does not strictly represent the order of the fabrication method of the semiconductor device structure protected by the present invention, and those skilled in the art can make changes according to the actual fabrication steps.

[0091] First, such as Figure 2 As shown, in step 1, a substrate 210 is provided, which includes a substrate layer 211, an oxide layer 212 and a silicon layer 213 from bottom to top.

[0092] In one embodiment, the substrate 211 is silicon and the oxide layer 212 is silicon dioxide. Other suitable materials may also be chosen, and no further restrictions are imposed here.

[0093] Then, as Figure 3 As shown, step 2 is performed, in which a first mask layer 221 is formed on the silicon layer 213.

[0094] In one embodiment, the first mask layer 221 is formed by chemical vapor deposition (CVD).

[0095] In one embodiment, the first mask layer 221 is formed by plasma-enhanced chemical vapor deposition (PECVD).

[0096] Next, as Figure 4 As shown, step 3 is performed, and a photoresist layer 222 is formed on the first mask layer 221.

[0097] In one embodiment, the photoresist layer 222 is applied by spin coating.

[0098] Then, as Figure 5 As shown, step 4 is performed to pattern the photoresist layer 222, exposing a portion of the first mask layer 221.

[0099] In one embodiment, the photoresist layer 222 is exposed and developed to achieve patterning, and isopropanol is used as the developer.

[0100] In one embodiment, the photoresist layer 222 is patterned by electron beam lithography (EBL).

[0101] Next, as Figure 6 As shown, step 5 is performed to etch the exposed first mask layer 221 to expose a portion of the silicon layer 213.

[0102] In one embodiment, the first mask layer 221 is etched by reactive ion etching (RIE) using CF4 as the etchant.

[0103] Then, as Figure 6 As shown, in step 6, the exposed silicon layer 213 is etched to form a one-dimensional silicon grating composed of a plurality of parallel silicon rods 110, exposing a portion of the substrate 210. Each silicon rod 110 includes an upper surface 111 and a lower surface 112 arranged in parallel with each other, and a first side surface 113 and a second side surface 114 arranged in parallel with each other. The first side surface 113 is perpendicular to the upper surface 111, and the angle between the second side surface 114 and the lower surface 112 is less than 90°.

[0104] Next, as Figure 7 As shown, step 7 is performed to remove the remaining first mask layer 221.

[0105] In one embodiment, the first mask layer 221 is removed by RIE (reactive ion etching) dry etching.

[0106] Then, as Figure 8 As shown, step 8 is performed to remove the substrate layer 211 and the oxide layer 212 from the substrate 210.

[0107] Next, as Figure 9 As shown, in step 9, a first phase change layer 121 is formed on the upper surface 111 of the etched silicon layer 213, and a second phase change layer 122 is formed on the lower surface 112 of the etched silicon layer 213.

[0108] In one embodiment, the first phase change layer 121 and the second phase change layer 122 are formed by magnetron sputtering.

[0109] In one embodiment, such as Figure 10 As shown, after removing the remaining first mask layer 221, the substrate layer 211 is thinned on the back side; as Figure 11 As shown, a hollow substrate 230 is fabricated and disposed on the back side of the substrate layer 211, with the hollow portion 231 of the hollow substrate 230 aligned with the remaining silicon layer 213 after etching; as shown Figures 12-13As shown, the substrate layer 211 and oxide layer 212 exposed above the hollowed-out portion 231 are etched; as Figure 14 As shown, the first phase change layer 121 and the second phase change layer 122 are provided, and then the hollow substrate 230, the remaining substrate layer 211 and the oxide layer 212 are removed.

[0110] In one embodiment, the substrate layer 211 is thinned on the back side by mechanical polishing.

[0111] In one embodiment, such as Figures 11-14 As shown, the hollow substrate 230 is bonded to the substrate layer 211 by a BCB thin film 232.

[0112] In one embodiment, the substrate layer 211 and the oxide layer 212 are etched by reactive ion etching (RIE).

[0113] The present invention provides support for the silicon layer 213 by setting a hollow substrate 230 during the etching of the silicon layer 213, thereby ensuring the accuracy of the etching of the silicon layer 213 and avoiding adverse phenomena such as etching misalignment or deformation caused by structural deformation.

[0114] In one embodiment, the preparation method further includes: Figure 15 As shown, before thinning the substrate layer 211, a protective layer 223 is formed on the etched silicon layer 213; as Figure 16 As shown, after thinning the substrate layer 211, the protective layer 223 is removed.

[0115] In one embodiment, the protective layer 223 is photoresist.

[0116] The present invention provides a protective layer 223 before thinning the substrate layer 211 to avoid damage to the surface of the silicon layer 213 during the thinning process, thereby ensuring the performance reliability of the semiconductor device structure.

[0117] In one embodiment, the method for preparing the hollow substrate 230 includes: as follows Figure 17 As shown, a temporary substrate 233 is provided, a silicon dioxide layer 234 is disposed on the temporary substrate 233, and a silicon nitride layer 235 is disposed on the silicon dioxide layer 234; as Figure 18 As shown, the silicon dioxide layer 234 and the silicon nitride layer 235 are etched to form an etching window 236; as Figure 19As shown, a second mask layer 237 is provided on the bottom surface of the temporary substrate 233. The temporary substrate 233 is etched through the etching window 236 on the temporary substrate 233, so that the temporary substrate 233 is penetrated and the second mask layer 237 is exposed. The remaining silicon dioxide layer 234, silicon nitride layer 235 and second mask layer 237 are removed.

[0118] In one embodiment, the temporary substrate 233 is etched through using a KOH etchant.

[0119] Finally, as Figure 20 As shown, in step 10, an isolation layer 130 is set so that the isolation layer 130 wraps around each of the silicon rods 110 and fills the gaps between the silicon rods 110.

[0120] In one embodiment, the isolation layer 130 is formed by plasma-enhanced chemical vapor deposition (PECVD). Example

[0121] The present invention also provides a method for switching the radiation direction of a semiconductor device structure. The method is used to switch the radiation direction of any of the semiconductor device structures described in Embodiment 1. The method includes: switching the material states of the first phase change layer 121 and the second phase change layer 122 to switch the radiation direction of the unidirectional mode resonance state of the semiconductor device structure; when the first phase change layer 121 and the second phase change layer 122 are in an amorphous state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is upward radiation only; when the first phase change layer 121 and the second phase change layer 122 are in a crystalline state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is downward radiation only.

[0122] In one embodiment, the material states of the first phase change layer 121 and the second phase change layer 122 are switched using a femtosecond laser.

[0123] In summary, the semiconductor device structure, its fabrication method, and the radiation direction switching method of the present invention can achieve dynamically adjustable directional radiation by setting a phase change layer in conjunction with a silicon rod 110 on an inclined side. In addition, the dynamic directional radiation can be adjusted by utilizing the structure of the semiconductor device itself, reducing the complexity of the optoelectronic structure and facilitating the integrated application of optical components. Finally, the switching of directional radiation by the phase change layer lays the foundation for the application of programmable logic optical paths.

[0124] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0125] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A semiconductor device structure, characterized in that, The semiconductor device structure includes: a one-dimensional silicon grating, a first phase change layer, a second phase change layer, and an isolation layer; The one-dimensional silicon grating includes a plurality of parallel silicon rods, each silicon rod including an upper surface and a lower surface arranged in parallel; each silicon rod includes a first side and a second side arranged in parallel, the first side being perpendicular to the upper surface, and the second side having an angle of less than 90 degrees with the lower surface. The upper surface of each silicon rod is provided with the first phase change layer, and the lower surface of each silicon rod is provided with the second phase change layer. The materials of the first phase change layer and the second phase change layer are phase change materials. The switching between the first phase change layer and the second phase change layer between the amorphous state and the crystalline state can realize the dynamic switching of the radiation direction of the unidirectional mode resonance state. The insulating layer wraps around each of the silicon rods and fills the gaps between the silicon rods.

2. The semiconductor device structure according to claim 1, characterized in that, The material of the first phase change layer and / or the second phase change layer is GeSbTe.

3. The semiconductor device structure according to claim 1, characterized in that, The first phase change layer and / or the second phase change layer have a refractive index of 4-5 in the amorphous state and a refractive index of 5.4-6.8 in the crystalline state.

4. The semiconductor device structure according to claim 1, characterized in that, The thickness of the first phase change layer and / or the second phase change layer is 17 nanometers to 25 nanometers.

5. The semiconductor device structure according to claim 1, characterized in that, The angle between the second side surface and the lower surface is 72-80 degrees.

6. A method for fabricating a semiconductor device structure, characterized in that, The preparation method is used to prepare the semiconductor device structure according to any one of claims 1-5, and the preparation method includes: A substrate is provided, wherein the substrate comprises, from bottom to top, a substrate layer, an oxide layer and a silicon layer; A first mask layer is disposed on the silicon layer; A photoresist layer is formed on the first mask layer; The photoresist layer is patterned to expose a portion of the first mask layer; The exposed first mask layer is etched to expose a portion of the silicon layer; The exposed silicon layer is etched to form a one-dimensional silicon grating composed of a plurality of parallel silicon rods, exposing a portion of the substrate. Each of the formed silicon rods includes an upper surface and a lower surface arranged relatively parallel to each other, and a first side surface and a second side surface arranged relatively parallel to each other. The first side surface is perpendicular to the upper surface, and the angle between the second side surface and the lower surface is less than 90°. Remove the remaining first mask layer; Remove the substrate layer and the oxide layer from the substrate; A first phase change layer is disposed on the upper surface of the etched silicon layer, and a second phase change layer is disposed on the lower surface of the etched silicon layer; An isolation layer is provided so that it wraps around each of the silicon rods and fills the gaps between the silicon rods.

7. The method for fabricating a semiconductor device structure according to claim 6, characterized in that, The preparation method further includes: After removing the remaining first mask layer, the substrate layer is thinned on the back side. A hollow substrate is prepared and disposed on the back side of the substrate layer, with the hollow portion of the hollow substrate aligned with the remaining silicon layer after etching; The substrate layer and oxide layer exposed above the cutout portion are etched; After setting the first phase change layer and the second phase change layer, the hollow substrate, the remaining substrate layer, and the oxide layer are removed.

8. The method for fabricating a semiconductor device structure according to claim 7, characterized in that, The preparation method further includes: before thinning the substrate layer, forming a protective layer on the etched silicon layer; and after thinning the substrate layer, removing the protective layer.

9. The method for fabricating a semiconductor device structure according to claim 7, characterized in that, The method for preparing the hollowed-out substrate includes: A temporary substrate is provided, a silicon dioxide layer is disposed on the temporary substrate, and a silicon nitride layer is disposed on the silicon dioxide layer; The silicon dioxide layer and the silicon nitride layer are etched to form an etching window; A second mask layer is provided on the bottom surface of the temporary substrate, and the temporary substrate is etched through the etching window on the temporary substrate to expose the second mask layer. Remove the remaining silicon dioxide layer, silicon nitride layer, and second mask layer.

10. A method for switching the radiation direction of a semiconductor device structure, characterized in that, The method is used to switch the radiation direction of the semiconductor device structure according to any one of claims 1-5. The method includes: switching the material states of the first phase change layer and the second phase change layer to switch the radiation direction of the unidirectional mode resonance state of the semiconductor device structure; when the first phase change layer and the second phase change layer are in an amorphous state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is upward radiation only; when the first phase change layer and the second phase change layer are in a crystalline state, the radiation direction of the unidirectional mode resonance state of the semiconductor device structure is downward radiation only.

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