Second-order grating surface-emitting semiconductor laser and its fabrication method

Abstract

This invention relates to the field of semiconductor laser technology, and more particularly to a second-order grating surface-emitting semiconductor laser and its fabrication method. The laser comprises, from bottom to top, a substrate layer, a buffer layer, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a capping layer. An N-type electrode is fabricated on the bottom surface of the substrate layer, and the area of ​​the N-type electrode not covering the substrate layer serves as the light exit port. A high-reflection coating is deposited on the bottom surface of the substrate layer corresponding to the light exit port. Corresponding to the light exit port, the capping layer is etched downwards to a portion of the P-type waveguide layer to form a ridge waveguide. A P-type electrode is fabricated on the ridge waveguide, and a high-reflection coating is deposited on the cleaved surface of the ridge waveguide. The exposed portion of the P-type waveguide layer is etched to form a second-order linear grating. A quantum well in-mixing process is used to passively process the second-order linear grating to reduce the absorption of diffracted photons and improve reflection and diffraction efficiency. This invention ensures both simple fabrication and high power output.

Description

Technical Field

[0001] This invention relates to the field of surface-emitting semiconductor laser technology, and in particular to a second-order grating surface-emitting semiconductor laser and its fabrication method. Background Technology

[0002] High-power solid-state lasers have wide applications in defense and industry, such as ballistic missile defense, tactical air defense, and ship self-defense; they can also be used in welding, surface cutting, and other fields. Semiconductor lasers, as pump sources for high-power solid-state lasers, should possess characteristics such as high output power, low temperature drift coefficient, stable operating wavelength, and narrow linewidth.

[0003] Currently, commercially available single-cavity semiconductor lasers are limited by optical catastrophic damage, resulting in low output power, linewidths typically between 3 and 4 nm, and significant wavelength drift with temperature, making them unsuitable for defense and industrial applications. Therefore, fabricating semiconductor laser pump source chips with high output power, narrow linewidth, and low temperature drift in a single emitting region could bring disruptive application potential to high-power solid-state lasers and fiber lasers in defense and industry, significantly improving cost-effectiveness.

[0004] Semiconductor lasers, typically used as pump sources, usually employ multiple emitting cavities arranged in a single bar, single stack, or area array to achieve high power output. High power leads to weakened lateral optical field mode confinement, resulting in uneven optical field distribution along the fast and slow axes of a single-emitting-cavity semiconductor laser. The laser linear array exhibits a thousandfold diffraction limit along the slow axis, degrading beam quality and necessitating optical shaping techniques such as spatial beam combining, wavelength beam combining, and polarization beam combining. However, the expensive precision beam shaping systems and high assembly complexity significantly increase the manufacturing cost of lasers. Furthermore, beam combining techniques result in large spatial volumes, poor stability, and low reliability, further increasing manufacturing costs and hindering the market competitiveness of lateral-emitting devices.

[0005] To address this challenge, surface-emitting distributed feedback (SEP) semiconductor lasers based on second-order curved gratings have been developed in recent years. Photons undergo stable feedback oscillation along the cavity length and are coupled out perpendicularly to the chip surface. Surface emission losses cause a large threshold gain difference between the dominant mode and the lowest-order mode, which can eliminate mode degeneracy and achieve single-wavelength lasing. These lasers exhibit characteristics such as small divergence angle, high beam quality, narrow linewidth, and low temperature drift. However, current SEP semiconductor lasers based on second-order curved gratings suffer from problems such as uneven injection current, defects introduced by large-area electron beam lithography grating structures, and splicing errors. Furthermore, the fabrication of curved second-order gratings is difficult, resulting in poor device repeatability. Under continuous high power, thermal expansion of the second-order curved grating causes distortion, leading to a larger divergence angle, making it unsuitable for large-scale production. SEP semiconductor lasers based on linear second-order gratings employ a buried structure. Fabricating linear second-order gratings requires complex and expensive secondary epitaxial growth and electron beam lithography techniques, resulting in high processing difficulty and cost, which limits their widespread adoption and application.

[0006] Therefore, how to ensure both simple process and high power, stable operation of a second-order grating surface emission distributed feedback laser is an urgent problem to be solved. Summary of the Invention

[0007] To address the aforementioned problems, this invention provides a second-order grating surface-emitting semiconductor laser and its fabrication method. By designing a grating emitting region and a dual-gain region, and combining this with the passive processing of the grating emitting region, the high-power output of the semiconductor laser is achieved. Furthermore, since the second-order linear grating does not require secondary epitaxial growth and electron beam lithography, the process difficulty and manufacturing cost are greatly reduced.

[0008] The second-order grating surface-emitting semiconductor laser provided by this invention includes a substrate layer. A buffer layer, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a capping layer are sequentially grown on the upper surface of the substrate layer. An N-type electrode is fabricated on the lower surface of the substrate layer. The area of ​​the N-type electrode not covering the substrate layer serves as the light exit port. A high-reflection film is deposited on the lower surface of the substrate layer corresponding to the light exit port. Corresponding to the light exit port, the capping layer is etched downwards to a portion of the P-type waveguide layer to form a ridge waveguide. A P-type electrode is fabricated on the ridge waveguide. A high-reflection film is deposited on the cleavage surface of the ridge waveguide. The exposed portion of the P-type waveguide layer is etched to form a second-order linear grating. A quantum well in-mixing process is used to passively process the second-order linear grating to reduce the absorption of diffracted photons and improve reflection and diffraction efficiency.

[0009] The method for fabricating a second-order grating surface-emitting semiconductor laser provided by the present invention includes the following steps:

[0010] S1. A buffer layer, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a capping layer are sequentially formed on the upper surface of the substrate to form an epitaxial wafer; wherein, the middle region of the epitaxial wafer is the grating light-emitting region, and the two sides of the grating light-emitting region are the gain regions.

[0011] S2. The epitaxial wafer is cleaned using acetone, methanol, and isopropanol. A quantum well hybridization suppression dielectric film is then prepared on the capping layer at the positions corresponding to the two gain regions.

[0012] S3. A quantum well hybridization induction dielectric film is integrally prepared on the quantum well hybridization suppression dielectric film and the exposed capping layer;

[0013] S4. The epitaxial wafer with the quantum well hybridization inducing dielectric film and the quantum well hybridization suppressing dielectric film is placed in a rapid annealing furnace for high-temperature rapid thermal annealing treatment; wherein, the quantum well hybridization suppressing dielectric film protects the gain region it covers, so that the gain region has no effect on the lasing band, and the quantum well hybridization inducing dielectric film induces the quantum well of the grating emitting region it covers, so that the quantum well of the grating emitting region is induced to have no absorption in the lasing band.

[0014] S5. Corresponding to the position of the grating light-emitting area, etch downwards from the capping layer to a portion of the P-type waveguide layer to form a ridge waveguide;

[0015] S6. The exposed P-type waveguide layer is lithographically ...

[0016] S7. Electrode strips are formed on the ridge waveguide by etching silicon oxide, and then P-type electrodes are fabricated by magnetron sputtering.

[0017] S8. Thin the lower surface of the substrate and prepare an N-type electrode at a position that avoids the grating light-emitting area, and form a light outlet corresponding to the position of the grating light-emitting area.

[0018] Preferably, the coefficient of thermal expansion of the quantum well hybrid induced dielectric film is smaller than that of the epitaxial wafer, and the coefficient of thermal expansion of the quantum well hybrid suppression dielectric film is larger than that of the epitaxial wafer.

[0019] Preferably, the quantum well hybridization-induced dielectric film is a composite film of Ti and SiO2 formed by combining magnetron sputtering and plasma chemical vapor deposition, and the quantum well hybridization-inhibiting dielectric film is a SiO2 film prepared by electron beam evaporation or a TiO2 film prepared by magnetron sputtering.

[0020] Preferably, the annealing temperature for high-temperature rapid thermal annealing is 650℃~925℃, and the annealing time is 1~2 minutes.

[0021] Preferably, in step S2, a quantum well hybrid suppression dielectric film is grown on the capping layer by electron beam evaporation, and then the portion of the quantum well hybrid suppression dielectric film corresponding to the grating light-emitting region is etched away by photolithography.

[0022] Preferably, in step S5, the quantum well hybrid suppression dielectric film and the quantum well hybrid induction dielectric film are first etched away, and then etched downwards from the capping layer to a portion of the P-type waveguide layer to form a ridge waveguide.

[0023] Compared with the prior art, the present invention can achieve the following beneficial effects:

[0024] (1) The structural design of the grating light-emitting area combined with the dual-gain area, combined with the passive processing technology of the grating light-emitting area, achieves high power output:

[0025] This laser employs a structure with a central grating-emitting region and gain regions on either side. By appropriately increasing the width of the gain regions, higher laser power is achieved in the grating-emitting region. The second-order linear grating in the grating-emitting region is passively neutralized using a quantum well mixing process. This allows interdiffusion of the constituent atoms between the well and barrier, transforming the quantum well in the grating region from a square potential well to a cosine potential well. This increases the bandgap structure, reduces the absorption of diffracted photons by the second-order linear grating, and improves reflection and diffraction efficiency. High-reflectivity films (greater than 99.9%) are fabricated on the cleavage surfaces of the two gain regions, and a high-reflection film (99.95%) is fabricated on the substrate surface to further enhance gain efficiency. Furthermore, this laser structure is cavity-free, theoretically capable of handling high power and a high damage threshold.

[0026] (2) The second-order linear grating provides optical feedback to the gain region to optimize linewidth characteristics and temperature drift:

[0027] The lasing wavelength in the gain region is achieved by generating reflections of a specific wavelength band in the waveguide using a second-order linear grating. By adjusting the specific parameters of the second-order linear grating, specific wavelengths in the gain region can be selectively lased, which is beneficial for narrowing the linewidth. At the same time, the two gain regions provide resonant reflections to lock the lasing wavelength, stabilizing the wavelength and temperature drift.

[0028] (3) Periodic diffraction structures vertically couple light out to reduce the divergence angle:

[0029] The grating emission area adopts a second-order linear grating, the laser's transverse gain oscillates, and the light is vertically coupled out. The surface lasing results in a small beam divergence angle, which effectively improves the laser beam quality and reduces the difficulty of assembly and adjustment.

[0030] (4) Patterned electrodes and large light-emitting area improve reliability:

[0031] Patterned electrodes effectively suppress self-focusing caused by thermal lensing and filamentation and spatial hole burning effects caused by electron fluctuations, ensuring stable laser operation. Diffraction is performed on a second-order linear grating, allowing light to emerge from a large grating area, increasing the light-emitting area and mode volume, and avoiding catastrophic optical damage. Laser emission is performed on the N-side (substrate side) of the chip, achieving surface emission, which facilitates packaging and heat dissipation.

[0032] (5) The displacement Talbot effect (DTL) is used to prepare the diffraction structure of the luminescent region by exposure, which reduces the difficulty and cost of the process:

[0033] By using DTL exposure of an ultraviolet lithography machine to replace conventional electron beam micro-nano grating fabrication, a large-area error-free second-order diffraction grating in the light-emitting region can be realized; surface grating structures can be fabricated on the P-plane without the need for complex and expensive secondary epitaxial growth technology and electron beam lithography technology, thus reducing process difficulty and cost. Attached Figure Description

[0034] Figure 1 This is a three-dimensional structural schematic diagram of a second-order grating surface-emitting semiconductor laser provided according to an embodiment of the present invention;

[0035] Figure 2 This is a schematic cross-sectional view of a second-order grating surface-emitting semiconductor laser provided according to an embodiment of the present invention;

[0036] Figure 3 This is a schematic flowchart of a method for fabricating a second-order grating surface-emitting semiconductor laser according to an embodiment of the present invention;

[0037] Figures 4-8 This is a schematic diagram of the structure corresponding to each step in the fabrication method of a second-order grating surface-emitting semiconductor laser provided according to an embodiment of the present invention;

[0038] Figure 9 This is a schematic diagram illustrating the changes in the quantum well structure before and after the passive grating light-emitting region is rendered, according to an embodiment of the present invention.

[0039] Figure 10 This is a schematic diagram of the band structure change induced by the diffusion of impurity-free vacancies according to an embodiment of the present invention.

[0040] Figure reference numerals: 1. Substrate layer; 2. Buffer layer; 3. N-type cladding layer; 4. N-type waveguide layer; 5. Active layer; 6. P-type waveguide layer; 7. P-type cladding layer; 8. Cap layer; 9. N-type electrode; 10. Light outlet; 11. P-type electrode; 12. Second-order linear grating; 13. Grating light emission region; 14. Gain region; 15. Quantum well hybridization suppression dielectric film; 16. Quantum well hybridization induction dielectric film. Detailed Implementation

[0041] In the following description, embodiments of the invention will be described with reference to the accompanying drawings. In the description below, the same modules are denoted by the same reference numerals. Where the same reference numerals are used, their names and functions are also the same. Therefore, their detailed description will not be repeated.

[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not constitute a limitation thereof.

[0043] Figure 1 and Figure 2 The three-dimensional structure and cross-sectional structure of the second-order grating surface-emitting semiconductor laser provided according to an embodiment of the present invention are shown respectively.

[0044] like Figure 1 and Figure 2 As shown, the second-order grating surface-emitting semiconductor laser provided in this embodiment of the invention includes: a substrate layer 1, on which a buffer layer 2, an N-type cladding layer 3, an N-type waveguide layer 4, an active layer 5, a P-type waveguide layer 6, a P-type cladding layer 7 and a capping layer 8 are sequentially grown to form an epitaxial wafer. The epitaxial wafer is an N-plane light-emitting structure. A grating light-emitting region 13 is formed in the middle of the epitaxial wafer by etching, and gain regions 14 are formed on both sides of the grating light-emitting region 13. More specifically, the capping layer 8 is etched downwards to a portion of the P-type waveguide layer 6, forming two ridge waveguides on the epitaxial wafer. These two ridge waveguides constitute the gain region 14 of the semiconductor laser. P-type electrodes 11 are fabricated on the two ridge waveguides, and a high-reflectivity film is deposited on the cleavage surfaces of the two ridge waveguides to improve gain efficiency. The remaining exposed portion of the P-type waveguide layer 6 is etched to form a second-order linear grating 12. The second-order linear grating 12 serves as the grating emission region 13, diffracting the incident light through a fixed periodic diffraction structure. The second-order linear grating 12 is passively processed by using a quantum well mixing process to allow interdiffusion of the component atoms between the well and the barrier. This transforms the quantum well in the grating region from a square potential well to a cosine potential well, increasing the bandgap structure, reducing the absorption of diffracted photons by the second-order linear grating 12, and improving reflection and diffraction efficiency. The bottom surface of the substrate 1 is thinned, and an N-type electrode 9 is fabricated at a position that avoids the grating light-emitting region 13, thereby forming a light-emitting port 10 on the bottom surface of the substrate 1 corresponding to the position of the grating light-emitting region 13. A high anti-reflection film is deposited on the bottom surface of the substrate 1 at the position corresponding to the light-emitting port 10 to improve the gain efficiency.

[0045] The grating light-emitting region 13 adopts a periodic diffraction structure, the semiconductor laser oscillates laterally and is vertically coupled to emit light, and the surface lasing results in a small beam divergence angle, which effectively improves the beam quality of the semiconductor laser and reduces the difficulty of assembly and adjustment.

[0046] The lasing wavelength of the gain region 14 is achieved by generating a specific wavelength band reflection in the waveguide through the periodic diffraction structure of the grating emitting region 13. By adjusting specific parameters of the periodic diffraction structure, such as grating period, duty cycle, and etching depth, a specific wavelength in the gain region can be selectively lased, which is beneficial for narrowing the linewidth. At the same time, the lasing wavelength is locked by providing resonant reflection through the gain regions on both sides of the fixed periodic diffraction structure, thus stabilizing the wavelength and temperature drift.

[0047] This invention uses an ultraviolet lithography machine to etch the P-type waveguide layer 6, and utilizes the displacement Talbot effect exposure of the ultraviolet lithography machine to replace the conventional electron beam micro-nano grating fabrication, thereby realizing a large-area second-order linear grating 12 with no splicing error in the grating light-emitting region 13; the surface grating structure is fabricated on the P-plane, eliminating the need for complex and expensive secondary epitaxial growth technology and electron beam lithography technology, thus reducing the process difficulty and production cost.

[0048] The foregoing description details the second-order grating surface-emitting semiconductor laser provided in the embodiments of the present invention. Corresponding to this semiconductor laser, the embodiments of the present invention also provide a method for fabricating a second-order grating surface-emitting semiconductor laser.

[0049] Figure 3 The flowchart illustrates a method for fabricating a second-order grating surface-emitting semiconductor laser according to an embodiment of the present invention; Figures 4-8 The structures corresponding to each step in the fabrication method of the second-order grating surface-emitting semiconductor laser provided according to embodiments of the present invention are shown respectively.

[0050] like Figure 3 Combination Figures 4-8 As shown, the fabrication method of the second-order grating surface-emitting semiconductor laser provided in this embodiment of the invention includes the following steps:

[0051] S1. A buffer layer 2, an N-type cladding layer 3, an N-type waveguide layer 4, an active layer 5, a P-type waveguide layer 6, a P-type cladding layer 7, and a capping layer 8 are sequentially formed on the upper surface of the substrate layer 1 to form an epitaxial wafer; wherein, the middle region of the epitaxial wafer is the grating light-emitting region, and the two sides of the grating light-emitting region are the gain regions.

[0052] The epitaxial wafer is etched to form a ridge waveguide. The etched part is etched by photolithography to form a second-order linear grating 12 (i.e., a periodic diffraction structure) to form a grating light-emitting region. The ridge waveguides on both sides of the grating light-emitting region form a gain region.

[0053] S2. The epitaxial wafer is cleaned using acetone, methanol, and isopropanol. A quantum well hybrid suppression dielectric film 15 is then prepared on the capping layer at the positions corresponding to the two gain regions.

[0054] After cleaning, a quantum well hybrid suppression dielectric film is grown on the P-side (i.e., capping layer 8) of the epitaxial wafer using electron beam evaporation. The epitaxial wafer is then photolithographically etched to transfer the pattern on the mask to the photoresist. The photoresist is then used as a mask, and the quantum well hybrid suppression dielectric film on the grating light-emitting region 13 is removed by dry or wet etching. This completes the fabrication of the quantum well hybrid suppression dielectric film 15 on the ridge waveguide, thereby protecting the gain region.

[0055] S3. A quantum well hybridization-inducing dielectric film is integrally prepared on the quantum well hybridization suppression dielectric film and the exposed capping layer.

[0056] A quantum well hybrid induced dielectric film 16 is deposited on the P-side of the epitaxial wafer after photolithography.

[0057] Since the quantum well hybridization suppression dielectric film 15 on the grating light-emitting region 13 is removed, a portion of the capping layer 8 is not covered by the quantum well hybridization suppression dielectric film. The quantum well hybridization induction dielectric film 16 deposited on the P-side of the epitaxial wafer after the first photolithography is actually deposited on the quantum well hybridization suppression dielectric film and the capping layer 8 which is not covered by the quantum well hybridization suppression dielectric film.

[0058] The coefficient of thermal expansion of the quantum well hybridization suppression dielectric film 15 is greater than that of the epitaxial wafer, while the coefficient of thermal expansion of the quantum well hybridization induced dielectric film 16 is less than that of the epitaxial wafer. The quantum well hybridization suppression dielectric film 15 is located below the quantum well hybridization induced dielectric film 16 and can protect the ridge waveguide it covers.

[0059] S4. The epitaxial wafer with quantum well hybridization inducing dielectric film 16 and quantum well hybridization suppressing dielectric film 15 is placed in a rapid annealing furnace for high-temperature rapid thermal annealing treatment; wherein, the quantum well hybridization suppressing dielectric film 15 protects the gain region it covers, so that the gain region has no effect on the lasing band, and the quantum well hybridization inducing dielectric film induces the quantum well of the grating emitting region it covers, so that the quantum well of the grating emitting region is induced to have no absorption in the lasing band.

[0060] Using different processing methods (such as electron beam evaporation, plasma chemical vapor deposition, or magnetron sputtering), a quantum well hybridization induced dielectric film 16 with a smaller coefficient of thermal expansion than the epitaxial wafer is deposited on the surface of the grating emitting region 13. A quantum well hybridization suppression dielectric film 15 is deposited on the surface of the dual-gain region. Then, the epitaxial wafer is subjected to rapid high-temperature thermal annealing, which causes atoms on the surface of the grating emitting region 13 to diffuse into the quantum well hybridization induced dielectric film 16, generating point defects (vacancies). Under the action of high-temperature annealing, the point defects diffuse into the quantum well region, inducing the mutual hybridization of quantum well / barrier materials. The quantum well of the grating emitting region 13 changes from a square potential well to a cosine potential well, which increases the band gap of the emitting region, blue-shifts the emission wavelength, reduces the absorption of diffracted photons by the second-order grating, and improves the reflection and diffraction efficiency.

[0061] Figure 9 The changes in the quantum well structure before and after the passive grating light-emitting region is provided according to an embodiment of the present invention are shown.

[0062] like Figure 9 As shown, the left side represents the initial state where the quantum well structure is a square potential well structure, while the right side represents the state after the quantum well mixing process is completed. The quantum well structure changes from a square potential well to a cosine potential well, resulting in a widened band gap and no absorption of lasing photons, thus achieving passive processing.

[0063] Figure 10 This illustrates a band structure change induced by impurity-free vacancy diffusion according to an embodiment of the present invention.

[0064] like Figure 10 As shown, with the increase of the diffusion coefficient Ld during the quantum well hybridization process, the conduction band order of the quantum well changes from a square potential well to a cosine potential well, the band gap widens, and it does not absorb light.

[0065] The effect of quantum well hybridization mainly depends on the solubility and diffusion coefficient of group III or group V atoms in the quantum well within the dielectric film, as well as the difference in thermal expansion coefficients between the dielectric film and the contact layer. Furthermore, it is also related to the annealing temperature and time. For high-power semiconductor lasers, the active layer 5 can be made of materials such as GaAs, AlGaAs, and InGaAs. The dielectric film materials are shown in Table 1. The selection of 16 types of quantum well hybridization-induced dielectric films (for passive formation of the emitting region) and 15 types of quantum well hybridization-suppressing dielectric films (for protection of the gain region 14) needs to be based on a comparison of the thermal expansion coefficients of the specific material systems.

[0066] Table 1. Thermal expansion coefficient parameters of commonly used materials

[0067] Material system coefficient of thermal expansion Band gap (eV) GaAs <![CDATA[6.4*10 -6 / K]]> 1.43 <![CDATA[TiO2]]> <![CDATA[9.14*10 -6 / K]]> 3.2 <![CDATA[SiO2]]> <![CDATA[0.6*10 -6 / K]]> 8.9 <![CDATA[Si3N4]]> <![CDATA[2.7*10 -6 / K]]> 5.3 InP <![CDATA[4.56*10 -6 / K]]> 1.18

[0068] Experimental data description:

[0069] Ga has a high diffusion coefficient and solubility in SiO2, while GaAs (6.4×10) -6 K -1 The coefficient of thermal expansion of SiO2 is 6×10⁻⁶. -7 K -1The thermal stress generated by SiO2, which is 10 times greater than that of IFVD (Impurity-Free Vacancy Diffusion), accelerates atomic diffusion. Therefore, SiO2 is the preferred dielectric film for IFVD-induced QWI (Quantum Well In-Way Mixing). Higher temperatures and longer times result in compressive stress due to the difference in thermal expansion coefficients. Furthermore, the instability of Ga and As at high temperatures promotes their faster and greater entry into the quantum well mixing-induced dielectric film 16, leading to a more pronounced QWI and a greater blue shift in the bandgap. However, excessive blue shift can affect the device's luminescence performance. Therefore, a comprehensive consideration is needed to find the optimal quantum well in-way mixing process parameters.

[0070] The coefficient of thermal expansion of TiO2 is 9.14 × 10⁻⁶. -6 K -1 The coefficient of thermal expansion is greater than that of GaAs (6.4 × 10⁻⁶). -6 K -1 During rapid high-temperature thermal annealing, tensile stress is generated, which inhibits component migration. Therefore, it is not conducive to the occurrence of quantum well hybridization. This can be applied to protect the gain region 14 in the device. In the actual device fabrication process, a quantum well hybridization suppression dielectric film 15, which protects the gain region 14, should be deposited first, followed by a quantum well hybridization induction dielectric film 16. This achieves the goal of fabricating the second-order linear grating chip without absorption in the lasing band under rapid high-temperature thermal annealing conditions, while the chip in the gain region can still maintain high-power lasing under high-temperature annealing conditions.

[0071] Specific process flow: This invention has studied the application of electron beam evaporation, plasma chemical vapor deposition, and magnetron sputtering to coat the surface of epitaxial wafers with SiO2, TiO2, and Ti+SiO2 dielectric films of different thicknesses. Rapid thermal annealing at high temperatures of 650℃, 750℃, 800℃, 850℃, 900℃, and 925℃ for 1 minute and 2 minutes respectively was performed to obtain the effect of the above conditions on the degree of disorder of the quantum well.

[0072] It was found that the peaks of the quantum well disappeared after high-temperature annealing at 900℃ and 950℃, indicating that excessively high temperatures led to lattice quality deterioration and caused serious damage to the active layer 5. Therefore, the invention initially adopted a high-temperature rapid annealing condition of 850℃ for 2 minutes to induce quantum well hybridization in the grating light-emitting region 13 and prepare an absorption-free region.

[0073] In addition, electron beam evaporation of TiO2 provided some protection for gain region 14, but still resulted in a blue shift of 8.9 nm.

[0074] Ti can promote the precipitation of Ga atoms and also acts as an adhesive. While magnetron sputtering of Ti thin films can improve the quantum well mixing at the second-order linear grating 12, it is crucial to avoid introducing additional impurities that could lead to insufficient carrier light absorption. Therefore, this invention employs magnetron sputtering to deposit only 5nm and 10nm Ti thin films on the surface of the epitaxial wafer, followed by plasma-enhanced chemical vapor deposition of a SiO2 dielectric film, combined with a rapid high-temperature thermal annealing process to enhance the blue shift in the grating region.

[0075] Since 850℃ exceeds the temperature for MOCVD epitaxial growth, it may have a certain impact on lattice quality. This invention attempts to lower the rapid annealing temperature. Rapid thermal annealing processes were performed at 650℃, 750℃, and 800℃ for 1 minute and 2 minutes, respectively, using magnetron sputtering of 5nm Ti + PECVD 200nm SiO2 as the quantum well hybrid-induced dielectric film 16. However, this did not increase the blue shift. Only when magnetron sputtering of 10nm Ti + PECVD 200nm SiO2, combined with high-temperature rapid annealing at 850℃ for 2 minutes, did the active layer 5 show a significant blue shift, reaching approximately 38nm. Therefore, this invention determines the optimal conditions for high-temperature annealing to be an annealing temperature of 850℃ and a holding time of 2 minutes. Furthermore, this invention compared the deposition of SiO2 dielectric films of different thicknesses by magnetron sputtering 10nm Ti+ plasma chemical vapor deposition method and found that when the SiO2 thickness was greater than 300nm, further increases in SiO2 thickness did not have a significant impact on the blue shift of the peak position, indicating that the Ga atom concentration in the SiO2 dielectric film may have reached saturation.

[0076] Therefore, the optimal fabrication conditions for the non-absorption region of the second-order linear grating chip are as follows: a 10 nm Ti thin film is sputtered onto the surface of an epitaxial wafer using magnetron sputtering, followed by a 300 nm SiO2 dielectric film deposited using plasma-enhanced chemical vapor deposition, and then a rapid high-temperature thermal annealing process at 850 °C for 2 minutes, resulting in a blue shift of approximately 38 nm. Electron beam evaporation was used to prepare a series of SiO2 films of different thicknesses (200 nm, 400 nm, 600 nm), which effectively suppressed quantum well mixing and can be used to protect the gain region of ridge waveguides.

[0077] (1) 980nm as grown 958.88nm

[0078] Peak position of the laser without any processing.

[0079] (2) 850℃ for 2 min RTA 929.86nm

[0080] It is the peak position of an untreated laser after rapid high-temperature annealing.

[0081] (3) Electron beam evaporation of 200nm TiO2 at 850℃ for 2min, RTA 949.98nm

[0082] (4) Magnetron sputtering of 5nm Ti + PECVD of 200nm SiO2 at 650℃ for 2min; RTA: 955.62nm

[0083] (5) Magnetron sputtering 10nm Ti + PECVD 200nm SiO2 750℃ 2min RTA 932.98nm;

[0084] (6) Magnetron sputtering 5nm Ti + PECVD 200nm SiO2 800℃ 2min RTA 961.42nm / 961.43nm;

[0085] (7) Magnetron sputtering 10nm Ti + PECVD 200nm SiO2 850℃ 2min RTA 920.51 / 923.53nm;

[0086] (8) Electron beam evaporation of 200nm SiO2 at 850℃ for 2min RTA 953.18nm / 953.19nm;

[0087] (9) Electron beam evaporation of 200nm SiO2 at 850℃ for 4min RTA 955.43nm / 958.38nm;

[0088] (10) Electron beam evaporation of 400nm SiO2 at 850℃ for 2min RTA 961.84nm / 960.11nm;

[0089] (11) Electron beam evaporation of 400nm SiO2 at 850℃ for 4min RTA 960.11 / 958.89nm;

[0090] (12) Electron beam evaporation of 600nm SiO2 at 850℃ for 2min RTA 958.89nm / 956.64nm.

[0091] Optimal induction conditions: magnetron sputtering of 10nm Ti + 200nm SiO2.

[0092] Optimal suppression conditions: Electron beam evaporation of 400nm SiO2.

[0093] S5. Corresponding to the position of the grating light-emitting area, etch downwards from the capping layer to a portion of the P-type waveguide layer to form a ridge waveguide.

[0094] First, the quantum well hybrid suppression dielectric film 15 and the quantum well hybrid induction dielectric film 16 are etched away, and then the capping layer 8 is etched down to a portion of the P-type waveguide layer 5 to form a ridge waveguide.

[0095] In the process of etching to form the ridge waveguide, a silicon oxide hard mask is first prepared on the P-side (i.e., capping layer 8) of the epitaxial wafer using plasma chemical vapor deposition (PECVD). The epitaxial wafer is then photolithographically etched to transfer the two gain region ridge waveguide patterns on the photoresist onto the silicon oxide hard mask. Finally, the ridge waveguide mesa in the silicon oxide hard mask is transferred onto the epitaxial wafer by dry etching or wet etching.

[0096] S6. The exposed P-type waveguide layer is lithographically lithographically processed using an ultraviolet lithography machine, and a second-order linear grating 12 is fabricated by exposure using the displacement Talbot effect.

[0097] The remaining P-type waveguide layer in the epitaxial wafer is lithographically formed using an ultraviolet lithography machine. The second-order linear grating 12 is fabricated by exposure using the displacement Talbot effect. A large-area grating structure with high-precision subwavelength dimensions is fabricated from a coarse lithography plate through progressive exposure.

[0098] By using the displacement Tauber effect exposure of ultraviolet lithography machine to replace conventional electron beam micro-nano grating fabrication, a large-area error-free second-order linear grating with 13 grating light-emitting regions is achieved; the surface grating structure is fabricated on the P-plane, eliminating the need for complex and expensive secondary epitaxial growth technology and electron beam lithography technology, thus reducing process difficulty and cost.

[0099] S7. Electrode strips are formed on the ridge waveguide by etching silicon oxide, and then P-type electrodes are fabricated by magnetron sputtering.

[0100] P-type electrodes are fabricated on the ridge waveguide by depositing silicon oxide using PECVD on the epitaxial wafer (i.e., on the ridge waveguide), followed by photolithography, etching of electrode strips, and then evaporation of metal electrodes.

[0101] During the fabrication of the P-type electrode on the ridge waveguide, silicon oxide is also deposited on the second-order linear grating 12 as a grating protective layer to protect the second-order linear grating 12. After evaporation, a metal layer is formed, which reflects light.

[0102] S8. Thin the lower surface of the substrate and prepare an N-type electrode at a position that avoids the grating light-emitting area, and form a light outlet corresponding to the position of the grating light-emitting area.

[0103] After depositing the P-type electrode, the N-side of the epitaxial wafer is thinned and then subjected to physical and chemical polishing processes to reduce the thickness to 100 micrometers, thereby minimizing losses caused by substrate absorption.

[0104] On the N-side of the thinned epitaxial wafer, a double-sided alignment photolithography process is used to copy the grating area on the photomask into the photoresist. Repeated microscopic inspections are performed to ensure that the grating area on the P-side coincides with the grating area on the N-side.

[0105] A second-order linear grating 12 is fabricated on the P-side of an epitaxial wafer. However, since the epitaxial wafer emits light from the N-side, it is necessary to locate the region corresponding to the grating's light-emitting region 13 on the N-side through double-sided alignment, which serves as the light-emitting port 10. Using negative photoresist, photolithography and development are performed with double-sided alignment, leaving the photoresist at the light-emitting port 10. The photoresist in the remaining areas is removed. Then, an N-type electrode 9 is fabricated by magnetron sputtering. After gold deposition, the photoresist at the light-emitting port 10 is removed using a photoresist remover. This removes the photoresist at the light-emitting port 10 along with the N-type electrode 9 above it, leaving no N-type electrode 9 at the light-emitting port 10, while retaining the N-type electrode 9 in the remaining areas. Finally, alloying is used to reduce the specific contact resistivity and improve the ohmic contact characteristics.

[0106] Finally, a high-reflectivity film is deposited on the cavity surface of the semiconductor laser (i.e., the cleavage surface of the gain region), and a high-antireflection film is deposited at the light exit port 10.

[0107] It should be understood that the various forms of processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this invention disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this invention can be achieved, and this is not limited herein.

[0108] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A second-order grating facet emitting semiconductor laser, comprising a substrate layer, a buffer layer, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer and a cap layer are sequentially grown on the upper surface of the substrate layer, an N-type electrode is prepared on the lower surface of the substrate layer, the area of the substrate layer not covered by the N-type electrode is a light emitting port, and a high transmittance film is evaporated on the lower surface of the substrate layer corresponding to the position of the light emitting port; characterized in that, A ridge waveguide is formed by etching from the cover layer to part of the P-type waveguide layer corresponding to the position of the light outlet, a P-type electrode is prepared on the ridge waveguide, a high reflection film is evaporated on the cleavage surface of the ridge waveguide, a second-order linear grating is formed by etching the exposed part of the P-type waveguide layer, passive processing is performed on the second-order linear grating by using the quantum well mixing process to reduce the absorption of the diffracted photons and improve the reflection and diffraction efficiency.

2. A method for manufacturing a second-order grating surface emitting semiconductor laser according to claim 1, for manufacturing the second-order grating surface emitting semiconductor laser according to claim 1, characterized by, The method comprises the following steps: S1. Forming an epitaxial wafer by sequentially generating a buffer layer, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer and a cover layer on the upper surface of a substrate layer; wherein the middle region of the epitaxial wafer is a grating light emitting area, and the two sides of the grating light emitting area are gain areas; S2. Standard cleaning the epitaxial wafer by using acetone, methanol and isopropyl alcohol, and preparing a quantum well mixing inhibition medium film on the cover layer corresponding to the positions of the two gain areas; S3. Integrally preparing a quantum well mixing induction medium film on the quantum well mixing inhibition medium film and the exposed cover layer; S4. Placing the epitaxial wafer prepared with the quantum well mixing induction medium film and the quantum well mixing inhibition medium film into a rapid annealing furnace for high-temperature rapid thermal annealing treatment; wherein the quantum well mixing inhibition medium film has a protective effect on the covered gain area, so that the gain area has no influence on the lasing waveband, and the quantum well mixing induction medium film has an induction effect on the covered grating light emitting area, so that the quantum well of the grating light emitting area is induced to have no absorption to the lasing waveband; S5. Forming a ridge waveguide by etching from the cover layer to part of the P-type waveguide layer corresponding to the position of the grating light emitting area; S6. Performing photolithography on the exposed P-type waveguide layer by using an ultraviolet photolithography machine, and preparing a second-order linear grating by using displacement Talbot effect exposure; S7. Preparing electrode strips on the ridge waveguide by etching silicon oxide process, and then preparing a P-type electrode by using a magnetron sputtering process; S8. Thinning the lower surface of the substrate layer, preparing an N-type electrode at positions avoiding the grating light emitting area, and forming a light outlet corresponding to the position of the grating light emitting area.

3. The method of claim 2, wherein the method further comprises: The thermal expansion coefficient of the quantum well mixing induction medium film is smaller than the thermal expansion coefficient of the epitaxial wafer, and the thermal expansion coefficient of the quantum well mixing inhibition medium film is greater than the thermal expansion coefficient of the epitaxial wafer.

4. The method of claim 3, wherein the second-order grating surface emitting semiconductor laser is prepared by the steps of: forming a first-order grating surface emitting semiconductor laser; and forming a second-order grating on the first-order grating surface emitting semiconductor laser. The quantum well mixing induction medium film is a Ti and SiO2 composite film layer formed by combining a magnetron sputtering method with a plasma chemical vapor deposition method, and the quantum well mixing inhibition medium film is a SiO2 film prepared by an electron beam evaporation method or a TiO2 film prepared by a magnetron sputtering method.

5. The method of claim 2-4, wherein the method further comprises: The annealing temperature of the high-temperature rapid thermal annealing is 650-925°C, and the annealing time is 1-2 minutes.

6. The method of claim 2, wherein the second-order grating surface emitting semiconductor laser is prepared by the steps of: forming a first-order grating surface emitting semiconductor laser; and forming a second-order grating on the first-order grating surface emitting semiconductor laser. In step S2, the quantum well mixing inhibition medium film is grown on the cover layer by using an electron beam evaporation method, and then the part of the quantum well mixing inhibition medium film corresponding to the grating light emitting area is etched away by using a photolithography method.

7. The method of claim 2, wherein the second-order grating surface emitting semiconductor laser is prepared by the steps of: forming a first-order grating surface emitting semiconductor laser; and forming a second-order grating on the first-order grating surface emitting semiconductor laser. In step S5, the quantum well mixing inhibition medium film and the quantum well mixing induction medium film are etched away first, and then the ridge waveguide is formed by etching from the cover layer to part of the P-type waveguide layer.

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