A method and device for integrating computing and communication of an AI chip, and an AI chip

Abstract

The present invention discloses a method, device and AI chip for integrating computing and communication of an AI chip. The method for integrating computing and communication of an AI chip comprises: when the current AI chip is working in a communication mode, based on a target communication module integrated on the current AI chip, obtaining and forwarding a request for data to be forwarded; wherein the target communication module includes a routing module and a network interface; when the current AI chip is working in a network computing mode, obtaining the data to be computed through the target communication module, and processing the data to be computed through the network computing and communication core integrated on the current AI chip to obtain a data computing result. The technical solution of the embodiment of the present invention can improve the scalability of chip interconnection without reducing bandwidth while achieving low cost.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a method and device for integrating computing and communication of an AI chip, and an AI chip. Background Art

[0002] With the development of science and technology, the ultra-large-scale parallel computing capabilities of AI (Artificial Intelligence) chips are becoming increasingly powerful. The traditional method of inter-chip data transmission through PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) can no longer meet the bandwidth requirements of AI computing.

[0003] There are three existing solutions: one is to increase the number of PCIE interfaces, the second is to use additional network ports to interconnect AI chips, and the third is to add additional network ports and design an additional Switch chip to interconnect AI chips.

[0004] The first option lacks scalability due to the limited number of PCIe interfaces that can be added to AI chips. The second option involves bandwidth between AI chips varying with their connection relationships: the more directly connected chips, the lower the bandwidth. The third option is expensive and carries significant risks, given the multi-year design cycle and tape-out costs of hundreds of millions of yuan per chip. Summary of the Invention

[0005] The present invention provides a method and device for integrating computing and communication of an AI chip, and an AI chip, to address the problems of poor scalability caused by existing AI chip interconnection based on the PCIE interface, reduced bandwidth due to direct connection between two chips, and high cost of AI chip interconnection due to the additional design of a Switch chip.

[0006] According to one aspect of the present invention, a method for integrating computing and communication of an AI chip is provided, comprising:

[0007] When the current AI chip operates in communication mode, obtaining and forwarding a data request to be forwarded based on a target communication module integrated on the current AI chip; wherein the target communication module includes a routing module and a network interface;

[0008] When the current AI chip works in the network computing mode, the data to be calculated is obtained through the target communication module, and the network computing and communication core integrated on the current AI chip is used to process the data to obtain the data calculation results.

[0009] According to another aspect of the present invention, a device for integrating computing and communication of an AI chip is provided, comprising:

[0010] A data forwarding module, configured to obtain and forward data requests to be forwarded based on a target communication module integrated on the current AI chip when the current AI chip is operating in communication mode; the target communication module includes a routing module and a network interface;

[0011] The data calculation result acquisition module is used to obtain the data to be calculated through the target communication module when the current AI chip works in the network computing mode, and to process the data to be calculated through the network computing and communication core integrated on the current AI chip to obtain the data calculation results.

[0012] According to another aspect of the present invention, an AI chip is provided, the AI chip comprising:

[0013] A target communication module, configured to obtain and forward data requests to be forwarded when the current AI chip operates in communication mode; wherein the target communication module includes a routing module and a network interface;

[0014] The target communication module is also used to obtain data to be calculated through the target communication module when the current AI chip operates in network computing mode;

[0015] The network computing and communication core is used to process the data to be calculated and obtain the data calculation results.

[0016] According to another aspect of the present invention, a computer-readable storage medium is provided, which stores computer instructions. The computer instructions are used to enable a processor to implement the method for integrating computing and communication of the AI chip of any embodiment of the present invention when executed.

[0017] The technical solution of the embodiment of the present invention is to obtain and forward data requests to be forwarded based on the target communication module integrated on the current AI chip when the current AI chip is operating in communication mode, thereby obtaining data to be calculated through the target communication module when the current AI chip is operating in network computing mode, and processing the data to be calculated through the network computing and communication core integrated on the current AI chip to obtain data calculation results. In this solution, through the routing module and network computing and communication core integrated in the AI chip, AI chips can be interconnected without directly connecting to the AI chip, without going through PCIE, and without going through additional network ports, without sacrificing bandwidth resources, and the computing pressure of the AI chip computing core can be shared through the network computing and communication core. This solves the problems of poor scalability caused by existing AI chip interconnection based on PCIE interface, reduced bandwidth caused by direct connection between two chips, and high cost of AI chip interconnection based on additionally designed switch chips. It can improve the scalability of chip interconnection without reducing bandwidth under the premise of low cost.

[0018] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 This is a flowchart of a method for integrating computing and communication of an AI chip provided in the first embodiment of the present invention;

[0021] Figure 2 This is a flowchart of a method for integrating computing and communication of an AI chip provided in the second embodiment of the present invention;

[0022] Figure 3 A schematic diagram of the structure of a device integrating computing and communication of an AI chip provided in the third embodiment of the present invention;

[0023] Figure 4 This is a schematic diagram of the complete hardware structure of an AI chip provided in Example 4 of the present invention. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "object" and "target" in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] Example 1

[0027] Figure 1 This is a flowchart of a method for integrating computing and communication of an AI chip provided in the first embodiment of the present invention. This embodiment is applicable to situations where communication between AI chips is established at low cost and without consuming additional bandwidth. This method can be executed by a device for integrating computing and communication of an AI chip. The device for integrating computing and communication of an AI chip can be implemented in the form of hardware and / or software. The device for integrating computing and communication of an AI chip can be configured in an AI chip. Figure 1 As shown, the method includes:

[0028] Step 110: When the current AI chip operates in the communication mode, a request for data to be forwarded is obtained and forwarded based on a target communication module integrated on the current AI chip.

[0029] The communication mode may be an operating mode supported by the AI chip, used to forward received data. The target communication module is integrated into the AI chip and is used to forward data. The target communication module may include a routing module and a network interface. The routing module may be a module integrated into the AI chip that determines the end-to-end communication path. The data request to be forwarded may be a data request currently received by the AI chip and to be forwarded.

[0030] In an embodiment of the present invention, after the current AI chip completes the configuration of the communication mode, it operates in the communication mode, obtains the data request to be forwarded through the network interface and routing module of the target communication module in sequence, and forwards the data request to be forwarded to other AI chips, i.e., the final receiving end of the data request to be forwarded, through the routing module and network interface in sequence.

[0031] Step 120: When the current AI chip operates in the network computing mode, the target communication module obtains the data to be calculated, and the network computing and communication core integrated in the current AI chip processes the data to be calculated to obtain the data calculation results.

[0032] The network computing mode can be an operating mode supported by the AI chip, used to integrate communication and computing. The data to be computed can be data that requires computational processing by the AI chip. The network computing and communication core can be a core integrated into the AI chip that provides data transmission control and data computing functions. The data computation result can be the data processing result of the network computing and communication core in the AI chip on the data to be computed.

[0033] In an embodiment of the present invention, after the current AI chip completes the configuration of the network computing mode, it works in the network computing mode, and then obtains the data to be calculated through the target communication module, and then transmits the data to be calculated to the network computing and communication core on the current AI chip through the target communication module. The network computing and communication core further performs relevant data processing on the data to be calculated according to the data processing requirements of the data to be calculated to obtain the data calculation results. The network computing and communication core can also transmit the data calculation results to the target communication module, and then send the data calculation results to the corresponding AI chip based on the target communication module.

[0034] When the target communication module sends and receives data, the data transmission order of the routing module and the network interface is the same as the above part and will not be repeated here.

[0035] Optionally, the current AI chip can also work in computing mode. By integrating its own computing core, it can perform calculations with higher computing power requirements on the data sent to the current AI chip.

[0036] Compared with existing AI chips, the AI chip in this solution has both communication and computing functions. Since AI chips are originally equipped with computing cores, through the integrated routing module and network computing and communication core, communication and computing can be truly realized in parallel. It can be flexibly configured into computing mode, network computing mode or communication mode to adapt to different project requirements.

[0037] AI chips can interconnect using network computing and communication cores without bandwidth loss. These cores include computing units that enable network computing. AI chips based on this solution can communicate and compute with sufficient inter-chip bandwidth. This reduces the number of computing units per chip, shrinking the chip area, lowering process requirements, improving yield, and reducing costs. Lower process requirements also reduce procurement requirements for commercial IP.

[0038] Optionally, an AI chip with network computing and communication core enabled can shut down most functions and retain only routing functions, thus reducing chip power consumption and requiring fewer computing units.

[0039] The SRAM array required for intensive computing resources is the main reason for the decline in yield. The second-class chip with reduced SRAM yield can be used as the core of network computing and communication. This type of chip only has some computing resources unavailable, which does not affect the network computing and communication functions, and can greatly improve the utilization of the chip.

[0040] The technical solution of the embodiment of the present invention is to obtain and forward data requests to be forwarded based on the target communication module integrated on the current AI chip when the current AI chip is operating in communication mode, thereby obtaining data to be calculated through the target communication module when the current AI chip is operating in network computing mode, and processing the data to be calculated through the network computing and communication core integrated on the current AI chip to obtain data calculation results. In this solution, through the routing module and network computing and communication core integrated in the AI chip, AI chips can be interconnected without directly connecting to the AI chip, without going through PCIE, and without going through additional network ports, without sacrificing bandwidth resources, and the computing pressure of the AI chip computing core can be shared through the network computing and communication core. This solves the problems of poor scalability caused by existing AI chip interconnection based on PCIE interface, reduced bandwidth caused by direct connection between two chips, and high cost of AI chip interconnection based on additionally designed switch chips. It can improve the scalability of chip interconnection without reducing bandwidth under the premise of low cost.

[0041] Example 2

[0042] Figure 2 This is a flowchart of a method for integrating calculation and communication of an AI chip provided in the second embodiment of the present invention. This embodiment is specific based on the above embodiment and provides a specific optional implementation method for sending the data calculation result to the destination chip after obtaining the data calculation result. Figure 2 As shown, the method includes:

[0043] Step 210: When the current AI chip operates in the communication mode, based on the target communication module integrated on the current AI chip, obtain and forward the data request to be forwarded.

[0044] In an optional embodiment of the present invention, before the current AI chip operates in the communication mode, it may also include: receiving communication mode configuration data; according to the communication mode configuration data, authorizing the routing module and the network interface of the current AI chip to operate in the data forwarding mode through the network controller.

[0045] The communication mode configuration data may be data sent to the current AI chip and used to configure the current AI chip to operate in the communication mode.

[0046] In an embodiment of the present invention, the routing module in the current AI chip is in communication with the network interface, and the routing module is in communication with the network controller. After the current AI chip receives the communication mode configuration data sent by the peripheral device, it can send the communication mode configuration data to the network controller of the current AI chip. The network controller of the current AI chip then authorizes the routing module and the network interface to operate in data forwarding mode based on the communication mode configuration data.

[0047] In an optional embodiment of the present invention, obtaining and forwarding a data request to be forwarded may include: receiving a data request to be forwarded through a network interface; determining, through a routing module, a communication protocol of a forwarding request receiving chip that receives the data request to be forwarded forwarded by the current AI chip; and forwarding, through the routing module, the data request to be forwarded to the forwarding request receiving chip via the network interface based on the communication protocol of the forwarding request receiving chip.

[0048] Among them, the forwarding request receiving chip can be the final receiving chip of the data request to be forwarded, that is, the chip that receives the data request to be forwarded sent by the current AI chip.

[0049] In an embodiment of the present invention, after the current AI chip receives the data request to be forwarded through the network interface, it can transmit the data request to be forwarded to the routing module, and then parse the data request to be forwarded based on the routing module, determine the forwarding request receiving chip that receives the data request to be forwarded forwarded by the current AI chip, and the communication protocol of the forwarding request receiving chip, and then the routing module transmits the data request to be forwarded to the forwarding request receiving chip via the network interface according to the communication protocol of the forwarding request receiving chip.

[0050] Step 220: When the current AI chip operates in the network computing mode, the data to be calculated is obtained through the target communication module, and the network computing and communication core integrated on the current AI chip is used to process the data to obtain the data calculation results.

[0051] In an optional embodiment of the present invention, before the current AI chip operates in the network computing mode, it may also include: receiving network computing mode configuration data; according to the network computing mode configuration data, authorizing the routing module, network interface, network controller and NOC to transmit the computing data through the network computing and communication core.

[0052] Among them, the network computing mode configuration data can be data sent to the current AI chip and used to configure the current AI chip to operate in the network computing mode.

[0053] In an embodiment of the present invention, the network computing and communication core, NOC (network-on-chip, network on chip), network controller, routing module and network interface on the current AI chip are connected in sequence. After the current AI chip receives the network computing mode configuration data, it can choose to shut down the computing core, or, without shutting down the computing core, authorize the network interface, routing module, network controller and NOC to transmit the data to be calculated through the network computing and communication core, and open up the data channel for the network computing and communication core to receive the data to be calculated. When the computing core is not shut down, the AI chip can simultaneously support the parallel operation of the computing core and the network computing and communication core.

[0054] In an optional embodiment of the present invention, the data to be calculated is obtained through the target communication module, and the data to be calculated is processed through the network computing and communication core integrated on the current AI chip, which may include: transmitting the data to be calculated to the network computing and communication core through the network interface, routing module, network controller and NOC in sequence; and selecting to use hardware computing circuits or software computing logic based on the network computing and communication core to process the data to be calculated.

[0055] The hardware computing circuit can be a data processing circuit integrated into the network computing and communication core. The software computing logic can be data computing logic determined by the user based on business needs. The software computing logic can be existing data processing logic that does not require high computing power.

[0056] In an embodiment of the present invention, when the data to be calculated passes through the network interface, routing module, network controller, and NOC in sequence, the data to be calculated is transmitted to the network computing and communication core. The network computing and communication core can choose to use hardware computing circuits to process the data to be calculated, or can choose software computing logic to process the data to be calculated.

[0057] The hardware-based computing approach is highly efficient but has poor scalability, while the software-based implementation is slower than the hardware implementation but has strong scalability, so users can configure it according to their needs.

[0058] Step 230: Determine, through the network computing and communication core, the communication protocol of the calculation result receiving chip for receiving the data calculation result.

[0059] Among them, the calculation result receiving chip can be a chip other than the current AI chip that receives data calculation results.

[0060] In an embodiment of the present invention, the network computing and communication core can obtain the data to be calculated sent by the computing core of other AI chips, and obtain the communication protocol of the AI chip (i.e., the calculation result receiving chip) corresponding to the computing core that sends the data to be calculated.

[0061] Step 240: Send the data calculation result to the calculation result receiving chip through the routing module and the network interface according to the communication protocol of the calculation result receiving chip.

[0062] In an embodiment of the present invention, the network computing and communication core can transmit the data computing results to the routing module. At this time, the routing module can send the data computing results to the computing result receiving chip via the network interface according to the communication protocol of the computing result receiving chip.

[0063] For example, each AI chip operating in computing mode has a piece of data to be calculated. This data needs to be added at the corresponding granularity by an AI chip in network computing mode, and the addition result is then returned to each AI chip operating in computing mode. The specific process is as follows: each AI chip in computing mode sends the data to be calculated to an AI chip in network computing mode. The AI chip in network computing mode collects the data to be calculated, processes it, and obtains the data calculation result. The AI chip in network computing mode then sends the data calculation result to the corresponding AI chip in computing mode.

[0064] The technical solution of the embodiment of the present invention is to obtain and forward the data request to be forwarded based on the target communication module integrated on the current AI chip when the current AI chip works in the communication mode, so that when the current AI chip works in the network computing mode, the data to be calculated is obtained through the target communication module, and the network computing and communication core integrated on the current AI chip is used to process the data to be calculated to obtain the data calculation result, and then determine the communication protocol of the calculation result receiving chip that receives the data calculation result through the network computing and communication core, and send the data calculation result to the calculation result receiving chip through the routing module and the network interface in accordance with the communication protocol of the calculation result receiving chip. In this solution, through the routing module and network computing and communication core integrated in the AI chip, the interconnection of AI chips can be achieved without directly connecting to the AI chip, without going through PCIE, and without going through additional network ports, without sacrificing bandwidth resources. The computing pressure of the AI chip computing core can be shared through the network computing and communication core, which solves the problems of poor scalability caused by the existing AI chip interconnection based on the PCIE interface, reduced bandwidth due to direct connection between two chips, and high cost of AI chip interconnection due to the additionally designed Switch chip. It can improve the scalability of chip interconnection without reducing bandwidth under the premise of low cost.

[0065] Example 3

[0066] Figure 3 This is a schematic diagram of the structure of a device for integrating computing and communication of an AI chip provided in the third embodiment of the present invention. Figure 3 As shown, the device includes:

[0067] A data forwarding module 310 is configured to obtain and forward data requests to be forwarded based on a target communication module integrated on the current AI chip when the current AI chip is operating in communication mode; the target communication module includes a routing module and a network interface;

[0068] The data calculation result acquisition module 320 is used to obtain the data to be calculated when the current AI chip operates in the network computing mode, and to process the data to be calculated through the network computing and communication core integrated on the current AI chip to obtain the data calculation results.

[0069] The technical solution of the embodiment of the present invention is to obtain and forward data requests to be forwarded based on the target communication module integrated on the current AI chip when the current AI chip is operating in communication mode, thereby obtaining data to be calculated through the target communication module when the current AI chip is operating in network computing mode, and processing the data to be calculated through the network computing and communication core integrated on the current AI chip to obtain data calculation results. In this solution, through the routing module and network computing and communication core integrated in the AI chip, AI chips can be interconnected without directly connecting to the AI chip, without going through PCIE, and without going through additional network ports, without sacrificing bandwidth resources, and the computing pressure of the AI chip computing core can be shared through the network computing and communication core. This solves the problems of poor scalability caused by existing AI chip interconnection based on PCIE interface, reduced bandwidth caused by direct connection between two chips, and high cost of AI chip interconnection based on additionally designed switch chips. It can improve the scalability of chip interconnection without reducing bandwidth under the premise of low cost.

[0070] Optionally, the computing and communication fusion device of the AI chip also includes a communication mode configuration module for receiving communication mode configuration data; according to the communication mode configuration data, the routing module and the network interface are authorized to operate in data forwarding mode through the network controller of the current AI chip.

[0071] Optionally, the computing and communication fusion device of the AI chip also includes a network computing mode configuration module for receiving network computing mode configuration data; according to the network computing mode configuration data, through the network computing and communication core, authorizing the routing module, the network interface, the network controller and the on-chip network NOC to transmit the data to be calculated.

[0072] Optionally, the data forwarding module 310 is used to receive the data request to be forwarded through the network interface; determine, through the routing module, the communication protocol of the forwarding request receiving chip that receives the data request to be forwarded forwarded by the current AI chip; and forward the data request to be forwarded to the forwarding request receiving chip through the network interface based on the communication protocol of the forwarding request receiving chip through the routing module.

[0073] Optionally, the data calculation result acquisition module 320 is used to transmit the data to be calculated to the network computing and communication core through the network interface, the routing module, the network controller and the NOC in sequence; and to process the data to be calculated using hardware computing circuits or software computing logic based on the network computing and communication core.

[0074] Optionally, the computing and communication fusion device of the AI chip also includes a data calculation result sending module, which is used to determine the communication protocol of the calculation result receiving chip that receives the data calculation result through the network computing and communication core; according to the communication protocol of the calculation result receiving chip, the data calculation result is sent to the calculation result receiving chip through the routing module and the network interface.

[0075] The device for integrating computing and communication of an AI chip provided in an embodiment of the present invention can execute the method for integrating computing and communication of an AI chip provided in any embodiment of the present invention, and has functional modules and beneficial effects corresponding to the execution method.

[0076] Example 4

[0077] This embodiment provides an AI chip, which includes a target communication module and a network computing and communication core. The target communication module and the network computing and communication core are communicatively connected, wherein the target communication module includes a routing module and a network interface.

[0078] The target communication module can be used to obtain and forward data requests to be forwarded when the current AI chip operates in communication mode. The target communication module includes a routing module and a network interface.

[0079] The target communication module is also used to obtain the data to be calculated through the target communication module when the current AI chip works in network computing mode.

[0080] The network computing and communication core can be used to process the data to be calculated and obtain the data calculation results.

[0081] Optionally, the current AI chip may further include a computing core; when the current AI chip operates in computing mode, the current AI chip supports parallel processing functions of the computing core and the network computing and communication core.

[0082] Figure 4 This is a schematic diagram of the complete hardware structure of an AI chip provided in the fourth embodiment of the present invention. Figure 4 As shown, the AI chip includes a network computing and communication core, a computing core, a NOC, a network controller, a routing module, and a network interface. The NOC is equipped with PCIe connectors. The network computing and communication core and the computing core communicate with the NOC, which in turn communicates with the network controller. The network controller communicates with the routing module, which in turn communicates with the network interface. The network interface includes N sets of high-speed interfaces. A single AI chip can function as a variety of components.

[0083] When the AI chip is configured in compute mode, it functions as a conventional acceleration core, with AI chips communicating with each other via a network interface. In compute mode, the network computing and communication core can operate in parallel with the compute core, enabling complete parallelism of communication and computation at the software level. This allows for parallel processing between the compute core and the network computing and communication core.

[0084] When the AI chip is configured in communication mode, it does not participate in calculations and only uses the network interface and routing module to send data requests to be forwarded to the forwarding request receiving chip.

[0085] When the AI chip is configured in network computing mode, the routing module receives a request and performs network computing through the network computing and communication core. Non-network computing requests are still processed in communication mode.

[0086] Optionally, the AI chip can be configured in computing mode or communication mode. Assuming that 8 AI chips constitute a communication system, communication connections can be established between each other through the target communication module. If the communication system is mainly for computing, 6 AI chips can be configured in computing mode. If the communication system is mainly for communication, 4 AI chips can be configured in communication mode.

[0087] For example, local request 0 of AI chip a can be received through any one of its own network interfaces 0, ..., and network interface n, and sent through any one of its own network interfaces 0, network interface 1, ..., and network interface n. Similarly, local request 1, ..., local request n can also be received through any one of its own network interfaces 0, ..., and network interface n, and sent through any one of its own network interfaces 0, network interface 1, ..., and network interface n.

[0088] Example 5

[0089] In some embodiments, the fusion method of computing and communication of the AI chip may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed onto the AI chip via a ROM or the like. When the computer program is loaded into RAM and executed by a module in the AI chip, one or more steps of the fusion method of computing and communication of the AI chip described above may be performed. Alternatively, in other embodiments, the AI chip may also be configured to perform the fusion method of computing and communication of the AI chip by any other appropriate means (for example, by means of firmware).

[0090] Various embodiments of the technology described above can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special-purpose or general-purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0091] Computer programs for implementing the methods of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable computing and communication device, so that when the computer programs are executed, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer programs can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0092] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0093] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0094] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A method for integrating computing and communication of an AI chip, characterized in that: include: When the current AI chip operates in a communication mode, obtaining and forwarding a data request to be forwarded based on a target communication module integrated on the current AI chip; wherein the target communication module includes a routing module and a network interface; When the current AI chip operates in the network computing mode, the target communication module obtains data to be calculated, and the network computing and communication core integrated in the current AI chip processes the data to be calculated to obtain a data computing result. Determining, through the network computing and communication core, a communication protocol of a calculation result receiving chip that receives the data calculation result; and sending the data calculation result to the calculation result receiving chip through the routing module and the network interface in accordance with the communication protocol of the calculation result receiving chip; The network computing mode is used to integrate communication and computing, and the network computing and communication core includes a Class II chip with a reduced SRAM yield; The current AI chip itself integrates a computing core, and when the current AI chip does not shut down the computing core, it supports the parallel operation of the computing core and the network computing and communication core.

2. The method according to claim 1, characterized in that Before the current AI chip works in communication mode, it also includes: receiving communication mode configuration data; According to the communication mode configuration data, the routing module and the network interface are authorized to operate in the data forwarding mode through the network controller of the current AI chip.

3. The method according to claim 1, characterized in that Before current AI chips work in network computing mode, they also include: receiving network computing mode configuration data; According to the network computing mode configuration data, the routing module, the network interface, the network controller and the on-chip network NOC are authorized to transmit the data to be calculated through the network computing and communication core.

4. The method according to claim 2, characterized in that Obtain and forward data requests to be forwarded, including: receiving the data request to be forwarded through the network interface; Determining, by the routing module, a communication protocol of a forwarding request receiving chip that receives the data request to be forwarded forwarded by the current AI chip; The routing module forwards the data request to be forwarded to the forwarding request receiving chip via the network interface based on the communication protocol of the forwarding request receiving chip.

5. The method according to claim 3, characterized in that Acquiring the data to be calculated through the target communication module, and processing the data to be calculated through the network computing and communication core integrated on the current AI chip, including: Transmitting the data to be calculated to the network computing and communication core through the network interface, the routing module, the network controller, and the NOC in sequence; Based on the network computing and communication core, hardware computing circuits or software computing logic are selected to process the data to be calculated.

6. A device integrating computing and communication of an AI chip, characterized in that: include: a data forwarding module, configured to, when the current AI chip operates in communication mode, obtain and forward data requests to be forwarded based on a target communication module integrated on the current AI chip; wherein the target communication module includes a routing module and a network interface; a data calculation result acquisition module, configured to, when the current AI chip operates in the network computing mode, acquire the data to be calculated through the target communication module, and perform data processing on the data to be calculated through the network computing and communication core integrated in the current AI chip to obtain the data calculation result; The AI chip's computing and communication fusion device also includes a data calculation result sending module, which is used to determine the communication protocol of the calculation result receiving chip that receives the data calculation result through the network computing and communication core; and send the data calculation result to the calculation result receiving chip through the routing module and the network interface according to the communication protocol of the calculation result receiving chip; The network computing mode is used to integrate communication and computing, and the network computing and communication core includes a Class II chip with a reduced SRAM yield; The current AI chip itself integrates a computing core, and when the current AI chip does not shut down the computing core, it supports the parallel operation of the computing core and the network computing and communication core.

7. An AI chip, characterized in that: The AI chip includes a target communication module and a network computing and communication core; The target communication module is configured to obtain and forward data requests to be forwarded when the current AI chip operates in communication mode; wherein the target communication module includes a routing module and a network interface; The target communication module is further configured to obtain data to be calculated through the target communication module when the current AI chip operates in the network computing mode; The network computing and communication core is used to process the data to be calculated to obtain data calculation results; The network computing and communication core is further configured to determine a communication protocol of a calculation result receiving chip that receives the data calculation result; and to send the data calculation result to the calculation result receiving chip through the routing module and the network interface according to the communication protocol of the calculation result receiving chip; The network computing mode is used to integrate communication and computing, and the network computing and communication core includes a Class II chip with a reduced SRAM yield; The current AI chip itself integrates a computing core, and when the current AI chip does not shut down the computing core, it supports the parallel operation of the computing core and the network computing and communication core.

8. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to enable a computer to execute the method for integrating calculation and communication of the AI chip according to any one of claims 1 to 5.

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