Method of forming standard cell contact holes
By using an etching process that forms multilayer masks and sidewall structures on the substrate, the problem of uneven width of standard cell contact holes in the FinFET process node is solved, enabling the simultaneous formation of multiple standard cell contact holes, reducing fabrication difficulty and offset (OVL).
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2022-02-25
- Publication Date
- 2026-04-28
AI Technical Summary
In FinFET process nodes, existing technologies struggle to form standard cell contact holes with non-uniform widths, especially in BEOL interconnects. Dual patterning technology is limited by the minimum spacing of immersion Arf, leading to offset (OVL) issues between metal lines and increasing the difficulty of fabricating M1.
By forming a first sacrificial layer pattern and a first sidewall on the substrate, removing the first sacrificial layer pattern, adding a second mask layer to form a new second mask layer pattern, and then using the second mask layer as a mask to etch the dielectric layer and the sacrificial layer to form the second sidewall, the standard cell contact hole is finally etched, thus solving the problem of uneven width.
It enables the simultaneous formation of 5T, 6T and 7.5T standard unit contact holes, solving the problem that existing technologies cannot simultaneously produce contact holes with uneven widths, reducing manufacturing difficulty and avoiding problems such as offset (OVL).
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Figure CN116705696B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing, and more particularly to a method for forming a standard cell contact hole. Background Technology
[0002] In advanced FinFET process nodes, BEOL interconnects require multiple masks due to limitations in photolithography. Currently, many processes, such as double patterning, can achieve a smaller pitch on the first metal line (M1). However, double patterning also has some drawbacks. For example, limited by the minimum pitch of immersion Arf, it is difficult to further reduce the M1 pitch using double patterning. Another issue is the offset (OVL) problem between different metal lines. Furthermore, the M1 of a standard cell exhibits uneven width, further increasing the fabrication difficulty of M1. Summary of the Invention
[0003] The technical problem to be solved by this application is to provide a method for forming a standard unit contact hole, which can form a standard unit contact hole with an uneven width.
[0004] To address the aforementioned technical problems, this application provides a method for forming a standard cell contact hole, comprising: providing a substrate, the substrate comprising an insulating layer, a first mask layer, a second sacrificial layer, and a first dielectric layer stacked sequentially, wherein a first sacrificial layer pattern having a first sidewall is formed on the first dielectric layer, and the first sacrificial layer pattern is used to define different pitches of the standard cell contact hole; removing the first sacrificial layer pattern, forming a second mask layer on the first dielectric layer, the second mask layer and the first sidewall forming a new second mask layer pattern; using the second mask layer pattern as a mask, etching the first dielectric layer and the second sacrificial layer to form a second sacrificial layer pattern for defining different pitches of the standard cell contact hole, and removing the first dielectric layer on the surface of the second sacrificial layer pattern; forming a second sidewall for defining the standard cell contact hole on the sidewall of the second sacrificial layer pattern, and removing the second sacrificial layer pattern; using the second sidewall as a mask, etching the first mask layer and stopping on the insulating layer to form a standard cell contact hole with different pitches.
[0005] In some embodiments of this application, the standard unit contact hole includes a 6T standard unit contact hole and / or a 7.5T standard unit contact hole, and the minimum pitch of the first sacrificial layer pattern used to define different pitches of the 6T standard unit contact hole is twice the pitch of the 6T standard unit contact hole, while the minimum pitch of the first sacrificial layer pattern used to define different pitches of the 7.5T standard unit contact hole is 7.5 times the pitch of the 7.5T standard unit contact hole.
[0006] In some embodiments of this application, the adjacent second sidewalls used to define the contact holes of the 6T standard unit are merged; some of the adjacent second sidewalls used to define the contact holes of the 7.5T standard unit are merged, while the remaining adjacent second sidewalls do not contact each other.
[0007] In some embodiments of this application, the method for forming the first sacrificial layer pattern on the first dielectric layer includes: sequentially forming a first sacrificial layer and a second dielectric layer on the surface of the first dielectric layer; forming a first mask layer for defining the first sacrificial layer pattern on a portion of the surface of the second dielectric layer; using the first mask layer as a mask, etching the second dielectric layer and the first sacrificial layer to form the first sacrificial layer pattern; and removing the second dielectric layer from the surface of the first sacrificial layer pattern.
[0008] In some embodiments of this application, a method for forming a first sidewall on the sidewall of the first sacrificial layer pattern includes: forming a first sidewall material layer on the surface of the first dielectric layer, the sidewall of the first sacrificial layer pattern, and the surface; removing the first sidewall material layer from the surface of the first dielectric layer and the first sacrificial layer pattern to form the first sidewall.
[0009] In some embodiments of this application, the method for forming the second mask layer includes: forming a second mask material layer with a surface flush with the top surface of the first sidewall on the surface of the first dielectric layer between the first sidewalls; forming a patterned photoresist layer on the surface of the second mask material layer; using the patterned photoresist layer as a mask, etching the second mask material layer, and removing the patterned photoresist layer to form the second mask layer.
[0010] In some embodiments of this application, a method for forming a second sidewall on the sidewall of the second sacrificial layer pattern includes: forming a second sidewall material layer on the surface of the first mask layer, the sidewall of the second sacrificial layer pattern, and the surface; removing the second sidewall material layer from the surface of the first mask layer and the second sacrificial layer pattern to form the second sidewall.
[0011] In some embodiments of this application, the first mask layer includes a silicon nitride layer located on the surface of the insulating layer and a silicon oxide layer located on the surface of the silicon nitride layer.
[0012] In some embodiments of this application, the standard unit contact hole includes a contact hole for forming a power line and a contact hole for forming a signal line.
[0013] This application also provides a method for forming standard cell contact holes, comprising: providing a substrate, the substrate including a 5T standard cell region and at least one standard cell region greater than 5T, wherein the substrate of each standard cell region includes an insulating layer, a first mask layer, a second sacrificial layer and a first dielectric layer stacked sequentially, wherein a first sacrificial layer pattern having a first sidewall is formed on the first dielectric layer, and the first sacrificial layer pattern is used to define different pitches of standard cell contact holes in different standard cell regions; removing the first sacrificial layer pattern; forming a second mask layer on the first dielectric layer of the standard cell region greater than 5T; the second mask layer and the first sidewall are then formed. A new second mask layer pattern is formed on the wall; using the second mask layer pattern as a mask, the first dielectric layer and the second sacrificial layer are etched to form a second sacrificial layer pattern with different pitches for defining standard cell contact holes, and the first dielectric layer on the surface of the second sacrificial layer pattern is removed; a second sidewall for defining the standard cell contact holes is formed on the sidewall of the second sacrificial layer pattern, and the second sacrificial layer pattern is removed; using the second sidewall as a mask, the first mask layer is etched and stopped on the insulating layer to form standard cell contact holes with different pitches in the 5T standard cell area and the standard cell area greater than 5T.
[0014] In some embodiments of this application, the minimum pitch of the first sacrificial layer pattern in the 5T standard cell region is 5 times the pitch of the standard cell contact hole in the 5T standard cell region. The standard cell region greater than 5T includes a 6T standard cell region and / or a 7.5T standard cell region. The minimum pitch of the first sacrificial layer pattern in the 6T standard cell region is 2 times the pitch of the 6T standard cell contact hole. The minimum pitch of the first sacrificial layer pattern in the 7.5T standard cell region is 7.5 times the pitch of the standard cell contact hole in the 7.5T standard cell region.
[0015] In some embodiments of this application, the adjacent second sidewalls of the 5T standard unit area do not contact each other; the adjacent second sidewalls of the 6T standard unit area contact each other; some of the adjacent second sidewalls of the 7.5T standard unit area contact each other, while the remaining adjacent second sidewalls do not contact each other.
[0016] In some embodiments of this application, the method for forming the first sacrificial layer pattern on the first dielectric layer includes: sequentially forming a first sacrificial layer and a second dielectric layer on the surface of the first dielectric layer; forming a first mask layer for defining the first sacrificial layer pattern on a portion of the surface of the second dielectric layer; using the first mask layer as a mask, etching the second dielectric layer and the first sacrificial layer to form the first sacrificial layer pattern; and removing the second dielectric layer from the surface of the first sacrificial layer pattern.
[0017] In some embodiments of this application, the method of forming a first sidewall on the sidewall of the first sacrificial layer pattern includes: forming a first sidewall material layer on the surface of the first dielectric layer, the sidewall of the first sacrificial layer pattern, and the surface; removing the first sidewall material layer from the surface of the first dielectric layer and the first sacrificial layer pattern to form the first sidewall.
[0018] In some embodiments of this application, the method for forming the second mask layer includes: forming a second mask material layer with a surface flush with the top surface of the first sidewall on the surface of the first dielectric layer between the first sidewalls; forming a patterned photoresist layer on the surface of the second mask material layer; using the patterned photoresist layer as a mask, etching the second mask material layer, and removing the patterned photoresist layer to form the second mask layer.
[0019] In some embodiments of this application, a method for forming a second sidewall on the sidewall of the second sacrificial layer pattern includes: forming a second sidewall material layer on the surface of the first mask layer, the sidewall of the second sacrificial layer pattern, and the surface; removing the second sidewall material layer from the surface of the first mask layer and the second sacrificial layer pattern to form the second sidewall.
[0020] Compared with the prior art, the method for forming the standard unit contact hole in this application has the following advantages:
[0021] After forming a first sacrificial layer pattern and a first sidewall on the first dielectric layer, the first sacrificial layer pattern is removed, and a second mask layer is added. The first sidewall and the second mask layer together form a new second mask layer pattern. Then, using the second mask layer pattern as a mask, the first dielectric layer and the second sacrificial layer are etched to form the second sacrificial layer pattern. The second sacrificial layer pattern can define different pitches of the standard cell contact holes, thereby solving the problem in the prior art that it is impossible to form standard cell contact holes with uneven widths at the same time. For example, the forming method of the present application can simultaneously form at least two of the following: 5T standard cell contact holes, 6T standard cell contact holes, and 7.5T standard cell contact holes. Attached Figure Description
[0022] The following accompanying drawings describe in detail the exemplary embodiments disclosed in this application. The same reference numerals denote similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting and exemplary, and the drawings are for illustrative purposes only and are not intended to limit the scope of this application. Other embodiments may similarly fulfill the inventive intent of this application. It should be understood that the drawings are not drawn to scale. Wherein:
[0023] Figure 1 This is a schematic flowchart illustrating a method for forming a standard unit contact hole according to an embodiment of this application.
[0024] Figures 2 to 9 This is a schematic diagram of the structure of each step in a method for forming a standard unit contact hole according to an embodiment of this application;
[0025] Figure 10 This is a flowchart illustrating another method for forming a standard unit contact hole according to an embodiment of this application;
[0026] Figures 11 to 18 This is a schematic diagram of the structure of each step in another method for forming a standard unit contact hole according to an embodiment of this application. Detailed Implementation
[0027] The following description provides specific application scenarios and requirements for this application, intended to enable those skilled in the art to make and use the content of this application. Various partial modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this application. Therefore, this application is not limited to the embodiments shown, but rather to the widest scope consistent with the claims.
[0028] The first metal line (M1) of the standard cell BEOL interconnect includes M1 power lines and M1 signal lines of different widths. Therefore, when fabricating these two metal lines, it is necessary to form standard cell contact holes with uneven widths, which makes the fabrication process difficult. Current fabrication processes still have many defects when fabricating M1. Based on this, the technical solution of this application provides a method for forming standard cell contact holes, which can form standard cell contact holes with uneven widths.
[0029] refer to Figure 1 This application provides a method for forming a standard unit contact hole, applicable to forming standard unit contact holes greater than 5T, where 5T represents the height of the standard unit, also known as 5Track height. The forming method includes:
[0030] Step S1: Provide a substrate, the substrate comprising an insulating layer, a first mask layer, a second sacrificial layer and a first dielectric layer stacked sequentially, wherein a first sacrificial layer pattern having a first sidewall is formed on the first dielectric layer, and the first sacrificial layer pattern is used to define different pitches of standard cell contact holes;
[0031] Step S2: Remove the first sacrificial layer pattern and form a second mask layer on the first dielectric layer. The second mask layer and the first sidewall form a new second mask layer pattern.
[0032] Step S3: Using the second mask layer pattern as a mask, etch the first dielectric layer and the second sacrificial layer to form a second sacrificial layer pattern for defining different pitches of the standard cell contact holes, and remove the first dielectric layer on the surface of the second sacrificial layer pattern;
[0033] Step S4: Form a second sidewall on the sidewall of the second sacrificial layer pattern to define the standard unit contact hole, and remove the second sacrificial layer pattern;
[0034] Step S5: Using the second sidewall as a mask, etch the first mask layer and stop on the insulating layer to form standard unit contact holes with different pitches.
[0035] For ease of understanding, the pitch of the standard unit contact hole in the embodiments of this application is defined as the sum of the width and spacing of the standard unit contact hole. (Refer to...) Figure 8 .
[0036] The following uses 6T standard cell contact holes and 7.5T standard cell contact holes as examples to illustrate the method for forming standard cell contact holes in embodiments of this application. It should be noted that the method for forming standard cell contact holes in embodiments of this application can not only form 6T standard cell contact holes and 7.5T standard cell contact holes simultaneously, but also form 6T standard cell contact holes or 7.5T standard cell contact holes separately.
[0037] refer to Figure 2 A substrate is provided, comprising a 6T standard cell region and a 7.5T standard cell region, wherein the area to the left of the vertical dashed line is schematically represented as the 6T standard cell region, and the area to the right of the vertical dashed line is schematically represented as the 7.5T standard cell region. The following figures show partial structures of the 6T and 7.5T standard cell regions. Each standard cell region's substrate includes an insulating layer 10, a first mask layer 20, a second sacrificial layer 31, and a first dielectric layer 40 stacked sequentially. The first dielectric layer 40 further includes a first sacrificial layer 51 for forming a first sacrificial layer pattern and a second dielectric layer 60. The insulating layer 10 may be made of, for example, silicon oxide. The first mask layer 20 may be a single-layer structure or a multilayer structure. In this embodiment, the first mask layer 20 includes a silicon nitride layer 21 on the surface of the insulating layer 10 and a silicon oxide layer 22 on the surface of the silicon nitride layer 21. The second sacrificial layer 31 may be made of polycrystalline silicon, amorphous carbon, etc. The first dielectric layer 40 may be made of silicon oxide.
[0038] Combination Figure 2 and Figure 3The method for forming the first sacrificial layer pattern on the first dielectric layer 40 includes: sequentially forming a first sacrificial layer 51 and a second dielectric layer 60 on the surface of the first dielectric layer 40; forming a first mask layer 70 on a portion of the surface of the second dielectric layer 60, the first mask layer 70 being used to define the first sacrificial layer pattern; using the first mask layer 70 as a mask, etching the second dielectric layer 60 and the first sacrificial layer 51 to form the first sacrificial layer pattern 50; and removing the second dielectric layer 60 from the surface of the first sacrificial layer pattern 50. The first sacrificial layer pattern 50 is used to define different pitches for standard cell contact holes. In this embodiment, the first sacrificial layer pattern 50 defines not only different pitches for 6T standard cell contact holes but also different pitches for 7.5T standard cell contact holes. In other embodiments, the first sacrificial layer pattern 50 may only be used to define different pitches for 6T standard cell contact holes or only for 7.5T standard cell contact holes, or the first sacrificial layer pattern 50 may also be used to define different pitches for other standard cell contact holes, depending on the cell height of the final formed standard cell.
[0039] To form a standard cell of the target cell height, in this embodiment, the minimum pitch of the first sacrificial layer pattern 50 used to define different pitches of the 6T standard cell contact hole is twice the pitch of the 6T standard cell contact hole. Similarly, the minimum pitch of the first sacrificial layer pattern used to define different pitches of the 7.5T standard cell contact hole is 7.5 times the pitch of the 7.5T standard cell contact hole. If the minimum pitch of the first sacrificial layer pattern 50 is less than the above range, the final formed standard cell contact hole will not meet the standard.
[0040] refer to Figure 4 A first sidewall 71 is formed on the sidewall of the first sacrificial layer pattern 50. The formation method may include: forming a first sidewall material layer on the surface of the first dielectric layer 40, the sidewall of the first sacrificial layer pattern 50, and the surface; removing the first sidewall material layer from the surface of the first dielectric layer 40 and the first sacrificial layer pattern 50, leaving only the first sidewall material layer on the sidewall of the first sacrificial layer pattern 50, thus forming the first sidewall 71. The material of the first sidewall 71 may include at least one of silicon nitride, silicon oxide, silicon carbide, silicon carbonitride, silicon carbonitride oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.
[0041] refer to Figure 5The first sacrificial layer pattern 50 is removed, and a second mask layer 72 is formed on the first dielectric layer 40. The second mask layer 72 and the first sidewalls 71 form a new second mask layer pattern. The method for forming the second mask layer 72 includes: forming a second mask material layer on the surface of the first dielectric layer 40 between the first sidewalls 71, with the surface of the second mask material layer flush with the top surface of the first sidewalls 71; forming a patterned photoresist layer on the surface of the second mask material layer; using the patterned photoresist layer as a mask, etching the second mask material layer, and removing the patterned photoresist layer to form the second mask layer 72. It should be noted that, limited by current photolithography processes, from Figure 2 The structure shown is formed Figure 5 The structure shown cannot be formed by a single photolithography process, but the method provided in this application can avoid introducing too many process steps to the greatest extent.
[0042] refer to Figure 6 Using the second mask layer pattern as a mask, the first dielectric layer 40 and the second sacrificial layer 31 are etched to form the second sacrificial layer pattern 30, and the first dielectric layer 40 on the surface of the second sacrificial layer pattern 30 is removed. The second sacrificial layer pattern 30 is also used to define different pitches for standard cell contact holes. When the first sacrificial layer pattern is determined, the second sacrificial layer pattern 30 is also substantially determined.
[0043] refer to Figure 7 A second sidewall 73 is formed on the sidewall of the second sacrificial layer pattern 30. The formation method may include: forming a second sidewall material layer on the surface of the first mask layer 20, the sidewall of the second sacrificial layer pattern 30, and the surface; removing the second sidewall material layer from the surfaces of the first mask layer 20 and the second sacrificial layer pattern 30 to form the second sidewall 73. The second sidewall 73 defines the standard cell contact holes, wherein adjacent second sidewalls 73 defining the 6T standard cell contact holes are merged, some adjacent second sidewalls 73 defining the 7.5T standard cell contact holes are merged, and the remaining adjacent second sidewalls 73 are not in contact. Given a determined thickness of the second sidewall 73, whether adjacent second sidewalls are merged is related to the second sacrificial layer pattern 30 in the aforementioned steps. The material of the second sidewall 73 may include at least one of silicon nitride, silicon oxide, silicon carbide, silicon carbonitride, silicon carbonitride oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.
[0044] Then refer to Figure 8The second sacrificial layer pattern 30 is removed, leaving the second sidewall 73, which serves as a mask for etching the first mask layer 20. The first mask layer 20 is etched and stopped on the insulating layer 10, forming standard cell contact holes with different pitches, such as... Figure 9 As shown. The formed standard unit contact holes include contact holes 81 for forming power lines and contact holes 82 for forming signal lines.
[0045] The above describes the method for forming contact holes of standard units greater than 5T (e.g., 6T and / or 7.5T standard units). The following embodiments will describe the method for forming contact holes after adding a 5T standard unit to a standard unit greater than 5T (taking 6T and / or 7.5T standard units as an example).
[0046] refer to Figure 10 This application embodiment also provides another method for forming a standard unit contact hole, including:
[0047] Step S1: Provide a substrate, the substrate including a 5T standard cell region and at least one standard cell region greater than 5T, and the substrate of each standard cell region includes an insulating layer, a first mask layer, a second sacrificial layer and a first dielectric layer stacked sequentially, the first dielectric layer having a first sacrificial layer pattern with a first sidewall on the sidewall, and the first sacrificial layer pattern is used to define different pitches of standard cell contact holes in different standard cell regions.
[0048] Step S2: Remove the first sacrificial layer pattern and form a second mask layer on the first dielectric layer of the standard cell area greater than 5T. The second mask layer and the first sidewall form a new second mask layer pattern.
[0049] Step S3: Using the second mask layer pattern as a mask, etch the first dielectric layer and the second sacrificial layer to form a second sacrificial layer pattern for defining different pitches of the standard cell contact holes, and remove the first dielectric layer on the surface of the second sacrificial layer pattern;
[0050] Step S4: Form a second sidewall on the sidewall of the second sacrificial layer pattern to define the standard unit contact hole, and remove the second sacrificial layer pattern;
[0051] Step S5: Using the second sidewall as a mask, etch the first mask layer and stop on the insulating layer to form standard cell contact holes with different pitches in the 5T standard cell area and the standard cell area greater than 5T.
[0052] refer to Figure 11A substrate is provided, comprising a 5T standard cell region, a 6T standard cell region, and a 7.5T standard cell region. The area to the left of the left dashed line represents the 5T standard cell region, the area between the two dashed lines represents the 6T standard cell region, and the area to the right of the right dashed line represents the 7.5T standard cell region. The following figures show partial structures of the 5T, 6T, and 7.5T standard cell regions. Each standard cell region's substrate includes a first insulating layer 100, a first mask layer 200, a second sacrificial layer 310, and a first dielectric layer 400 stacked sequentially. The first dielectric layer 400 further includes a first sacrificial layer 510 for forming a first sacrificial layer pattern and a second dielectric layer 600. The insulating layer 100 may be made of silicon oxide. The first mask layer 200 may be a single-layer structure or a multilayer structure. In this embodiment, the first mask layer 200 includes a silicon nitride layer 210 on the surface of the insulating layer 100 and a silicon oxide layer 220 on the surface of the silicon nitride layer 210. The material of the second sacrificial layer 310 may include polycrystalline silicon, amorphous carbon, etc. The material of the first dielectric layer 400 may include silicon oxide.
[0053] Combination Figure 11 and Figure 12 The method for forming the first sacrificial layer pattern on the first dielectric layer 400 includes: sequentially forming a first sacrificial layer 510 and a second dielectric layer 600 on the surface of the first dielectric layer 400; forming a first mask layer 700 on a portion of the surface of the second dielectric layer 600, the first mask layer 700 being used to define the first sacrificial layer pattern 500; using the first mask layer 700 as a mask, etching the second dielectric layer 600 and the first sacrificial layer 510 to form the first sacrificial layer pattern 500; and removing the second dielectric layer 600 from the surface of the first sacrificial layer pattern 500. The first sacrificial layer pattern 500 is used to define different pitches for standard cell contact holes. In this embodiment, the first sacrificial layer pattern 500 needs to define different pitches for 5T standard cell contact holes, 6T standard cell contact holes, and 7.5T standard cell contact holes. In other embodiments, the first sacrificial layer pattern 500 can also be used to define different pitches for other standard cell contact holes, related to the cell height of the final formed standard cell.
[0054] In order to form a standard cell of the target cell height, this embodiment sets the minimum pitch of the first sacrificial layer pattern 500 in the 5T standard cell area to 5 times the pitch of the standard cell contact hole in the 5T standard cell area, sets the minimum pitch of the first sacrificial layer pattern 500 in the 6T standard cell area to 2 times the pitch of the 6T standard cell contact hole, and sets the minimum pitch of the first sacrificial layer pattern 500 in the 7.5T standard cell area to 7.5 times the pitch of the standard cell contact hole in the 7.5T standard cell area.
[0055] refer to Figure 13 A first sidewall 710 is formed on the sidewall of the first sacrificial layer pattern 500. The formation method may include: forming a first sidewall material layer on the surface of the first dielectric layer 400, the sidewall of the first sacrificial layer pattern 500, and the surface; removing the first sidewall material layer from the surface of the first dielectric layer 400 and the first sacrificial layer pattern 500, retaining only the first sidewall material layer on the sidewall of the first sacrificial layer pattern 500, thus forming the first sidewall 710. The material of the first sidewall 710 may include at least one of silicon nitride, silicon oxide, silicon carbide, silicon carbonitride, silicon carbonitride oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.
[0056] refer to Figure 14 The first sacrificial layer pattern 500 is removed, and a second mask layer 720 is formed on the first dielectric layer 400 in the 6T and 7.5T standard cell regions. The second mask layer 720 and the first sidewall 710 form a new second mask layer pattern. The method of forming the second mask layer 720 includes: forming a second mask material layer on the surface of the first dielectric layer 40 between the first sidewalls 71, and the surface of the second mask material layer is flush with the top surface of the first sidewall 71; forming a patterned photoresist layer on the surface of the second mask material layer; using the patterned photoresist layer as a mask, etching the second mask material layer, and removing the patterned photoresist layer to form the second mask layer 720.
[0057] refer to Figure 15 Using the second mask layer pattern as a mask, the first dielectric layer 400 and the second sacrificial layer 310 are etched to form the second sacrificial layer pattern 300, and the first dielectric layer 400 on the surface of the second sacrificial layer pattern 300 is removed. The second sacrificial layer pattern 300 is also used to define different pitches for standard cell contact holes. When the first sacrificial layer pattern is determined, the second sacrificial layer pattern 300 is also substantially determined.
[0058] refer to Figure 16A second sidewall 730 is formed on the sidewall of the second sacrificial layer pattern 300. The formation method may include: forming a second sidewall material layer on the surface of the first mask layer 200, the sidewall of the second sacrificial layer pattern 300, and the surface; removing the second sidewall material layer from the surfaces of the first mask layer 200 and the second sacrificial layer pattern 300 to form the second sidewall 730. The second sidewall 730 defines the standard cell contact holes, wherein adjacent second sidewalls 730 in the 5T standard cell area do not contact; adjacent second sidewalls 730 in the 6T standard cell area contact; a portion of adjacent second sidewalls 730 in the 7.5T standard cell area contact, and the remaining adjacent second sidewalls 730 do not contact. Given a determined thickness of the second sidewall 730, whether adjacent second sidewalls 730 merge is related to the second sacrificial layer pattern 300 in the aforementioned steps. The material of the second sidewall 730 may include at least one of silicon nitride, silicon oxide, silicon carbide, silicon carbonitride, silicon carbonitride oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.
[0059] refer to Figure 17 The second sacrificial layer pattern 300 is removed, leaving the second sidewall 730. Then, using the second sidewall 730 as a mask, the first mask layer 200 is etched and stopped on the insulating layer 100 to form standard cell contact holes with different pitches, such as... Figure 18 As shown. The formed standard unit contact holes include contact holes 810 for forming power lines and contact holes 820 for forming signal lines.
[0060] In summary, the standard cell contact hole formation method of this application embodiment can not only form 5T standard cell contact holes and standard cell contact holes greater than 5T respectively, but also form 5T standard cell contact holes and standard cell contact holes greater than 5T simultaneously. It can also achieve self-alignment of the contact holes. Then, a metal wire can be formed by the conventional process of subsequent metal filling. This effectively solves the problems of existing processes that cannot simultaneously form 5T and greater than 5T standard cell contact holes and the off-valence (OVL) problem when making metal wires.
[0061] After reading this application, those skilled in the art will understand that the foregoing content is presented by way of example only and is not restrictive. Although not explicitly stated herein, those skilled in the art will understand that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. Such changes, improvements, and modifications are all within the spirit and scope of the exemplary embodiments of this application.
[0062] It should be understood that the term "and / or" as used in this embodiment includes any or all combinations of one or more of the associated listed items. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be an intermediate element.
[0063] Similarly, it should be understood that when an element such as a layer, region, or substrate is referred to as being "on" another element, it may be directly on that other element, or there may be intermediate elements present. Conversely, the term "directly" means without intermediate elements. It should also be understood that the terms "comprising," "including," "including," or "comprises," when used in this application, indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.
[0064] It should also be understood that although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of this application, a first element in some embodiments may be referred to as a second element in other embodiments. The same reference numerals or the same reference signs denote the same elements throughout the specification.
[0065] Furthermore, this application specification describes exemplary embodiments by referring to idealized exemplary cross-sectional views and / or plan views and / or perspective views. Therefore, differences from the illustrated shapes are foreseeable due to factors such as manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but should include deviations in shape caused, for example, by manufacturing processes. For instance, etched areas shown as rectangular typically have circular or curved features. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to illustrate the actual shape of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.
Claims
1. A method for forming a standard unit contact hole, characterized in that, include: A substrate is provided, the substrate comprising an insulating layer, a first mask layer, a second sacrificial layer and a first dielectric layer stacked sequentially, wherein a first sacrificial layer pattern having a first sidewall is formed on the first dielectric layer, and the first sacrificial layer pattern is used to define different pitches of standard cell contact holes; Remove the first sacrificial layer pattern and form a second mask layer on the first dielectric layer. The second mask layer and the first sidewall form a new second mask layer pattern. Using the second mask layer pattern as a mask, the first dielectric layer and the second sacrificial layer are etched to form a second sacrificial layer pattern for defining different pitches of standard cell contact holes, and the first dielectric layer on the surface of the second sacrificial layer pattern is removed. A second sidewall is formed on the sidewall of the second sacrificial layer pattern to define the standard unit contact hole, and the second sacrificial layer pattern is removed; Using the second sidewall as a mask, the first mask layer is etched and stopped on the insulating layer to form standard unit contact holes with different pitches.
2. The method for forming a standard unit contact hole according to claim 1, characterized in that, The standard unit contact holes include 6T standard unit contact holes and / or 7.5T standard unit contact holes, and the minimum pitch of the first sacrificial layer pattern used to define different pitches of the 6T standard unit contact hole is twice the pitch of the 6T standard unit contact hole, while the minimum pitch of the first sacrificial layer pattern used to define different pitches of the 7.5T standard unit contact hole is 7.5 times the pitch of the 7.5T standard unit contact hole.
3. The method for forming a standard unit contact hole according to claim 2, characterized in that, The adjacent second sidewalls used to define the contact holes of the 6T standard unit are merged; the adjacent second sidewalls used to define the contact holes of the 7.5T standard unit are partially merged, while the remaining adjacent second sidewalls are not in contact.
4. The method for forming a standard unit contact hole according to claim 1, characterized in that, The method for forming the first sacrificial layer pattern on the first dielectric layer includes: A first sacrificial layer and a second dielectric layer are sequentially formed on the surface of the first dielectric layer; A first mask layer for defining the pattern of the first sacrificial layer is formed on a portion of the surface of the second dielectric layer; Using the first mask layer as a mask, the second dielectric layer and the first sacrificial layer are etched to form the pattern of the first sacrificial layer; Remove the second dielectric layer from the surface of the first sacrificial layer pattern.
5. The method for forming a standard unit contact hole according to claim 1, characterized in that, The method of forming a first sidewall on the sidewall of the first sacrificial layer pattern includes: A first sidewall material layer is formed on the surface of the first dielectric layer, the sidewalls of the first sacrificial layer pattern, and the surface. The first sidewall is formed by removing the first sidewall material layer from the surface of the first medium layer and the first sacrificial layer pattern.
6. The method for forming a standard unit contact hole according to claim 1, characterized in that, The method for forming the second mask layer includes: A second masking material layer with a surface flush with the top surface of the first sidewall is formed on the surface of the first dielectric layer between the first sidewalls; A patterned photoresist layer is formed on the surface of the second mask material layer; Using the patterned photoresist layer as a mask, the second mask material layer is etched, and the patterned photoresist layer is removed to form the second mask layer.
7. The method for forming a standard unit contact hole according to claim 1, characterized in that, The method of forming a second sidewall on the sidewall of the second sacrificial layer pattern includes: A second sidewall material layer is formed on the surface of the first mask layer, the sidewalls of the second sacrificial layer pattern, and the surface; A second sidewall material layer is formed by removing the first mask layer and the second sacrificial layer pattern from the surface.
8. The method for forming a standard unit contact hole according to claim 1, characterized in that, The first mask layer includes a silicon nitride layer located on the surface of the insulating layer and a silicon oxide layer located on the surface of the silicon nitride layer.
9. The method for forming a standard unit contact hole according to claim 1, characterized in that, The standard unit contact holes include contact holes for forming power lines and contact holes for forming signal lines.
10. A method for forming a standard unit contact hole, characterized in that, include: A substrate is provided, the substrate including a 5T standard cell region and at least one standard cell region greater than 5T, and the substrate of each standard cell region includes an insulating layer, a first mask layer, a second sacrificial layer and a first dielectric layer stacked sequentially, wherein a first sacrificial layer pattern with a first sidewall is formed on the first dielectric layer, and the first sacrificial layer pattern is used to define different pitches of standard cell contact holes in different standard cell regions. Remove the first sacrificial layer pattern and form a second mask layer on the first dielectric layer of the standard cell region greater than 5T. The second mask layer and the first sidewall form a new second mask layer pattern. Using the second mask layer pattern as a mask, the first dielectric layer and the second sacrificial layer are etched to form a second sacrificial layer pattern for defining different pitches of standard cell contact holes, and the first dielectric layer on the surface of the second sacrificial layer pattern is removed. A second sidewall is formed on the sidewall of the second sacrificial layer pattern to define the standard unit contact hole, and the second sacrificial layer pattern is removed; Using the second sidewall as a mask, the first mask layer is etched and stopped on the insulating layer to form standard cell contact holes with different pitches in the 5T standard cell area and the standard cell area greater than 5T.
11. The method for forming a standard unit contact hole according to claim 10, characterized in that, The minimum pitch of the first sacrificial layer pattern in the 5T standard cell area is 5 times the pitch of the standard cell contact hole in the 5T standard cell area. The standard cell area greater than 5T includes a 6T standard cell area and / or a 7.5T standard cell area. The minimum pitch of the first sacrificial layer pattern in the 6T standard cell area is 2 times the pitch of the 6T standard cell contact hole. The minimum pitch of the first sacrificial layer pattern in the 7.5T standard cell area is 7.5 times the pitch of the standard cell contact hole in the 7.5T standard cell area.
12. The method for forming a standard unit contact hole according to claim 11, characterized in that, The adjacent second sidewalls of the 5T standard unit area do not contact each other, while the adjacent second sidewalls of the 6T standard unit area do contact each other; some of the adjacent second sidewalls of the 7.5T standard unit area contact each other, while the remaining adjacent second sidewalls do not contact each other.
13. The method for forming a standard unit contact hole according to claim 10, characterized in that, The method for forming the first sacrificial layer pattern on the first dielectric layer includes: A first sacrificial layer and a second dielectric layer are sequentially formed on the surface of the first dielectric layer; A first mask layer for defining the pattern of the first sacrificial layer is formed on a portion of the surface of the second dielectric layer; Using the first mask layer as a mask, the second dielectric layer and the first sacrificial layer are etched to form the pattern of the first sacrificial layer; Remove the second dielectric layer from the surface of the first sacrificial layer pattern.
14. The method for forming a standard unit contact hole according to claim 10, characterized in that, The method of forming a first sidewall on the sidewall of the first sacrificial layer pattern includes: A first sidewall material layer is formed on the surface of the first dielectric layer, the sidewalls of the first sacrificial layer pattern, and the surface. The first sidewall is formed by removing the first sidewall material layer from the surface of the first medium layer and the first sacrificial layer pattern.
15. The method for forming a standard unit contact hole according to claim 10, characterized in that, The method for forming the second mask layer includes: A second masking material layer with a surface flush with the top surface of the first sidewall is formed on the surface of the first dielectric layer between the first sidewalls; A patterned photoresist layer is formed on the surface of the second mask material layer; Using the patterned photoresist layer as a mask, the second mask material layer is etched, and the patterned photoresist layer is removed to form the second mask layer.
16. The method for forming a standard unit contact hole according to claim 10, characterized in that, The method of forming a second sidewall on the sidewall of the second sacrificial layer pattern includes: A second sidewall material layer is formed on the surface of the first mask layer, the sidewalls of the second sacrificial layer pattern, and the surface; A second sidewall material layer is formed by removing the first mask layer and the second sacrificial layer pattern from the surface.
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