Quantum bare chip three-dimensional packaging structure

Abstract

The application discloses a quantum bare chip three-dimensional packaging structure, which comprises a substrate, an adjusting plate, a quantum bare chip, a fixing plate, a circuit board and at least two positioning pins. The substrate, the adjusting plate, the fixing plate and the circuit board are preliminarily positioned through the positioning pins, a groove accommodating the quantum bare chip is formed through the substrate and the adjusting plate, and then the fixing plate is used for fixing. In the fixing process, the position of the quantum bare chip can be adjusted through the adjusting plate, so that the position of the quantum bare chip can be monitored in real time during the packaging process of the quantum bare chip, and corresponding adjustment can be carried out. After the position of the quantum bare chip and the fixing plate is fixed, final packaging is carried out, and the alignment and packaging precision of the quantum bare chip is improved.

Description

[0001] This application is a divisional application of the patent application with the application date of July 27, 2018, the application number of 201810845454.7, and the patent name of a quantum bare chip three-dimensional packaging structure and a packaging method thereof. TECHNICAL FIELD

[0002] The present application relates to the technical field of chip packaging, in particular to a quantum bare chip three-dimensional packaging structure. BACKGROUND

[0003] The quantum bare chip includes a quantum chip, an IMPA (Impedance Matched Parametric Amplifier), etc., and needs an extremely stable working environment when working, so that the quantum bare chip can be free from the influence of vibration, thermal radiation, electrical noise, signal crosstalk, magnetic field fluctuation, etc.

[0004] In order to reduce the influence of the external environment on the quantum bare chip, the quantum bare chip is usually packaged. In the prior art, two packaging methods are mainly used. One is to paste the quantum bare chip on the bottom of the packaging box for packaging. This method has great randomness, for example, the quantum bare chip may fall off due to the inclination generated in the pasting process or the poor pasting. The other is to clamp the quantum bare chip through a multi-layer clamp with a slot. Specifically, the quantum bare chip is placed on a fixed cavity, and then a PCB (Printed Circuit Board) is covered, the PCB is covered with an alignment cavity, and the fixed cavity and the alignment cavity are connected through a fastening device, so that the quantum bare chip is pressed between the fixed cavity and the alignment cavity.

[0005] However, the packaging method of the quantum bare chip in the prior art cannot monitor the position of the quantum bare chip and correct the relative position of the quantum bare chip in real time during the packaging process, so that the packaging alignment accuracy of the quantum bare chip is low. SUMMARY

[0006] Therefore, the present application provides a quantum bare chip three-dimensional packaging structure to solve the problem that the position of the quantum bare chip cannot be monitored and the relative position of the quantum bare chip cannot be corrected in real time during the packaging process in the prior art, so that the packaging alignment accuracy of the quantum bare chip is low.

[0007] To achieve the above-mentioned purpose, the present application provides the following technical scheme:

[0008] A quantum bare chip three-dimensional packaging structure, comprising: a substrate, an adjusting plate, a quantum bare chip, a fixed plate, a circuit board and at least two positioning pins.

[0009] The substrate is used to carry the quantum bare chip.

[0010] The adjusting plate is located on the surface of the substrate carrying the quantum bare chip, and a first through hole is arranged on the adjusting plate;

[0011] The quantum bare chip is located in the first through hole, and a reference line is arranged on the surface of the quantum bare chip away from the substrate;

[0012] The fixing plate is located on the surface of the adjusting plate away from the substrate, a second through hole is arranged on the fixing plate, the contour of the second through hole is the same as the shape of the reference line on the quantum bare chip, and the fixing plate is used to fix the adjusting plate and the quantum bare chip with the substrate after the adjusting plate adjusts the reference line of the quantum bare chip to overlap the contour of the second through hole.

[0013] The circuit board is located on the side of the fixing plate away from the substrate, and the circuit board is electrically connected with the quantum bare chip;

[0014] The substrate has at least two positioning holes, the adjusting plate, the fixing plate and the circuit board all have a plurality of positioning holes which are the same in number and position as the positioning holes on the substrate, and the positioning pin is located in the positioning hole.

[0015] Preferably, the quantum bare chip three-dimensional packaging structure further comprises a top plate;

[0016] The top plate is arranged between the circuit board and the fixing plate;

[0017] A plurality of third through holes are arranged on the top plate, the number of the third through holes is the same as the number of the connecting points on the quantum bare chip, and the positions of the third through holes are arranged one by one corresponding to the positions of the connecting points on the quantum bare chip.

[0018] Preferably, the quantum bare chip three-dimensional packaging structure further comprises a plurality of probes, the probes are located in the third through holes, and electrically connected with the quantum bare chip and the circuit board.

[0019] Preferably, one end of the probe is a retractable tip;

[0020] The retractable tip is in contact with the connecting point of the quantum bare chip, and the other end of the probe is in contact with the pad point on the circuit board.

[0021] Preferably, a plurality of sealing sleeves are further included, the number of the sealing sleeves is the same as the number of the third through holes, and the sealing sleeves are arranged one by one corresponding to the third through holes, the sealing sleeves are located in the third through holes of the top plate, and one sealing sleeve surrounds one probe.

[0022] Preferably, the sealing sleeve is a polytetrafluoroethylene sleeve.

[0023] Preferably, the substrate, the adjusting plate and the fixing plate are fixedly connected through screws.

[0024] Preferably, the quantum bare chip is a quantum chip or a parametric amplifier with impedance matching.

[0025] Preferably, the circuit board is a PCB board.

[0026] The application further provides a quantum bare chip packaging method for forming the quantum bare chip three-dimensional packaging structure according to any one of the above, and the quantum bare chip packaging method comprises the following steps:

[0027] providing a substrate, a quantum bare chip, an adjusting plate, a fixing plate, a circuit board and at least two positioning pins, wherein the adjusting plate is provided with a first through hole, the fixing plate is provided with a second through hole, and the substrate, the adjusting plate, the fixing plate and the circuit board are all provided with positioning holes;

[0028] placing the adjusting plate on the substrate;

[0029] placing the quantum bare chip in the first through hole of the adjusting plate;

[0030] placing the fixing plate on the adjusting plate;

[0031] inserting the positioning pins into the positioning holes of the substrate, the adjusting plate and the fixing plate for positioning;

[0032] adjusting the adjusting plate so that the reference line on the surface of the quantum bare chip overlaps the profile of the second through hole of the fixing plate;

[0033] fixing the circuit board on the side of the fixing plate away from the substrate, the positioning holes on the circuit board match the positioning pins, and the circuit board is electrically connected with the quantum bare chip.

[0034] Preferably, before the step of fixing the circuit board on the side of the fixing plate away from the substrate, the method further comprises the following steps:

[0035] providing a top plate, wherein the top plate comprises a plurality of third through holes, the number of the third through holes is the same as the number of the connecting points on the quantum bare chip, and the positions of the third through holes are arranged one by one corresponding to the positions of the connecting points on the quantum bare chip;

[0036] arranging the top plate on the surface of the fixing plate so that the third through holes are arranged one by one corresponding to the connecting points on the quantum bare chip.

[0037] Preferably, after the step of arranging the top plate on the surface of the fixing plate, the method further comprises the following steps:

[0038] providing a plurality of probes;

[0039] The probe is inserted into the third through-hole, such that one end of the probe contacts the connection point of the quantum bare chip.

[0040] Preferably, fixing the circuit board to the side of the fixing plate opposite to the substrate specifically involves:

[0041] The circuit board is disposed on the surface of the top plate opposite to the substrate;

[0042] The circuit board is initially positioned using the positioning pins;

[0043] Then, the circuit board is repositioned by making contact with the pads on the circuit board one by one.

[0044] The circuit board is fixed to the mounting plate with screws.

[0045] As can be seen from the above technical solution, the quantum bare chip three-dimensional packaging structure provided by the present invention includes a substrate, an adjustment plate, a quantum bare chip, a fixing plate, a circuit board, and at least two positioning pins. The positioning pins are used to initially position the substrate, adjustment plate, fixing plate, and circuit board. The substrate and adjustment plate form a groove to accommodate the quantum bare chip, which is then fixed by the fixing plate. During the fixing process, the position of the quantum bare chip can be adjusted by the adjustment plate. This allows for real-time monitoring and adjustment of the position of the quantum bare chip during the packaging process, ensuring that the position of the quantum bare chip is fixed with the fixing plate before final packaging, thereby improving the alignment and packaging accuracy of the quantum bare chip.

[0046] The present invention also provides a quantum bare chip packaging method. Based on the three-dimensional packaging structure of quantum bare chips described above, the alignment and packaging accuracy of the quantum bare chip can be improved because the position of the quantum bare chip can be adjusted by adjusting the plate during the packaging process. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0048] Figure 1 This is a schematic diagram of the structure of a quantum bare chip packaged using a fixed cavity and an alignment cavity in the prior art;

[0049] Figure 2An exploded view of a quantum bare chip 3D packaging structure provided in an embodiment of the present invention;

[0050] Figure 3 An exploded view of a quantum bare chip 3D packaging structure provided in another embodiment of the present invention;

[0051] Figure 4 This is a schematic diagram of the quantum bare chip packaging method provided in an embodiment of the present invention;

[0052] Figure 5 This is a schematic diagram of a quantum chip three-dimensional packaging structure without an electrically connected circuit board, provided in an embodiment of the present invention.

[0053] Figure 6 This is a side view of a quantum chip three-dimensional packaging structure provided in an embodiment of the present invention;

[0054] Figure 7 This is a schematic diagram of the lead connection design for a three-dimensional packaging structure of a quantum chip provided in an embodiment of the present invention;

[0055] Figure 8 This is an overall schematic diagram of a quantum chip three-dimensional packaging structure provided in an embodiment of the present invention;

[0056] Figure 9 This is a schematic diagram of a three-dimensional packaging structure for an IMPA chip without an electrically connected circuit board, provided in an embodiment of the present invention.

[0057] Figure 10 This is a schematic diagram of the alignment and fixing of a three-dimensional packaging structure for an IMPA chip provided in an embodiment of the present invention. Detailed Implementation

[0058] As described in the background section, the existing packaging methods for quantum bare chips cannot monitor and correct the position and relative position of the quantum bare chip in real time during the packaging process, resulting in low packaging alignment accuracy of the quantum bare chip.

[0059] The inventors discovered that the reason for the above phenomenon is that, Figure 1The diagram illustrates a conventional structure for packaging a quantum bare chip using a fixed cavity and an alignment cavity. The fixed cavity 01 contains a groove 011, within which the quantum bare chip 04 is located. The alignment cavity 02 is positioned above the fixed cavity 01, placing the quantum bare chip 04 between the fixed cavity 01 and the alignment cavity 02. A positioning pin (not shown) presses the fixed cavity 01 and alignment cavity 02 together to encapsulate the quantum bare chip. A circuit board 03 electrically connects the leads of the quantum bare chip. However, since the groove within the fixed cavity is machined to a fixed shape, and the positions of the fixed cavity, alignment cavity, and positioning pin are all predetermined, the position of the quantum bare chip is also fixed. If the machining of the groove within the fixed cavity deviates due to manufacturing processes, or if the dimensional fit between the positioning pin and the fixed cavity / alignment cavity deviates, the relative positions of the components will shift, thus reducing the packaging alignment accuracy of the quantum bare chip.

[0060] Moreover, since the grooves in the fixed cavity in the existing technology are pre-made products, the quantum bare chip cannot be monitored and its position adjusted in real time during the packaging process, which makes the final packaging alignment accuracy of the quantum bare chip unable to meet its working environment.

[0061] Based on this, the present invention provides a three-dimensional packaging structure for quantum bare chips, comprising:

[0062] Substrate, adjustment plate, quantum bare chip, fixing plate, circuit board and at least two positioning pins;

[0063] The substrate is used to support the quantum bare chip;

[0064] The adjustment plate is located on the surface of the substrate that supports the quantum bare chip, and a first through hole is provided on the adjustment plate;

[0065] The quantum bare chip is located within the first through-hole, and a reference line is provided on the surface of the quantum bare chip facing away from the substrate;

[0066] The fixing plate is located on the surface of the adjustment plate opposite to the substrate. The fixing plate is provided with a second through hole. The outline of the second through hole is the same as the shape of the reference line on the quantum bare chip. The fixing plate is used to fix the adjustment plate and the quantum bare chip with the substrate after the adjustment plate adjusts the reference line of the quantum bare chip to overlap with the outline of the second through hole.

[0067] The circuit board is located on the side of the fixing plate opposite to the substrate, and the circuit board is electrically connected to the quantum bare chip;

[0068] The substrate has at least two positioning holes, and the adjustment plate, the fixing plate and the circuit board each have multiple positioning holes with the same number and position as the positioning holes on the substrate, and the positioning pin is located in the positioning holes.

[0069] The quantum bare chip three-dimensional packaging structure provided by this invention includes a substrate, an adjustment plate, a quantum bare chip, a fixing plate, a circuit board, and at least two positioning pins. The positioning pins are used to initially position the substrate, adjustment plate, fixing plate, and circuit board. The substrate and adjustment plate form a groove to accommodate the quantum bare chip, which is then fixed by the fixing plate. During the fixing process, the position of the quantum bare chip can be adjusted by the adjustment plate. This allows for real-time monitoring and adjustment of the position of the quantum bare chip during the packaging process, ensuring that the position of the quantum bare chip is fixed with the fixing plate before final packaging, thereby improving the alignment and packaging accuracy of the quantum bare chip.

[0070] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0071] Please see Figure 2 , Figure 2 An exploded view of a quantum bare chip three-dimensional packaging structure provided in an embodiment of the present invention. The quantum bare chip three-dimensional packaging structure includes: a substrate 1, an adjustment plate 2, a quantum bare chip 3, a fixing plate 4, a circuit board 5, and at least two positioning pins 6.

[0072] The substrate 1 is used to support the quantum bare chip 3; the adjustment plate 2 is located on the surface of the substrate 1 supporting the quantum bare chip 3, and the adjustment plate 2 is provided with a first through hole 21; the quantum bare chip 3 is located in the first through hole 3, and a reference line 31 is provided on the surface of the quantum bare chip 3 facing away from the substrate 1; the fixing plate 4 is located on the surface of the adjustment plate 2 facing away from the substrate 1, and the fixing plate 4 is provided with a second through hole 41, the outline of the second through hole 41 is the same as the shape of the reference line 31 on the quantum bare chip 3, and the fixing plate 4 is used to fix the adjustment plate 2 and the quantum bare chip 3 together with the substrate 1 after the adjustment plate 2 adjusts the reference line 31 of the quantum bare chip 3 to overlap with the outline of the second through hole 41; the circuit board 5 is located on the side of the fixing plate 44 facing away from the substrate 1, and the circuit board 5 is electrically connected to the quantum bare chip 3; the substrate 1 has at least two positioning holes 11, and the adjustment plate 2, the fixing plate 4 and the circuit board 5 all have multiple positioning holes with the same number and position as the positioning holes on the substrate 1, and the positioning pin 6 is located in the positioning holes.

[0073] It should be noted that the substrate 1 also includes other devices for fixed connection with other components. Optionally, in this embodiment, the substrate and the adjustment plate, fixing plate, circuit board, etc. are fixedly connected by threads. Therefore, in addition to the positioning holes, each plate also includes threaded holes for fixing.

[0074] This embodiment does not limit the number of positioning holes or the number of fixing holes such as threaded holes. As long as the positioning and fixing of each component can be achieved, it is within the protection scope of this embodiment. This embodiment is illustrated by taking a substrate with 2 positioning holes 11 and 4 threaded holes 12 as an example.

[0075] The adjustment plate 2 adopts a through-hole structure, so that after the adjustment plate 2 is placed on the substrate 1, the first through hole 21 on the adjustment plate 2 forms a groove with the surface of the substrate 1, and the groove is used to accommodate the quantum bare chip 3.

[0076] It should be noted that the shape of the sidewalls of the first via 21 is not limited in this embodiment. Optionally, the shape of the groove is consistent with the outline shape of the quantum bare chip 3, and the size of the groove is larger than the actual size of the quantum bare chip 3. Thus, when the quantum bare chip 3 is placed in the groove, the position of the quantum bare chip 3 can be moved and adjusted by moving the position of the adjustment plate 2.

[0077] It should be noted that, since the position of the adjustment plate 2 can be moved relative to the substrate 1, and the positioning pin 6 is positioned by passing through the positioning holes of all components, the positioning holes on the adjustment plate 2 should be designed so that the adjustment plate 2 can move even after the positioning pin is inserted. In this embodiment, the size of the two positioning holes 22 on the adjustment plate 2 is larger than the size of the two positioning holes 11 on the substrate 1, thereby facilitating the movement of the adjustment plate 2. Similarly, since screws are needed to fix the fixing plate 4 and the substrate 1 through the adjustment plate 2, and the adjustment plate 2 is only used for adjusting the quantum bare chip 3, four through holes larger than the size of the threaded holes 12 on the substrate 1 are also provided on the adjustment plate 2.

[0078] In this embodiment, the fixing plate 4 also adopts a through-hole structure. The fixing plate 4 is first provided with a second through-hole 41 for aligning with the quantum bare chip. Secondly, the fixing plate 4 also needs to be positioned by positioning pins and clamped and fixed with the substrate 1 to the adjustment plate 2. Therefore, the fixing plate 4 is also provided with positioning holes 42 whose positions and sizes are the same as those of the positioning holes on the substrate 1, and four threaded holes 43 whose positions and sizes are the same as those of the threaded holes 12 on the substrate 1.

[0079] The packaging process of the quantum bare chip 3 can be as follows: first, the adjustment plate 2 is placed on the substrate 1; the quantum bare chip 3 is placed in the groove formed by the first via 21 of the adjustment plate 2 and the substrate 1; the fixing plate 4 is placed on the surface of the adjustment plate 2 away from the substrate 1; and the positioning pin 6 is used to align the positioning holes of the fixing plate 4, the adjustment plate 2 and the substrate 1 to achieve preliminary positioning.

[0080] Then move the position of the adjustment plate 2 to move the quantum bare chip 3. Observe it with a microscope with a scale to make the baseline 31 on the quantum bare chip 3 aligned with the outline of the second via 41 on the fixing plate 4. Observe the alignment accuracy in real time. After the alignment accuracy is achieved, fix the fixing plate 4 and the substrate 1 with screws to realize the packaging of the quantum bare chip 3.

[0081] In practical applications, after the initial packaging of the quantum bare chip 3, it is necessary to bring out the electrical functions on the quantum bare chip 3 to the external circuit. Therefore, the three-dimensional packaging structure of the quantum bare chip provided in this embodiment also includes a circuit board 5, which also includes a positioning hole 51 and a threaded hole 52. The position and size of the positioning hole 51 are consistent with the position and size of the positioning hole 11 on the substrate 1. The circuit board 5 is positioned by the positioning pin 6 and the positioning hole 51. Then, the quantum bare chip 3 and the pads on the circuit board 5 are electrically connected by gold wire or other electrical connection structures to realize the electrical lead-out of the quantum bare chip.

[0082] That is, the quantum bare chip packaging structure provided in this embodiment of the invention can achieve precise alignment between the reference line on the quantum bare chip and the second via contour line of the fixing plate by moving the adjustment plate that accommodates the quantum bare chip under a microscope during the fixed packaging process. The alignment accuracy can be observed in real time. After the required accuracy value is reached, the substrate, adjustment plate and fixing plate are connected and fixed, so that the position of the quantum bare chip is fixed, and the second via contour line of the fixing plate is aligned with the reference on the quantum bare chip.

[0083] It should be noted that the embodiments of the present invention do not limit the specific method of circuit outgoing of the quantum bare chip. When the quantum bare chip is a quantum chip, bonding wires can be used to connect the pads on the quantum bare chip to the circuit board through quantum circuits, and then lead out to the outside of the package. However, as the number of qubits increases, the number of pads on the quantum bare chip increases, and the number of bonding wires used also increases. However, when there are too many bonding wires, the probability of crosstalk between the bonding wires increases, which leads to the deterioration of the performance of the quantum bare chip, and even some functions cannot be realized. Therefore, this circuit outgoing method cannot be applied to large-scale integrated quantum chips. As for IMPA, the prior art usually uses bonding wire technology to connect the amplification circuit from the pads of the quantum bare chip to the microstrip line of the circuit board, and then lead out to the outside of the package. However, the impedance transformation line index fluctuation caused by the circuit board processing precision of the impedance strip made by the circuit board will bring more uncontrollable effects.

[0084] Therefore, another embodiment of the present invention provides a three-dimensional packaging structure for a quantum bare chip, including a substrate, an adjustment plate, a quantum bare chip, a fixing plate, a circuit board, and at least two positioning pins. Furthermore, unlike the above embodiment, the three-dimensional packaging structure for the quantum bare chip provided in this embodiment also includes a top plate. Please refer to [link to previous document]. Figure 3 , Figure 3 An exploded view of a three-dimensional packaging structure for a quantum bare chip provided in another embodiment of the present invention is shown. The top plate 7 is disposed between the circuit board 5 and the fixing plate 4. The top plate 7 is provided with a plurality of third through holes 71. The number of third through holes 71 is the same as the number of connection points on the quantum bare chip 3, and the positions of the third through holes 71 correspond one-to-one with the positions of the connection points on the quantum bare chip 3.

[0085] It should be noted that the number of third through holes 71 is not limited in this embodiment. The number of third through holes is the same as the number of connection points on the quantum bare chip 3. That is, the number of connection points on the quantum bare chip determines the number of third through holes on the top plate.

[0086] In this embodiment, the electrical connection between the circuit board 5 and the quantum bare chip 3 is achieved through the third through hole 71 on the top plate 7 and the second through hole 41 on the fixing plate 4.

[0087] The circuit board 5 and the quantum bare chip 3 can be electrically connected via gold wire or other connection structures; this embodiment does not limit the connection. To ensure alignment between the quantum bare chip 3 and the circuit board 5, this embodiment optionally includes multiple probes 8, which are located in the third through-hole 71 and electrically connected to the quantum bare chip 3 and the circuit board 5.

[0088] In this embodiment, the specific material and structure of the probe are not limited. Optionally, the probe can be a high-frequency probe, pogo-pin.

[0089] It should be noted that in this embodiment, one end of the probe is a retractable tip. In this embodiment, the retractable tip of probe 8 contacts the connection point of the quantum bare chip 3, and the other end of probe 8 contacts the solder pad on the circuit board 5. The quantum bare chip 3 and the circuit board 5 are electrically connected together only through the contact of the two ends of probe 8. Finally, the circuit board 5 and the top plate 7 are fixed together with screws. In this embodiment, the top plate 7 also has positioning holes of the same size as the positioning holes in the substrate 1 for positioning with other components.

[0090] In this embodiment, in order to ensure that the probe 8 can be stably set in the third through hole 71, the quantum bare chip three-dimensional packaging structure may also include multiple sealing sleeves 9. The number of sealing sleeves 9 is the same as the number of third through holes 71, and they are set in a one-to-one correspondence. The sealing sleeves 9 are located in the third through hole 71 of the top plate 7, and one sealing sleeve 9 surrounds one probe 8.

[0091] In this embodiment, the specific material of the sealing sleeve is not limited; optionally, the sealing sleeve 9 is a polytetrafluoroethylene (PTFE) sleeve. In this embodiment, the PTFE sleeve 9 and the probe 8 form a coaxial structure.

[0092] Existing technologies also employ coaxial structures to connect quantum dot chips and circuit boards, using positioning pins to align the quantum dot chip and circuit board, thus enabling wiring lead-out. However, because the machining precision of the positioning pins determines the positioning accuracy, the positioning accuracy of the coaxial structure cannot be checked during or after packaging, making it impossible to guarantee the stability of wiring lead-out. In this embodiment of the invention, by adjusting the adjustment plate 2, the position of the quantum dot chip can be adjusted, allowing the probes in the coaxial structure to be precisely aligned with the pads on the quantum dot chip 3 and the circuit board 5, achieving electrical connection.

[0093] Specifically, the packaging process of the quantum bare chip in this embodiment can refer to some steps in the above embodiment, such as placing the adjustment plate on the substrate, placing the quantum bare chip in the groove formed by the adjustment plate and the substrate, setting the fixing plate, adjusting the adjustment plate to fix the fixing plate and the quantum bare chip, and using screws to fix and connect the fixing plate and the substrate.

[0094] After the fixing plate and the quantum bare chip are fixed in place by the fixing plate and the substrate, a polytetrafluoroethylene (PTFE) sleeve with a diameter equivalent to the diameter of the third through hole on the top plate is inserted into the third through hole of the top plate. One end of the PTFE sleeve is connected to the connection point on the quantum bare chip, and the other end abuts against the circuit board. Then, the retractable end of the probe is inserted into the PTFE sleeve, so that one end of the probe contacts the connection point on the quantum bare chip, and the non-retractable end extends out of the PTFE sleeve a certain distance. Then, the circuit board is placed on the top plate, so that the non-retractable end of the probe contacts the circuit board. Finally, it is fixed with screws, thus achieving the alignment and connection of the quantum bare chip and the circuit board. In this embodiment, the specific material and structure of the circuit board are not limited; optionally, the circuit board is a PCB board.

[0095] It should be noted that in this embodiment, the probe position is fixed by the top plate, which aligns the circuit board and the quantum bare chip. Moreover, due to the limitation of the top plate, the probe position will not be misaligned or moved. Therefore, in this embodiment, the probe can be electrically connected to the connection point on the quantum bare chip and the pad on the circuit board simply by contact, without the need for soldering, making the packaging operation convenient and simple.

[0096] In this embodiment, by adding a top plate, PTFE (polytetrafluoroethylene), and probes, a good alignment and electrical connection can be formed between the circuit board and the quantum bare chip. By adjusting the movement of the plate, the probes on the top plate are well aligned with the connection points of the quantum bare chip. In addition, the coaxial connection structure (composed of a PTFE sleeve and probes) can determine the relative position of the circuit board, and the connection points on the circuit board are in the form of pads, which can achieve precise alignment and connection with the connection points on the quantum bare chip, making the operation more convenient and simple.

[0097] Based on the quantum bare chip provided in the above embodiments, this invention also provides a packaging method for the quantum bare chip, such as... Figure 4 The diagram shown is a schematic flowchart of a quantum bare chip packaging method provided in an embodiment of the present invention. The quantum bare chip packaging method includes:

[0098] S101: Provides a substrate, a quantum bare chip, an adjustment plate, a fixing plate, a circuit board, and at least two positioning pins, wherein the adjustment plate has a first through hole, the fixing plate has a second through hole, and the substrate, the adjustment plate, the fixing plate, and the circuit board all have positioning holes;

[0099] S102: Place the adjustment plate on the substrate;

[0100] S103: Place the quantum bare chip in the first through hole of the adjustment plate;

[0101] S104: Place the fixing plate on the adjusting plate;

[0102] S105: Insert the positioning pin into the positioning holes of the substrate, the adjustment plate and the fixing plate for positioning;

[0103] S106: Adjust the adjustment plate so that the reference line on the surface of the quantum bare chip overlaps with the outline of the second through hole of the fixing plate;

[0104] S107: The circuit board is fixed to the side of the fixing plate away from the substrate, the positioning hole on the circuit board matches the positioning pin, and the circuit board is electrically connected to the quantum bare chip.

[0105] It should be noted that if a top plate and coaxial connection structure (including a sealing sleeve and probe structure) are used to achieve the electrical connection between the quantum bare chip and the circuit board, then in this embodiment, before fixing the circuit board to the side of the fixing plate away from the substrate, the following steps are also included:

[0106] A top plate is provided, which includes multiple third through holes. The number of third through holes is the same as the number of connection points on the quantum bare chip, and the positions of the third through holes are set to correspond one-to-one with the positions of the connection points on the quantum bare chip.

[0107] The top plate is set on the surface of the fixed plate so that the third through hole is set one-to-one with the connection point on the quantum bare chip.

[0108] After the top plate is disposed on the surface of the fixed plate, the method further includes:

[0109] Provides multiple probes;

[0110] The probe is inserted into the third through-hole, such that one end of the probe contacts the connection point of the quantum bare chip.

[0111] Correspondingly, in this embodiment, the circuit board is fixed to the side of the fixing plate opposite to the substrate, specifically as follows:

[0112] The circuit board is disposed on the surface of the top plate opposite to the substrate;

[0113] The circuit board is initially positioned using the positioning pins;

[0114] Then, the circuit board is repositioned by making contact with the pads on the circuit board one by one.

[0115] The circuit board is fixed to the mounting plate with screws.

[0116] To clearly illustrate the quantum bare chip packaging method provided in this embodiment, this embodiment takes a three-dimensional quantum chip packaging structure including a top plate, a polytetrafluoroethylene sleeve and a probe as an example, and provides a detailed description in conjunction with the accompanying drawings.

[0117] like Figure 5 and Figure 6 As shown, where, Figure 5 This is a schematic diagram of a quantum chip three-dimensional packaging structure without an electrically connected circuit board, provided in an embodiment of the present invention. Figure 6 This is a side view of a three-dimensional packaging structure for a quantum chip; the quantum chip packaging structure includes: a substrate 1, an adjustment plate 2, a quantum bare chip (inside the packaging structure, not shown in the figure), a fixing plate 4, a circuit board (not shown in the figure), and at least two positioning pins 6.

[0118] like Figure 7 As shown, the outline size of the groove formed by the tight bonding of substrate 1 and adjustment plate 2 is larger than the size of quantum bare chip 3. The adjustment plate 2 is placed on substrate 1 by positioning pin 6, and quantum bare chip 3 is placed in the groove formed by the tight bonding of substrate 1 and adjustment plate 2. Then, fixing plate 4 is placed on top of adjustment plate 2. Under the microscope, the adjustment plate 2 is moved until the position of quantum bare chip 3 is determined, and then screws are tightened to fix it.

[0119] Figure 7 This is a schematic diagram of the lead connection design for a quantum chip three-dimensional packaging structure provided in an embodiment of the present invention. A coaxial structure (dielectric / PTFE sleeve 9, inner conductor / pogo-pin 8) is used to connect the top plate 7 and the PCB board 5. After the quantum bare chip 3 is fixed, the PTFE sleeve 9 is inserted into the through-hole of the top plate 7, with one end of the PTFE sleeve 9 abutting against the quantum bare chip and the other end flush with the plane of the top plate 7. Then, the retractable end of the pogo-pin 8 is inserted into the PTFE sleeve, so that one end of the pogo-pin 8 contacts the quantum bare chip (not shown in the figure), that is, contacts the connection point on the quantum bare chip. The other end extends a distance beyond the PTFE sleeve 9. Then, the PCB board 5 is placed on the top plate 7, so that one end of the pogo-pin 8 contacts the pad on the PCB board 5, and then the PCB board 5 is fastened above the top plate 7, thus achieving the alignment and connection between the quantum bare chip and the PCB.

[0120] Figure 8 This is an overall schematic diagram of a quantum chip three-dimensional packaging structure provided in an embodiment of the present invention. It consists of the following parts: substrate 1, adjustment plate 2, fixing plate 4, top plate 7, PCB board 5, coaxial structure (PTFE sleeve 9 / pogo-pin 8), quantum bare chip 3, connection point 32 on the quantum bare chip, through hole on top plate 7, and positioning pin 6.

[0121] The quantum chip three-dimensional packaging structure provided in this invention, during the design process, first determines the external dimensions of the quantum bare chip, and then determines the dimensions of the slotted bottom frame of the adjustment plate and the fixing plate based on its external dimensions. The machining accuracy of the slotted bottom frame of the fixing plate is A. Then, according to the reference pattern on the quantum bare chip, the position of the quantum bare chip in the slot is determined. The quantum bare chip three-dimensional packaging structure provided by this invention can be assembled according to the following steps:

[0122] 1. Place the quantum bare chip 3 in parallel within the groove formed by the substrate 1 and the adjustment plate 2;

[0123] 2. Place the fixing plate 4 on top of the quantum bare chip 3, covering the reference pattern area of ​​the quantum bare chip 3;

[0124] 3. Under a microscope with a scale (resolution C), move the adjustment plate 2 back and forth and left and right until the reference pattern on the quantum bare chip coincides with the bottom frame of the slot on the fixing plate 4. The alignment error between the bottom frame of the slot on the fixing plate 4 and the reference pattern on the quantum bare chip is B. Then fix the component, and the alignment accuracy is within the range of A+B.

[0125] 4. Insert the polytetrafluoroethylene sleeve 9 (machining accuracy set to C) into the through hole of the top plate 7, so that one end of the polytetrafluoroethylene sleeve 9 abuts against the quantum bare chip and the other end is flush with the through hole plane of the top plate 7. If it protrudes from the through hole plane of the top plate 7, a tool can be used to cut horizontally along the through hole plane of the top plate 7 to make it flush.

[0126] 5. Insert the pogo-pi n8 into the hole of the polytetrafluoroethylene sleeve 9, with one end in contact with the quantum bare chip and the other end extending out of the polytetrafluoroethylene sleeve. In this way, the alignment accuracy of the inner conductor and the connection point on the quantum bare chip is controlled within the range of A+B+C.

[0127] 6. Place PCB board 5 on top of the component, so that the non-retractable end of pogo-pi n8 contacts the pad on PCB board 5. This completes the alignment and connection between the quantum bare chip and the stereo package.

[0128] The quantum bare chip packaging method provided by this invention, based on the aforementioned three-dimensional quantum bare chip packaging structure, improves the alignment and packaging accuracy of the quantum bare chip by adjusting the position of the quantum bare chip during the packaging process using an adjustment plate. Furthermore, the coaxial connection structure further enhances the alignment accuracy of the connection points between the circuit board and the quantum bare chip, thereby improving the overall alignment and packaging precision of the quantum bare chip.

[0129] This invention also provides a three-dimensional packaging structure for an IMPA chip. It should be noted that the three-dimensional packaging structure of the IMPA chip is similar to that of a quantum chip, and the packaging method is also similar. The main difference is that there are two coaxial connection structure through holes (i.e., the third through hole) on the top plate.

[0130] like Figure 9 This is a schematic diagram of a three-dimensional packaging structure for an IMPA chip without an electrically connected circuit board, provided in an embodiment of the present invention. The fixing structure includes a substrate 10, an adjustment plate 20, a fixing plate 30, and a top plate 40. In this embodiment, the circuit board is not electrically connected yet. The top plate 40 includes two positioning holes 401, four threaded holes 402, and two third through holes 403.

[0131] Figure 10 This is a schematic diagram of the alignment and fixing of a three-dimensional packaging structure for an IMPA chip provided in an embodiment of the present invention; the fixing plate 30, the adjusting plate 20 and the substrate 10 are fixed by positioning pins 60.

[0132] The lead connection of the 3D packaging structure for an IMPA chip provided in this embodiment of the invention can be found in [reference needed]. Figure 7 A schematic diagram of the overall structure can be found in [reference needed]. Figure 8 After the lead wire connection is completed, a circuit board is also connected. The specific packaging process of the 3D packaging structure of the IMPA chip provided in this embodiment can be referred to the description in the above embodiment, and will not be described in detail in this embodiment.

[0133] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0134] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0135] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A three-dimensional packaging structure for quantum bare chips, characterized in that, include: Substrate, adjustment plate, and fixing plate; The substrate is used to support the quantum bare chip; The adjustment plate is located on the surface of the substrate that supports the quantum bare chip. A first through hole is provided on the adjustment plate, and the first through hole and the substrate form a groove to accommodate the quantum bare chip. The quantum bare chip is located within the groove, and a reference line is provided on the surface of the quantum bare chip facing away from the substrate; The fixing plate is located on the surface of the adjustment plate opposite to the substrate. The fixing plate is provided with a second through hole. The outline of the second through hole is the same as the shape of the reference line on the quantum bare chip. The fixing plate is used to fix the quantum bare chip with the substrate after the adjustment plate adjusts the reference line of the quantum bare chip to overlap with the outline of the second through hole. The structure also includes a circuit board located on the side of the fixing plate opposite to the substrate, and the circuit board is electrically connected to the quantum bare chip; The structure also includes a probe that is electrically connected to the circuit board and the quantum bare chip; A sealing sleeve is provided on the probe housed in the third through hole, and the sealing sleeve surrounds the probe; One end of the probe is a retractable tip; The retractable tip contacts the connection point of the quantum bare chip, and the other end of the probe contacts the pad on the circuit board.

2. The structure according to claim 1, characterized in that, The structure also includes a top plate; the top plate is disposed between the circuit board and the fixing plate; the top plate has a third through hole for accommodating the probe.

3. The structure according to claim 2, characterized in that, The probe and the third through hole correspond one-to-one.

4. The structure according to any one of claims 1-3, characterized in that, The substrate has at least two positioning holes, and the adjustment plate and the fixing plate each have multiple positioning holes with the same number and position as the positioning holes on the substrate, and positioning pins are provided in the positioning holes.

5. The structure according to claim 1, characterized in that, The substrate has at least two positioning holes, and the adjustment plate, the fixing plate and the circuit board each have multiple positioning holes with the same number and position as the positioning holes on the substrate. The positioning holes are provided with positioning pins.

6. The structure according to claim 1, characterized in that, The quantum bare chip is either a quantum chip or a parametric amplifier with impedance matching.

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