A reference voltage generation method, system and circuit for a linear voltage regulator

Abstract

The application provides a reference voltage generation method, system and circuit of a linear voltage regulator, comprising the following steps: determining the voltage value related to a second NPN tube and a third PNP tube; determining a fourth voltage according to the voltage value related to the second NPN tube and the third PNP tube; determining the voltage value related to a third NPN tube and a fourth PNP tube; determining a fourth voltage according to the voltage value related to the third NPN tube and the fourth PNP tube; determining a first voltage according to the twice-determined fourth voltage; determining the voltage value related to a first NPN; and deriving the reference voltage of the linear voltage regulator according to the first voltage and the voltage value related to the first NPN. The application has the beneficial effect that the first voltage is determined according to the twice-determined fourth voltage, and the reference voltage of the linear voltage regulator is derived by determining the voltage value related to the first NPN. The circuit structure corresponding to the calculation method for calculating the reference voltage of the linear voltage regulator is relatively simple, and the output noise is relatively low.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor analog integrated circuit, in particular to a reference voltage generation method, system and circuit of linear voltage regulator. BACKGROUND

[0002] The reference circuit is an indispensable part of integrated circuit chip, especially in analog integrated circuit, the reference circuit is related to the precision and core parameter performance of the whole chip, the basic structure of ordinary linear voltage regulator is as shown in Figure 5 , the ordinary linear voltage regulator includes a reference circuit module 101, an operational amplifier 102, a power PNP tube 103, a first resistor 104, a second resistor 105 and an output capacitor 106, most of the linear voltage regulators have similar structures, the reference module is used as an independent circuit, the reference module outputs a stable voltage of 1.2V to one end of the operational amplifier, the other end of the operational amplifier is connected to the middle port of the sampling resistor pair, the operational amplifier, the power tube, the first resistor and the second resistor form a complete negative feedback loop, the function of the negative feedback makes the voltages of the two input ports of the operational amplifier equal, both equal to 1.2V, so the output voltage can be expressed as: , wherein V BG is the reference voltage value (generally 1.2V); as Figure 6 is a commonly used reference circuit block diagram, the PTAT (proportional to temperature) voltage on the resistor R1 can be expressed as: V R1 = VT*ln8, wherein VT is a temperature proportional voltage, which is 26mV at normal temperature, so the reference voltage V BG can be expressed as: , adjusting the proportional value of R1 and R2 can eliminate the first order error term of the temperature coefficient, so as to obtain a voltage basically independent of temperature, that is, the reference voltage, Figure 5 There is a negative feedback loop inside, that is, from the ports AN1 and AN2 to the operational amplifier A1, to the PNP tubes P1 and P2, and then from the collectors of P1 and P2 back to AN1 and AN2, forming a complete loop, which makes the voltage of AN1 port equal to that of AN2 port, in this case, V R1 = VT*ln8 can be established, so that As analyzed above, in the existing linear voltage stabilizer, the reference voltage exists as an independent module, the reference generating module and the main control module of the linear voltage stabilizer are two independent feedback systems, thus causing two problems: first, the circuit structure is complex, causing small bandwidth and slow response of the system; second, many devices are used, causing many noise sources of the output, thus making the output noise large; third, this structure is not conducive to low noise and high speed design, even if a manufacturing process with very low noise and very high speed is used, this traditional structure is also not conducive to fully exerting the process advantage. In the design of modern middle and high-end linear regulator chip, low noise and high speed are two very important indexes. SUMMARY

[0003] In view of the above-mentioned defects of the prior art, the purpose of the present application is to provide a reference voltage generating method, system and circuit of a linear voltage stabilizer, which is used to solve the problems of complex structure and large output noise of the existing linear voltage stabilizer in the prior art.

[0004] The embodiment of the present application provides a reference voltage generating method of a linear voltage stabilizer, comprising the following steps: determining the voltage values related to a second NPN tube and a third PNP tube, wherein the related voltage values are the voltage value between the base and the emitter of the second NPN tube and the voltage value between the emitter and the base of the third PNP tube; determining a fourth voltage according to the voltage values related to the second NPN tube and the third PNP tube; determining the voltage values related to a third NPN tube and a fourth PNP tube, wherein the related voltage values are the voltage value between the base and the emitter of the third NPN tube and the voltage value between the emitter and the base of the fourth PNP tube; determining a fourth voltage according to the voltage values related to the third NPN tube and the fourth PNP tube; determining a first voltage according to the two determined fourth voltages; determining the voltage value related to a first NPN, wherein the related voltage value is the voltage value between the base and the emitter of the first NPN tube; and deriving the reference voltage of the linear voltage stabilizer according to the first voltage and the voltage value related to the first NPN.

[0005] The embodiment of the present application also provides a reference voltage generation system of a linear voltage regulator, comprising: a first determining module, configured to determine a voltage value related to a second NPN transistor and a third PNP transistor, wherein the related voltage value is a voltage value between a base and an emitter of the second NPN transistor and a voltage value between an emitter and a base of the third PNP transistor; a second determining module, configured to determine a fourth voltage according to the voltage value related to the second NPN transistor and the third PNP transistor; a third determining module, configured to determine a voltage value related to a third NPN transistor and a fourth PNP transistor, wherein the related voltage value is a voltage value between a base and an emitter of the third NPN transistor and a voltage value between an emitter and a base of the fourth PNP transistor; a fourth determining module, configured to determine a fourth voltage according to the voltage value related to the third NPN transistor and the fourth PNP transistor; a fifth determining module, configured to determine a first voltage according to the two determined fourth voltages; a sixth determining module, configured to determine a voltage value related to a first NPN transistor, wherein the related voltage value is a voltage value between a base and an emitter of the first NPN transistor, and to obtain a reference voltage of the linear voltage regulator according to the first voltage and the voltage value related to the first NPN transistor.

[0006] The main difference and effect of the embodiment of the present application relative to the prior art are that the fourth voltage is determined according to the voltage value related to the second NPN transistor and the third PNP transistor, then the fourth voltage is determined according to the voltage value related to the third NPN transistor and the fourth PNP transistor, the first voltage is determined according to the two determined fourth voltages, and the reference voltage of the linear voltage regulator is determined by determining the voltage value related to the first NPN transistor, so that the circuit structure corresponding to the calculation method of the reference voltage of the linear voltage regulator is relatively simple, and the output noise is relatively low.

[0007] As a further improvement, after the reference voltage of the linear voltage regulator is obtained according to the first voltage, the method further comprises: determining an output voltage of the linear voltage regulator according to the reference voltage of the linear voltage regulator, wherein the output voltage of the linear voltage regulator is determined by the following formula: ; wherein V OUT is the output voltage of the linear voltage regulator, V BG is the reference voltage of the linear voltage regulator.

[0008] As a further improvement, the fourth voltage is determined according to the voltage value related to the second NPN transistor and the third PNP transistor, comprising: determining the fourth voltage according to the following formula: ; wherein V1 is the base voltage of the third PNP transistor, V4 is the base voltage of the second NPN transistor and the third NPN transistor, V BE2 is the voltage value between the base and the emitter of the second NPN transistor, and V EB3 is the voltage value between the emitter and the base of the third PNP transistor.

[0009] As a further improvement, the fourth voltage is determined according to the voltage values related to the third NPN tube and the fourth PNP tube, comprising: determining the fourth voltage according to the following formula: ; wherein, V BE3 is the voltage value between the base and the emitter of the third NPN tube, V EB4 is the voltage value between the emitter and the base of the fourth PNP tube.

[0010] As a further improvement, the first voltage is determined according to the two determined fourth voltages, comprising: determining the first voltage according to the following formula:

[0011] ; wherein, VT is a voltage proportional to temperature, which is 26mV at normal temperature, I is the collector current of the sixth PNP tube and the seventh PNP tube, I SBE3 is the short-circuit current of the third NPN tube, I SEB4 is the short-circuit current of the fourth PNP tube, I SBE2 is the short-circuit current of the second NPN tube, I SEB3 is the short-circuit current of the third PNP tube.

[0012] As a further improvement, the reference voltage of the linear voltage stabilizer is obtained according to the first voltage, comprising: obtaining the reference voltage of the linear voltage stabilizer according to the following formula: ; wherein, V2 is the base voltage of the first NPN tube, V BE1 is the voltage value between the base and the emitter of the first NPN tube, and a reference voltage V BG is obtained by adjusting the resistance ratio of R3 and R4.

[0013] The above scheme can calculate the output voltage, the fourth voltage, the first voltage and the reference voltage according to various specific formulas, so that the staff can use and operate conveniently, the labor intensity of the staff is reduced, and the time of the staff is saved.

[0014] The embodiment of the application further provides a reference voltage generation circuit of a linear voltage stabilizer, comprising a reference voltage generation unit, the reference voltage generation unit comprising: a first resistance, a second resistance, a first NPN tube, a third resistance, a fourth resistance, a sixth PNP tube, a second NPN tube, a third PNP tube, a seventh PNP tube, a third NPN tube and a fourth PNP tube,

[0015] The base of the first NPN tube is connected with the collector of the first NPN tube, the emitter of the sixth PNP tube and the emitter of the seventh PNP tube through a first resistor, the base of the first NPN tube is connected with the input terminal of the using circuit of the linear voltage stabilizer through a first resistor, and the base of the first NPN tube is grounded through a second resistor, the emitter of the first NPN tube is connected with the base of the third PNP through a third resistor, and the emitter of the first NPN tube is grounded through a third resistor and a fourth resistor, the base of the sixth PNP tube is connected with the base of the seventh PNP tube, and the collector of the sixth PNP tube is connected with the collector of the second NPN tube;

[0016] The base of the second NPN tube is connected with the base and the collector of the third NPN tube, the emitter of the second NPN tube is connected with the emitter of the third PNP tube, the base of the third PNP tube is grounded through a fourth resistor, the collector of the third PNP tube is grounded, the collector of the seventh PNP tube is connected with the collector of the third NPN tube, the emitter of the third NPN tube is connected with the emitter of the fourth PNP tube, and the base and the collector of the fourth PNP tube are grounded.

[0017] As a further improvement, a BIAS voltage generating unit is further included, which is connected with the reference voltage generating unit, and the BIAS voltage generating unit comprises an eighth PNP tube, a ninth PNP tube, a fourth NPN tube, a fifth NPN tube, a fifth resistor, a second PNP tube, a first PNP tube, a first current source and a fifth PNP tube;

[0018] The base of the eighth PNP tube is connected with the base and the collector of the ninth PNP tube, the collector of the eighth PNP tube is connected with the base of the sixth PNP tube and the base of the seventh PNP tube, the emitter of the eighth PNP tube is connected with the collector of the first NPN tube, and the emitter of the eighth PNP tube is connected with the emitter of the ninth PNP tube, the collector of the ninth PNP tube is connected with the collector of the fourth NPN tube, the base of the fourth NPN tube is connected with the collector of the sixth PNP tube, the emitter of the fourth NPN tube is connected with the collector and the base of the fifth NPN tube, and the emitter of the fifth NPN tube is grounded through a fifth resistor;

[0019] The base and the emitter of the second PNP tube are connected, and the base and the emitter of the second PNP tube are connected with the collector of the first NPN tube, the collector of the second PNP tube is connected with the emitter and the base of the first PNP tube, the base of the first PNP tube is connected with the base of the fifth PNP tube, the collector of the first PNP tube is connected with the positive pole of the first current source, the negative pole of the first current source is grounded, the collector of the fifth PNP tube is grounded, and the emitter of the fifth PNP tube is connected with the base of the sixth PNP tube and the base of the seventh PNP tube.

[0020] As a further improvement, a stabilizing unit is also included, which is connected to the BIAS voltage generating unit, the stabilizing unit comprising: a tenth PNP transistor, a second current source, a ninth resistor, an eighth resistor, a seventh NPN transistor, a sixth NPN transistor, a sixth resistor and a seventh resistor;

[0021] The base of the tenth PNP transistor is connected to the positive pole of the second current source and the emitter of the tenth PNP transistor through the ninth resistor, the base of the tenth PNP transistor is connected to the collector of the seventh NPN transistor through the eighth resistor, the emitter of the tenth PNP transistor is connected to the output of the using circuit of the linear voltage stabilizer, and the collector of the tenth PNP transistor is connected to the emitter of the ninth PNP transistor;

[0022] The base of the seventh NPN transistor is connected to the negative pole of the second current source, and the base of the seventh NPN transistor is connected to the collector of the sixth NPN transistor, the emitter of the seventh NPN transistor is grounded, the collector of the sixth NPN transistor is connected to the base of the sixth NPN transistor and the collector of the fifth NPN transistor through the seventh resistor, and the emitter of the sixth NPN transistor is grounded through the sixth resistor.

[0023] The above scheme realizes excellent performance of the entire circuit because the reference voltage generating circuit is integrated as an inseparable part in the entire linear voltage stabilizer circuit. Because of the integrated design, the entire circuit has only a single feedback system, and the circuit structure is simple and coordinated, so that the system response is excellent. Moreover, the number of devices is small, the noise source is small, and excellent noise characteristics can be realized. Furthermore, this structure is very suitable for low-noise, high-speed transistor circuit design, and the double-collector process can maximize its advantages through this structure. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 A flow chart of the reference voltage generating method of the linear voltage stabilizer in the first embodiment of the present application is shown;

[0025] Figure 2 A flow chart of the reference voltage generating method of the linear voltage stabilizer in the second embodiment of the present application is shown;

[0026] Figure 3 A flow chart of the reference voltage generating system of the linear voltage stabilizer in the third embodiment of the present application is shown;

[0027] Figure 4 A schematic diagram of an electronic device in the fifth embodiment of the present application is shown;

[0028] Figure 5 A schematic diagram of the basic circuit of a commonly used linear voltage stabilizer is shown;

[0029] Figure 6 shows a common reference circuit structure circuit schematic diagram;

[0030] Figure 7 shows a circuit schematic diagram of the reference voltage generation unit in the present application;

[0031] Figure 8 shows a circuit schematic diagram of the reference voltage generation unit and the BIAS voltage generation unit in the present application;

[0032] Figure 9 shows a circuit schematic diagram of the linear regulator of the reference voltage generation circuit in the present application. DETAILED DESCRIPTION

[0033] The embodiments of the present application will be described in detail hereinafter with specific reference to the attached drawings, and the advantages and effects of the present application will be easily understood by those skilled in the art from the content disclosed in the specification. The present application can also be implemented or applied in other different embodiments, and the details in the specification can be modified or changed in various ways based on different views and applications without departing from the spirit of the present application. It should be noted that the following examples and features in the examples can be combined with each other without conflict.

[0034] It should be noted that the diagrams provided in the following examples only schematically illustrate the basic concept of the present application, and only the components related to the present application are shown in the diagrams, not the number, shape and size of the components when actually implemented. The shape, number and ratio of the components when actually implemented can be arbitrarily changed, and the layout pattern of the components can also be more complex.

[0035] The first embodiment of the present application relates to a reference voltage generation method of a linear regulator. The flow is as shown in Figure 1 and specifically as follows:

[0036] Step 101, determining the voltage value related to the second NPN tube and the third PNP tube;

[0037] Specifically, the related voltage value is the voltage value between the base and the emitter of the second NPN tube and the voltage value between the emitter and the base of the third PNP tube.

[0038] Step 102, determining the fourth voltage according to the voltage value related to the second NPN tube and the third PNP tube.

[0039] Specifically, the fourth voltage is calculated according to the voltage value related to the second NPN tube and the third PNP tube by the following formula: ; wherein V1 is the base voltage of the third PNP tube, V4 is the base voltage of the second NPN tube and the third NPN tube, V BE2V is the voltage value between the base and the emitter of the second NPN transistor. EB3 V is the voltage value between the emitter and the base of the third PNP transistor.

[0040] Step 103, determining the voltage value related to the third NPN transistor and the fourth PNP transistor.

[0041] Specifically, the related voltage value is the voltage value between the base and the emitter of the third NPN transistor and the voltage value between the emitter and the base of the fourth PNP transistor.

[0042] Step 104, determining the fourth voltage according to the voltage value related to the third NPN transistor and the fourth PNP transistor.

[0043] Specifically, the sixth PNP transistor and the seventh PNP transistor are a pair of current mirrors, so the base voltage and the emitter voltage of the sixth PNP transistor and the seventh PNP transistor are equal, and thus the collector current of the sixth PNP transistor and the seventh PNP transistor is the same, so determining the fourth voltage according to the voltage value related to the third NPN transistor and the fourth PNP transistor can be calculated by the following formula: ; wherein V BE3 V is the voltage value between the base and the emitter of the third NPN transistor. EB4 V is the voltage value between the emitter and the base of the fourth PNP transistor.

[0044] Step 105, determining the first voltage according to the two determined fourth voltages.

[0045] Specifically, determining the first voltage according to the two determined fourth voltages is calculated by the following formula:

[0046] ;

[0047] wherein VT is a voltage proportional to temperature, which is 26mV at room temperature, I is the collector current of the sixth PNP transistor and the seventh PNP transistor, and I SBE3 I is the short-circuit current of the third NPN transistor. SEB4 I is the short-circuit current of the fourth PNP transistor. SBE2 I is the short-circuit current of the second NPN transistor. SEB3 I is the short-circuit current of the third PNP transistor.

[0048] Step 106, determining the voltage value related to the first NPN.

[0049] Specifically, the related voltage value is the voltage value between the base and the emitter of the first NPN transistor.

[0050] Step 107, deriving the reference voltage of the linear voltage regulator according to the first voltage and the voltage value related to the first NPN.

[0051] Specifically, the first NPN tube makes the relationship between the base voltage V2 of the first NPN tube and the emitter voltage V3 of the first NPN tube as follows: Therefore, the reference voltage of the linear voltage regulator is calculated according to the first voltage by the following formula: ; wherein V2 is the base voltage of the first NPN tube, V BE1 is the voltage value between the base and the emitter of the first NPN tube, and a reference voltage V BG is obtained by adjusting the resistance ratio of R3 and R4.

[0052] The present embodiment can determine the fourth voltage according to the voltage value related to the second NPN tube and the third PNP tube, then determine the fourth voltage according to the voltage value related to the third NPN tube and the fourth PNP tube, determine the first voltage according to the two determined fourth voltages, and then calculate the reference voltage of the linear voltage regulator according to the voltage value related to the first NPN tube. The circuit structure corresponding to the calculation method of the reference voltage of the linear voltage regulator is relatively simple, and the output noise is low.

[0053] The second embodiment of the present application relates to a reference voltage generation method of a linear voltage regulator. The second embodiment is a detailed description of the whole first embodiment, and mainly describes the specific process of determining the output voltage of the linear voltage regulator according to the reference voltage of the linear voltage regulator.

[0054] The present embodiment refers to Figure 2 , which comprises the following steps and is described as follows:

[0055] Steps 201 to 207 are similar to steps 101 to 107 in the first embodiment, and steps 208 are not described again. The output voltage of the linear voltage regulator is determined according to the reference voltage of the linear voltage regulator.

[0056] Specifically, the output voltage of the linear voltage regulator is calculated according to the reference voltage of the linear voltage regulator by the following formula: ; wherein V OUT is the output voltage of the linear voltage regulator, V BG is the reference voltage of the linear voltage regulator, and the output voltage is equal to the reference voltage multiplied by a resistance factor according to the formula. These elements are temperature-independent constants.

[0057] The embodiment can bring the reference voltage of the linear voltage regulator into a specific formula, so that the output voltage of the linear voltage regulator can be obtained. Since the reference voltage and the resistance factor are both temperature-independent constants, only the resistance values of the first resistance and the second resistance need to be determined to obtain the output voltage of the linear voltage regulator.

[0058] The third embodiment of the present application relates to a reference voltage generation system of a linear voltage regulator, referring to Figure 3 , comprising:

[0059] The first determining module is configured to determine the voltage values related to the second NPN tube and the third PNP tube, wherein the related voltage values are the voltage values between the base and the emitter of the second NPN tube and the voltage values between the emitter and the base of the third PNP tube.

[0060] The second determining module is configured to determine the fourth voltage according to the voltage values related to the second NPN tube and the third PNP tube; determine the voltage values related to the third NPN tube and the fourth PNP tube, wherein the related voltage values are the voltage values between the base and the emitter of the third NPN tube and the voltage values between the emitter and the base of the fourth PNP tube.

[0061] The third determining module is configured to determine the fourth voltage according to the voltage values related to the third NPN tube and the fourth PNP tube; determine the first voltage according to the two determined fourth voltages; determine the voltage value related to the first NPN, wherein the related voltage value is the voltage value between the base and the emitter of the first NPN tube, and determine the reference voltage of the linear voltage regulator according to the first voltage and the voltage value related to the first NPN.

[0062] It can be found that the embodiment is a system embodiment corresponding to the first embodiment, and the embodiment can be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still valid in the embodiment. In order to reduce repetition, they will not be described here. Correspondingly, the related technical details mentioned in the embodiment can also be applied in the first embodiment.

[0063] It is worth mentioning that each module involved in the embodiment is a logical module. In actual application, a logical unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of the present application, units not closely related to solving the technical problems proposed in the present application are not introduced in the embodiment, but this does not mean that there are no other units in the embodiment.

[0064] The fourth embodiment of the present application relates to a reference voltage generating circuit of a linear voltage regulator, comprising a reference voltage generating unit, the reference voltage generating unit comprising: a first resistor, a second resistor, a first NPN transistor, a third resistor, a fourth resistor, a sixth PNP transistor, a second NPN transistor, a third PNP transistor, a seventh PNP transistor, a third NPN transistor and a fourth PNP transistor, the base of the first NPN transistor is connected with the collector of the first NPN transistor, the emitter of the sixth PNP transistor and the emitter of the seventh PNP transistor through the first resistor, the base of the first NPN transistor is connected with the input end of the using circuit of the linear voltage regulator through the first resistor, and the base of the first NPN transistor is grounded through the second resistor, the emitter of the first NPN transistor is connected with the base of the third PNP through the third resistor, and the emitter of the first NPN transistor is grounded through the third resistor and the fourth resistor;

[0065] The base of the sixth PNP transistor is connected with the base of the seventh PNP transistor, the collector of the sixth PNP transistor is connected with the collector of the second NPN transistor, the base of the second NPN transistor is connected with the base and the collector of the third NPN transistor, the emitter of the second NPN transistor is connected with the emitter of the third PNP transistor, the base of the third PNP transistor is grounded through the fourth resistor, the collector of the third PNP transistor is grounded, the collector of the seventh PNP transistor is connected with the collector of the third NPN transistor, the emitter of the third NPN transistor is connected with the emitter of the fourth PNP transistor, and the base and the collector of the fourth PNP transistor are grounded.

[0066] Specifically, the following selects the first resistor R1, the second resistor R2, the first NPN transistor N1, the third resistor R3, the fourth resistor R4, the sixth PNP transistor P6, the second NPN transistor N2, the third PNP transistor P3, the seventh PNP transistor P7, the third NPN transistor P3 and the fourth PNP transistor P4 as examples for description, in the circuit, the first resistor R1 and the second resistor R2 are voltage dividing resistors, the first NPN transistor N1 is a first-stage emitter follower, the third resistor R3 and the fourth resistor R4 are negative feedback resistors of the emitter follower. The second NPN transistor N2, the third NPN transistor N3 and the third PNP transistor P3, the fourth PNP transistor P4, the sixth PNP transistor P6 and the seventh PNP transistor P7 form a multiplier structure, the multiplier structure mainly has two functions, one is to generate a voltage proportional to temperature; the other is that the multiplier is also part of a feedback loop, and provides a certain gain for the loop, and the sixth PNP transistor P6 and the seventh PNP transistor P7 are a pair of current mirrors, the base voltage and the emitter voltage of the sixth PNP transistor P6 and the seventh PNP transistor P7 are equal, so the collector current I of the sixth PNP transistor P6 and the seventh PNP transistor P7 is the same, as shown in the following figure. Figure 7

[0067] ​The BIAS voltage generating unit is connected with the reference voltage generating unit, and comprises an eighth PNP tube, a ninth PNP tube, a fourth NPN tube, a fifth NPN tube, a fifth resistor, a second PNP tube, a first PNP tube, a first current source and a fifth PNP tube; the base of the eighth PNP tube is connected with the base and the collector of the ninth PNP tube; the collector of the eighth PNP tube is connected with the base of the sixth PNP tube and the seventh PNP tube; the emitter of the eighth PNP tube is connected with the collector of the first NPN tube, and the emitter of the eighth PNP tube is connected with the emitter of the ninth PNP tube; the collector of the ninth PNP tube is connected with the collector of the fourth NPN tube;

[0068] The base of the fourth NPN tube is connected with the collector of the sixth PNP tube; the emitter of the fourth NPN tube is connected with the collector and the base of the fifth NPN tube; the emitter of the fifth NPN tube is connected with the ground through the fifth resistor; the base and the emitter of the second PNP tube are connected with the collector of the first NPN tube; the collector of the second PNP tube is connected with the emitter and the base of the first PNP tube; the base of the first PNP tube is connected with the base of the fifth PNP tube; the collector of the first PNP tube is connected with the positive pole of the first current source; the negative pole of the first current source is connected with the ground; the collector of the fifth PNP tube is connected with the ground; the emitter of the fifth PNP tube is connected with the base of the sixth PNP tube and the seventh PNP tube;

[0069] Specifically, the eighth PNP tube P8, the ninth PNP tube P9, the fourth NPN tube N4, the fifth NPN tube N5, the fifth resistor R5, the second PNP tube P2, the first PNP tube P1, the first current source I1 and the fifth PNP tube P5 are taken as examples for description; the eighth PNP tube P8, the ninth PNP tube P9, the fourth NPN tube N4, the fifth NPN tube N5 and the fifth resistor R5 constitute a pull-up circuit, which is a negative feedback circuit, and the stable BIAS voltage is formed by means of the negative feedback; meanwhile, the pull-up circuit is also a key link of the BIAS voltage generating unit, and the pull-up circuit converts the feedback point of the multiplier into current output, wherein the feedback point is the base of the fourth PNP tube N4, and the current is the current flowing through the fifth NPN tube N5 and the fifth resistor R5; however, the pull-up circuit has a problem that the eighth PNP tube P8 has no bias current; therefore, the second PNP tube P2, the first PNP tube P1, the first current source I1 and the fifth PNP tube P5 constitute a pull-down circuit, which can provide the bias current for the eighth PNP tube P8; by observing the second PNP tube P2, the first PNP tube P1, the fifth PNP tube P5 and the sixth PNP tube P6, the voltage of the emitter and the base of each transistor can be expressed as follows according to the basic voltage law: ​; and bringing it into and then obtaining where I C is the collector current of each PNP transistor, I S is the short-circuit current of each transistor, and if the second PNP transistor P2, the first PNP transistor PI, the fifth PNP transistor P5 and the sixth PNP transistor P6 are of the same size, the above formula can be simplified as: where, because the sixth PNP transistor and the seventh PNP transistor are a pair of current mirrors, the base voltage and the emitter stage voltage of the sixth PNP transistor and the seventh PNP transistor are equal, and thus the collector current flowing out is the same, I, as shown in detail in Figure 8 .

[0070] The stabilizing unit is connected with the BIAS voltage generating unit, and the stabilizing unit comprises a tenth PNP transistor, a second current source, a ninth resistor, an eighth resistor, a seventh NPN transistor, a sixth NPN transistor, a sixth resistor and a seventh resistor. The base of the tenth PNP transistor is connected with the anode of the second current source and the emitter of the tenth PNP transistor through the ninth resistor, the base of the tenth PNP transistor is connected with the collector of the seventh NPN transistor through the eighth resistor, the emitter of the tenth PNP transistor is connected with the output end of the using circuit of the linear voltage stabilizer, the collector of the tenth PNP transistor is connected with the emitter of the ninth PNP transistor, the base of the seventh NPN transistor is connected with the negative electrode of the second current source and the collector of the sixth NPN transistor, the emitter of the seventh NPN transistor is grounded, the collector of the sixth NPN transistor is connected with the base of the sixth NPN transistor and the collector of the fifth NPN transistor through the seventh resistor, and the emitter of the sixth NPN transistor is grounded through the sixth resistor.

[0071] Specifically, the tenth PNP transistor P10, the second current source I2, the ninth resistor R9, the eighth resistor R8, the seventh NPN transistor N7, the sixth NPN transistor N6, the sixth resistor R6 and the seventh resistor R7 are taken as examples for description. The sixth NPN transistor N6, the sixth resistor R6 and the second current source I2 form a first output stage with an emitter negative feedback resistor, wherein the sixth resistor R6 is a negative feedback resistor, the seventh resistor R7 is a feedforward resistor, the seventh resistor R7 is used to reduce the gain and increase the bandwidth, so that the overall circuit is more stable, the seventh NPN transistor N7, the eighth resistor R8 and the ninth resistor R9 form a second common emitter output stage, which provides a certain gain and matches the feedback polarity of the entire circuit, and makes it a negative feedback, the tenth PNP transistor P10 is a power adjusting tube, and the tenth PNP transistor P10 is used to provide an output voltage and current. The principle of the adjustment of the output voltage by the tenth PNP transistor P10 is as follows: when the voltage value of the output voltage is higher than When the determined value is V1, V4 is increased, and the voltage of V3 is unchanged, thus the current of the third PNP transistor P3 and the second NPN transistor N2 is decreased, and the base voltage of the fourth NPN transistor N4 is increased, and the current of the fifth NPN transistor N5 and the sixth NPN transistor N6 is also increased, thus the voltage of BO1 is decreased, the voltage of BO2 is increased, and the output current of the tenth PNP transistor P10 is decreased, V OUT When the determined value is V1, V4 is increased, and the voltage of V3 is unchanged, thus the current of the third PNP transistor P3 and the second NPN transistor N2 is decreased, and the base voltage of the fourth NPN transistor N4 is increased, and the current of the fifth NPN transistor N5 and the sixth NPN transistor N6 is also increased, thus the voltage of BO1 is decreased, the voltage of BO2 is increased, and the output current of the tenth PNP transistor P10 is decreased, V OUT The increase of the voltage of V3 will be inhibited, thus the adjustment of the output voltage is realized, as shown in Figure 9

[0072] The embodiment integrates the reference voltage generating circuit as an inseparable part in the whole linear voltage regulator circuit, thus the whole circuit realizes excellent performance, because of the integrated design, the whole circuit has only a single feedback system, the circuit structure is simple and coordinated, thus the system response is excellent; and the number of devices is small, the noise source is small, and excellent noise characteristics can be realized; and the structure is very suitable for low-noise and high-speed transistor circuit design, and the double-collector process can maximize the advantages of the structure.

[0073] The fifth embodiment of the present application relates to a server, please refer to Figure 4 , comprising:

[0074] at least one processor; and a memory connected with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the reference voltage generating method of the linear voltage regulator as above.

[0075] The memory and the processor are connected in a bus mode, the bus can include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripheral devices, voltage regulators and power management circuits, which are well known in the art, and thus will not be further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, which provide units for communicating with various other devices on the transmission medium. The data processed by the processor is transmitted on the wireless medium through the antenna, and further, the antenna also receives data and transmits the data to the processor.

[0076] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interface, voltage regulation, power management and other control functions. And the memory can be used to store the data used by the processor in the execution of the operation.

[0077] ​The sixth embodiment of the present application relates to a computer readable storage medium storing a computer program, which, when executed by a processor, implements the above-mentioned method embodiment.

[0078] That is, a person skilled in the art can understand that all or part of the steps in the above-mentioned method embodiments can be completed by instructing relevant hardware through a program stored in a storage medium, including a plurality of instructions for causing a device (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the various embodiments of the method of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0079] In summary, the present application determines the fourth voltage according to the voltage values related to the second NPN tube and the third PNP tube, then determines the fourth voltage according to the voltage values related to the third NPN tube and the fourth PNP tube, determines the first voltage according to the two determined fourth voltages, and then determines the reference voltage of the linear voltage stabilizer according to the voltage value related to the first NPN. The circuit structure corresponding to the calculation method of the reference voltage of the linear voltage stabilizer is relatively simple, the output noise is relatively low, and the reference voltage generating circuit is integrated as an inseparable part in the entire linear voltage stabilizer circuit, so that the entire circuit achieves excellent performance. Because it is an integrated design, the entire circuit has only a single feedback system, the circuit structure is simple and coordinated, so the system response is excellent; the number of devices is small, the noise source is small, and good noise characteristics can be achieved; and this structure is very suitable for low-noise, high-speed transistor circuit design, and the dual-collector process can maximize its advantages through this structure. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has high industrial utilization value.

[0080] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical thought of the present application should be covered by the claims of the present application.

Claims

1. A reference voltage generating circuit of a linear voltage regulator, characterized by: The reference voltage generating unit comprises a first resistor, a second resistor, a first NPN transistor, a third resistor, a fourth resistor, a sixth PNP transistor, a second NPN transistor, a third PNP transistor, a seventh PNP transistor, a third NPN transistor and a fourth PNP transistor. The base of the first NPN transistor is connected to the collector of the first NPN transistor, the emitter of the sixth PNP transistor and the emitter of the seventh PNP transistor through the first resistor, and is connected to the input end of the use circuit of the linear voltage stabilizer through the first resistor, and is grounded through the second resistor, the emitter of the first NPN transistor is connected to the base of the third PNP through the third resistor, and is grounded through the third resistor and the fourth resistor, the base of the sixth PNP transistor is connected to the base of the seventh PNP transistor, and the collector of the sixth PNP transistor is connected to the collector of the second NPN transistor. The base and the collector of the second NPN transistor are connected to the base and the collector of the third NPN transistor, the emitter of the second NPN transistor is connected to the emitter of the third PNP transistor, the base of the third PNP transistor is grounded through the fourth resistor, the collector of the third PNP transistor is grounded, the collector of the seventh PNP transistor is connected to the collector of the third NPN transistor, the emitter of the third NPN transistor is connected to the emitter of the fourth PNP transistor, and the base and the collector of the fourth PNP transistor are grounded. The BIAS voltage generating unit is connected to the reference voltage generating unit, and comprises an eighth PNP transistor, a ninth PNP transistor, a fourth NPN transistor, a fifth NPN transistor, a fifth resistor, a second PNP transistor, a first PNP transistor, a first current source and a fifth PNP transistor. The base of the eighth PNP transistor is connected to the base and the collector of the ninth PNP transistor, the collector of the eighth PNP transistor is connected to the base of the sixth PNP transistor and the base of the seventh PNP transistor, the emitter of the eighth PNP transistor is connected to the collector of the first NPN transistor, and the emitter of the eighth PNP transistor is connected to the emitter of the ninth PNP transistor, the collector of the ninth PNP transistor is connected to the collector of the fourth NPN transistor, the base of the fourth NPN transistor is connected to the collector of the sixth PNP transistor, the emitter of the fourth NPN transistor is connected to the collector and the base of the fifth NPN transistor, and the emitter of the fifth NPN transistor is grounded through the fifth resistor. The base and the emitter of the second PNP transistor are connected, and the base and the emitter of the second PNP transistor are connected to the collector of the first NPN transistor, the collector of the second PNP transistor is connected to the emitter and the base of the first PNP transistor, the base of the first PNP transistor is connected to the base of the fifth PNP transistor, the collector of the first PNP transistor is connected to the positive electrode of the first current source, the negative electrode of the first current source is grounded, the collector of the fifth PNP transistor is grounded, and the emitter of the fifth PNP transistor is connected to the base of the sixth PNP transistor and the base of the seventh PNP transistor. The stabilizing unit is connected with the BIAS voltage generating unit, and comprises a tenth PNP tube, a second current source, a ninth resistor, an eighth resistor, a seventh NPN tube, a sixth NPN tube, a sixth resistor and a seventh resistor; The base of the tenth PNP tube is connected with the anode of the second current source and the emitter of the tenth PNP tube through the ninth resistor, the base of the tenth PNP tube is connected with the collector of the seventh NPN tube through the eighth resistor, the emitter of the tenth PNP tube is connected with the output end of the using circuit of the linear voltage stabilizer, and the collector of the tenth PNP tube is connected with the emitter of the ninth PNP tube; The base of the seventh NPN tube is connected with the cathode of the second current source and the collector of the sixth NPN tube, the emitter of the seventh NPN tube is grounded, the collector of the sixth NPN tube is connected with the base of the sixth NPN tube and the collector of the fifth NPN tube through the seventh resistor, and the emitter of the sixth NPN tube is grounded through the sixth resistor.

2. A reference voltage generating method of a reference voltage generating circuit based on the linear voltage regulator of claim 1, characterized by, The method comprises the following steps: determining a voltage value related to the second NPN tube and the third PNP tube, wherein the related voltage value is the voltage value between the base and the emitter of the second NPN tube and the voltage value between the emitter and the base of the third PNP tube; determining a fourth voltage according to the voltage value related to the second NPN tube and the third PNP tube; determining a voltage value related to the third NPN tube and the fourth PNP tube, wherein the related voltage value is the voltage value between the base and the emitter of the third NPN tube and the voltage value between the emitter and the base of the fourth PNP tube; determining a fourth voltage according to the voltage value related to the third NPN tube and the fourth PNP tube; determining a first voltage according to the two determined fourth voltages; determining a voltage value related to the first NPN tube, wherein the related voltage value is the voltage value between the base and the emitter of the first NPN tube; deriving a reference voltage of the linear voltage stabilizer according to the first voltage and the voltage value related to the first NPN tube.

3. The method of claim 2, wherein: After deriving the reference voltage of the linear voltage stabilizer according to the first voltage, the method comprises: determining an output voltage of the linear voltage stabilizer according to the reference voltage of the linear voltage stabilizer, wherein the output voltage of the linear voltage stabilizer is determined by the following formula: ； where V OUT is the output voltage of the linear regulator, V BG is the reference voltage of the linear regulator.

4. The method of claim 2, wherein: determining a fourth voltage according to the voltage value related to the second NPN tube and the third PNP tube, comprising: determining the fourth voltage by the following formula: ； wherein V1 is the base voltage of the third PNP transistor, V4 is the base voltage of the second NPN transistor and the third NPN transistor, V BE2 is the voltage value between the base and the emitter of the second NPN transistor, V EB3 is the voltage value between the emitter and the base of the third PNP transistor.

5. The method of claim 2, wherein: determining a fourth voltage according to the voltage value related to the third NPN tube and the fourth PNP tube, comprising: determining the fourth voltage by the following formula: ； wherein V BE3 is the voltage value between the base and the emitter of the third NPN transistor, V EB4 is the voltage value between the emitter and the base of the fourth PNP transistor.

6. The method of claim 2, wherein: determining a first voltage according to the two determined fourth voltages, comprising: determining the first voltage by the following formula: ； wherein VT is a voltage proportional to temperature, 26 mV at room temperature, I is the collector current of the sixth and seventh PNP transistors, I SBE3 is the short circuit current of the third NPN transistor, I SEB4 is the short circuit current of the fourth PNP transistor, I SBE2 is the short circuit current of the second NPN transistor, I SEB3 is the short circuit current of the third PNP transistor.

7. The method of claim 2, wherein: deriving a reference voltage of the linear voltage stabilizer according to the first voltage, comprising: deriving the reference voltage of the linear voltage stabilizer by the following formula: ； wherein V2 is the base voltage of the first NPN transistor, V BE1 is the voltage value between the base and the emitter of the first NPN transistor, and a reference voltage V BG is obtained by adjusting the resistance ratio of R3 and R4.

8. A reference voltage generating system of a linear voltage regulator, applied to the reference voltage generating circuit of the linear voltage regulator of claim 1, characterized by: comprising: a first determining module, configured to determine a voltage value related to the second NPN tube and the third PNP tube, wherein the related voltage value is the voltage value between the base and the emitter of the second NPN tube and the voltage value between the emitter and the base of the third PNP tube; a second determining module, configured to determine a fourth voltage according to a voltage value related to the second NPN tube and the third PNP tube; determine a voltage value related to the third NPN tube and the fourth PNP tube, wherein the related voltage value is a voltage value between the base and the emitter of the third NPN tube and a voltage value between the emitter and the base of the fourth PNP tube; a third determining module, configured to determine the fourth voltage according to a voltage value related to the third NPN tube and the fourth PNP tube; determine a first voltage according to the fourth voltage determined twice; determine a voltage value related to the first NPN, wherein the related voltage value is a voltage value between the base and the emitter of the first NPN tube, and derive a reference voltage of the linear voltage stabilizer according to the first voltage and the voltage value related to the first NPN.

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