Drive circuit, drive circuit control method, and storage medium

Abstract

The application provides a driving circuit, a driving circuit control method and a storage medium, the driving circuit control method is used for controlling a driving circuit of a display screen body; the driving circuit is electrically connected with the display screen body through a plurality of groups of data lines; the method comprises the following steps: supplying power to the plurality of groups of data lines in a preset order within a preset time period; wherein, during the process of supplying power to the plurality of groups of data lines, the starting time of the electrical connection between the data lines belonging to the same group and the driving power supply is the same, and the starting time of the electrical connection between the data lines belonging to different groups and the driving power supply is different. The driving circuit control method provided by the application improves the number of power supply times, reduces the number of data lines in each power supply, and in turn reduces the surge current amplitude generated by the electrical connection of each group of data lines and the power supply at the moment, so that a better display effect is obtained.

Description

Technical Field

[0001] This application relates to the field of power management technology, and more specifically, to a drive circuit, a drive circuit control method, and a storage medium. Background Technology

[0002] Inrush current refers to a peak current or overload current that is much larger than the steady-state current, generated at the moment the power is turned on or when a circuit malfunctions. Display devices generally include a display driver circuit and a display panel with multiple pixels. The display driver circuit is coupled to the pixels via multiple data lines and is used to drive the multiple pixels to emit light.

[0003] The existing power drive control method supplies power to multiple data lines simultaneously to drive multiple pixels to emit light. This can cause surge currents on the power lines, i.e. instantaneous high-order harmonic pulse spikes, which interfere with the display panel's display effect. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a driving circuit, a driving circuit control method, and a storage medium to solve the technical problem that existing power drive control methods can cause surge currents on the power lines, interfering with the display effect of the display panel.

[0005] In a first aspect, embodiments of this application provide a driving circuit control method for controlling a driving circuit of a display screen body; the driving circuit is electrically connected to the display screen body via multiple sets of data lines, including:

[0006] Within a preset time period, power is supplied to the multiple sets of data lines in a preset order;

[0007] During the process of supplying power to the multiple groups of data lines, the starting time of the electrical connection between the data lines belonging to the same group and the driving power supply is the same, while the starting time of the electrical connection between the data lines belonging to different groups and the driving power supply is different.

[0008] In the above implementation process, multiple groups of data lines are powered in a preset order within a preset time period. During the power supply of these multiple groups, the initiation time of the electrical connection between data lines belonging to the same group and the drive power supply is the same, while the initiation time of the electrical connection between data lines belonging to different groups and the drive power supply is different. By increasing the number of power supply cycles (from once to multiple times), the number of data lines powered each time is reduced, thereby reducing the surge current amplitude generated when each group of data lines is connected to the power supply. This reduces electromagnetic interference (EMI) caused by the surge current, resulting in better display performance. This solves the technical problem that "existing power drive control methods cause surge currents on the power lines, interfering with the display panel's display effect."

[0009] Furthermore, the prolonged and frequent presence of large pulse spikes can cause chronic damage to the display screen's driving circuit, easily leading to circuit failures and reducing chip lifespan. The driving circuit control method provided in this application, by increasing the number of power supply cycles (from once to multiple times) and reducing the number of data lines per power supply, thereby reducing the surge current amplitude generated at the moment each data line is connected to the power supply, avoids damage to the driving circuit caused by large-amplitude pulse spikes, improves circuit reliability, and extends chip lifespan.

[0010] Optionally, in this embodiment, the preset time period is the power-on phase of the display screen; the step of supplying power to the multiple sets of data lines in a preset order within the preset time period includes: supplying power to the multiple sets of data lines in a preset order within the power-on time period of the power-on phase.

[0011] In the above implementation process, by supplying power to multiple data lines in a preset sequence during the power-on period, and by increasing the number of power supply cycles (from once to multiple times), the number of data lines supplied each time is reduced. This reduces the surge current amplitude generated when each data line is connected to the power supply, thereby reducing EMI interference and achieving better display effects. This solves the technical problem that "existing power drive control methods cause surge currents on the power lines during the power-on phase, interfering with the display panel's display effect."

[0012] Optionally, in this embodiment, the preset time period is the pre-charging phase of the display screen; the step of supplying power to the multiple sets of data lines in a preset order within the preset time period includes: supplying power to the multiple sets of data lines in a preset order during the non-display period of the pre-charging phase; wherein, the first time difference between the start-up time of the first set of data lines and the start-up time of the last set of data lines is less than the second time difference between the non-display period and the reserved charging time, and the reserved charging time is the time required to charge to the target display voltage based on the pre-charging voltage.

[0013] In the above implementation process, by supplying power to multiple sets of data lines in a preset order during the non-display period of the pre-charging phase, and by increasing the number of power supply cycles (from once to multiple times) to reduce the number of data lines supplied each time, the surge current amplitude generated when each set of data lines is connected to the power supply is reduced, thereby reducing EMI interference and achieving a better display effect. This solves the technical problem in the pre-charging phase where "existing power drive control methods cause surge currents on the power lines, interfering with the display panel's display effect."

[0014] Optionally, in this embodiment, the power-on time intervals of two sets of data lines with adjacent power-on sequences are equal.

[0015] In the above implementation process, since the power-on time interval of two adjacent sets of data lines is equal, the operational complexity of the drive circuit control method provided in this application in controlling the actual drive circuit can be reduced. Furthermore, since the power-on time interval of two adjacent sets of data lines is equal, the "minimum power-on time interval" can be maximized within a preset time period, thereby avoiding mutual interference from the "inrush current generated when two adjacent sets of data lines are connected to the power supply," and ensuring the display effect of the display screen.

[0016] Optionally, in this embodiment, each of the data lines is connected to the driving power supply via a switching device; the step of supplying power to the multiple sets of data lines in a preset order within a preset time period includes: changing the switching control signal of the switching device to supply power to the multiple sets of data lines in a preset order within the preset time period.

[0017] In the above implementation process, since the switching device has high reliability and its connection and logic relationships are simple, by "changing the switching control signal of the switching device to power the multiple sets of data lines in a preset order within the preset time period", the reliability of controlling the actual driving circuit can be improved while reducing the operational complexity of controlling the actual driving circuit.

[0018] Secondly, embodiments of this application also provide a driving circuit, which is electrically connected to the display screen via multiple sets of data lines; the driving circuit includes: multiple controllers and a driving power supply;

[0019] The driving power supply is electrically connected to one end of each of the data lines through multiple controllers, and the other end of each data line is electrically connected to the display screen body; wherein, the controllers are configured to control the driving power supply to supply power to the multiple sets of data lines in a preset order within a preset time period based on their control signals.

[0020] In the above implementation process, by supplying power to multiple sets of data lines in a preset order within a preset time period, the number of power supply cycles is increased (from once to multiple times), and the number of data lines supplied each time is reduced. This reduces the surge current amplitude generated when each set of data lines is connected to the power supply, reduces EMI interference caused by surge current, and achieves better display effect.

[0021] Optionally, in this embodiment, the control device includes a first switching device and a second switching device; the driving power supply includes a first driving power supply and a second driving power supply, and the driving circuit further includes a selection device; the first driving power supply is electrically connected to the input terminal of the selection device through multiple first switching devices, the second driving power supply is electrically connected to the input terminal of the selection device through multiple second switching devices, and the output terminal of the selection device is electrically connected to one end of the data line; the selection device is configured to select the first driving power supply to supply power to the multiple groups of data lines in a preset order during the power-on period of the power-on phase; and / or the selection device is configured to select the second driving power supply to supply power to the multiple groups of data lines in a preset order during the non-display period of the pre-charging phase; wherein, the first time difference between the start time of the first group of data lines and the start time of the last group of data lines is less than the second time difference between the non-display period and the reserved charging time, and the reserved charging time is the time required to charge or discharge to the target display voltage based on the pre-charging voltage.

[0022] In the above implementation process, by supplying power to multiple data lines in a preset order during the power-on period of the power-on phase or during the non-display period of the pre-charging phase, and by increasing the number of power supply cycles (from once to multiple times) and reducing the number of data lines supplied each time, the surge current amplitude generated at the moment each data line is connected to the power supply can be reduced, thereby reducing EMI interference and achieving a better display effect.

[0023] Optionally, in embodiments of this application, the control device includes an N-MOS transistor and / or a P-MOS transistor.

[0024] Optionally, in the embodiments of this application, the driving power supply is an analog positive power supply, a display analog power supply, or a display digital power supply.

[0025] Thirdly, embodiments of this application also provide a computer-readable storage medium storing computer program instructions, which, when executed by a processor, perform the drive circuit control method as described in the first aspect above.

[0026] By employing the driving circuit, driving circuit control method, and storage medium provided in this application, the number of power supply cycles is increased while the number of data lines per power supply is reduced, thereby lowering the surge current amplitude generated at the moment each group of data lines is connected to the power supply, resulting in better display performance. This solves the technical problem that "existing power drive control methods cause surge currents on the power lines, interfering with the display panel's display effect." Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 A schematic flowchart of a drive circuit control method provided in an embodiment of this application;

[0029] Figure 2 A time-division scanning diagram of a single frame display provided in an embodiment of this application;

[0030] Figure 3 This is a schematic diagram of a driving circuit provided in an embodiment of this application;

[0031] Figure 4 This is a schematic diagram of another driving circuit provided in an embodiment of this application;

[0032] Figure 5 This is a waveform diagram of a control signal provided in an embodiment of this application. Detailed Implementation

[0033] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this application.

[0035] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0036] Please see Figure 1 The illustration shows a flowchart of a driving circuit control method provided in an embodiment of this application. This driving circuit control method is used to control the driving circuit of a display screen; the driving circuit is electrically connected to the display screen via multiple sets of data lines, and the driving circuit control method may include the following steps:

[0037] Step 101: Within a preset time period, power is supplied to the multiple sets of data lines in a preset order;

[0038] During the process of supplying power to the multiple groups of data lines, the starting time of the electrical connection between the data lines belonging to the same group and the driving power supply is the same, while the starting time of the electrical connection between the data lines belonging to different groups and the driving power supply is different.

[0039] In step 101, the preset time period can be located during the power-on phase of the display screen or during the pre-charging phase of the display phase. Multiple data lines can be pre-grouped to obtain the grouping information; alternatively, stored data lines can be directly retrieved from the storage module. The grouping of data lines can be determined based on the amplitude of the pulse spikes generated when multiple data lines are powered simultaneously, and the parameters of the client display screen, to ensure that the pulse signals generated when the grouped data lines are powered separately do not affect the display effect. Multiple data lines can be grouped using uniform grouping, odd-even grouping, or staggered grouping. Specifically, taking odd-even grouping as an example, the data lines can be numbered according to their arrangement, including the 1st data line, the 2nd data line, ..., and the nth data line. Then, the 1st, 3rd, 5th... data lines can be divided into one or more groups, and the 2nd, 4th, 6th... data lines can be divided into one or more groups. In practical applications, the data lines may not be numbered; the numbering here is only for illustrative purposes. The number of data lines in different groups can be the same or different. The preset sequence includes the power supply order for each group of data lines, and power is supplied according to the power supply order of each group of data lines. This application does not specify a particular power supply order for each group of data lines.

[0040] Taking multiple sets of data lines, including a first set, a second set, and a third set, as an example, power can be supplied to the first set of data lines at the first startup time, then to the second set at the second startup time, and finally to the third set at the third startup time; alternatively, power can be supplied to the second set of data lines at the first startup time, then to the first set at the second startup time, and finally to the third set at the third startup time. The startup time of the electrical connection between each set of data lines and the drive power supply is within a preset time period; that is, the first, second, and third startup times are all within the preset time period, and the first, second, and third startup times are all different. The drive power supply can be an analog positive power supply (AVDD), a display analog power supply (VCI), or a display digital power supply (VDDI).

[0041] Therefore, the driving circuit control method provided in this application embodiment supplies power to multiple groups of data lines in a preset order within a preset time period. During the power supply process, the start-up time for the electrical connection between data lines belonging to the same group and the driving power supply is the same, while the start-up time for the electrical connection between data lines belonging to different groups and the driving power supply is different. By increasing the number of power supply cycles (from once to multiple times) and reducing the number of data lines supplied each time, the surge current amplitude generated at the moment each group of data lines is connected to the power supply is reduced, resulting in a better display effect. This solves the technical problem that "existing power drive control methods cause surge currents on the power lines, interfering with the display effect of the display panel."

[0042] In some optional embodiments, the above-mentioned preset time period is the power-on stage of the display screen; step 101, powering the multiple sets of data lines in a preset order within the preset time period, includes: step 1011, powering the multiple sets of data lines in a preset order within the power-on time period of the power-on stage.

[0043] The display process of the screen can be divided into three stages: power-on stage, display preparation stage, and display stage. The power-on stage refers to the period from when the screen is connected to power until the display system can operate stably. The display preparation stage displays a black screen and refers to the preparation phase after power-on but before receiving display data. The display stage refers to the stage after receiving display data and displaying the image based on that data.

[0044] In some optional embodiments, the aforementioned preset time period is the pre-charging phase of the display screen; step 101, supplying power to the multiple sets of data lines in a preset order within the preset time period, includes: step 1012, supplying power to the multiple sets of data lines in a preset order within the non-display time period of the pre-charging phase; wherein, the first time difference between the start-up time of the first set of data lines and the start-up time of the last set of data lines is less than the second time difference between the non-display time period and the reserved charging time, and the reserved charging time is the time required to charge or discharge to the target display voltage based on the pre-charging voltage.

[0045] Pre-charging refers to the process of pre-charging the pixels during the display phase before they are actually charged. Please refer to [link / reference]. Figure 2 , Figure 2This is a time-division scanning diagram of a single-frame display provided in an embodiment of this application. The display of the entire screen (display body) is achieved through time-division scanning, with only one line displayed at a time. The display time for each line scan is called the line display time, and the line non-display time refers to the non-display time for each line scan (the difference between the line scan time and the line display time). Taking a target display voltage of 5V as an example, the pre-charge voltage can be 3V or 6V. If the pre-charge voltage is 3V, the reserved charging time is the time required to charge from 3V to 5V; if the pre-charge voltage is 6V, the reserved charging time is the time required to discharge from 6V to 5V.

[0046] In some optional embodiments, the power-on time intervals of two adjacent sets of data lines are equal.

[0047] Since the surge current amplitude generated when each set of data lines is connected to the power supply has a certain duration, by setting the power-on time interval of two sets of data lines with adjacent power-on sequences to be equal, the "minimum power-on time interval" can be maximized within the preset time period, thereby avoiding the mutual influence of the "surge current generated when two sets of data lines with adjacent power-on sequences are connected to the power supply", thus ensuring the display effect of the display screen.

[0048] In some optional embodiments, each of the data lines is connected to the driving power supply via a switching device; step 101, supplying power to the multiple sets of data lines in a preset order within a preset time period, includes: changing the switching control signal of the switching device to supply power to the multiple sets of data lines in a preset order within the preset time period.

[0049] The switching devices can be P-MOS transistors or N-MOS transistors. The switching control signals of the same group of data lines can be changed simultaneously to control the same group of data lines to simultaneously establish electrical connections with the drive power supply, ensuring that the electrical connection start-up time of the same group of data lines is the same. The changing time of the switching control signals for different groups of data lines is different.

[0050] Please refer to Figure 3 , Figure 3 This is a schematic diagram of the structure of a driving circuit 10 provided in an embodiment of this application. Figure 3 The diagram shows the electrical connection between each set of data lines 103 and the drive power supply 102 via the same controller 101. The drive circuit 10 is electrically connected to the display screen 20 via multiple sets of data lines 103; the drive circuit 10 includes multiple controllers 101 and a drive power supply 102.

[0051] The driving power supply 102 is electrically connected to one end of each of the data lines through multiple controllers 101, and the other end of the data lines is electrically connected to the display screen body 20; wherein, the controllers 101 are configured to control the driving power supply 102 to supply power to the multiple sets of data lines 103 in a preset order within a preset time period based on their control signals.

[0052] The controller 101 can be a switching device, such as a P-MOS transistor and / or an N-MOS transistor. The drive power supply 102 can be an analog positive power supply, a display analog power supply, or a display digital power supply, etc. The number of controllers 101 can be equal to the number of data lines, with each data line electrically connected to the drive power supply 102 through one controller 101; the number of controllers 101 can also be equal to the number of multiple sets of data lines 103, with each set of data lines 103 electrically connected to the drive power supply 102 through the same controller 101.

[0053] Please refer to Figure 4 , Figure 4 This is a schematic diagram of another driving circuit 20 provided in an embodiment of this application. X1 represents the control signal of the first switching device 1011, Y1 represents the control signal of the second switching device 1012, GND is the ground symbol, and OP represents an operational amplifier.

[0054] In some optional embodiments, the control device 101 includes a first switching device 1011 and a second switching device 1012; the drive power supply 102 includes a first drive power supply 1021 and a second drive power supply 1022; the drive circuit 20 further includes a selection device 104; the first drive power supply 1021 is electrically connected to the input terminals of the selection device 104 through multiple first switching devices 1011, the second drive power supply 1022 is electrically connected to the input terminals of the selection device 104 through multiple second switching devices 1012, and the output terminal of the selection device 104 is electrically connected to one end of the data line; the selection device... The device is configured to select a first driving power supply 1021 to supply power to multiple data lines 103 in a preset order during the power-on period of the power-on phase; and / or the selection device 104 is configured to select a second driving power supply 1021 to supply power to multiple data lines 103 in a preset order during the non-display period of the pre-charging phase; wherein the first time difference between the start-up time of the first data line and the start-up time of the last data line is less than the second time difference between the non-display period and the reserved charging time, and the reserved charging time is the time required to charge to the target display voltage based on the pre-charging voltage.

[0055] The first switching device 1011 and the second switching device 1012 can be implemented by N-MOS transistors and / or P-MOS transistors. The first driving power supply 1021 and the second driving power supply 1022 can be implemented by analog positive power supply, display analog power supply or display digital power supply. Figure 4 The first drive power supply 1021 and the second drive power supply 1022 shown are both analog positive power supplies AVDD. The selection device 104 can be implemented by a multiplexer. The control device controlled by the same control signal can be implemented by one switching device or by multiple switching devices, such as... Figure 4 The control signal for both first switching devices 1011 shown is X1. The two first switching devices 1011 can be implemented using one MOSFET or two MOSFETs. The amplification module can be implemented using one operational amplifier or multiple operational amplifiers. Figure 4 The diagram shows an amplification module implemented by two operational amplifiers.

[0056] Please refer to Figure 5 , Figure 5 This is a waveform diagram of a control signal provided in an embodiment of this application. Wherein, Figure 5 The control signal waveform diagram shown corresponds to the situation where each group of data lines 103 is electrically connected to the drive power supply 102 through the same control device 101. Taking n groups of data lines as an example, specifically, there are n control devices. The first group of data lines is electrically connected to the drive power supply through the first control device, where X1 represents the control signal of the first control device. The second group of data lines is electrically connected to the drive power supply through the second control device, where X2 represents the control signal of the second control device. The nth group of data lines is electrically connected to the drive power supply through the nth control device, where Xn represents the control signal of the nth control device. Figure 5 As shown, t1 represents the power-on time interval between the first and second sets of data lines, t2 represents the power-on time interval between the second and third sets of data lines, and t0 represents the first time difference between the power-on time of the first set of data lines and the power-on time of the last set of data lines. t1 and t2 can represent different time intervals; preferably, the time intervals represented by t1 and t2 are equal.

[0057] In some alternative embodiments, the control device described above includes an N-MOS transistor and / or a P-MOS transistor.

[0058] In some alternative embodiments, the aforementioned driving power supply is an analog positive power supply, a display analog power supply, or a display digital power supply.

[0059] It should be understood that the driving circuit corresponds to the embodiment of the driving circuit control method described above. The specific function of the driving circuit can be found in the detailed description of the driving circuit control method above. To avoid repetition, the detailed description is omitted here.

[0060] This application also provides a computer-readable storage medium storing computer program instructions, which are executed by a processor to perform the above-described drive circuit-controlled discharge method.

[0061] The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0062] It should be understood that the disclosed circuit structures and methods can also be implemented in other ways, as provided in the embodiments of this application. The circuit structure embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the architecture, functions, and operations of possible implementations of circuit structures, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, program segment, or part of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0063] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0064] The above description is only an optional implementation of the embodiments of this application, but the protection scope of the embodiments of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the embodiments of this application should be covered within the protection scope of the embodiments of this application.

Claims

1. A drive circuit control method characterized by, The method is used for controlling a driving circuit of a display screen body; The driving circuit is electrically connected with the display screen body through a plurality of groups of data lines; the method comprises: supplying power to the plurality of groups of data lines in a preset order within a preset time period; wherein, during the process of supplying power to the plurality of groups of data lines, the starting time of the electrical connection between the data lines belonging to the same group and the driving power supply is the same, and the starting time of the electrical connection between the data lines belonging to different groups and the driving power supply is different; wherein, the preset time period is a pre-charge phase of the display screen body; the supplying power to the plurality of groups of data lines in a preset order within a preset time period comprises: supplying power to the plurality of groups of data lines in a preset order within a row non-display time period of the pre-charge phase; wherein, the first time difference between the starting time of the first group of data lines and the starting time of the last group of data lines is less than the second time difference between the row non-display time period and the reserved charging time, and the reserved charging time is the time required for charging from the pre-charge voltage to the target display voltage.

2. The method of claim 1, wherein, wherein, the preset time period is a power-on phase of the display screen body; the supplying power to the plurality of groups of data lines in a preset order within a preset time period comprises: supplying power to the plurality of groups of data lines in a preset order within a power-on time period of the power-on phase.

3. The method according to claim 1 or 2, characterized in that, wherein, the power-on time interval of two groups of data lines adjacent in the power-on order is equal.

4. The method of claim 1, wherein, wherein, each of the data lines is connected with the driving power supply through a switching device; the supplying power to the plurality of groups of data lines in a preset order within a preset time period comprises: changing the switching control signal of the switching device to supply power to the plurality of groups of data lines in a preset order within the preset time period.

5. A drive circuit, characterized by The driving circuit is electrically connected with the display screen body through a plurality of groups of data lines; the driving circuit comprises a plurality of control devices and a driving power supply; the driving power supply is electrically connected with each of the data lines through a plurality of control devices, and the other end of the data line is electrically connected with the display screen body; wherein, the control device is configured to control the driving power supply to supply power to the plurality of groups of data lines in a preset order within a preset time period based on its control signal; wherein, the control device comprises a first switching device and a second switching device; the driving power supply comprises a first driving power supply and a second driving power supply, and the driving circuit further comprises a selection device; the first driving power supply is electrically connected with the input end of the selection device through a plurality of first switching devices, the second driving power supply is electrically connected with the input end of the selection device through a plurality of second switching devices, and the output end of the selection device is electrically connected with one end of the data line; the selection device is configured to select the first driving power supply to supply power to the plurality of groups of data lines in a preset order within a power-on time period of the power-on phase; and / or The selection device is configured to select the second driving power supply to supply power to the multiple groups of data lines in a preset order during a row non-display period in a pre-charge phase; wherein a first time difference between a starting time of a first group of data lines and a starting time of a last group of data lines is less than a second time difference between the row non-display period and a reserved charging time, and the reserved charging time is a time required for charging or discharging based on a pre-charge voltage to a target display voltage.

6. The drive circuit according to claim 5, characterized in that In the method, The control device comprises an N-MOS tube and / or a P-MOS tube.

7. The drive circuit according to claim 5, characterized by In the method, The driving power supply is an analog positive power supply, a display analog power supply, or a display digital power supply.

8. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer program instructions, and the computer program instructions are run by a processor to execute the method in any one of claims 1-4.

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