Transmit circuit of controller area network (CAN) transceiver and CAN transceiver

Abstract

The application relates to a transmitting circuit of a controller area network (CAN) transceiver and the CAN transceiver. The transmitting circuit comprises a sampling module, a common-mode detection module, a differential-mode detection module and a driving module. The common-mode detection module generates a first current signal or a second current signal according to a signal sampled by the sampling module. The differential-mode detection module generates a first voltage signal according to the signal sampled by the sampling module. The driving module generates two differential voltage signals, reduces common-mode interference in the differential voltage signals through the first current signal or the second current signal, and reduces differential-mode interference in the differential voltage signals through the first voltage signal. According to the transmitting circuit of the application, common-mode interference and differential-mode interference can be effectively suppressed, a differential signal with higher accuracy can be output, and when the transmitting circuit is applied to the CAN transceiver, the anti-interference capability of the transceiver can be improved on the premise of controlling the cost.

Description

Technical Field

[0001] The present application relates to the field of automobile technology, and in particular to a transmitting circuit of a controller area network (CAN) transceiver and a CAN transceiver. Background Art

[0002] The rapid development of automotive electronics and the increasing number of onboard electronic and electrical devices have made the automotive electromagnetic environment increasingly complex and interference issues increasingly prominent. The electromagnetic compatibility (EMC) of these devices directly impacts vehicle reliability, and poor EMC can even affect driving safety. Consequently, the automotive industry is placing increasing emphasis on EMC.

[0003] Electromagnetic compatibility (EMC) is generally characterized through EMC testing. EMC testing involves a comprehensive assessment of the electromagnetic interference (EMI) and electromagnetic susceptibility (EMS) of electrical and electronic equipment. EMS also refers to the ability to resist external electromagnetic interference. The Controller Area Network (CAN) bus, an essential bus solution for automobiles, is a serial communication network that effectively supports distributed or real-time control. It features robust anti-interference and error correction mechanisms. Practice has shown that a vehicle's electromagnetic susceptibility is largely determined by the CAN nodes, CAN bus materials, and CAN transceiver characteristics. The CAN transceiver is the interface between the CAN node and the CAN bus, making it a key determinant of electromagnetic susceptibility. Currently, CANs are widely used in industries such as new energy vehicles, rail transit, healthcare, coal mining, and motor drives. These applications are subject to significant electromagnetic interference, placing high demands on the CAN transceiver's interference resistance.

[0004] Therefore, under the premise of controlling costs, improving the anti-interference capability of the CAN transceiver so that when the CAN transceiver is used as a transmitter, it can effectively suppress common-mode interference and differential-mode interference and output a higher-accuracy differential signal to the CAN bus is a topic of concern in the automotive industry. Summary of the Invention

[0005] In view of this, the present application proposes a transmitting circuit for a Controller Area Network (CAN) transceiver and a CAN transceiver. The transmitting circuit for a Controller Area Network (CAN) transceiver according to embodiments of the present application can effectively suppress common-mode interference and differential-mode interference, outputting a highly accurate differential signal to the CAN bus. When the transmitting circuit is applied to a CAN transceiver, the anti-interference capability of the transceiver can be improved while controlling costs.

[0006] In a first aspect, an embodiment of the present application provides a transmitting circuit of a controller area network (CAN) transceiver, comprising: a sampling module for sampling two differential voltage signals output by a driving module to generate a first sampling signal and a second sampling signal, respectively; a common mode detection module for generating a first current signal or a second current signal based on the first sampling signal and the second sampling signal, wherein the first current signal indicates that there is common mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be larger, and the second current signal indicates that there is common mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be smaller; a differential mode detection module for generating a first current signal or a second current signal based on the first sampling signal and the second sampling signal. a sampling signal to generate a first voltage signal, wherein the first voltage signal indicates that there is differential-mode interference in the first sampling signal and the second sampling signal that causes the voltage difference to be larger or smaller; and a driving module including a voltage-controlled current source, a first mirror current source, and a second mirror current source, configured to drive the first mirror current source and the second mirror current source according to the current of the voltage-controlled current source to output the two differential voltage signals to the CAN bus, and control the first mirror current source or the second mirror current source by the first current signal or the second current signal to reduce common-mode interference in the differential voltage signal, and control the voltage-controlled current source by the first voltage signal to reduce differential-mode interference in the differential voltage signal.

[0007] According to the transmitting circuit of the embodiment of the present application, the sampling module samples the differential voltage signal output by the driving module to generate a first sampling signal and a second sampling signal, so that when the differential voltage signal output by the driving module is affected by the environment and there is common-mode interference and / or differential-mode interference, the common-mode interference and / or differential-mode interference can be obtained in the first sampling signal and the second sampling signal; the common-mode detection module can determine whether the voltage values ​​of the first sampling signal and the second sampling signal are too large or too small based on the first sampling signal and the second sampling signal, so that the transmitting circuit can identify the common-mode interference and respond to it, and generate a first current signal or a second current signal; the differential-mode detection module can determine whether the voltage difference between the first sampling signal and the second sampling signal is too large or too small based on the first sampling signal and the second sampling signal, so that The transmitting circuit is capable of identifying differential-mode interference and responding to it, generating a first voltage signal; the driving module drives the first mirror current source and the second mirror current source according to the current of the voltage-controlled current source to output the two differential signals to the CAN, so that the differential voltage signal can be output to the CAN bus, and the driving module controls the first mirror current source or the second mirror current source through the first current signal or the second current signal to reduce common-mode interference in the differential voltage signal, and controls the voltage-controlled current source through the first voltage signal to reduce differential-mode interference in the differential voltage signal, so that the common-mode interference and / or differential-mode interference in the output differential voltage signal can be suppressed, thereby improving the accuracy of the differential voltage signal output by the transmitting circuit to the CAN bus.

[0008] According to the first aspect, in a first possible implementation of the transmitting circuit, the common-mode detection module includes a first detection submodule and a second detection submodule, the first detection submodule includes a first comparison module and a first current generation module, the first comparison module receives the first sampling signal, compares the voltage value of the first sampling signal with the voltage value of a first reference voltage to obtain a first comparison signal, and the first current generation module generates the first current signal based on the first comparison signal; the second detection submodule includes a second comparison module and a second current generation module, the second comparison module receives the second sampling signal, compares the voltage value of the second sampling signal with the voltage value of a second reference voltage to obtain a second comparison signal, and the second current generation module generates the second current signal based on the second comparison signal.

[0009] In this way, a first current signal or a second current signal is generated based on the comparison result of the first sampling signal and the second sampling signal with the reference voltage, thereby affecting the final output of the driving module. When common-mode interference appears in the first sampling signal and the second sampling signal, one of the first detection submodule and the second detection submodule in the common-mode detection module can generate a current signal for reducing the common-mode interference in the differential voltage signal, so that the driving module can respond to the current signal from the first detection submodule or the second detection submodule and reduce the common-mode interference in the differential voltage signal.

[0010] According to a first possible implementation manner of the first aspect, in a second possible implementation manner of the transmitting circuit, the first current generating module includes a first field effect transistor, the gate of the first field effect transistor receives the first comparison signal, the source of the first field effect transistor is connected to the power supply voltage, and the drain serves as the third terminal of the common mode detection module. When the first comparison signal turns on the first field effect transistor, the drain of the first field effect transistor generates the first current signal, and when the first field effect transistor is not turned on, no current signal is generated; the second current generating module includes a second field effect transistor, the gate of the second field effect transistor receives the second comparison signal, the source of the second field effect transistor is connected to ground, and the drain serves as the fourth terminal of the common mode detection module. When the second comparison signal turns on the second field effect transistor, the drain of the second field effect transistor generates the second current signal, and when the second field effect transistor is not turned on, no current signal is generated.

[0011] In this way, in the common-mode detection module, the first current generation module and the second current generation module can receive the first comparison signal and the second comparison signal and generate a first current signal or a second current signal, so that the driving module can respond according to the first current signal or the second current signal and output a differential voltage signal that reduces common-mode interference.

[0012] According to the first or second possible implementation manner of the first aspect, in a third possible implementation manner of the transmitting circuit, the first comparison module includes a first switch, a second switch and a first comparator, one end of the first switch serves as the first end of the common-mode detection module, receives the first sampling signal, and the other end is connected to the other end of the second switch and the first input end of the first comparator; one end of the second switch is connected to a third reference voltage; the second input end of the first comparator is connected to the first reference voltage, and the output end outputs the first comparison signal; the second comparison module includes a third switch, a fourth switch, and a second comparator, one end of the third switch serves as the second end of the common-mode detection module, receives the second sampling signal, and the other end is connected to the other end of the fourth switch and the first input end of the second comparator; one end of the fourth switch is connected to a fourth reference voltage; the second input end of the second comparator is connected to the second reference voltage, and the output end outputs the second comparison signal.

[0013] In this way, a first current signal or a second current signal is generated based on the comparison result of the first sampling signal and the second sampling signal with the reference voltage, thereby affecting the final output of the driving module. When common-mode interference appears in the first sampling signal and the second sampling signal, one of the first detection submodule and the second detection submodule in the common-mode detection module can generate a current signal for reducing the common-mode interference in the differential voltage signal, so that the driving module can respond to the current signal from the first detection submodule or the second detection submodule and reduce the common-mode interference in the differential voltage signal.

[0014] According to a third possible implementation manner of the first aspect, in a fourth possible implementation manner of the transmitting circuit, when a control signal from a microcontroller causes the first switch to be closed and the second switch to be opened, the first sampling signal is input to the first comparator, so that the first comparator can output the first comparison signal; when a control signal from the microcontroller causes the third switch to be closed and the fourth switch to be opened, the second sampling signal is input to the second comparator, so that the second comparator can output the second comparison signal.

[0015] In this way, by controlling the closing and opening of the switch, the first comparison module and the second comparison module can respond to the first sampling signal and the second sampling signal to output the first comparison signal and the second comparison signal, so that the common-mode detection module can output the first current signal or the second current signal according to the first comparison signal and the second comparison signal. Further, when the first current signal or the second current signal acts on the driving module, the driving module can output a differential voltage signal that reduces common-mode interference.

[0016] According to any possible implementation manner of the first aspect above, in a fifth possible implementation manner of the transmitting circuit, the first detection submodule generates the first current signal when the first sampling signal is relatively large, and the second detection submodule does not generate the second current signal when the second sampling signal is relatively large; the first detection submodule does not generate the first current signal when the first sampling signal is relatively small, and the second detection submodule generates the second current signal when the second sampling signal is relatively small.

[0017] Thus, when the first current signal is generated but the second current signal is not, it indicates that common-mode interference caused by positive voltage jitter exists in the first sampling signal and the second sampling signal. When the second current signal is generated but the first current signal is not, it indicates that common-mode interference caused by negative voltage jitter exists in the first sampling signal and the second sampling signal. In this way, the common-mode detection module can determine whether common-mode interference exists in the differential voltage signal and confirm the type of common-mode interference.

[0018] According to the first aspect, or any possible implementation of the first aspect above, in a sixth possible implementation of the transmitting circuit, the differential mode detection module includes a sampling amplifier and an error amplifier, the first input end of the sampling amplifier serves as the first end of the differential mode detection module, receiving the first sampling signal, the second input end serves as the second end of the differential mode detection module, receiving the second sampling signal, and the output end is connected to the first input end of the error amplifier; the second input end of the error amplifier is connected to a fifth reference voltage, and the output end serves as the third end of the differential mode detection module, outputting the first voltage signal.

[0019] In this way, the differential mode detection module can respond to the first sampling signal and the second sampling signal to output the first voltage signal, so that the driving module can respond according to the first voltage signal and output a differential voltage signal that reduces differential mode interference.

[0020] According to a sixth possible implementation manner of the first aspect, in a seventh possible implementation manner of the transmitting circuit, the differential mode detection module is configured to, when a voltage difference between the first sampling signal and the second sampling signal is relatively large, reduce a voltage value of the first voltage signal; and when a voltage difference between the first sampling signal and the second sampling signal is relatively small, increase a voltage value of the first voltage signal.

[0021] In this way, the differential mode detection module can output a first voltage signal that is smaller when the transmission signal of the CAN bus is subjected to differential mode interference caused by overvoltage voltage difference, and output a first voltage signal that is larger when the transmission signal of the CAN bus is subjected to differential mode interference caused by under-voltage voltage difference. When the first voltage signal that is smaller or larger is input to the drive module, the accuracy of the differential voltage signal output by the drive module to the CAN bus can be improved.

[0022] According to the first aspect, or any one of the possible implementation manners of the first aspect, in an eighth possible implementation manner of the sending circuit, the CAN bus includes a first CAN signal line and a second CAN signal line, one end of the first mirror current source obtains the first current signal, and the other end of the first mirror current source is connected to the second CAN signal line; one end of the second mirror current source obtains the second current signal, and the other end of the second mirror current source is connected to the first CAN signal line; and the voltage-controlled current source is connected between the one end of the first mirror current source and the one end of the second mirror current source, configured to receive the first voltage signal and generate a current according to the first voltage signal.

[0023] In response to the first current signal, the drive module can adjust the current flowing from the second CAN signal line to the other end of the first mirror current source, so as to adjust the voltage value of the differential voltage signal; in response to the second current signal, the drive module can adjust the current flowing from the other end of the second mirror current source to the first CAN signal line, so as to adjust the voltage value of the differential voltage signal; and in response to the first voltage signal, the drive module can generate a current through the voltage-controlled current source, adjust the current flowing from the second CAN signal line to the other end of the first mirror current source and the current flowing from the other end of the second mirror current source to the first CAN signal line, so as to adjust the voltage value of the differential voltage signal. In this way, the drive module can reduce common mode interference in the differential voltage signal according to the first current signal or the second current signal, and reduce differential mode interference in the differential voltage signal according to the first voltage signal.

[0024] According to the eighth possible implementation manner of the first aspect, in a ninth possible implementation manner of the sending circuit, when the drive module obtains the first current signal, the current flowing from the second CAN signal line to the drive module increases, and the voltage value of the two differential voltage signals output by the drive module decreases; and when the drive module obtains the second current signal, the current flowing from the drive module to the first CAN signal line increases, and the voltage value of the two differential voltage signals output by the drive module increases.

[0025] In this way, when the differential voltage signal vibrates in the positive direction so that the driving module obtains the first current signal, the driving module can output a differential voltage signal with a reduced voltage value; when the differential voltage signal vibrates in the negative direction so that the driving module obtains the second current signal, the driving module can output a differential voltage signal with an increased voltage value, thereby improving the accuracy of the differential voltage signal output by the driving module to the CAN bus.

[0026] According to the first aspect, or any possible implementation of the first aspect above, in a tenth possible implementation of the sending circuit, when the voltage value of the first voltage signal decreases, when the driving module receives the first voltage signal, the current flowing into the driving module from the second CAN signal line and the current flowing out of the driving module from the first CAN signal line both decrease, and the voltage difference between the two differential voltage signals output by the driving module decreases; when the voltage value of the first voltage signal increases, when the driving module receives the first voltage signal, the current flowing into the driving module from the second CAN signal line and the current flowing out of the driving module from the first CAN signal line both increase, and the voltage difference between the two differential voltage signals output by the driving module increases.

[0027] In this way, when the voltage difference of the differential voltage signal is overvoltage and the first voltage signal is input to the driving module, the driving module can reduce the voltage difference of the output differential voltage signal. When the voltage difference of the differential voltage signal is undervoltage and the first voltage signal is input to the driving module, the driving module can increase the voltage difference of the output differential voltage signal, so as to improve the accuracy of the differential voltage signal output by the driving module to the CAN bus.

[0028] According to any one of the third to tenth possible implementations of the first aspect, in an eleventh possible implementation of the transmitting circuit, the transmitting circuit receives an enable signal from a microcontroller, and when the enable signal is not received, the common-mode detection module and the differential-mode detection module are in a disabled state; when the enable signal is received, the common-mode detection module and the differential-mode detection module enter an enabled state from the disabled state, and in the enabled state, the first comparator, the second comparator in the common-mode detection module, the sampling amplifier, and the error amplifier in the differential-mode detection module operate normally.

[0029] In this way, the power consumption of the transmitting circuit can be reduced, and further, the power consumption of the transceiver can be reduced.

[0030] According to the eleventh possible implementation manner of the first aspect, in a twelfth possible implementation manner of the transmitting circuit, the transmitting circuit receives a control signal from the microcontroller, where the control signal indicates a differential voltage signal in a dominant state transmitted on the first CAN signal line and the second CAN signal line. When the control signal is not received, the first switch and the third switch in the common-mode detection module are disconnected, and the second switch and the fourth switch are closed; when the control signal is received, the first switch and the third switch in the common-mode detection module are closed, and the second switch and the fourth switch are disconnected.

[0031] In this way, the control signal is associated with the dominant state of the differential voltage signal transmitted by the transceiver to the CAN bus. Therefore, when the transceiver transmits the differential voltage signal in this state, the common-mode detection module in the transmitting circuit 20 can respond to the control signal, thereby improving the accuracy of the output differential voltage signal. Furthermore, the provision of a switch controlled by the control signal ensures that the power consumption of the transmitting circuit when transmitting in the recessive state is lower than when transmitting in the dominant state, further reducing the power consumption of the transmitting circuit and the transceiver.

[0032] In a second aspect, an embodiment of the present application provides a CAN transceiver, comprising the transmitting circuit described in the above first aspect and any one of the implementation methods of the first aspect.

[0033] According to the second aspect, in a first possible implementation of the CAN transceiver, the CAN transceiver includes a transmitting circuit and a receiving circuit, the receiving circuit includes the sampling module, and in the transmitting circuit, the driving module receives the logic signal output by the CAN controller and converts it into the differential voltage signal; when the common mode detection module and the differential mode detection module are in an enabled state and the common mode detection module receives the control signal, the transmitting circuit outputs the two differential voltage signals through the driving module.

[0034] In this way, the transmitting circuit can be used in conjunction with the receiving circuit in the transceiver, reducing the hardware cost of the transmitting circuit and, by extension, the hardware cost of the transceiver itself. The common-mode detection module and differential-mode detection module of the transmitting circuit can be located within the transceiver, and the voltage-controlled current source can be embedded within the driver module, eliminating the need to occupy the space on the plate connected to the transceiver and reducing the plate area. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A schematic diagram showing a CAN bus and node connection method in the prior art;

[0036] Figure 2An exemplary application scenario of a transmitting circuit of a controller area network (CAN) transceiver according to an embodiment of the present application is shown;

[0037] Figure 3 A schematic diagram illustrating an exemplary structure of a transmitting circuit of a controller area network (CAN) transceiver according to an embodiment of the present application is shown;

[0038] Figure 4 A schematic diagram showing an exemplary structure of a sampling module according to an embodiment of the present application is shown;

[0039] Figure 5 A schematic diagram showing an exemplary structure of a common mode detection module according to an embodiment of the present application is shown;

[0040] Figure 6a An exemplary structural diagram showing a first comparison module, a second comparison module, a first current generating module, and a second current generating module according to an embodiment of the present application is shown;

[0041] Figure 6b An exemplary structural diagram showing a first comparison module, a second comparison module, a first current generating module, and a second current generating module according to an embodiment of the present application is shown;

[0042] Figure 7 A schematic diagram showing an exemplary structure of a differential mode detection module according to an embodiment of the present application is shown;

[0043] Figure 8 A schematic diagram showing an exemplary structure of a driving module according to an embodiment of the present application is shown;

[0044] Figure 9 An exemplary schematic diagram illustrating how a transmitting circuit according to an embodiment of the present application reduces common-mode interference is shown;

[0045] Figure 10 Another exemplary schematic diagram illustrating reducing common-mode interference using a transmitting circuit according to an embodiment of the present application is shown;

[0046] Figure 11 An exemplary schematic diagram illustrating how a transmitting circuit according to an embodiment of the present application reduces differential mode interference is shown;

[0047] Figure 12 Another exemplary schematic diagram illustrating reducing differential mode interference using a transmitting circuit according to an embodiment of the present application is shown;

[0048] Figure 13 An exemplary schematic diagram illustrating how a transmitting circuit according to an embodiment of the present application reduces common-mode interference and differential-mode interference is shown. DETAILED DESCRIPTION

[0049] The following combination Figure 1Introduce the technical principle of CAN bus communication. The communication on CAN bus is an asynchronous communication. Figure 1 As shown, the CAN bus includes a first CAN signal line (CANH) and a second CAN signal line (CANL), which together constitute a set of differential signal lines and communicate in the form of differential signals. Multiple communication nodes (for example, nodes 1-N) can be mounted on the CAN bus, and signals between nodes are transmitted through the bus to achieve inter-node communication. Each CAN node includes a CAN controller and a CAN transceiver. Taking the ath node as an example (1≤a≤N and is an integer), the CAN controller and the CAN transceiver are connected through the TX_a and RX_a signal lines, and logic signals are transmitted on the TX_a and RX_a signal lines. The CAN transceiver is connected to the first CAN signal line (CANH) and the second CAN signal line (CANL) of the CAN bus through the CANH_a signal line and the CANL_a signal line, respectively. When a CAN transceiver functions as a receiver, it receives differential voltage signals transmitted on the CAN bus via the CANH_a and CANL_a signal lines. The CAN transceiver converts these differential voltage signals into logic signals and outputs them to the CAN controller via the RX_a signal line. When a CAN transceiver functions as a transmitter, the CAN controller inputs the logic signal to be transmitted into the CAN transceiver via the TX_a signal line. The CAN transceiver converts these logic signals into differential voltage signals and outputs them to the CAN bus via the CANH_a and CANL_a signal lines. In practical applications, the CANH_a and CANL_a signal lines are typically internal to the CAN transceiver and can be connected to the CAN transceiver's interface, which in turn connects to the CAN bus. The CAN transceiver's output signals are then transmitted to the CAN bus via the CANH_a and CANL_a signal lines and the interface. When any CAN transceiver connected to the CAN bus acts as a transmitter, one or more of the remaining CAN transceivers can act as receivers. The CAN transceiver acting as a transmitter can change the voltage value of the differential voltage signal transmitted by the CAN bus, so that each CAN transceiver acting as a receiver can receive the differential voltage signal and respond according to its voltage value.

[0050] The differential voltage signals transmitted on the CAN bus can be divided into dominant and recessive states. According to the relevant technical standard for controller area networks (ISO 11898), ideally, in the dominant state, the voltage difference between the differential voltage signals transmitted by the first CAN signal line (CANH) and the second CAN signal line (CANL) is within a certain voltage range, and the dominant state represents a logical "0." In the recessive state, the voltage difference between the differential voltage signals transmitted by the first CAN signal line (CANH) and the second CAN signal line (CANL) is zero (or close to zero), and the recessive state represents a logical "1." This is because when multiple nodes send signals to the CAN bus, the CAN bus uses the "wired AND" rule for bus arbitration. "Wired AND" means that by directly connecting two nodes, the output signals of the two nodes can be logically ANDed. The result of the wired AND operation is the final signal transmitted on the CAN bus. When multiple CAN transceivers are connected to a CAN bus, if at least one CAN transceiver outputs a differential voltage signal in a dominant state, the differential voltage signal transmitted by the CAN bus is in the dominant state. This is equivalent to the case where as long as at least one CAN transceiver sends a signal corresponding to logic 0, the differential voltage signal transmitted by the CAN bus corresponds to logic 0. If all CAN transceivers output differential voltage signals in a recessive state, the differential voltage signal transmitted by the CAN bus is in the recessive state. This is equivalent to the case where all CAN transceivers send signals corresponding to logic 1, the differential voltage signal transmitted by the CAN bus corresponds to logic 1. Therefore, the dominant state represents logic 0, and the recessive state represents logic 1.

[0051] According to the definition of the relevant technical standard (ISO 11898), ideally, an example of the voltage value of the differential voltage signal is that, in the dominant state, the voltage value of the signal transmitted on the first CAN signal line (CANH) may be, for example, 3.5V, the voltage value of the signal transmitted on the second CAN signal line (CANL) may be, for example, 1.5V, and the voltage difference between the signals transmitted on the first CAN signal line (CANH) and the second CAN signal line (CANL) may be, for example, 2V. In the recessive state, the voltage values ​​of the signals transmitted on the first CAN signal line (CANH) and the second CAN signal line (CANL) may be the same, for example, both 2.5V, and the voltage difference between the signals transmitted on the first CAN signal line (CANH) and the second CAN signal line (CANL) may be, for example, 0V. For simplicity, the embodiments of the present application use the above voltage values ​​as an example for illustration. Those skilled in the art will appreciate that, in actual applications, the above voltage values ​​may adopt other specific values ​​based on factors such as relevant standards.

[0052] In practical applications, the differential voltage signals transmitted on the CAN bus may be subject to differential-mode interference and common-mode interference from the external electromagnetic environment, resulting in certain errors in the voltage values ​​of the differential voltage signals. Differential-mode interference causes the voltage difference between the two signals in the differential voltage signal to increase or decrease, while common-mode interference causes both signals in the differential voltage signal to increase or decrease by the same magnitude. Differential-mode interference and common-mode interference can occur simultaneously or separately. Therefore, it is necessary to improve the anti-interference capability of the CAN transceiver to suppress differential-mode interference and common-mode interference in the differential voltage signals transmitted on the CAN bus and improve the accuracy of the differential voltage signals transmitted on the CAN bus.

[0053] There are some solutions in the existing technology to improve the anti-interference capability of CAN transceivers. One solution is to add an isolation module to the CAN transceiver to achieve electrical isolation between the input and output ends of the transceiver, which can suppress differential-mode interference but has no significant inhibitory effect on common-mode interference. Another solution is to add a signal line CANGND to the CAN bus, which includes signal lines CANH and CANL. The signal line CANGND is connected to the ground potential of the CAN transceiver and uses three-wire signal transmission. This can suppress common-mode interference within a certain range, but increases the wiring difficulty and hardware cost of the CAN bus in practical applications and cannot completely suppress large-scale interference. Another solution is to use a shielded CAN bus, which wraps the signal line with aluminum foil and oxygen-free copper wire shielding mesh to effectively resist electric field interference. However, in practical applications, the shielding layer needs to be grounded, which increases the wiring difficulty of the CAN bus and has poor anti-interference effect for CAN buses with long routes. Another solution is to add a CAN to fiber optic converter to convert the CAN bus signal into a fiber optic signal for transmission. However, the cost of fiber optic is high and it cannot be widely used.

[0054] To further optimize the CAN transceiver's electromagnetic interference resistance, prior art proposes adding a common-mode choke to the CAN transceiver's output to achieve common-mode interference suppression. The common-mode choke operates on the principle that when an operating current flows through two oppositely wound coils, it generates two mutually canceling magnetic fields. The operating current is primarily damped by the coil's ohmic resistance and a negligible leakage inductance at the operating frequency. If a common-mode interference signal flows through the coil, the coil presents a high impedance, creating a strong damping effect that attenuates the interference signal and effectively isolates it from high-frequency interference.

[0055] Although the existing technology can suppress common-mode interference when the CAN transceiver is used as a transmitter, it does not significantly suppress differential-mode interference signals. At the same time, the common-mode choke coil has a large area and needs to be connected outside the CAN transceiver, occupying too much board space.

[0056] The second prior art adopts a threshold voltage adjustment technology to improve the common-mode interference suppression capability of the transceiver. The principle is that a sampling resistor group, a front-end amplifier, and a comparator are connected in sequence, and a reference generator is connected to the front-end amplifier and the comparator. The real-time voltage of the differential voltage signal of the CAN bus is first sampled by the sampling resistor group, and the sampled voltage is amplified by the front-end amplifier and output to the negative input terminal of the comparator; the front-end amplifier simultaneously generates the common-mode voltage of the input signal of the CAN bus, which is input to the reference generator. The reference generator then subtracts the bandgap voltage from the common-mode voltage according to the logic level of the signal input by the front-end amplifier and inputs it to the positive input terminal of the comparator. The comparator obtains a logic signal according to the output of the front-end amplifier and the output of the reference generator. That is, when the common-mode voltage of the differential voltage signal of the CAN bus changes, the input signal of the positive input terminal of the comparator changes accordingly, so that the logic signal output by the transceiver as a receiver is not affected by common-mode interference.

[0057] The second prior art can only guarantee that common-mode interference can be suppressed when the CAN transceiver is used as a receiver. However, when the CAN transceiver is used as a transmitter, it cannot guarantee that the signal sent to the CAN bus is a signal that suppresses common-mode interference and differential-mode interference, resulting in errors in the signal transmitted on the CAN bus.

[0058] The transceiver proposed in prior art 3 uses an ultra-wide input voltage receiving circuit for common-mode interference suppression. Its principle is to connect a sampling resistor group to the input terminals of two differential amplifiers. The sampling resistor group first samples the real-time voltage of the CAN bus differential voltage signal, which is then amplified by the two differential amplifiers. The two differential amplifiers operate separately when the common-mode input voltage is high and when it is low. The amplified signal is then converted by a differential-to-single-ended amplifier to produce two digital output signals. These two digital output signals are then summed by an adder to produce a logic signal.

[0059] The third existing technology can only ensure that when the CAN transceiver acts as a receiver, the common-mode interference in an ultra-wide range can be suppressed, but cannot ensure that when the CAN transceiver acts as a transmitter to output a signal to the CAN bus, the common-mode deviation of the output signal is corrected, so that when the CAN transceiver at other nodes of the bus acts as a receiver, the accuracy of the differential voltage signal received is affected.

[0060] In summary, prior art transceivers cannot effectively suppress common-mode interference and differential-mode interference of signals output to the CAN bus when the transceiver is used as a transmitter. In view of this, embodiments of the present application provide a transmitting circuit for a Controller Area Network (CAN) transceiver and a CAN transceiver. The transmitting circuit of the Controller Area Network (CAN) transceiver of the embodiments of the present application can effectively suppress common-mode interference and differential-mode interference, output a highly accurate differential signal to the CAN bus, and when the transmitting circuit is applied to a CAN transceiver, the anti-interference capability of the transceiver can be improved while controlling costs.

[0061] Figure 2 FIG. 1 shows an exemplary application scenario of a transmitting circuit of a controller area network (CAN) transceiver according to an embodiment of the present application. Figure 2 As shown, CAN transceiver 1100 is connected to CAN controller 1200 and microcontroller (MCU) 1300. CAN controller 1200 can be integrated into microcontroller 1300, that is, the functions of CAN controller 1200 are implemented by microcontroller 1300. CAN transceiver 1100 includes a transmitting circuit 20, a receiving circuit 30, and a bias circuit 40. The structures of receiving circuit 30 and bias circuit 40 can be implemented based on existing technologies.

[0062] The transmitting circuit 20 includes a sampling module 101 , a common mode detection module 102 , a differential mode detection module 103 and a driving module 104 . The receiving circuit 30 includes the sampling module 101 and a differential signal comparator (not shown). The bias circuit 40 includes a reference amplifier (not shown). Figure 2 FIG3 shows a case where the transmitting circuit 20 and the receiving circuit 30 share the sampling module 101. Those skilled in the art will appreciate that the transmitting circuit 20 and the receiving circuit 30 may each include a different sampling module, as long as the functions of the circuits or modules described herein can be realized.

[0063] by Figure 2Taking the illustrated structure as an example, when the CAN transceiver 1100 functions as a receiver, the receiving circuit 30 is configured to receive differential voltage signals from the CAN bus. The sampling module 101 within the receiving circuit 30 samples the differential voltage signals from the CAN bus. The differential signal comparator then converts the sampled results into logic signals, which are then output to the CAN controller 1200 via signal line RX. This allows the CAN controller 1200 to obtain a logic signal corresponding to the differential voltage signals from the CAN bus. When the CAN transceiver 1100 functions as a transmitter, the sampling module 101 within the receiving circuit 30, as part of the transmitting circuit 20, receives the differential voltage signals from the driver module 104 and outputs the sampled results (see the first sampled signal and the second sampled signal below) for correction of the differential voltage signals.

[0064] The transmitting circuit 20 is configured to receive a logic signal from the CAN controller 1200 when the CAN transceiver 1100 functions as a transmitter. When the logic signal is 0, the transmitting circuit 20 controls the driver module 104 to operate normally, thereby outputting a dominant differential voltage signal to the CAN bus. When the logic signal is 1, the transmitting circuit 20 controls the driver module 104 to stop operating, thereby rendering the differential voltage signal recessive. When the CAN transceiver 1100 functions as a transmitter and receives an enable signal from the microcontroller 1300, the sampling module 101, the common-mode detection module 102, the differential-mode detection module 103, and the driver module 104 in the transmitting circuit 20 form a feedback loop. The sampling module 101 samples the output of the driver module 104, and the common-mode detection module 102, the differential-mode detection module 103, and the like, described below, respond to interference in the differential voltage signal represented by the sampling result by generating a current signal and / or a voltage signal. This current signal and / or voltage signal acts on the driver module 104 to reduce interference in the differential voltage signal output by the driver module 104.

[0065] The bias circuit 40 is used to provide a bias voltage so that when the CAN transceiver 1100 acts as a transmitter and the logic signal from the CAN controller 1200 is 1, the voltage values ​​of the two differential voltage signals of the CAN bus controlled by the sampling module 101 are equal and equal to the bias voltage (e.g., 2.5V).

[0066] The above CAN transceiver performs the functions of the receiver and the transmitter without interfering with each other, so the sampling module 101 can be shared by the transmitting circuit 20 and the receiving circuit 30. The following describes an exemplary working method of the CAN transceiver 1100 when it is used as a receiver. Figure 1Taking node 1 in the figure as an example, when the CAN transceiver 1100 acts as a receiver, the differential voltage signal is input into the receiving circuit 30 through the CAN_1 signal line and CANL_1. In the receiving circuit 30, two sampling signals are obtained by sampling through the sampling module 101, and the two sampling signals are compared by other devices of the receiving circuit 30 (such as a differential signal comparator, not shown in the figure) to obtain a logic signal (0 or 1), completing the conversion of the differential voltage signal to the logic signal. The converted logic signal is output to the CAN controller 1200 through the RX signal line.

[0067] The following describes an exemplary operation of the CAN transceiver 1100 when operating as a transmitter. When operating as a transmitter, the microcontroller 1300 outputs an enable signal to the transmit circuit 20, enabling the common-mode detection module 102 and the differential-mode detection module 103. In this enabled state, the differential-mode detection module 103 can respond to the sampled signal from the sampling module 101. The microcontroller 1300 also determines whether the differential voltage signal to be transmitted is dominant or recessive, and instructs the CAN controller 1200 to input the corresponding logic signal into the transmit circuit 20 of the CAN transceiver 1100 via the TX signal line.

[0068] When the logic signal is 0, the driver module 104 in the transmitting circuit 20 operates normally, and the driver module 104 outputs a dominant differential voltage signal, causing the differential voltage signal transmitted by the CAN bus to also be dominant (e.g., 3.5V and 1.5V). The differential voltage signal output by the driver module 104 to the CAN bus is also input to the sampling module 101, causing the sampling module 101 to output two sampled signals of the differential voltage signal. In this embodiment of the present application, the microcontroller 1300 can simultaneously input a control signal to the transmitting circuit 20 while causing the CAN controller 1200 to input the logic signal 0 to the transmitting circuit 20. The control signal enables the common-mode detection module 102 of the transmitting circuit 20 to respond to the sampled signal from the sampling module 101. In this case, in the transmitting circuit 20, the common-mode detection module 102 and the differential-mode detection module 103 can determine whether the differential voltage signal output by the CAN transceiver 1100 when it acts as a transmitter has common-mode interference and differential-mode interference based on the input sampling signal, and generate a signal corresponding to the interference type when it is determined that common-mode interference and / or differential-mode interference exists; since the driving module 104 operates normally when the CAN controller 1200 inputs the logic signal 0 to the transmitting circuit 20, the driving module 104 can combine the signals generated by the common-mode detection module 102 and the differential-mode detection module 103 to reduce the common-mode interference and / or differential-mode interference in the differential voltage signal output by the driving module 104, so that the differential voltage signal transmitted by the CAN bus is closer to the voltage value of the dominant state under ideal conditions (for example, 3.5V and 1.5V).

[0069] When the logic signal is 1, the driving module 104 stops working, and the voltage of the CAN bus is controlled by a reference amplifier (not shown) in the bias circuit 40, so that the differential voltage signal transmitted by the CAN bus is in a recessive state (for example, 2.5V).

[0070] Figure 3 An exemplary structure schematic diagram of a transmitting circuit of a controller area network (CAN) transceiver according to an embodiment of the present application is shown in FIG. 1. Figure 3 As shown in FIG. 1, the transmitting circuit 20 includes:

[0071] a sampling module 101, configured to sample two differential voltage signals output by a driving module 104, and generate a first sampling signal and a second sampling signal respectively;

[0072] a common-mode detection module 102, configured to generate a first current signal or a second current signal according to the first sampling signal and the second sampling signal, the first current signal indicating that there is common-mode interference that makes the voltage value larger in the first sampling signal and the second sampling signal, and the second current signal indicating that there is common-mode interference that makes the voltage value smaller in the first sampling signal and the second sampling signal;

[0073] a differential-mode detection module 103, configured to generate a first voltage signal according to the first sampling signal and the second sampling signal, the first voltage signal indicating that there is differential-mode interference that makes the voltage difference larger or smaller in the first sampling signal and the second sampling signal;

[0074] the driving module 104, including a voltage-controlled current source, a first mirror current source and a second mirror current source, configured to drive the first mirror current source and the second mirror current source to output the two differential voltage signals to the CAN bus according to the current of the voltage-controlled current source, and control the first mirror current source or the second mirror current source by the first current signal or the second current signal to reduce the common-mode interference in the differential voltage signal, and control the voltage-controlled current source by the first voltage signal to reduce the differential-mode interference in the differential voltage signal.

[0075] According to the transmitting circuit of the embodiment of the present application, the sampling module samples the differential voltage signal output by the driving module to generate a first sampling signal and a second sampling signal, so that when the differential voltage signal output by the driving module is affected by the environment and there is common-mode interference and / or differential-mode interference, the common-mode interference and / or differential-mode interference can be obtained in the first sampling signal and the second sampling signal; the common-mode detection module can determine whether the voltage values ​​of the first sampling signal and the second sampling signal are too large or too small based on the first sampling signal and the second sampling signal, so that the transmitting circuit can identify the common-mode interference and respond to it, and generate a first current signal or a second current signal; the differential-mode detection module can determine whether the voltage difference between the first sampling signal and the second sampling signal is too large or too small based on the first sampling signal and the second sampling signal, so that The transmitting circuit is capable of identifying differential-mode interference and responding to it, generating a first voltage signal; the driving module drives the first mirror current source and the second mirror current source according to the current of the voltage-controlled current source to output the two differential signals to the CAN, so that the differential voltage signal can be output to the CAN bus, and the driving module controls the first mirror current source or the second mirror current source through the first current signal or the second current signal to reduce common-mode interference in the differential voltage signal, and controls the voltage-controlled current source through the first voltage signal to reduce differential-mode interference in the differential voltage signal, so that the common-mode interference and / or differential-mode interference in the output differential voltage signal can be suppressed, thereby improving the accuracy of the differential voltage signal output by the transmitting circuit to the CAN bus.

[0076] The following combination Figure 4-Figure 8 First, the exemplary structures of the sampling module 101, the common mode detection module 102, the differential mode detection module 103 and the driving module 104 are given, and then combined with Figures 9-13 An exemplary operation process of the transmitting circuit 20 is described.

[0077] In a possible implementation, the sampling module 101 can be implemented based on existing technologies, such as Figure 4 As shown, the sampling module 101 includes: a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. One end a1 of the first resistor R1 serves as the first end (end A) of the sampling module 101. The other end b1 of the first resistor R1 is connected to one end a2 of the second resistor R2 and serves as the second end (end B) of the sampling module 101. The other end b2 of the second resistor R2 is connected to one end a3 of the third resistor R3. The other end b3 of the third resistor R3 is connected to one end a4 of the fourth resistor R4 and serves as the third end (end C) of the sampling module 101. The other end b4 of the fourth resistor R4 serves as the fourth end (end D) of the sampling module 101.

[0078] The first end (A end) and the fourth end (D end) of the sampling module 101 are connected to the first CAN signal line (CANH) and the second CAN signal line (CANL) of the CAN bus respectively, so that when the CAN transceiver works as a receiver, the sampling module 101 can receive the differential voltage signal from the CAN bus. In this case, the two sampling signals (CANH_SEN and CANL_SEN) output by the second end (B end) and the third end (C end) of the sampling module 101 can be further processed by the differential signal comparator (not shown), and at the same time, the two sampling signals are also input to the common mode detection module 102 and the differential mode detection module 103 of the transmitting circuit 20. However, when the CAN transceiver works as a receiver, the common mode detection module 102 and the differential mode detection module 103 are not enabled, so they will not respond to the signals output by the sampling module. The first end (A end) and the fourth end (D end) of the sampling module 101 are also connected to the two output ends (M end and O end hereinafter) of the driving module 104 respectively, so that when the CAN transceiver works as a transmitter and transmits the differential voltage signal of the dominant state, the sampling module 101 can receive the differential voltage signal from the driving module 104. In this case, the common mode detection module 102 and the differential mode detection module 103 are enabled, and in combination with the control signal, the two sampling signals output by the sampling module 101 can be further processed by the common mode detection module 102 and the differential mode detection module 103 of the transmitting circuit 20, so that the driving module 104 outputs the differential voltage signal with reduced interference. Further, the two sampling signals can also be input to the differential signal comparator and converted into logic signals for the CAN controller to monitor the differential voltage signal output by the CAN transceiver. In this way, the sampling module 101 can complete the sampling of the signals input to the CAN bus and the sampling of the signals output to the CAN bus, so that the sampling module 101 can work in two different processes of the CAN transceiver as a receiver and as a transmitter.

[0079] The other end b2 of the second resistor R2 and one end a3 of the third resistor R3 are also connected to the negative input and output of the reference amplifier A1 of the bias circuit 40. The reference amplifier A1 can be, for example, an inverting closed-loop amplifier, with its positive input connected to a reference voltage V1. The voltage value of the reference voltage V1 can be equal to the voltage value of the differential voltage signal in the recessive state, for example, 2.5V. The bias voltage VBIAS output by the output of the reference amplifier A1 is also 2.5V. The second resistor R2 and the third resistor R3 have the same resistance value (for example, R), and the first resistor R1 and the fourth resistor R4 have the same resistance value (for example, 24*R). The first CAN signal line (CANH) and the second CAN signal line (CANL) input differential voltage signals to the first terminal (terminal A) and the fourth terminal (terminal D) of the sampling module 101. The first resistor R1 and the fourth resistor R4 respectively divide the input differential voltage signals to generate the stepped-down first sampling signal CANH_SEN and the second sampling signal CANL_SEN. The first sampling signal CANH_SEN may be outputted from the second terminal (terminal B) of the sampling module 101 , for example, and the second sampling signal CANL_SEN may be outputted from the third terminal (terminal C) of the sampling module 101 , for example.

[0080] Those skilled in the art will appreciate that the specific structure of the sampling module 101 is not limited thereto, as long as it can sample the output of the driving module 104 to obtain a sampled signal suitable for processing by the common-mode detection module 102 and the differential-mode detection module 103. The resistance values ​​of the resistors in the sampling module can also be set to other values, as long as the second resistor R2 and the third resistor R3 have the same resistance value, and the first resistor R1 and the fourth resistor R4 have the same resistance value, and this application does not impose any restrictions on this.

[0081] Common-mode interference can be divided into two situations. One is the common-mode interference caused by positive voltage jitter, which causes the two differential voltage signals to increase and increase by the same amount. The other is the common-mode interference caused by negative voltage jitter, which causes the two differential voltage signals to decrease and decrease by the same amount. For example, according to relevant standards, when the differential voltage signal is in a dominant state, the ideal voltage value of the input signal at the first end (end A) of the sampling module 101 can be equal to 3.5V, and the ideal voltage value of the input signal at the second end (end B) of the sampling module 101 can be equal to 1.5V. In actual applications, when there is an allowable deviation in the voltage values ​​of the above signals, it is considered that the common-mode interference has little effect on the differential voltage signal, and there is no need to suppress the common-mode interference. If the detection determines that the voltage value exceeds the allowable deviation, it can be considered that the common-mode interference has too much effect on the differential voltage signal, and it is necessary to suppress the common-mode interference in the differential voltage signal.

[0082] Assuming that the allowable deviation between the voltage value of the differential voltage signal and the ideal value is 1.5V, when the voltage value of the first CAN signal line is greater than the first voltage threshold (for example, 5V, the sum of the ideal voltage value of the first CAN signal line 3.5V and the allowable deviation 1.5V) or the voltage value of the second CAN signal line is greater than the second voltage threshold (for example, 3V, the sum of the ideal voltage value of the second CAN signal line 1.5V and the allowable deviation 1.5V), it is considered that the voltage value of the differential voltage signal is too large, and the common-mode interference caused by positive voltage jitter needs to be suppressed; when the voltage value of the first CAN signal line is less than the third voltage threshold (for example, 2V, the difference between the ideal voltage value of the first CAN signal line 3.5V and the allowable deviation 1.5V) or the voltage value of the second CAN signal line is less than the fourth voltage threshold (for example, 0V, the difference between the ideal voltage value of the second CAN signal line 1.5V and the allowable deviation 1.5V), it is considered that the voltage value of the differential voltage signal is too small, and the common-mode interference caused by negative voltage jitter needs to be suppressed.

[0083] The embodiment of the present application uses a common-mode detection module to determine whether the voltage values ​​of the two sampling signals corresponding to the two differential voltage signals are too large or too small, and then determines whether common-mode interference occurs in the two sampling signals, and indirectly determines whether the two differential voltage signals include common-mode interference that needs to be suppressed. When the presence of common-mode interference that needs to be suppressed is detected, a signal indicating that the voltage value of the sampling signal is too large or too small is generated.

[0084] In one possible implementation, Figure 5 As shown, the common-mode detection module 102 includes a first detection submodule 1021 and a second detection submodule 1022. The first detection submodule 1021 includes a first comparison module 10211 and a first current generation module 10212. The first comparison module 10211 receives a first sampling signal CANH_SEN, compares the voltage value of the first sampling signal CANH_SEN with the voltage value of a first reference voltage (reference voltage V3), and obtains a first comparison signal VC_UP. The first current generation module 10212 generates a first current signal according to the first comparison signal VC_UP; the second detection submodule 1022 includes a second comparison module 10221 and a second current generation module 10222. The second comparison module 10221 receives a second sampling signal CANL_SEN, compares the voltage value of the second sampling signal CANL_SEN with the voltage value of a second reference voltage (reference voltage V5), and obtains a second comparison signal VC_DN. The second current generation module 10222 generates a second current signal according to the second comparison signal.

[0085] The values ​​of the reference voltage V3 and the reference voltage V5 are related to the allowable deviation of the voltage value of the differential voltage signal and the information indicated by the first current signal and the second current signal. Figure 5An example of how the reference voltage V3 and the reference voltage V5 are taken when the common-mode detection module completes interference detection.

[0086] The relationship between the first sampling signal CANH_SEN and the differential voltage signal is shown in formula (1):

[0087]

[0088] In formula (1), VBIAS represents the voltage value output by the reference amplifier A1 to the second resistor and the third resistor. VBIAS is a constant value equal to the reference voltage V1 (for example, 2.5V). R2 represents the resistance value of the second resistor (for example, R), R1 represents the resistance value of the first resistor (for example, 24*R), and CANH represents the voltage value of the first CAN signal line.

[0089] The relationship between the second sampling signal CANL_SEN and the differential voltage signal is shown in formula (2):

[0090]

[0091] In formula (2), R3 represents the resistance value of the third resistor (for example, R), R4 represents the resistance value of the fourth resistor (for example, 24*R), and CANL represents the voltage value of the second CAN signal line.

[0092] In one possible implementation, the first detection submodule can be configured to generate a first current signal when the first sampling signal is relatively large, and the second detection submodule can be configured to not generate a second current signal when the second sampling signal is relatively large. The first detection submodule can also be configured to not generate a first current signal when the first sampling signal is relatively small, and the second detection submodule can generate a second current signal when the second sampling signal is relatively small. Thus, when the first current signal is generated but the second current signal is not generated, it indicates that there is common-mode interference caused by positive voltage jitter in the first sampling signal and the second sampling signal. When the second current signal is generated but the first current signal is not generated, it indicates that there is common-mode interference caused by negative voltage jitter in the first sampling signal and the second sampling signal. In this way, the common-mode detection module can determine whether there is common-mode interference in the differential voltage signal and confirm the type of common-mode interference.

[0093] For example, the first voltage threshold (5V) is substituted into formula (1) as the voltage value of the first CAN signal line, and the value of the first sampling signal CANH_SEN is equal to 2.6V. The second voltage threshold (3V) is substituted into formula (2) as the voltage value of the second CAN signal line, and the value of the second sampling signal CANL_SEN is equal to 2.52V. The third voltage threshold (2V) is substituted into formula (1) as the voltage value of the first CAN signal line, and the value of the first sampling signal CANH_SEN is equal to 2.48V. The fourth voltage threshold (0V) is substituted into formula (2) as the voltage value of the second CAN signal line, and the value of the second sampling signal CANL_SEN is equal to 2.4V.

[0094] The reference voltages V3 and V5 can be set so that when the voltage value of the first CAN signal line is greater than the first voltage threshold (5V) and the voltage value of the second CAN signal line is greater than the second voltage threshold (3V), the first detection submodule generates a first current signal, while the second detection submodule does not generate a second current signal; and when the voltage value of the first CAN signal line is less than the third voltage threshold (2V) and the voltage value of the second CAN signal line is less than the fourth voltage threshold (0V), the second detection submodule generates a second current signal, while the first detection submodule does not generate a first current signal.

[0095] For example, the voltage value of the reference voltage V3 can be preset to be equal to 2.6V. The voltage value of the reference voltage V5 is equal to 2.4V. As can be seen from formula (1), when CANH increases, CANH_SEN also increases accordingly. In this case, when the voltage value CANH of the first CAN signal line is greater than 5V, the value of the first sampling signal CANH_SEN is also greater than 2.6V. The first comparison signal can, for example, indicate that the voltage value of the first sampling signal CANH_SEN is greater than the reference voltage V3 (2.6V). The first current signal generated according to the first comparison signal indicates that the voltage value of the first sampling signal CANH_SEN is larger than that of the reference voltage V3 (2.6V). In addition, the value of the second sampling signal CANL_SEN is greater than 2.52V, that is, greater than the reference voltage V5 (2.4V). The second comparison signal can, for example, indicate that the voltage value of the second sampling signal CANL_SEN is greater than that of the reference voltage V5, so that the second current signal is not generated according to the second comparison signal. Therefore, the first detection submodule generates the first current signal and the second detection submodule does not generate the second current signal, which indicates that common-mode interference caused by positive voltage jitter is detected in the first sampling signal and the second sampling signal, indirectly indicating that the voltage value of the first CAN signal line is larger than the preset first voltage threshold, and the voltage value of the second CAN signal line is larger than the preset second voltage threshold, that is, common-mode interference caused by positive voltage jitter is detected in the differential voltage signal.

[0096] As can be seen from formula (2), when CANL becomes smaller, CANL_SEN also becomes smaller. In this case, when the voltage value CANL of the second CAN signal line is less than 0V, the value of the second sampling signal CANL_SEN is also less than 2.4V. The second comparison signal may, for example, indicate that the voltage value of the second sampling signal CANL_SEN is smaller than the reference voltage V5 (2.4V). The second current signal generated according to the second comparison signal indicates that the voltage value of the second sampling signal CANL_SEN is smaller. In addition, the value of the first sampling signal CANH_SEN is less than 2.48V, that is, less than the reference voltage V3 (2.6V). The first comparison signal may, for example, indicate that the voltage value of the first sampling signal CANH_SEN is smaller than the reference voltage V3, so that the first current signal is not generated according to the first comparison signal. Therefore, the second detection submodule generates the second current signal and the first detection submodule does not generate the first current signal, which can indicate that common-mode interference caused by negative voltage jitter is detected in the first sampling signal and the second sampling signal, indirectly indicating that the voltage value of the first CAN signal line is smaller than the preset third voltage threshold, and the voltage value of the second CAN signal line is smaller than the preset fourth voltage threshold, that is, common-mode interference caused by negative voltage jitter is detected in the differential voltage signal.

[0097] In one possible implementation, contrary to the above situation, the first detection submodule can be configured to generate a first current signal when the first sampling signal is relatively small, and the second detection submodule can be configured not to generate a second current signal when the second sampling signal is relatively small. The first detection submodule generates the first current signal when the first sampling signal is relatively small, and the second detection submodule does not generate the second current signal when the second sampling signal is relatively small. Thus, when the first current signal is generated but the second current signal is not generated, it can indicate that common-mode interference caused by negative voltage jitter exists in the first sampling signal and the second sampling signal. When the second current signal is generated but the first current signal is not generated, it can indicate that common-mode interference caused by positive voltage jitter exists in the first sampling signal and the second sampling signal. In this case, referring to the above setting, the voltage value of the reference voltage V3 can be, for example, equal to 2.48V, and the voltage value of the reference voltage V5 can be, for example, equal to 2.52V.

[0098] For example, it can be seen from formula (1) that when CANH becomes smaller, CANH_SEN also becomes smaller. In this case, when the voltage value CANH of the first CAN signal line is less than 2V, the value of the first sampling signal CANH_SEN is also less than 2.48V. The first comparison signal can, for example, indicate that the voltage value of the first sampling signal CANH_SEN is smaller than the reference voltage V3 (2.48V). The first current signal generated according to the first comparison signal indicates that the voltage value of the first sampling signal CANH_SEN is smaller. In addition, the value of the second sampling signal CANL_SEN is less than 2.4V, that is, less than the reference voltage V5 (2.52V). The second comparison signal can, for example, indicate that the voltage value of the second sampling signal CANL_SEN is smaller than the reference voltage V5, so that the second current signal is not generated according to the second comparison signal. Therefore, the first detection submodule generates a first current signal and the second detection submodule does not generate a second current signal, which can indicate that common-mode interference caused by negative voltage jitter is detected in the first sampling signal and the second sampling signal, indirectly indicating that the voltage value of the first CAN signal line is smaller than the preset first voltage threshold, and the voltage value of the second CAN signal line is smaller than the preset fourth voltage threshold, that is, common-mode interference caused by negative voltage jitter is detected in the differential voltage signal.

[0099] As can be seen from formula (2), when CANL increases, CANL_SEN also increases accordingly. In this case, when the voltage value CANL of the second CAN signal line is greater than 3V, the value of the second sampling signal CANL_SEN is also greater than 2.52V. The second comparison signal may, for example, indicate that the voltage value of the second sampling signal CANL_SEN is greater than the reference voltage V5 (2.52V). The second current signal generated according to the second comparison signal indicates that the voltage value of the second sampling signal CANL_SEN is too large. In addition, the value of the first sampling signal CANH_SEN is greater than 2.6V, that is, greater than the reference voltage V3 (2.48V). The first comparison signal may, for example, indicate that the voltage value of the first sampling signal CANH_SEN is greater than the reference voltage V3. This may result in no generation of the first current signal according to the first comparison signal. As a result, the second detection submodule generates a second current signal and the first detection submodule does not generate the first current signal, indicating that common-mode interference caused by positive voltage jitter is detected in the first sampling signal and the second sampling signal, indirectly indicating that the first CAN signal line is larger than the preset first voltage threshold, and the voltage value of the second CAN signal line is larger than the preset second voltage threshold, that is, common-mode interference caused by positive voltage jitter is detected in the differential voltage signal.

[0100] Those skilled in the art should understand that the allowable deviation of the differential voltage signal can be set according to actual needs, and the first voltage threshold, the second voltage threshold, the third voltage threshold, and the fourth voltage threshold can be set to other values ​​according to the allowable deviation of the differential voltage signal. The voltage values ​​of the reference voltage V3 and the reference voltage V5 can also be set to other values. As long as the first sampling signal is compared with the reference voltage V3 to determine whether the voltage value of the first CAN signal line exceeds the allowable deviation, and the second sampling signal is compared with the reference voltage V5 to determine whether the voltage value of the second CAN signal line exceeds the allowable deviation, the present application does not impose any restrictions on the voltage values ​​of the reference voltage V3 and the reference voltage V5.

[0101] In this way, a first current signal or a second current signal is generated based on the comparison result of the first sampling signal and the second sampling signal with the reference voltage, thereby affecting the final output of the driving module. When common-mode interference appears in the first sampling signal and the second sampling signal, one of the first detection submodule and the second detection submodule in the common-mode detection module can generate a current signal for reducing the common-mode interference in the differential voltage signal, so that the driving module can respond to the current signal from the first detection submodule or the second detection submodule and reduce the common-mode interference in the differential voltage signal.

[0102] According to the information indicated by the first current signal and the second current signal, there are many options for setting the first comparison module, the first current generating module, the second comparison module, and the second current generating module. Figure 6a-6b Exemplary structures of the first comparison module, the first current generation module, the second comparison module, and the second current generation module are given.

[0103] Figure 6a This is an example of a configuration method of the first comparison module, the first current generation module, the second comparison module, and the second current generation module when the first current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are relatively large, and the second current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are relatively small.

[0104] In one possible implementation, Figure 6aAs shown, the first comparison module 10211 includes a first switch SWD1, a second switch SWR1 and a first comparator CMP1. One end c1 of the first switch SWD1 serves as the first end (end E) of the common-mode detection module 102 and receives the first sampling signal CANH_SEN. The other end d1 of the first switch SWD1 is connected to the other end d2 of the second switch SWR1 and the first input end (e.g., the negative input end) of the first comparator CMP1. One end c2 of the second switch SWR1 is connected to a third reference voltage (reference voltage V2). The second input end (e.g., the positive input end) of the first comparator CMP1 is connected to the first reference voltage (reference voltage V3), and the output end outputs the first comparison signal VC_UP.

[0105] The second comparison module 10221 includes a third switch SWD2, a fourth switch SWR2 and a second comparator CMP2. One end c3 of the third switch SWD2 serves as the second end (G end) of the common-mode detection module 102, receiving the second sampling signal CANL_SEN, and the other end d3 is connected to the other end d4 of the fourth switch SWR2 and the first input end (for example, the negative input end) of the second comparator CMP2; one end c4 of the fourth switch SWR2 is connected to the fourth reference voltage (reference voltage V4); the second input end (for example, the positive input end) of the second comparator CMP2 is connected to the second reference voltage (reference voltage V5), and the output end outputs the second comparison signal VC_DN.

[0106] The operating states of the first comparator CMP1 and the second comparator CMP2 can be controlled by an enable signal from the microcontroller 1300. When the CAN transceiver 1100 functions only as a receiver, the microcontroller 1300 does not provide an enable signal, and the first comparator CMP1 and the second comparator CMP2 are disabled (e.g., disconnected from the power supply) to save power. When the CAN transceiver 1100 functions as a transmitter, the microcontroller 1300 provides an enable signal, enabling the first comparator CMP1 and the second comparator CMP2. The opening and closing of the first, third, second, and fourth switches can be controlled by control signals from the microcontroller 1300.

[0107] In one possible implementation, when the control signal from the microcontroller 1300 causes the first switch SWD1 to be closed and the second switch SWR1 to be opened, the first sampling signal is input to the first comparator CMP1, so that the first comparator CMP1 can output the first comparison signal VC_UP;

[0108] When the control signal from the microcontroller 1300 closes the third switch SWD2 and opens the fourth switch SWR2 , the second sampling signal is input to the second comparator CMP2 , so that the second comparator CMP2 can output the second comparison signal VC_DN.

[0109] For example, the first switch SWD1 and the third switch SWD2 can be configured to be open when no control signal is received and closed when a control signal is received; the second switch SWR1 and the fourth switch SWR2 can be configured to be closed when no control signal is received and open when a control signal is received. When the CAN transceiver 1100 works as a transmitter and transmits a signal in a recessive state, the common mode detection module does not need to work, the first switch SWD1 and the third switch SWD2 are open due to no control signal being received, and the second switch SWR1 and the fourth switch SWR2 are closed, so that the first comparator CMP1 and the second comparator CMP2 do not respond to changes in the first sampling signal and the second sampling signal. When the CAN transceiver 1100 works as a transmitter and transmits a signal in a dominant state, the first switch SWD1 and the third switch SWD2 are closed and the second switch SWR1 and the fourth switch SWR2 are open under the control of the control signal, so that the first comparator CMP1 and the second comparator CMP2 respectively receive the first sampling signal and the second sampling signal and output a first comparison signal associated with the first sampling signal and a second comparison signal associated with the second sampling signal.

[0110] In this way, by controlling the closing and opening of the switches, the first comparison module and the second comparison module can respond to the first sampling signal and the second sampling signal, output the first comparison signal and the second comparison signal, and enable the common mode detection module to output the first current signal or the second current signal according to the first comparison signal and the second comparison signal, and further enable the first current signal or the second current signal to act on the driving module, so that the driving module can output a differential voltage signal that reduces common mode interference.

[0111] In the application scenario of Figure 6a , the first detection submodule detects whether there is common mode interference caused by positive voltage jitter, the second detection submodule detects whether there is common mode interference caused by negative voltage jitter, the reference voltage V2 can be configured to have a voltage value less than that of the reference voltage V3, and the reference voltage V4 can be configured to have a voltage value greater than that of the reference voltage V5, for example, when V3 = 2.6V and V5 = 2.4V, V2 = 2.4V and V4 = 2.6V can be configured. Those skilled in the art should understand that the voltage values of the reference voltage V2 and the reference voltage V4 can also be set to other values, as long as the comparison results of the first comparator and the second comparator make the first detection submodule and the second detection submodule not generate current when the second switch SWR2 and the fourth switch SWR2 are closed. The present application does not limit this.

[0112] The first terminal (terminal E) of the common-mode detection module 102 can be connected to the second terminal (terminal B) of the sampling module 101, and the second terminal (terminal G) of the common-mode detection module 102 can be connected to the third terminal (terminal C) of the sampling module 101. In this manner, in the common-mode detection module, the first comparison module and the second comparison module can receive the first sampling signal and the second sampling signal, respectively, and can output the first comparison signal and the second comparison signal, respectively. This allows the first current generation module and the second current generation module to respond to the first comparison signal and the second comparison signal, respectively, to generate the first current signal and the second current signal for reducing common-mode interference in the differential voltage signal, thereby enabling the common-mode detection module to generate the first current signal or the second current signal.

[0113] exist Figure 6a In an application scenario, in a possible implementation, the first current generating module 10212 includes a first field effect transistor MPC, a gate of the first field effect transistor MPC receives a first comparison signal VC_UP, a source of the first field effect transistor MPC is connected to the power supply voltage VCC, and a drain serves as the third terminal (F terminal) of the common-mode detection module 102. When the first comparison signal VC_UP turns on the first field effect transistor MPC, the drain of the first field effect transistor MPC generates a first current signal. When the first field effect transistor MPC is not turned on (cut off), no current is generated. The second current generating module 10222 includes a second field effect transistor MNC, a gate of the second field effect transistor MNC receives a second comparison signal VC_DN, a source of the second field effect transistor MNC is connected to the ground GND, and a drain serves as the fourth terminal (H terminal) of the common-mode detection module 102. When the second comparison signal VC_DN turns on the second field effect transistor MNC, the drain of the second field effect transistor MNC generates a second current signal. When the second field effect transistor MNC is not turned on (cut off), no current is generated.

[0114] Among them, the first field effect transistor MPC can be, for example, a P-type field effect transistor, and the second field effect transistor MNC can be, for example, an N-type field effect transistor. In this case, the gate of the first field effect transistor MPC is turned on when it receives a low-level signal, and a first current signal is generated in the first field effect transistor MPC. When it receives a high-level signal, the gate is turned off, and no current signal is generated in the first field effect transistor MPC. The gate of the second field effect transistor MNC is turned on when it receives a high-level signal, and a second current signal is generated in the second field effect transistor MNC. When it receives a low-level signal, the gate is turned off, and no current signal is generated in the second field effect transistor MNC. That is, in Figure 6aIn the application scenario, the generation of the first current signal and the absence of the second current signal indicates that the first comparison signal is low, i.e., the first sampling signal is greater than the reference voltage V3, and the second comparison signal is low, i.e., the second sampling signal is greater than the reference voltage V5, i.e., the differential voltage signal is too large (there is common-mode interference caused by positive voltage jitter). The generation of the second current signal and the absence of the first current signal indicates that the second comparison signal is high, i.e., the second sampling signal is less than the reference voltage V5, and the first comparison signal is high, i.e., the first sampling signal is less than the reference voltage V3, and the differential voltage signal is too small (there is common-mode interference caused by negative voltage jitter). Under normal circumstances, the voltage jitter of the two signal lines of the CAN bus is consistent, so the common-mode detection module can output at most one current signal at the same time.

[0115] In this way, in the common-mode detection module, the first current generation module and the second current generation module can receive the first comparison signal and the second comparison signal and generate a first current signal or a second current signal, so that the driving module can respond according to the first current signal or the second current signal and output a differential voltage signal that reduces common-mode interference.

[0116] Those skilled in the art should understand that the structures of the first current generating module and the second current generating module are not limited to Figure 6a As shown, as long as it can generate the first current signal or the second current signal as needed according to the comparison result indicated by the first comparison signal and the second comparison signal. The example of the common mode detection module generating the first current signal and the second current signal can be referred to below. Figure 9-10 and related descriptions.

[0117] Figure 6b This is an example of how the first comparison module, the first current generation module, the second comparison module, and the second current generation module are configured when the first current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are too small, and the second current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are too large.

[0118] like Figure 6bAs shown, in a possible implementation, the first detection submodule 1021 is used to detect whether there is common-mode interference caused by negative voltage jitter, and the second detection submodule 1022 is used to detect whether there is common-mode interference caused by positive voltage jitter. It can be seen from the above description that the reference voltage V3 can be set to 2.48V, the reference voltage V5 can be set to 2.5V, the reference voltage V2 voltage value can be set to a voltage value greater than the reference voltage V3, and the reference voltage V4 voltage value can be set to a voltage value less than the reference voltage V5, for example, V2=2.6V, V4=2.4V. Those skilled in the art should understand that the voltage values ​​of the reference voltage V2 and the reference voltage V4 can also be set to other values, as long as the comparison results of the first comparator and the second comparator make the first detection submodule and the second detection submodule generate no current when the second switch SWR2 and the fourth switch SWR2 are closed. This application does not impose any restrictions on this. The connection method of the devices of the first comparison module 10211 and the second comparison module 10221 can refer to Figure 6a Related description.

[0119] exist Figure 6b In an application scenario, in a possible implementation, when the first current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are too small, and the second current signal indicates that the voltage values ​​of the first sampling signal and the second sampling signal are too large, the first current generating module 10212 includes a second field effect transistor MNC, the gate of the second field effect transistor MNC receives the first comparison signal VC_UP, the source of the second field effect transistor MNC is connected to the ground GND, and the drain serves as the fourth terminal (H terminal) of the common mode detection module. When the first comparison signal VC_DN turns on the second field effect transistor MNC, the drain of the second field effect transistor MNC generates the first current signal, and when the second field effect transistor MNC is not turned on (cut off), no current signal is generated. The second current generating module 10222 includes a first field effect transistor MPC, the gate of the first field effect transistor MNC receives the second comparison signal VC_DN, the source of the first field effect transistor MPC is connected to the power supply voltage VCC, and the drain serves as the third end (F end) of the common mode detection module. When the second comparison signal VC_DN causes the first field effect transistor MPC to be turned on, the drain of the first field effect transistor MPC generates a second current signal. When the first field effect transistor MPC is not turned on (cut off), no current signal is generated.

[0120] Among them, the first field effect transistor MPC can be, for example, a P-type field effect transistor, and the second field effect transistor MNC can be, for example, an N-type field effect transistor. In this case, the gate of the first field effect transistor MPC is turned on when it receives a low-level signal, and a second current signal is generated in the first field effect transistor MPC. When it receives a high-level signal, the gate is turned off, and no current signal is generated in the first field effect transistor MPC. The gate of the second field effect transistor MNC is turned on when it receives a high-level signal, and a first current signal is generated in the second field effect transistor MNC. When it receives a low-level signal, the gate is turned off, and no current signal is generated in the second field effect transistor MNC. That is, in Figure 6b In the application scenario, the generation of the first current signal indicates that the differential voltage signal is too small (there is common-mode interference caused by negative voltage jitter), and the generation of the second current signal indicates that the differential voltage signal is too large (there is common-mode interference caused by positive voltage jitter).

[0121] exist Figure 6a In the application scenario, the first current generating module 10212 is used to generate a current signal when a low level signal is received, and the second current generating module 10222 is used to generate a current signal when a high level signal is received. Figure 6b In the application scenario, the first current generating module 10212 is used to generate a current signal when a high level signal is received, and the second current generating module 10222 is used to generate a current signal when a low level signal is received. It should be understood by those skilled in the art that the specific structures of the first current generating module 10212 and the second current generating module 10222 are not limited to Figure 6a and Figure 6b As shown, as long as it can generate the first current signal or the second current signal as needed according to the comparison result indicated by the first comparison signal and the second comparison signal, the present application does not limit the specific structure of the first current generating module 10212 and the second current generating module 10222.

[0122] The common-mode detection module may not include an operational amplifier, and therefore, there is no speed limitation when suppressing common-mode interference.

[0123] Those skilled in the art will appreciate that the specific structure of the common-mode detection module is not limited to the above example. For example, the common-mode detection module may be configured such that the first sampling signal and the second sampling signal are input to the positive input terminals of the first comparator and the second comparator, respectively, and the types of field-effect transistors in the first current generation module and the second current generation module are changed accordingly. As long as the common-mode interference in the first sampling signal and the second sampling signal can be responded to by generating a current that causes the common-mode component in the output signal of the driving module to change in a direction opposite to the common-mode interference, the common-mode interference will be sufficient.

[0124] Differential mode interference can be divided into two cases: one is overvoltage differential mode interference caused by voltage jitter, which increases the voltage difference between the two differential voltage signals; the other is undervoltage differential mode interference caused by voltage jitter, which reduces the voltage difference between the two differential voltage signals. For example, according to relevant standards, when the differential voltage signal is in a dominant state, the ideal voltage value of the input signal at the first end (end A) of the sampling module 101 can be equal to 3.5V, and the ideal voltage value of the input signal at the second end (end B) of the sampling module 101 can be equal to 1.5V, and the voltage difference between the two is 2V. When the differential voltage signal includes overvoltage differential mode interference, the voltage difference can be greater than 2V, and when it includes undervoltage differential mode interference, the voltage difference can be less than 2V.

[0125] The embodiment of the present application uses a differential mode detection module to determine whether the voltage difference between two sampling signals corresponding to two differential voltage signals is too large or too small, and then determines whether differential mode interference occurs in the two sampling signals, and indirectly determines whether the two differential voltage signals include differential mode interference that needs to be suppressed. When the presence of differential mode interference that needs to be suppressed is detected, a signal indicating that the voltage difference of the sampling signals is too large or too small is generated.

[0126] In one possible implementation, Figure 7 As shown, the differential mode detection module 103 includes a sampling amplifier AMP and an error amplifier EA. The first input terminal (e.g., the positive input terminal) of the sampling amplifier AMP serves as the first terminal (I terminal) of the differential mode detection module 103 to receive the first sampling signal. The second input terminal (negative input terminal) of the sampling amplifier AMP serves as the second terminal (J terminal) of the differential mode detection module 103 to receive the second sampling signal. The output terminal is connected to the first input terminal (negative input terminal) of the error amplifier EA. The second input terminal (positive input terminal) of the error amplifier EA is connected to the fifth reference voltage (reference voltage V6). The output terminal serves as the third terminal (K terminal) of the differential mode detection module 103 to output the first voltage signal VC.

[0127] The voltage value of the reference voltage V6 can be set, for example, to be equal to the ideal voltage difference of the differential voltage signal in the dominant state, for example, V6 = 2V. Those skilled in the art will appreciate that the voltage value of the reference voltage V6 can also be set to other values. For example, when a certain deviation is allowed in the voltage difference of the differential voltage signal in the dominant state, the voltage value of the reference voltage V6 can also be set based on the ideal voltage difference of 2V and the allowable deviation. This is not limited in this application. The first end (I end) of the differential mode detection module 103 can be connected to the second end (B end) of the sampling module 101, and the second end (J end) of the differential mode detection module 103 can be connected to the third end (C end) of the sampling module 101. In this manner, the differential mode detection module can respond to the first sampling signal and the second sampling signal to output the first voltage signal. This allows the driver module to respond to the first voltage signal and output a differential voltage signal that reduces differential mode interference.

[0128] In one possible implementation, the differential mode detection module is configured to, when the voltage difference between the first sampling signal and the second sampling signal is large, reduce the voltage value of the first voltage signal; and when the voltage difference between the first sampling signal and the second sampling signal is small, increase the voltage value of the first voltage signal. An example of how the differential mode detection module generates the first voltage signal can be found in the following. Figure 11-12 and related descriptions.

[0129] In this manner, the differential mode detection module can output a reduced first voltage signal when the CAN bus transmission signal is subject to differential mode interference caused by an overvoltage voltage difference; and can output a larger first voltage signal when the CAN bus transmission signal is subject to differential mode interference caused by an undervoltage voltage difference. When the reduced or increased first voltage signal is input to the driver module, the accuracy of the differential voltage signal output by the driver module to the CAN bus can be improved.

[0130] The differential mode detection module 103 is used to output a voltage signal based on the voltage difference between the two received signals, so that when the voltage difference between the two received signals is relatively large, the voltage value of the voltage signal becomes smaller, and when the voltage difference between the two received signals is relatively small, the voltage value of the voltage signal becomes larger. Those skilled in the art should understand that the specific structure of the differential mode detection module is not limited to the above example, as long as it can respond to the differential mode interference in the first sampling signal and the second sampling signal to generate a voltage that can cause the differential mode component in the output signal of the driving module to change in the opposite direction of the differential mode interference.

[0131] Figure 8 A schematic diagram of an exemplary structure of a driving module according to an embodiment of the present application is shown.

[0132] In one possible implementation, Figure 8As shown, the driver module 104 includes a first mirror current source I1, a second mirror current source I2, and a voltage-controlled current source VCCS. A switch S1 is connected between the first mirror current source I1 and the voltage-controlled current source VCCS, and a switch S2 is connected between the second mirror current source I2 and the voltage-controlled current source VCCS. The control terminals of the switches are connected to the signal line TX. When the CAN transceiver functions as a transmitter, when the CAN controller 1200 outputs a logic signal 1 (recessive state) via TX, switches S1 and S2 remain open, the driver module 104 has no output, and the voltage on the CAN bus is determined by the bias circuit; for example, both buses have a voltage of 2.5V. If the CAN controller 1200 outputs a logic signal 0 (dominant state) via TX, switches S1 and S2 close, turning on the voltage-controlled current source VCCS in the driver module 104 and starting to generate current, generating a differential voltage signal at the output terminal of the driver module 104. The output current of the voltage-controlled current source VCSS is controlled by the output voltage of the differential mode detection module 103. In the initial state where the switch is just closed, since the two bus voltages sampled by the sampling module 101 are still in the recessive state (for example, 2.5V and 2.5V), see Figure 7 , the differential mode detection module 103 is in the enabled state, the sampling amplifier AMP in the differential mode detection module 103 outputs 0, and the error amplifier EA outputs the amplified result of the reference voltage V6. This result serves as the initial input voltage of the voltage-controlled current source VCSS, causing the driver module 104 to generate an initial output in the dominant state. Next, the sampling module 101 samples the output of the driver module 104 and feeds it back to the common mode detection module 102 and the differential mode detection module 103. The outputs of the common mode detection module 102 and the differential mode detection module 103 in turn affect the output of the driver module 104, achieving the purpose of feedback correction.

[0133] The CAN bus includes a first CAN signal line and a second CAN signal line. During the calibration process, one end (N end) of the first mirror current source I1 obtains a first current signal, and the other end of the first mirror current source I1 is connected to the second CAN signal line; one end (L end) of the second mirror current source I2 obtains a second current signal, and the other end of the second mirror current source I2 is connected to the first CAN signal line; a voltage-controlled current source VCCS is connected between one end (N end) of the first mirror current source I1 and one end (L end) of the second mirror current source I2, and is used to receive a first voltage signal and generate a current based on the first voltage signal.

[0134] When the first current signal indicates that there is common-mode interference in the first and second sampling signals that makes the voltage value deviate upwards, and the second current signal indicates that there is common-mode interference in the first and second sampling signals that makes the voltage value deviate downwards, the first current signal is generated by the third end (F end) of the common-mode detection module, and the second current signal is generated by the fourth end (H end) of the common-mode detection module. Therefore, as long as one end (L end) of the second mirror current source I2 is connected to the fourth end (H end) of the common-mode detection module, the second current signal can be obtained and responded to, and as long as one end (N end) of the first mirror current source I1 is connected to the third end (F end) of the common-mode detection module, the first current signal can be obtained and responded to.

[0135] In response to the first current signal, the driving module can adjust the current flowing from the second CAN signal line into the other end of the first mirror current source, so as to adjust the voltage value of the differential voltage signal; in response to the second current signal, the driving module can adjust the current flowing from the other end of the second mirror current source to the first CAN signal line, so as to adjust the voltage value of the differential voltage signal; in response to the first voltage signal, the driving module can generate a current through the voltage-controlled current source, and adjust the current flowing from the second CAN signal line into the other end of the first mirror current source and the current flowing from the other end of the second mirror current source to the first CAN signal line, so as to adjust the voltage value of the differential voltage signal. In this way, the driving module can reduce the common-mode interference in the differential voltage signal according to the first current signal or the second current signal, and reduce the differential-mode interference in the differential voltage signal according to the first voltage signal.

[0136] The first mirror current source I1 can include a fifth field effect transistor MNB and a sixth field effect transistor MND. The source of the fifth field effect transistor MNB can be connected to the source of the sixth field effect transistor MND and the ground GND. The drain of the fifth field effect transistor MNB can be connected to the gate of the fifth field effect transistor MNB, the gate of the sixth field effect transistor MND, and the second end of the voltage-controlled current source VCCS, and serves as the first end (N end) of the driving module 104, connected to the third end (F end) of the common-mode detection module 102, for obtaining the first current signal. The drain of the sixth field effect transistor MND can be connected to the cathode of the diode D2, and the anode of the diode D2 serves as the second end (O end) of the driving module 104, connected to the second CAN signal line (CANL).

[0137] The second mirror current source I2 may include a third field-effect transistor (FET) MPB and a fourth field-effect transistor (FET) MPD. The source of the third field-effect transistor (FET) MPB may be connected to the source of the fourth field-effect transistor (MPD) and the power supply voltage terminal (VCC). The drain of the third field-effect transistor (MPB) may be connected to the gate of the third field-effect transistor (MPB), the gate of the fourth field-effect transistor (MPD), and the first terminal of the voltage-controlled current source (VCCS). The drain of the third field-effect transistor (MPB) may serve as the third terminal (L terminal) of the driver module 104 and be connected to the fourth terminal (H terminal) of the common-mode detection module 102 for obtaining the second current signal. The drain of the fourth field-effect transistor (MPD) may be connected to the anode of the diode D1. The cathode of the diode D1 serves as the fourth terminal (M terminal) of the driver module 104 and is connected to the first CAN signal line (CANH).

[0138] The third terminal of the voltage-controlled current source VCCS also serves as the fifth terminal (P terminal) of the driving module 104 , is connected to the third terminal (K terminal) of the differential mode detection module 103 , and is used to receive the first voltage signal.

[0139] In which, in the first mirror current source I1, the fifth field-effect transistor MNB and the sixth field-effect transistor MND can be, for example, N-type field-effect transistors, and the current flowing through the sixth field-effect transistor MND varies proportionally with the current flowing through the fifth field-effect transistor MNB; in the second mirror current source I2, the third field-effect transistor MPB and the fourth field-effect transistor MPD can be, for example, P-type field-effect transistors, and the current flowing through the fourth field-effect transistor MPD varies proportionally with the current flowing through the third field-effect transistor MPB.

[0140] In a possible implementation, when the driving module obtains the first current signal, the current flowing into the driving module from the second CAN signal line increases, and the voltage values ​​of the two differential voltage signals output by the driving module decrease.

[0141] When the driving module obtains the second current signal, the current flowing out of the driving module through the first CAN signal line increases, and the voltage values ​​of the two differential voltage signals output by the driving module increase.

[0142] For example, when the first mirror current source I1 obtains the first current signal, the current flowing through the fifth field effect transistor MNB and the current flowing through the sixth field effect transistor MND change, causing the voltages of the two differential voltage signals output by the driver module to change accordingly; when the second mirror current source I2 obtains the second current signal, the current flowing through the third field effect transistor MPB and the current flowing through the fourth field effect transistor MPD change, causing the voltages of the two differential voltage signals output by the driver module to change accordingly. The specific implementation method can be referred to below. Figure 9-10 and related descriptions.

[0143] In this way, when the differential voltage signal vibrates in the positive direction so that the driving module obtains the first current signal, the driving module can output a differential voltage signal with a reduced voltage value; when the differential voltage signal vibrates in the negative direction so that the driving module obtains the second current signal, the driving module can output a differential voltage signal with an increased voltage value, thereby improving the accuracy of the differential voltage signal output by the driving module to the CAN bus.

[0144] In one possible implementation, when the voltage value of the first voltage signal decreases, when the driving module receives the first voltage signal, the current flowing into the driving module from the second CAN signal line and the current flowing out of the driving module from the first CAN signal line both decrease, and the voltage difference between the two differential voltage signals output by the driving module decreases; when the voltage value of the first voltage signal increases, when the driving module receives the first voltage signal, the current flowing into the driving module from the second CAN signal line and the current flowing out of the driving module from the first CAN signal line both increase, and the voltage difference between the two differential voltage signals output by the driving module increases.

[0145] When the first voltage signal received by the voltage-controlled current source changes, the current flowing through the sixth field effect transistor MND and the current flowing through the fourth field effect transistor MPD produce the same change, and the voltage of the differential voltage signal output by the driving module changes accordingly. Figure 11-12 and related descriptions.

[0146] In this way, when the voltage difference of the differential voltage signal is overvoltage and the first voltage signal is input to the driving module, the driving module can reduce the voltage difference of the output differential voltage signal. When the voltage difference of the differential voltage signal is undervoltage and the first voltage signal is input to the driving module, the driving module can increase the voltage difference of the output differential voltage signal, so as to improve the accuracy of the differential voltage signal output by the driving module to the CAN bus.

[0147] Those skilled in the art should understand that the specific structures of the first mirror current source and the second mirror current source are not limited thereto, as long as the mirror change of the current at both ends of the mirror current source can be achieved.

[0148] As part of the transmitting circuit 20, the driver module 104 functions to output a dominant differential voltage signal when the received logic signal is 0. Furthermore, under the feedback of the sampling module 101, the common-mode detection circuit 102, and the differential-mode detection circuit 103, the driver module 104 can output two voltage signals based on the received first voltage signal, such that the voltage difference between the two voltage signals has the same changing trend as the voltage value of the received voltage signal. Furthermore, when the common-mode detection module 102 generates a first current signal, the driver module 104 can adjust the current flowing into the other end of the first mirror current source on the second CAN signal line based on the first current signal, so that the voltage values ​​of the two differential voltage signals decrease to the same extent. Furthermore, when the common-mode detection module 102 generates a second current signal, the driver module 104 can adjust the current flowing out of the other end of the second mirror current source to the first CAN signal line based on the second current signal, so that the voltage values ​​of the two differential voltage signals increase to the same extent. In the driver module 104, the first mirror current source, the second mirror current source, and the switch can be implemented based on existing technologies and are not limited in this application.

[0149] During the calibration process, when the first current signal indicates that common-mode interference that causes the voltage value to be relatively small exists in the first sampling signal and the second sampling signal, and the second current signal indicates that common-mode interference that causes the voltage value to be relatively large exists in the first sampling signal and the second sampling signal, one end (N end) of the first mirror current source I1 can be set to obtain the second current signal, and one end (L end) of the second mirror current source I2 can be set to obtain the first current signal.

[0150] In this case, the function implemented by the driver module 104 is to output a differential voltage signal in a dominant state when the received logic signal is 0. Under the feedback effect of the sampling module 101, the common-mode detection circuit 102, and the differential-mode detection circuit 103, the driver module 104 can output two voltage signals based on the received first voltage signal, so that the change trend of the voltage difference between the two voltage signals is the same as the change trend of the voltage value of the received voltage signal. In addition, when the common-mode detection module 102 generates a first current signal, the driver module 104 can adjust the current flowing from the other end of the second mirror current source to the first CAN signal line according to the first current signal, so that the voltage values ​​of the two differential voltage signals increase to the same extent. In addition, when the common-mode detection module 102 generates a second current signal, the driver module 104 can adjust the current flowing into the other end of the first mirror current source of the second CAN signal line according to the second current signal, so that the voltage values ​​of the two differential voltage signals decrease to the same extent.

[0151] The following is an exemplary description of the working process of the transmitting circuit according to the embodiment of the present application to suppress common-mode interference and differential-mode interference and output a differential signal with higher accuracy.

[0152] In a possible implementation, the transmitting circuit receives an enable signal from the microcontroller. When the enable signal is not received, the common mode detection module 102 and the differential mode detection module 103 are in a disabled state.

[0153] When the enable signal is received, the common mode detection module 102 and the differential mode detection module 103 enter the enabled state from the disabled state. In the enabled state, the first comparator and the second comparator in the common mode detection module 102 and the sampling amplifier and the error amplifier in the differential mode detection module 103 operate normally.

[0154] In this way, the power consumption of the transmitting circuit can be reduced, and further, the power consumption of the transceiver can be reduced.

[0155] For example, when the transceiver is used only as a receiver, the common-mode detection module 102 and the differential-mode detection module 103 can be set to remain disabled. When the transceiver is used as a transmitter, the common-mode detection module 102 and the differential-mode detection module 103 are enabled to save power consumption of the transmission circuit. The enabling of the common-mode detection module 102 and the differential-mode detection module 103 can be triggered, for example, by an enable signal.

[0156] When the common-mode detection module 102 does not receive an enable signal, the first switch SWD1, the second switch SWR1, the third switch SWD2, and the fourth switch SWR2 can remain open, the first comparator CMP1 and the second comparator CMP2 are not enabled, and other power-consuming components within the first comparator CMP1 and the second comparator CMP2, except for the components that respond to the enable signal, stop operating to save power. When the differential-mode detection module 103 does not receive an enable signal, the sampling amplifier AMP and the error amplifier EA are not enabled. Other power-consuming components within the sampling amplifier AMP and the error amplifier EA, except for the components that respond to the enable signal, stop operating to save power. When an enable signal is received, the comparators and amplifiers are enabled, the first switch SWD1 and the third switch SWD2 remain open, and the second switch SWR1 and the fourth switch SWR2 can be closed. In this case, the field-effect transistors (MPC and MNC) of the common-mode detection module are both turned off, and no current signal is generated by the common-mode detection module.

[0157] In one possible implementation, the sending circuit 20 receives a control signal from the microcontroller 1300, where the control signal indicates a differential voltage signal in a dominant state transmitted on the first CAN signal line and the second CAN signal line. When the control signal is not received, the first switch and the third switch in the common-mode detection module are disconnected, and the second switch and the fourth switch are closed. When the control signal is received, the first switch and the third switch in the common-mode detection module are closed, and the second switch and the fourth switch are disconnected.

[0158] In this way, the control signal is associated with the dominant state of the differential voltage signal transmitted by the transceiver to the CAN bus. Therefore, when the transceiver transmits the differential voltage signal in this state, the common-mode detection module in the transmitting circuit 20 can respond to the control signal, thereby improving the accuracy of the output differential voltage signal. Furthermore, the provision of a switch controlled by the control signal ensures that the power consumption of the transmitting circuit when transmitting in the recessive state is lower than when transmitting in the dominant state, further reducing the power consumption of the transmitting circuit and the transceiver.

[0159] For example, when the CAN transceiver acts as a transmitter, according to the information to be sent, such as 0101, the state information of the differential voltage signal output by the transceiver can be, for example, dominant state-recessive state-dominant state-recessive state. The enable signal and the control signal can be used to enable the common mode detection module and the differential mode detection module to respond to the sampling signal when the dominant state is sent, so that the sending circuit 20 can complete the correction of the differential voltage signal.

[0160] by Figure 6a Taking the application scenario of FIG1 as an example, when the CAN transceiver functions as a transmitter and transmits a dominant signal, the microcontroller 1300 sends an enable signal and a control signal. In the transmitting circuit 20, upon receiving the control signal from the microcontroller 1300, the common-mode detection module 102 can, in accordance with the control signal, close the first switch SWD1 and open the second switch SWR1, allowing the first sampling signal to be input to the negative input terminal of the first comparator CMP1. The first comparator CMP1 is enabled, allowing it to compare the voltage value of the first sampling signal with the voltage value of the reference voltage V3 and output a first comparison signal VC_UP to control the on and off state of the first field-effect transistor MPC. When the first field-effect transistor MPC is on, the common-mode detection module 102 generates a first current signal.

[0161] The common-mode detection module 102 can close the third switch SWD2 and open the fourth switch SWR2 based on the control signal, allowing the second sampling signal to be input to the negative input terminal of the second comparator CMP2. The second comparator CMP2 is enabled, allowing it to compare the voltage value of the second sampling signal with the voltage value of the reference voltage V5 and output a second comparison signal VC_DN to control the conduction and cutoff of the second field-effect transistor MNC. When the second field-effect transistor MNC is turned on, the common-mode detection module 102 generates a second current signal.

[0162] In differential mode detection module 103, sampling amplifier AMP and error amplifier EA are enabled. The sampling amplifier AMP allows the first sampling signal and the second sampling signal to be differentially amplified by the sampling amplifier AMP. The error amplifier EA allows the voltage value output from the output terminal of the sampling amplifier AMP and the voltage value of the reference voltage V6 to be differentially amplified by the error amplifier EA, thereby outputting a first voltage signal.

[0163] Those skilled in the art should understand that the first comparator CMP1, the second comparator CMP2, the sampling amplifier AMP, and the error amplifier EA may also operate autonomously without being controlled by the control signal, which is not limited in the present embodiment.

[0164] The voltage of the differential voltage signal in the recessive state is not controlled by the driving module. The embodiment of the present application controls the voltage of the differential voltage signal through the sampling module, the common-mode detection module, the differential-mode detection module, and the driving module. It is a solution for suppressing common-mode interference and differential-mode interference of the differential voltage signal in the dominant state.

[0165] The following application scenario is taken as an example, where the differential voltage signal of the CAN bus is in a dominant state, and the first current signal indicates that there is common mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be larger, and the second current signal indicates that there is common mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be smaller. Figure 9-10 , an exemplary description is given of the working process of reducing common-mode interference by the transmitting circuit in an embodiment of the present application.

[0166] As can be seen from the above description, when the CAN bus is in a dominant state, ideally, the differential voltage signal transmitted by the CAN bus is within a normal operating range (the voltage of the first CAN signal line (CANH) may be, for example, 3.5V, and the voltage of the second CAN signal line (CANL) may be, for example, 1.5V). In this case, the current (sinking current) flowing through the fourth field-effect transistor MPD is equal to the current (sourcing current) flowing through MND, so that the fourth terminal (M terminal) and the second terminal (O terminal) of the driver module 104 output an ideal differential voltage signal (the voltage of the first CAN signal line (CANH) is 3.5V, the voltage of the second CAN signal line (CANL) is 1.5V, and the voltage difference between the first CAN signal line (CANH) and the second CAN signal line (CANL) is 2V).

[0167] For example, when the CAN transmitter sends a differential voltage signal in a dominant state, in the transmitting circuit 20, under the control of the control signal, the first switch SWD1 and the third switch SWD2 are in a closed state, the second switch SWR1 and the fourth switch SWR2 are in an open state, and under the control of the enable signal, the first comparator CMP1, the second comparator CMP2, the sampling amplifier AMP and the error amplifier EA are in an enabled state.

[0168] The first field-effect transistor (MPC) may be, for example, a P-type field-effect transistor (PFET), and its conduction condition may be, for example, a low-level conduction condition; the second field-effect transistor (MNC) may be, for example, an N-type field-effect transistor (NFET), and its conduction condition may be, for example, a high-level conduction condition. In this case, the first comparison signal VC_UP and the second comparison signal VC_DN may be input to the first field-effect transistor (MPC) and the second field-effect transistor (MNC), respectively, causing one of the first field-effect transistor (MPC) and the second field-effect transistor (MNC) to generate a current signal.

[0169] The following describes, by way of example, how the transmitting circuit implements the above-mentioned function of suppressing common-mode interference, with respect to different situations in which common-mode interference is caused by positive jitter and common-mode interference is caused by negative jitter.

[0170] For example, when the CAN bus is subject to external low-frequency and large-scale interference, the first CAN signal line (CANH) and the second CAN signal line (CANL) may instantly experience a jitter voltage (up to ±40V). For example, the jitter voltage of the interfered first CAN signal line (CANH) may be, for example, 23.5V, and the jitter voltage of the interfered second CAN signal line (CANL) may be, for example, 21.5V. In this case, the jitter direction of the jitter voltage of the first CAN signal line (CANH) and the jitter voltage of the second CAN signal line (CANL) are both positive and the degree of jitter is the same (both increased by 20V). It can be considered that the external low-frequency and large-scale interference has a common-mode interference on the signal transmitted on the CAN bus caused by the forward voltage jitter. The embodiment of the present application can suppress the forward voltage jitter of the CAN bus through the collaboration of the sampling module, the common-mode detection module and the driving module to ensure that the sending circuit works normally.

[0171] like Figure 9 As shown, if large positive jitter occurs on the first CAN signal line (CANH) and the second CAN signal line (CANL), in the sampling module 101, the output first sampling signal CANH_SEN and the second sampling signal CANL_SEN also quickly follow and increase, and are output to the first end (E end) and the second end (G end) of the common mode detection module 102, respectively.

[0172] In the common-mode detection module 102 , the voltage values ​​of the first comparison signal VC_UP output by the first comparator CMP1 and the second comparison signal VC_DN output by the second comparator CMP2 both decrease, causing the second field-effect transistor MNC to be non-conductive (cut-off) and the first field-effect transistor MPC to be conductive. The third terminal (terminal F) of the common-mode detection module 102 outputs the first current signal to the driving module 104 .

[0173] In the driver module 104, the direction of the output current of the voltage-controlled current source VCCS can, for example, flow from the drain of the third field-effect transistor MPB to the drain of the fifth field-effect transistor MNB. The first current signal is added to the output current of the voltage-controlled current source VCCS, increasing the current flowing through the fifth field-effect transistor MNB. Since the current flowing through the fifth field-effect transistor MNB is proportional to the current flowing through the sixth field-effect transistor MND, the source current flowing through the sixth field-effect transistor MND also increases, causing the voltage signal output by the second terminal (terminal O) of the driver module 104 to decrease. This, in turn, causes the voltage of the second CAN signal line (CANL) of the CAN bus to decrease. Since the second CAN signal line (CANL) is connected to the first CAN signal line (CANH) via the terminal resistor R5, the voltage of the first CAN signal line (CANH) also decreases. This can quickly lower the voltages of the first CAN signal line (CANH) and the second CAN signal line (CANL), suppress the impact of positive jitter, and quickly restore the voltages of the first CAN signal line (CANH) and the second CAN signal line (CANL) to a normal operating range (the voltage of the first CAN signal line (CANH) can be, for example, close to 3.5V, and the voltage of the second CAN signal line (CANL) can be, for example, close to 1.5V).

[0174] In this way, it is possible to identify that the transmission signal of the CAN bus is subject to common-mode interference caused by positive voltage jitter, and suppress the large positive jitter of the transmission signal of the CAN bus, thereby suppressing the common-mode interference in the differential voltage signal output by the CAN bus and improving the accuracy of the differential voltage signal output by the sending circuit to the CAN bus.

[0175] In a possible implementation, the external low-frequency large-amplitude interference can also cause common-mode interference to the signal transmitted on the CAN bus due to negative voltage jitter. For example, the jitter voltage of the first CAN signal line (CANH) subject to interference can be, for example, -21.5 V, and the jitter voltage of the second CAN signal line (CANL) subject to interference can be, for example, -23.5 V. In this case, the jitter directions of the jitter voltages of the first CAN signal line (CANH) and the second CAN signal line (CANL) are both negative, and the jitter degrees are the same (decrease by 25 V), and it can be considered that the external low-frequency large-amplitude interference causes common-mode interference to the signal transmitted on the CAN bus due to negative voltage jitter. The embodiment of the present application can suppress the negative voltage jitter of the CAN bus by cooperation of the sampling module, the common-mode detection module, and the driving module, and ensure the normal operation of the sending circuit.

[0176] For example, as shown in FIG. 1, if the first CAN signal line (CANH) and the second CAN signal line (CANL) are subject to large negative jitter, in the sampling module 101, the output first sampling signal CANH_SEN and the second sampling signal CANL_SEN also quickly follow the decrease and are output to the first end (E end) and the second end (G end) of the common-mode detection module 102, respectively. Figure 10

[0177] In the common-mode detection module 102, the voltage values of the first comparison signal VC_UP output by the first comparator CMP1 and the second comparison signal VC_DN output by the second comparator CMP2 are both increased, so that the first field effect transistor MPC is not conductive (cut off), the second field effect transistor MNC is conductive, and the driving module 104 inputs the second current signal to the fourth end (H end) of the common-mode detection module 102.

[0178] ​In the driver module 104, the direction of the output current of the voltage-controlled current source VCCS can, for example, flow from the drain of the third field-effect transistor MPB to the drain of the fifth field-effect transistor MNB. The second current signal is added to the output current of the voltage-controlled current source VCCS, increasing the current flowing through the third field-effect transistor MPB. Since the current flowing through the third field-effect transistor MPB is proportional to the current flowing through the fourth field-effect transistor MPD, the sink current flowing through the fourth field-effect transistor MPD also increases, causing the voltage signal output by the fourth terminal (terminal M) of the driver module 104 to increase. In other words, the voltage of the first CAN signal line (CANH) increases. Since the first CAN signal line (CANH) is connected to the second CAN signal line (CANL) via the terminal resistor R5, the voltage of the second CAN signal line (CANL) also increases. In this way, the voltages of the first CAN signal line (CANH) and the second CAN signal line (CANL) can be quickly raised, the influence of negative jitter can be suppressed, and the voltages of the first CAN signal line (CANH) and the second CAN signal line (CANL) can be quickly restored to a normal operating range (the voltage of the first CAN signal line (CANH) can be, for example, close to 3.5V, and the voltage of the second CAN signal line (CANL) can be, for example, close to 1.5V).

[0179] In this way, it is possible to identify that the transmission signal of the CAN bus is subject to common-mode interference caused by negative voltage jitter, and suppress the large negative jitter of the transmission signal of the CAN bus, thereby suppressing the common-mode interference in the differential voltage signal output by the CAN bus and improving the accuracy of the differential voltage signal output by the sending circuit to the CAN bus.

[0180] In one possible implementation, when the CAN bus is subject to external low-frequency and large-amplitude interference, the first CAN signal line (CANH) and the second CAN signal line (CANL) may momentarily experience a jitter voltage. If the jitter degree of the jitter voltage of the first CAN signal line (CANH) and the jitter voltage of the second CAN signal line (CANL) are different, it can be considered that the external low-frequency and large-amplitude interference has caused differential mode interference to the signal transmitted on the CAN bus due to voltage jitter. The following takes the case of the CAN bus differential voltage signal being dominant as an example, combined with Figure 11-12 , an exemplary description is given of the working process of reducing differential mode interference by the transmitting circuit in an embodiment of the present application.

[0181] The following describes, by way of example, how the transmitting circuit implements the above-mentioned function of suppressing differential mode interference, with respect to different situations where differential mode interference is caused by overvoltage and differential mode interference is caused by undervoltage.

[0182] For example, according to the relationship between the voltage difference affected by the interference and the ideal voltage difference, differential mode interference can be divided into two cases: voltage difference overvoltage and voltage difference undervoltage.

[0183] For example, the jitter voltage of the first CAN signal line (CANH) interfered can be 5.5V, and the jitter voltage of the second CAN signal line (CANL) interfered can be 2.5V. After being interfered, the voltage of the first CAN signal line (CANH) increases by 2V, and the voltage of the second CAN signal line (CANL) increases by 1V. The jitter degree of the jitter voltage of the first CAN signal line (CANH) is different from that of the second CAN signal line (CANL), and the voltage difference after being interfered is 3V, which is greater than the ideal voltage difference (for example, 2V). Therefore, the signal transmitted on the CAN bus has overvoltage differential mode interference caused by voltage jitter. In this case, the voltage jitter of the CAN bus can be suppressed by cooperation of the sampling module, the differential mode detection module and the driving module, so as to ensure normal operation of the sending circuit.

[0184] For example, as shown in FIG. 1, if the first CAN signal line (CANH) and the second CAN signal line (CANL) jitter to make the voltage difference between the first CAN signal line (CANH) and the second CAN signal line (CANL) larger, in the sampling module 101, the voltage difference between the first sampling signal CANH_SEN and the second sampling signal CANL_SEN output is also rapidly followed to increase, and the first sampling signal CANH_SEN and the second sampling signal CANL_SEN are respectively output to the first end (I end) and the second end (J end) of the differential mode detection module 103. Figure 11

[0185] In the differential mode detection module 103, the voltage difference between the signals input to the first input end (positive input end) and the second input end (negative input end) of the sampling amplifier AMP is large, the voltage value output by the output end of the sampling amplifier AMP is large, that is, the voltage value of the signal input to the second input end (negative input end) of the error amplifier EA is large, and the voltage value of the signal input to the first input end (positive input end) of the error amplifier EA is unchanged. Therefore, the first voltage signal VC output by the error amplifier EA is small, so that the third end (K end) of the differential mode detection module 103 outputs the first voltage signal with small voltage to the driving module 104.

[0186] ​In the driver module 104, the direction of the output current of the voltage-controlled current source VCCS can, for example, flow from the drain of the third field-effect transistor MPB to the drain of the fifth field-effect transistor MNB. The decreasing first voltage signal is input into the voltage-controlled current source VCCS, causing the output current of the voltage-controlled current source VCCS to decrease. The current flowing through the fourth field-effect transistor MPD and the current flowing through the sixth field-effect transistor MND also decrease accordingly. This can quickly lower the voltage difference between the second CAN signal line (CANL) and the first CAN signal line (CANH), suppressing the impact of voltage jitter, and ensuring that the voltage difference between the differential voltage signals output from the fourth terminal (M terminal) and the second terminal (O terminal) of the driver module 104 is close to the ideal voltage difference (2V) and remains stable.

[0187] In this way, the transmitting circuit can suppress the voltage jitter of the transmission signal of the CAN bus when the transmission signal of the CAN bus is subject to overvoltage differential mode interference caused by voltage jitter, thereby suppressing the differential mode interference in the differential voltage signal output by the CAN bus and improving the accuracy of the differential voltage signal output by the transmitting circuit to the CAN bus.

[0188] In one possible implementation, the jitter voltage of the disturbed first CAN signal line (CANH) may be, for example, 4.5V, and the jitter voltage of the disturbed second CAN signal line (CANL) may be, for example, 3.5V. Then, after the interference, the voltage of the first CAN signal line (CANH) increases by 1V, and the voltage of the second CAN signal line (CANL) increases by 2V. The jitter degree of the jitter voltage of the first CAN signal line (CANH) and the jitter voltage of the second CAN signal line (CANL) are different, and the voltage difference after the interference is 1V, which is less than the ideal voltage difference. Therefore, the signal transmitted on the CAN bus has undervoltage differential mode interference caused by voltage jitter. In this case, the embodiment of the present application can suppress the voltage jitter of the CAN bus through the collaboration of the sampling module, the differential mode detection module, and the driver module to ensure that the sending circuit works normally.

[0189] For example, if Figure 12 As shown, if the first CAN signal line (CANH) and the second CAN signal line (CANL) jitter so that the voltage difference between the first CAN signal line (CANH) and the second CAN signal line (CANL) becomes smaller, in the sampling module 101, the voltage difference between the output first sampling signal CANH_SEN and the second sampling signal CANL_SEN also quickly follows and decreases, and the first sampling signal CANH_SEN and the second sampling signal CANL_SEN are respectively output to the first end (I end) and the second end (J end) of the differential mode detection module 103.

[0190] In the differential mode detection module 103, the voltage difference between the signals inputted at the first input terminal (positive input terminal) and the second input terminal (negative input terminal) of the sampling amplifier AMP decreases, and the voltage value outputted at the output terminal of the sampling amplifier AMP decreases, that is, the voltage value of the signal inputted at the second input terminal (negative input terminal) of the error amplifier EA decreases, and the voltage value of the signal inputted at the first input terminal (positive input terminal) of the error amplifier EA remains unchanged. Then, the first voltage signal VC outputted by the error amplifier EA increases, so that the third terminal (K terminal) of the differential mode detection module 103 outputs the increased first voltage signal to the driving module 104.

[0191] In the driver module 104, the direction of the output current of the voltage-controlled current source VCCS can, for example, flow from the drain of the third field-effect transistor MPB to the drain of the fifth field-effect transistor MNB. The increased first voltage signal is input into the voltage-controlled current source VCCS, causing the output current of the voltage-controlled current source VCCS to increase. The current flowing through the fourth field-effect transistor MPD and the current flowing through the sixth field-effect transistor MND also increase accordingly. This can quickly increase the voltage difference between the second CAN signal line (CANL) and the first CAN signal line (CANH), suppressing the impact of voltage jitter, and ensuring that the voltage difference between the differential voltage signals output from the fourth terminal (M terminal) and the second terminal (O terminal) of the driver module 104 is close to the ideal voltage difference (2V) and remains stable.

[0192] In this way, the transmitting circuit can suppress the voltage jitter of the transmission signal of the CAN bus when the transmission signal of the CAN bus is subject to undervoltage differential mode interference caused by voltage jitter, thereby suppressing the differential mode interference in the differential voltage signal output by the CAN bus and improving the accuracy of the differential voltage signal output by the transmitting circuit to the CAN bus.

[0193] The above describes the suppression of common-mode interference or differential-mode interference by the transmitting circuit of the embodiment of the present application, respectively, in view of the situation where external low-frequency and large-amplitude interference causes common-mode interference or differential-mode interference to the signal transmitted on the CAN bus due to voltage jitter. It should be understood by those skilled in the art that common-mode interference and differential-mode interference can exist at the same time. The following takes the case of the differential voltage signal of the CAN bus being in a dominant state as an example, combined with Figure 13 , an exemplary method for reducing differential-mode interference and common-mode interference by the transmitting circuit of an embodiment of the present application is described in detail.

[0194] For example, when you want to send a differential voltage signal in a dominant state to the CAN bus, the jitter voltage of the interfered first CAN signal line (CANH) may be, for example, 22.5V, and the jitter voltage of the interfered second CAN signal line (CANL) may be, for example, 19.5V. This can be seen as the first CAN signal line (CANH) and the second CAN signal line (CANL) being subjected to common-mode interference, causing both voltages to increase by 18V, and being subjected to differential-mode interference, causing the first CAN signal line (CANH) to increase by another 1V. In this case, the embodiment of the present application can collaboratively suppress the voltage jitter of the CAN bus through the sampling module 101, the common-mode detection module 102, the differential-mode detection module 103, and the driver module 104, to ensure that the sending circuit operates normally.

[0195] like Figure 13 As shown, the microcontroller 1300 causes the CAN controller 1200 to send a logic signal representing "0" to the driver module 104 of the CAN transceiver 1100 to control the switch of the driver module 104 (see Figure 8 The microcontroller 1300 sends control signals to the common-mode detection module 102 and differential-mode detection module 103 of the transmitting circuit 20 to control the states of the switches (SWD1, SWD2, SWR1, SWR2) in the common-mode detection module 102 and differential-mode detection module 103. The driver module 104 in the transmitting circuit 20 first outputs a differential voltage signal, which is then received by the sampling module 101.

[0196] exist Figure 13 In the example, assuming that the differential voltage signal received by the sampling module 101 is a signal with common-mode interference and overvoltage differential-mode interference caused by negative jitter, the voltage value of the first sampling signal CANH_SEN and the second sampling signal CANL_SEN obtained by sampling decreases and the voltage difference increases due to the common-mode interference and differential-mode interference. In response to the decrease in the voltage value of the first sampling signal CANH_SEN and the second sampling signal CANL_SEN, in the common-mode detection module 102, the output signals of the first comparator CMP1 and the second comparator CMP2 are both high, the first field-effect transistor MPC is turned off, and the second field-effect transistor MNC is turned on. The common-mode detection module 102 can receive the second current signal output by the driving module 104. In response to the increase in the voltage difference between the first sampling signal CANH_SEN and the second sampling signal CANL_SEN, in the differential-mode detection module 103, the output signal of the sampling amplifier AMP increases, and the first voltage signal VC output by the error amplifier EA decreases.

[0197] Based on this, in the driver module 104, the second current signal is obtained and the first voltage signal is received simultaneously. As can be seen from the above description, when the driver module 104 obtains the second current signal, the current flowing through the fourth field effect transistor MPD in the driver module 104 becomes larger, so that the voltage output by the fourth terminal (M terminal) and the second terminal (O terminal) of the driver module 104 becomes higher, thereby reducing the common mode interference caused by negative jitter; when the driver module 104 receives the reduced first voltage signal, the current flowing through the fourth field effect transistor MPD and the current flowing through the sixth field effect transistor MND in the driver module 104 are both reduced, so that the voltage difference between the voltage output by the fourth terminal (M terminal) and the second terminal (O terminal) of the driver module 104 is reduced, thereby reducing the overvoltage differential mode interference caused by jitter.

[0198] Among them, reducing common mode interference can be completed before reducing differential mode interference. The reason is that the signals output by the first comparator CMP1 and the second comparator CMP2 are larger, and the signal output by the error amplifier EA is smaller. Therefore, the influence of the second current signal on the driving module can be stronger than the influence of the first voltage signal on the driving module. In other words, Figure 13 In the illustrated embodiment, before the common-mode interference is reduced, the second current signal is always present. The driver module 104 responds to the second current signal, causing the current flowing through the fourth field-effect transistor MPD to increase and become different from the current flowing through the sixth field-effect transistor MND. During this process, although the driver module 104 also responds to the first voltage signal, causing the current of the fourth field-effect transistor MPD to decrease, the degree of decrease in the current of the fourth field-effect transistor MPD is weaker than the degree of increase in the current of the fourth field-effect transistor MPD. Therefore, the effect of reducing the differential-mode interference is not obvious. After the common-mode interference is reduced, the common-mode detection module 102 no longer generates the second current signal, and the current of the fourth field-effect transistor MPD no longer increases. In this case, under the action of the first voltage signal, the current of the fourth field-effect transistor MPD and the current of the sixth field-effect transistor MND are both reduced, and the differential-mode interference is reduced, so that the driver module 104 outputs a differential voltage signal with a stable voltage value and voltage difference.

[0199] Those skilled in the art should understand that, according to the different values ​​of the differential voltage signal received by the sampling module, the common-mode interference and differential-mode interference present in the differential voltage signal may also be different types of combinations. For example, the differential voltage signal may also be a signal with common-mode interference and undervoltage differential-mode interference caused by negative jitter; or a signal with common-mode interference and overvoltage differential-mode interference caused by positive jitter; or a signal with common-mode interference and undervoltage differential-mode interference caused by positive jitter. There may also be only common-mode interference or differential-mode interference in the differential voltage signal. The embodiment of the present application may adaptively process the differential voltage signal according to the different values ​​of the differential voltage signal received by the sampling module. Figure 13Taking the circuit structure of as an example, for example, according to different values ​​of the differential voltage signal received by the sampling module, the transmitting circuit 20 can generate different signals. Specifically, when the transmitting circuit 20 only generates the first current signal, the common-mode interference caused by positive voltage jitter in the differential voltage signal can be reduced according to the first current signal; when the transmitting circuit 20 only generates the second current signal, the common-mode interference caused by negative voltage jitter in the differential voltage signal can be reduced according to the second current signal; when the transmitting circuit 20 only generates the first voltage signal, the overvoltage or undervoltage differential-mode interference caused by voltage jitter in the differential voltage signal can be reduced according to the first voltage signal; when the transmitting circuit 20 generates the first current signal and the first voltage signal, the common-mode interference caused by positive voltage jitter in the differential voltage signal and the overvoltage or undervoltage differential-mode interference caused by the first current signal and the first voltage signal can be reduced according to the first current signal and the first voltage signal; when the transmitting circuit 20 generates the second current signal and the first voltage signal, the common-mode interference caused by negative voltage jitter in the differential voltage signal and the overvoltage or undervoltage differential-mode interference caused by the second current signal and the first voltage signal can be reduced.

[0200] In this way, the transmitting circuit can adapt to the correction work of the differential voltage signal under various interferences, thereby improving the processing capability of the transmitting circuit for the differential voltage signal.

[0201] above Figures 9-13 This is an exemplary method for reducing interference in a differential voltage signal in an application scenario where the first current signal indicates that there is common-mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be relatively large, and the second current signal indicates that there is common-mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be relatively small. Those skilled in the art should understand that in an application scenario where the first current signal indicates that there is common-mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be relatively small, and the second current signal indicates that there is common-mode interference in the first sampling signal and the second sampling signal that causes the voltage value to be relatively large, the transmitting circuit in the embodiment of the present application can also reduce interference in the differential voltage signal.

[0202] An embodiment of the present application further provides a CAN transceiver, comprising the transmitting circuit described above.

[0203] In a possible implementation, the transceiver includes a transmitting circuit and a receiving circuit, and the receiving circuit includes the sampling module.

[0204] In the transmitting circuit, the driver module receives the logic signal output by the CAN controller and converts it into a differential voltage signal;

[0205] When the common-mode detection module and the differential-mode detection module are in an enabled state and the common-mode detection module receives a control signal, the transmitting circuit outputs two differential voltage signals through the driving module.

[0206] The specific implementation of the transceiver as a transmitter and receiver can be referred to above. Figure 2 The relevant description will not be repeated here.

[0207] In this way, the transmitting circuit can be used in conjunction with the receiving circuit in the transceiver, reducing the hardware cost of the transmitting circuit and, by extension, the hardware cost of the transceiver itself. The common-mode detection module and differential-mode detection module of the transmitting circuit can be located within the transceiver, and the voltage-controlled current source can be embedded within the driver module, eliminating the need to occupy the space on the plate connected to the transceiver and reducing the plate area.

[0208] The transmitting circuit of the embodiment of the present application can also be applied to communication protocols based on the low-voltage differential signaling (LVDS) physical layer transmission characteristics, such as the mobile industry processor interface (MIPI).

[0209] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A transmitting circuit of a controller area network (CAN) transceiver, characterized in that: include: A sampling module is used to sample the two differential voltage signals output by the driving module to generate a first sampling signal and a second sampling signal respectively; a common-mode detection module, configured to generate a first current signal or a second current signal based on the first sampling signal and the second sampling signal, wherein the first current signal indicates that common-mode interference causing a larger voltage value exists in the first sampling signal and the second sampling signal, and the second current signal indicates that common-mode interference causing a smaller voltage value exists in the first sampling signal and the second sampling signal; a differential mode detection module, configured to generate a first voltage signal based on the first sampling signal and the second sampling signal, wherein the first voltage signal indicates that differential mode interference exists between the first sampling signal and the second sampling signal, causing the voltage difference to be larger or smaller; A driving module includes a voltage-controlled current source, a first mirror current source, and a second mirror current source, and is configured to drive the first mirror current source and the second mirror current source according to the current of the voltage-controlled current source to output the two differential voltage signals to a CAN bus, and control the first mirror current source or the second mirror current source by the first current signal or the second current signal to reduce common-mode interference in the differential voltage signal, and control the voltage-controlled current source by the first voltage signal to reduce differential-mode interference in the differential voltage signal.

2. The circuit according to claim 1, characterized in that The common mode detection module includes a first detection submodule and a second detection submodule. The first detection submodule includes a first comparison module and a first current generation module, the first comparison module receives the first sampling signal, compares the voltage value of the first sampling signal with the voltage value of a first reference voltage to obtain a first comparison signal, and the first current generation module generates the first current signal according to the first comparison signal; The second detection submodule includes a second comparison module and a second current generation module. The second comparison module receives the second sampling signal, compares the voltage value of the second sampling signal with the voltage value of the second reference voltage to obtain a second comparison signal, and the second current generation module generates the second current signal according to the second comparison signal.

3. The circuit according to claim 2, characterized in that The first current generating module includes a first field effect transistor, wherein a gate of the first field effect transistor receives the first comparison signal, a source of the first field effect transistor is connected to a power supply voltage, and a drain serves as a third terminal of the common mode detection module, and when the first comparison signal turns on the first field effect transistor, the drain of the first field effect transistor generates the first current signal, and when the first field effect transistor is turned off, no current signal is generated; The second current generating module includes a second field effect transistor, the gate of the second field effect transistor receives the second comparison signal, the source of the second field effect transistor is connected to the ground, and the drain serves as the fourth terminal of the common mode detection module. When the second comparison signal causes the second field effect transistor to be turned on, the drain of the second field effect transistor generates the second current signal, and when the second field effect transistor is not turned on, no current signal is generated.

4. The circuit according to claim 2 or 3, characterized in that The first comparison module includes a first switch, a second switch, and a first comparator. One end of the first switch serves as the first end of the common mode detection module to receive the first sampling signal, and the other end of the first switch is connected to the other end of the second switch and the first input end of the first comparator. One end of the second switch is connected to a third reference voltage. The second input end of the first comparator is connected to the first reference voltage, and the output end thereof outputs the first comparison signal. The second comparison module includes a third switch, a fourth switch, and a second comparator. One end of the third switch serves as the second end of the common-mode detection module to receive the second sampling signal, and the other end of the third switch is connected to the other end of the fourth switch and the first input end of the second comparator. One end of the fourth switch is connected to a fourth reference voltage. The second input end of the second comparator is connected to the second reference voltage, and the output end outputs the second comparison signal.

5. The circuit according to claim 4, characterized in that When a control signal from a microcontroller causes the first switch to be closed and the second switch to be opened, the first sampling signal is input to the first comparator, so that the first comparator can output the first comparison signal; When a control signal from a microcontroller causes the third switch to be closed and the fourth switch to be opened, the second sampling signal is input to the second comparator, so that the second comparator can output the second comparison signal.

6. The circuit according to claim 2, characterized in that The first detection submodule generates the first current signal when the first sampling signal is relatively large, and the second detection submodule does not generate the second current signal when the second sampling signal is relatively large; The first detection submodule does not generate the first current signal when the first sampling signal is relatively small, and the second detection submodule generates the second current signal when the second sampling signal is relatively small.

7. The circuit according to claim 4, characterized in that The differential mode detection module includes a sampling amplifier and an error amplifier. The first input end of the sampling amplifier serves as the first end of the differential mode detection module to receive the first sampling signal, the second input end serves as the second end of the differential mode detection module to receive the second sampling signal, and the output end is connected to the first input end of the error amplifier; The second input terminal of the error amplifier is connected to the fifth reference voltage, and the output terminal serves as the third terminal of the differential mode detection module to output the first voltage signal.

8. The circuit according to claim 7, characterized in that The differential mode detection module is configured to reduce the voltage value of the first voltage signal when the voltage difference between the first sampling signal and the second sampling signal is relatively large, and to increase the voltage value of the first voltage signal when the voltage difference between the first sampling signal and the second sampling signal is relatively small.

9. The circuit according to claim 4, characterized in that The CAN bus includes a first CAN signal line and a second CAN signal line. One end of the first mirror current source obtains the first current signal, and the other end of the first mirror current source is connected to the second CAN signal line; One end of the second mirror current source obtains the second current signal, and the other end of the second mirror current source is connected to the first CAN signal line; The voltage-controlled current source is connected between the one end of the first mirror current source and the one end of the second mirror current source, and is configured to receive the first voltage signal and generate a current according to the first voltage signal.

10. The circuit according to claim 9, characterized in that When the driving module obtains the first current signal, the current flowing into the driving module from the second CAN signal line increases, and the voltage values ​​of the two differential voltage signals output by the driving module decrease; When the driving module acquires the second current signal, the current flowing out of the driving module through the first CAN signal line increases, and the voltage values ​​of the two differential voltage signals output by the driving module increase.

11. The circuit according to claim 1, wherein: When the voltage value of the first voltage signal decreases, when the driver module receives the first voltage signal, the current flowing into the driver module through the second CAN signal line and the current flowing out of the driver module through the first CAN signal line both decrease, and the voltage difference between the two differential voltage signals output by the driver module decreases; When the voltage value of the first voltage signal increases, when the driving module receives the first voltage signal, the current flowing into the driving module from the second CAN signal line and the current flowing out of the driving module from the first CAN signal line both increase, and the voltage difference between the two differential voltage signals output by the driving module increases.

12. The circuit according to claim 7, characterized in that The transmitting circuit receives an enable signal from the microcontroller, When the enable signal is not received, the common mode detection module and the differential mode detection module are in a disabled state; When the enable signal is received, the common-mode detection module and the differential-mode detection module enter an enabled state from a disabled state. In the enabled state, the first comparator and the second comparator in the common-mode detection module, the sampling amplifier and the error amplifier in the differential-mode detection module operate normally.

13. The circuit according to claim 9, characterized in that The transmitting circuit receives a control signal from a microcontroller, wherein the control signal indicates a differential voltage signal in a dominant state transmitted on the first CAN signal line and the second CAN signal line. When the control signal is not received, the first switch and the third switch in the common mode detection module are opened, and the second switch and the fourth switch are closed; When the control signal is received, the first switch and the third switch in the common-mode detection module are closed, and the second switch and the fourth switch are opened.

14. A CAN transceiver, characterized in that: The transmitting circuit comprises the transmitting circuit according to any one of claims 1 to 13.

15. The CAN transceiver according to claim 14, characterized in that: The CAN transceiver includes a transmitting circuit and a receiving circuit, and the receiving circuit includes the sampling module. In the transmitting circuit, the driving module receives the logic signal output by the CAN controller and converts it into the differential voltage signal; When the common-mode detection module and the differential-mode detection module are in an enabled state and the common-mode detection module receives a control signal from a microcontroller, the sending circuit outputs the two differential voltage signals through the driving module.

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