A photovoltaic grid-connected inverter system based on discontinuous modulation and a control method thereof

Abstract

The application discloses a photovoltaic grid-connected inverter system and a control method based on discontinuous modulation, and relates to the technical field of multilevel inverter control. The method comprises the following steps: obtaining a three-phase sinusoidal modulation wave of a multilevel inverter, constructing a square wave signal and adjusting the amplitude of the square wave signal, and dividing a clamping interval according to the intersection of the square wave and the three-phase sinusoidal modulation wave; based on midpoint balance and resonance suppression, the square wave signal is subjected to compensation voltage superposition; a control threshold for presetting the control midpoint voltage fluctuation range is determined, and the priority of controlling the midpoint voltage and suppressing common-mode resonance is determined; the square wave compensation voltage is adjusted according to the priority; the three-phase sinusoidal modulation wave and the square wave after the compensation voltage adjustment are compared, a DPWM common-mode modulation wave is determined, and a DPWM modulation wave is obtained, and the switching tube is controlled according to the DPWM modulation wave. The application can realize the multi-objective optimization control of midpoint voltage balance, common-mode resonance suppression and reduced switching loss.

Description

Technical Field

[0001] This invention relates to the field of multilevel inverter control technology, and in particular to a photovoltaic grid-connected inverter system and control method based on discontinuous modulation. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] In recent years, renewable energy sources such as solar and wind power have rapidly emerged against the backdrop of environmental pollution and the energy crisis. As a bridge between new energy sources and the power grid, inverters have also faced higher requirements. Five-level ANPC inverters have promising application prospects in medium- and high-voltage, high-power applications such as wind power and photovoltaics. Compared to two-level inverters, five-level ANPC inverters have advantages such as lower output harmonics, lower switching losses, and higher voltage levels, attracting widespread attention from academic and industrial communities worldwide.

[0004] Pulse width modulation (PWM) strategy is a crucial factor affecting inverter performance. To reduce switching losses and improve inverter efficiency, discontinuous pulse width modulation (DPWM) is typically used. Within one carrier cycle, DPWM ensures that one phase of the inverter's switch remains inactive, thus reducing switching losses. However, DPWM can cause midpoint voltage fluctuations in five-level ANPC inverters. Traditional 60° clamped DPWM has an excessively long clamping interval, leading to significant fluctuations in the midpoint potential, causing the midpoint capacitor to overheat and impacting the inverter's lifespan.

[0005] In the photovoltaic field, leakage current suppression is a major concern. Improved LCL filters can effectively suppress leakage current and have advantages such as low cost and simple implementation. However, improved LCL filters can introduce common-mode resonant current, deteriorating grid-connected current quality and reducing inverter system stability. To address this, some researchers have proposed a passive damping method by connecting a resistor in series between the common point of the filter capacitor and the midpoint of the DC-side capacitor. However, this method not only increases system losses but also weakens the leakage current suppression capability.

[0006] In summary, how to simultaneously achieve low-loss multi-objective control with midpoint balance and resonance suppression has become a problem that needs to be solved by existing technologies. Summary of the Invention

[0007] To address the shortcomings of existing technologies, the purpose of this invention is to provide a photovoltaic grid-connected inverter system and control method based on discontinuous modulation, which can simultaneously perform midpoint balancing and common-mode resonance suppression control, thereby reducing system losses and improving operating efficiency.

[0008] To achieve the above objectives, the present invention is implemented through the following technical solution:

[0009] The first aspect of this invention provides a control method for a photovoltaic grid-connected inverter system based on discontinuous modulation, comprising the following steps:

[0010] Obtain the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval according to the intersection of the square wave and the three-phase sinusoidal modulation wave;

[0011] Based on midpoint balance and resonance suppression, a compensation voltage superposition is performed on the square wave signal;

[0012] The control threshold for the control midpoint voltage fluctuation range is preset, and the priority of controlling the midpoint voltage and suppressing common-mode resonance is determined based on the comparison between the actual voltage and the control threshold.

[0013] Adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance;

[0014] The three-phase sinusoidal modulation wave is compared with the square wave after adjusting the compensation voltage to determine the DPWM common-mode modulation wave. The DPWM common-mode modulation wave is superimposed on the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave. The switching transistor is controlled to work according to the DPWM modulation wave.

[0015] Furthermore, the constructed square wave signal is as follows:

[0016] V squ =k m ·sign(|V max |-|V min |)+ΔV squ

[0017] Among them, V squ It is a square wave signal, V max =max(V a V b V c V min =min(V a V b V c V a V b V c These represent the three-phase sinusoidal modulation waves of the inverter (a, b, and c), respectively, and k... m It represents the amplitude of the square wave signal, sign(.) is the sign function, and ΔV squ It is a compensation voltage for achieving midpoint balance and common-mode resonance suppression.

[0018] Furthermore, the amplitude of the square wave is adjusted so that the square wave intersects with the three-phase sinusoidal modulation wave at 4π / 9.

[0019] Furthermore, the length of the clamping interval is 20°.

[0020] Furthermore, the priority relationship between controlling the midpoint voltage and suppressing common-mode resonance is as follows: the absolute value of the difference between the upper and lower capacitor voltages on the DC side is compared with the control threshold. If the former is greater than the latter, the midpoint voltage balance is controlled first; otherwise, common-mode resonance is suppressed first.

[0021] Furthermore, the control process for the midpoint voltage is as follows:

[0022] By adjusting the square wave compensation voltage, the vertical position of the square wave is changed, thereby altering V. dc / 2 state and -V dc The clamping time in state / 2, where V dc This is the DC side voltage.

[0023] Furthermore, the common-mode resonant current consists of the common-mode leakage current and the common-mode resonant current caused by the filter reconnection.

[0024] Furthermore, the common-mode resonance suppression process is as follows: the error between the given value and the actual value of the common-mode resonant current is input into the PI controller to generate a control variable. The control variable is used as a square wave compensation voltage to adjust the three-phase switching function in real time. By changing the switching function, the amplitude of the common-mode voltage at the resonant frequency is reduced, thus suppressing the common-mode resonant current.

[0025] Furthermore, by comparing the three-phase sinusoidal modulation wave with the square wave after adjusting the compensation voltage, the formula for the DPWM common-mode modulation wave is determined as follows:

[0026]

[0027] Among them, V offset,dpwm For DPWM common-mode modulation wave, V dc V is the DC side voltage. squ It is a square wave signal, V max =max(V a V b V c ),V min =min(V a V b V c V a V b V c These are the three-phase sinusoidal modulation waves of the inverter, namely a, b, and c.

[0028] A second aspect of the present invention provides a photovoltaic grid-connected inverter system based on discontinuous modulation, comprising:

[0029] The signal acquisition module is configured to acquire the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval based on the intersection of the square wave and the three-phase sinusoidal modulation wave.

[0030] The voltage compensation module is configured to perform compensation voltage superposition on the square wave signal based on midpoint balance and resonance suppression;

[0031] The priority determination module is configured to preset the control threshold for the control midpoint voltage fluctuation range, and determines the priority of control midpoint voltage and common-mode resonance suppression based on the comparison result between the actual voltage and the control threshold.

[0032] The compensation voltage optimization module is configured to adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance;

[0033] The control module is configured to compare the three-phase sinusoidal modulation wave with the square wave after adjusting the compensation voltage, determine the DPWM common-mode modulation wave, superimpose the DPWM common-mode modulation wave onto the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave, and control the operation of the switching transistor according to the DPWM modulation wave.

[0034] The above one or more technical solutions have the following beneficial effects:

[0035] (1) This invention discloses a photovoltaic grid-connected inverter system and control method based on discontinuous modulation, which shortens the clamping interval of DPWM to 20°. Compared with the traditional 60° clamping DPWM, the clamping interval is greatly shortened, which can effectively reduce the midpoint potential fluctuation.

[0036] (2) While shortening the clamping interval and performing midpoint balancing and common-mode resonance suppression, the present invention still ensures that one phase of the inverter will not operate at any time, thus not introducing additional switching losses.

[0037] (3) This invention proposes a method for controlling the midpoint voltage and suppressing common-mode resonance priority. It achieves multi-objective control of midpoint balance and resonance suppression simultaneously through a single compensation voltage, avoiding the problem of multiple compensation voltages being superimposed.

[0038] (4) The present invention uses a PI controller to suppress the resonant current in the common-mode circuit. Compared with the passive damping method of connecting a resistor in series between the common point of the filter capacitor and the midpoint of the DC side capacitor, it reduces system loss and improves system efficiency.

[0039] (5) The present invention adopts a carrier-based implementation method, which avoids the complex calculation process of traditional SVPWM and reduces the computational burden of the system.

[0040] Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0041] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0042] Figure 1 This is a structural diagram of a five-level ANPC inverter system with an improved LCL filter in Embodiment 1 of the present invention;

[0043] Figure 2 This is a schematic diagram showing the positional relationship between the three-phase sinusoidal modulation wave and the square wave signal in Embodiment 1 of the present invention;

[0044] Figure 3 This is a schematic diagram of the DPWM compensation voltage and reference voltage in Embodiment 1 of the present invention;

[0045] Figure 4 This is a schematic diagram of the midpoint voltage balance in Embodiment 1 of the present invention;

[0046] Figure 5 This is the common-mode equivalent circuit diagram of the five-level ANPC inverter with the improved LCL filter in Embodiment 1 of the present invention;

[0047] Figure 6 This is a block diagram of the common-mode resonant current control in Embodiment 1 of the present invention;

[0048] Figure 7 This is the overall control block diagram of the five-level inverter DPWM modulation method in Embodiment 1 of the present invention;

[0049] Figure 8(a) shows the average switching frequency of different modulation methods in Embodiment 1 of the present invention;

[0050] Figure 8(b) is a simulation diagram of the output phase voltage in Embodiment 1 of the present invention;

[0051] Figure 8(c) is a simulation diagram of the output line voltage in Embodiment 1 of the present invention;

[0052] Figure 8(d) is a simulation diagram of the three-phase output current in Embodiment 1 of the present invention;

[0053] Figure 8(e) is a simulation diagram of the midpoint voltage in Embodiment 1 of the present invention;

[0054] Figure 8(f) is a simulation diagram of leakage current in Embodiment 1 of the present invention; Detailed Implementation

[0055] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0056] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0057] Example 1:

[0058] To reduce switching losses and improve inverter efficiency, DPWM modulation is typically used. However, traditional DPWM methods, due to prolonged clamping, keep the upper and lower DC-side capacitors in a continuous charging or discharging state, leading to significant fluctuations in the midpoint voltage. Large midpoint voltage fluctuations affect the total current dissipation (THD) and induce common-mode resonant current, while also increasing the difficulty of midpoint balancing control. Therefore, shortening the clamping time can reduce midpoint voltage fluctuations; however, simply shortening the clamping time introduces additional switching losses.

[0059] Furthermore, the five-level ANPC inverter has two series-connected capacitors of the same capacitance on the DC side. During operation, various factors can cause voltage shifts between the upper and lower capacitors on the DC side, leading to a midpoint voltage imbalance. Additionally, existing technologies propose an improved LCL filter, but its unique structure can introduce common-mode resonance. In traditional DPWM modulation, common-mode resonance suppression and midpoint voltage balance control are mutually coupled; pursuing one control objective inevitably affects the other, and achieving either often comes at the cost of increased system losses.

[0060] Therefore, in order to achieve multi-objective control of midpoint voltage balance and common-mode resonance suppression without introducing additional switching losses, this disclosure provides a multilevel inverter control method based on DPWM modulation, which reduces midpoint voltage fluctuations, has midpoint balance and resonance suppression functions, and can reduce switching losses.

[0061] Specifically, Embodiment 1 of the present invention provides a control method for a photovoltaic grid-connected inverter system based on discontinuous modulation. The controlled object is a five-level ANPC inverter system with an existing improved LCL filter. This improved LCL filter directly connects the common point of the filter capacitors to the DC-side neutral point O, effectively suppressing leakage current. For example... Figure 1As shown, the inverter system includes three-phase bridge arms, each of which includes eight power switches and one flying capacitor. The connection method of the eight power switches and the flying capacitor is the same as that in existing five-level ANPC inverters, and will not be described again here. The DC side includes two identical series capacitors, with a neutral point O formed between them, which is connected to each phase input of the inverter. Each phase output of the inverter is connected to the grid through an LCL filter. The improved LCL filter, except that the common point of the filter capacitors is directly connected to the DC side neutral point O, has the same circuit structure as the existing LCL filter, and will not be described again here.

[0062] Assume the DC side voltage is V dc To ensure the proper functioning of the five-level ANPC inverter, the DC-side capacitor voltage and the flying capacitor voltage should be controlled at V respectively. dc / 2 and V dc / 4. When the above conditions are met, the inverter can output -V dc / 2, -V dc / 4, 0, V dc / 4 and V dc / 2 Five levels, corresponding to 8 switch combinations. When the output level is V dc / 4 or -V dc At / 4, there are two redundant switch combinations. The current flowing through the flying capacitor in the two switch combinations flows in opposite directions. Therefore, the flying capacitor voltage can be controlled by reasonably allocating the action time of the two redundant switch combinations. In the differential mode loop control, the current loop uses inverter-side current feedback plus a PI controller to achieve accurate tracking of the reference current. In addition, when the grid-connected inverter is connected to a weak grid, due to the existence of grid impedance and the resonance point of the LCL filter itself, the differential mode loop contains more background harmonics, which may cause resonance in the grid-connected system and affect the waveform quality of the grid current. To this end, a grid voltage feedforward control strategy is adopted to suppress differential mode resonance in the differential mode loop.

[0063] The overall control method includes the following steps:

[0064] Step 1: Obtain the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval according to the intersection of the square wave and the three-phase sinusoidal modulation wave.

[0065] Step 2: Based on midpoint balance and resonance suppression, a compensation voltage is superimposed on the square wave signal.

[0066] Step 3: Preset the control threshold for the control midpoint voltage fluctuation range, and determine the priority of controlling the midpoint voltage and suppressing common-mode resonance based on the comparison result between the actual voltage and the control threshold.

[0067] Step 4: Adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance, so as to achieve multi-objective optimization control of midpoint balance and resonance suppression.

[0068] Step 5: Compare the three-phase sinusoidal modulation wave with the square wave after adjusting the compensation voltage to determine the DPWM common-mode modulation wave. Superimpose the DPWM common-mode modulation wave onto the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave. Control the switching transistor to work according to the DPWM modulation wave.

[0069] In step 1, the three-phase sinusoidal modulation wave is represented as:

[0070]

[0071] Among them, V m V is the amplitude of the three-phase sinusoidal modulation wave. a V b V c These are the three-phase sinusoidal modulation waves of the inverter, namely a, b, and c.

[0072] The constructed square wave signal is:

[0073] V squ =k m ·sign(|V max |-|V min |)+ΔV squ (2)

[0074] Among them, V squ It is a square wave signal, V max =max(V a V b V c ),V min =min(V a V b V c ),V a V b V c These are the three-phase sinusoidal modulation waves of the inverter, k m It represents the amplitude of the square wave signal, sign(.) is the sign function, and ΔV squ It is a compensation voltage for achieving midpoint balance and common-mode resonance suppression.

[0075] Three-phase sinusoidal modulation waves and square wave signals, such as Figure 2 As shown, in order to reduce the midpoint voltage fluctuation and take into account the switching loss, the 60° clamping interval of the traditional 60° DPWM is divided into three equal small intervals, that is, the length of the divided clamping interval is 20°.

[0076] In one specific implementation, without considering the square wave compensation voltage, the amplitude of the square wave signal is adjusted so that the square wave signal intersects with the three-phase sinusoidal modulation wave at 4π / 9. At this point, the amplitude of the square wave signal is:

[0077]

[0078] Where, k m The amplitude V of the square wave signal m This represents the amplitude of the three-phase sinusoidal modulation wave.

[0079] Based on the intersection of the square wave and the three-phase sinusoidal modulation wave, the reference voltage is divided into 18 clamping intervals within one modulation cycle, so that each clamping interval is shortened to 20°.

[0080] In step 2, after dividing the clamping intervals, it is necessary to determine the clamping state of each interval. Assuming the inverter operates at unity power factor, the phase of the load current is consistent with the fundamental phase of the inverter phase voltage. Therefore, the clamping interval for each phase should occur near the peak value of the reference voltage for that phase to minimize switching losses. The clamping state of different intervals can be obtained based on the relationship between the magnitudes of the square wave and the three-phase sinusoidal modulation wave, such as... Figure 3 As shown, the DPWM common-mode modulation wave is represented as:

[0081]

[0082] Among them, V offset,dpwm For DPWM common-mode modulation wave, V dc V is the DC side voltage. squ It is a square wave signal, V max =max(V a V b V c ),V min =min(V a V b V c V a V b V c These are the three-phase sinusoidal modulation waves of the inverter.

[0083] In step 3, the priority relationship between controlling the midpoint voltage and suppressing common-mode resonance is as follows: the absolute value of the difference between the upper and lower capacitor voltages on the DC side is compared with the control threshold. If the former is greater than the latter, the midpoint voltage balance is controlled first; otherwise, common-mode resonance is suppressed first.

[0084] In one specific implementation, Figure 2 In the middle, square wave signal V squ There are two ranges: an outer range ΔV1 and an inner range ΔV2. If V squIf the clamping interval exceeds ΔV1, the clamping interval will change; if V squ If the voltage exceeds ΔV2, the three-phase reference voltage will remain clamped at V. dc / 2 or -V dc / 2, namely DPWMMAX and DPWMMIN. The outer range ΔV1 and inner range ΔV2 are expressed as:

[0085]

[0086]

[0087] Establish the priority relationship between controlling the midpoint voltage and suppressing common-mode resonance:

[0088]

[0089] Among them, V p and V n These represent the voltages of the upper and lower capacitors on the DC side, respectively, and h represents the control range of the midpoint voltage as required.

[0090] The priority relationship is determined based on the priority formula. If the formula is satisfied, the midpoint voltage is controlled; otherwise, common-mode resonance is suppressed.

[0091] In step 4, the control process of the midpoint voltage is as follows: by adjusting the square wave compensation voltage to change the vertical position of the square wave, V is changed. dc / 2 state and -V dc The clamping time in state / 2, where V dc This is the DC side voltage.

[0092] In one specific implementation, to balance the midpoint voltage, the square wave compensation voltage is adjusted to adjust V. dc / 2 and -V dc The clamping time of / 2 is adjusted. When the priority relationship of equation (7) is satisfied, if V p >V n The midpoint potential is too high, so the compensation voltage ΔV will be increased. squ Setting it to -ΔV2 shifts the square wave downwards and increases V. dc The clamping time in state / 2 causes the midpoint voltage to decrease, which is equivalent to DPWMMAN, such as... Figure 4 As shown, V is in the range [π / 3, 2π / 3]. dc The clamping range in the / 2 state increases from 20° to 60°; if V p <V n The midpoint potential is too low, so the compensation voltage ΔV will be increased. squ Setting ΔV2 shifts the square wave upwards, increasing -V dc The clamping time in state / 2 causes the midpoint voltage to rise, which is equivalent to DPWMMIN.

[0093] The common-mode resonance suppression process is as follows: the error between the given value and the actual value of the common-mode resonant current is input into the PI controller to generate a control variable. The control variable is used as a square wave compensation voltage to adjust the three-phase switching function in real time. By changing the switching function, the amplitude of the common-mode voltage at the resonant frequency is reduced, thus suppressing the common-mode resonant current.

[0094] In one specific implementation, a PI controller is used to adjust the amplitude of the common-mode voltage at the resonant frequency in order to suppress the common-mode resonant current. Figure 5 According to Figure 1 The common-mode equivalent circuit diagram of the five-level ANPC inverter for the improved LCL filter is obtained from the common-mode equivalent model, and it is assumed that the midpoint voltage can be effectively controlled through a midpoint balancing strategy. The improved LCL filter introduces a low-impedance capacitive branch in the common-mode loop, providing a path for high-frequency common-mode leakage current and achieving efficient suppression of leakage current.

[0095] Define common-mode voltage u cm Common-mode leakage current i cm and common-mode current i cmz They are respectively:

[0096]

[0097] i cm =i a2 +i b2 +i c2 (8)

[0098] i cmz =i a1 +i b1 +i c1 =i cm +i o (9)

[0099] Where u xo i is the phase voltage on the inverter side. x1 For inverter-side current, i x2 Let i be the grid-side current, (x = a, b, c). o The sum of the three-phase currents of the filter capacitor, i.e., i o =i fa +i fb +i fc .

[0100] The transfer function of common-mode leakage current to common-mode voltage is:

[0101]

[0102] The transfer function of the common-mode resonant current to the common-mode voltage caused by the reconnection of the improved LCL filter is:

[0103]

[0104] According to formula (10), the common-mode current i of the system is cmz Due to common-mode leakage current i cm Common-mode resonant current i caused by the reconnection of the improved LCL filter o It consists of two parts. The former is affected by the filter parameters, parasitic capacitance, and grid impedance under weak grid conditions, and the greater the grid impedance, the more resonant current is excited by the common-mode voltage; the latter is only affected by the filter parameters and is independent of the grid parameters. Both are excited by common-mode voltage, so the common-mode resonant current of the system can be suppressed by suppressing the common-mode voltage amplitude.

[0105] Combining formula (8), the inverter common-mode voltage can be further defined as:

[0106]

[0107] Combining formulas (11), (12), and (13), the relationship between the common-mode resonant current and the switching function of the system can be obtained as follows:

[0108]

[0109] Among them, S x The switching function of phase x, according to formula (14), can be used to adjust the common-mode resonant current. Since the vertical position of the square wave can be used to adjust the clamping time, thereby changing the three-phase switching function, the square wave compensation voltage ΔV can be adjusted. squ Achieve efficient suppression of common-mode resonant current.

[0110] Therefore, a PI controller is used to suppress the common-mode resonant current, and the control block diagram is as follows. Figure 6 As shown. To suppress the common-mode resonant current as much as possible, its given value is... It should be set to zero. The error between the given and actual values ​​of the common-mode resonant current is fed into the PI controller to generate the control variable d. z control variable d z The square wave compensation voltage is used to adjust the three-phase switching function in real time to achieve common-mode resonant current suppression.

[0111] To ensure system stability and maintain a constant number of clamping intervals in the DPWM method, the control variable d z Must meet:

[0112] -ΔV1 <d z <ΔV1 (14)

[0113] Square wave compensation voltage ΔV squ Ultimately, it can be expressed as:

[0114]

[0115] According to formula (16), adjusting the square wave compensation voltage can achieve midpoint voltage balance and common-mode resonance suppression. If the midpoint voltage exceeds the control range h, the midpoint voltage should be controlled first by adjusting the compensation voltage ΔV. squ Change V dc / 2 and -V dc The clamping time in state / 2 achieves midpoint voltage balance; if the midpoint voltage is within the control range h, common-mode resonance is controlled first, and the compensation voltage ΔV is adjusted accordingly. squ By changing the three-phase switching function, the common-mode voltage can be adjusted to achieve common-mode resonance suppression.

[0116] It should be noted that when common-mode resonance is prioritized, the compensation voltage is determined by the control variable d. z This will affect the midpoint balance, but due to the control variable d z The amplitude is limited to ΔV1, and ΔV1 and ΔV2 satisfy:

[0117]

[0118] That is, ΔV1 is less than ΔV2, so compared to ΔV2, the control variable d z The impact on the midpoint voltage is minimal. While prioritizing midpoint voltage control does affect common-mode resonance suppression, the proposed DPWM method reduces midpoint voltage fluctuations by shortening the clamping interval. Therefore, the time the midpoint voltage is outside the control range h is very short, and its impact on common-mode resonance suppression is negligible. In summary, the compensation voltage ΔV squ It can effectively achieve midpoint voltage balance and common-mode resonance suppression.

[0119] In step 5, the three-phase sinusoidal modulation wave is compared with the square wave after adjusting the compensation voltage, and the DPWM common-mode modulation wave is determined using formula (4).

[0120] The square wave signal with superimposed compensation voltage is judged according to the relationship between the magnitude of the square wave and the three-phase sinusoidal modulation wave according to formula (4) to obtain the DPWM common-mode modulation wave V. offset,dpwm The DPWM common-mode modulated wave is superimposed on the three-phase sinusoidal modulated wave to obtain the DPWM modulated wave:

[0121] V x,dpwm =V x +V offset,dpwm (x=a,b,c) (18)

[0122] Figure 7This is the overall control block diagram of the five-level inverter DPWM modulation method used in this embodiment, including DPWM control, midpoint voltage balance control, and common-mode resonance control.

[0123] To verify the effectiveness of the control method in this embodiment, an experimental simulation was conducted. The simulation results are shown in Figures 8(a), 8(b), 8(c), 8(d), 8(e), and 8(f). In Figure 8(a), compared with SVPWM, the DPWM method in this embodiment can significantly reduce the switching frequency, thereby reducing switching losses, and does not introduce additional switching losses compared with the traditional DPWM1. Figure 8(b) and 8(c) In the middle, the phase voltage is 5 level and the clamping interval is shortened, so the midpoint voltage fluctuation can be reduced and the line voltage is 9 level; in Figure 8(d), the current is sinusoidal and the amplitude is 20A; the midpoint voltage of Figure 8(e) is half of the DC side and fluctuates by 2V, because the control range h in formula (7) is 4V; the leakage current amplitude of Figure 8(f) is about 20mA, which meets the grid connection requirements.

[0124] Example 2:

[0125] Embodiment 2 of the present invention provides a photovoltaic grid-connected inverter system based on discontinuous modulation, comprising:

[0126] The signal acquisition module is configured to acquire the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval based on the intersection of the square wave and the three-phase sinusoidal modulation wave.

[0127] The voltage compensation module is configured to perform compensation voltage superposition on the square wave signal based on midpoint balance and resonance suppression;

[0128] The priority determination module is configured to preset the control threshold for the control midpoint voltage fluctuation range, and determines the priority of control midpoint voltage and common-mode resonance suppression based on the comparison result between the actual voltage and the control threshold.

[0129] The compensation voltage optimization module is configured to adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance;

[0130] The control module is configured to compare the three-phase sinusoidal modulation wave with the square wave after adjusting the compensation voltage, determine the DPWM common-mode modulation wave, superimpose the DPWM common-mode modulation wave onto the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave, and control the operation of the switching transistor according to the DPWM modulation wave.

[0131] The steps and methods involved in the above embodiment two correspond to those in embodiment one. For specific implementation details, please refer to the relevant description section of embodiment one.

[0132] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A control method for a photovoltaic grid-connected inverter system based on discontinuous modulation, characterized in that, Includes the following steps: Obtain the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval according to the intersection of the square wave and the three-phase sinusoidal modulation wave; Based on midpoint balance and resonance suppression, a compensation voltage superposition is performed on the square wave signal; The control threshold for the control midpoint voltage fluctuation range is preset. The priority of controlling the midpoint voltage and suppressing common-mode resonance is determined based on the comparison between the actual voltage and the control threshold. Specifically, the absolute value of the difference between the voltages of the upper and lower capacitors on the DC side is compared with the control threshold. If the former is greater than the latter, the control midpoint voltage balance is prioritized; otherwise, common-mode resonance is suppressed. Adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance; The control process of the midpoint voltage is as follows: by adjusting the square wave compensation voltage, the vertical position of the square wave is changed, thereby altering... status and The clamping time of the state, where, This is the DC side voltage; The three-phase sinusoidal modulation wave is compared with the square wave after adjusting the compensation voltage to determine the DPWM common-mode modulation wave. The formula for determining the DPWM common-mode modulation wave is as follows: in, It is a DPWM common-mode modulation wave. DC side voltage It is a square wave signal. , , These are the three-phase sinusoidal modulation waves of the inverter, namely a, b, and c. The DPWM common-mode modulation wave is superimposed on the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave, and the switching transistor is controlled according to the DPWM modulation wave. The common-mode resonance suppression process is as follows: the error between the given value and the actual value of the common-mode resonant current is input into the PI controller to generate a control variable. The control variable is used as a square wave compensation voltage to adjust the three-phase switching function in real time. By changing the switching function, the amplitude of the common-mode voltage at the resonant frequency is reduced, thus suppressing the common-mode resonant current.

2. The control method for a photovoltaic grid-connected inverter system based on discontinuous modulation as described in claim 1, characterized in that, The constructed square wave signal is: in, It is a square wave signal. , , These are the three-phase sinusoidal modulation waves of the inverter, namely phases a, b, and c. This represents the amplitude of the square wave signal, and sign(.) is the sign function. It is a compensation voltage for achieving midpoint balance and common-mode resonance suppression.

3. The control method for a photovoltaic grid-connected inverter system based on discontinuous modulation as described in claim 1, characterized in that, Adjust the square wave amplitude so that the square wave intersects with the three-phase sinusoidal modulation wave at 4π / 9.

4. The control method for a photovoltaic grid-connected inverter system based on discontinuous modulation as described in claim 1, characterized in that, The length of the clamping interval is 20°.

5. The control method for a photovoltaic grid-connected inverter system based on discontinuous modulation as described in claim 1, characterized in that, The common-mode resonant current consists of the common-mode leakage current and the common-mode resonant current caused by the filter reconnection.

6. A photovoltaic grid-connected inverter system based on discontinuous modulation, characterized in that, include: The signal acquisition module is configured to acquire the three-phase sinusoidal modulation wave of the multi-level inverter, construct a square wave signal based on the three-phase sinusoidal modulation wave and adjust the amplitude of the square wave signal, and divide the clamping interval based on the intersection of the square wave and the three-phase sinusoidal modulation wave. The voltage compensation module is configured to perform compensation voltage superposition on the square wave signal based on midpoint balance and resonance suppression; The priority determination module is configured to preset the control threshold of the control midpoint voltage fluctuation range. It determines the priority of controlling the midpoint voltage and suppressing common-mode resonance based on the comparison result between the actual voltage and the control threshold. Specifically, it compares the absolute value of the difference between the upper and lower capacitor voltages on the DC side with the control threshold. If the former is greater than the latter, it prioritizes controlling the midpoint voltage balance; otherwise, it prioritizes suppressing common-mode resonance. The compensation voltage optimization module is configured to adjust the square wave compensation voltage according to the priority of controlling the midpoint voltage and suppressing common-mode resonance; The control process of the midpoint voltage is as follows: by adjusting the square wave compensation voltage, the vertical position of the square wave is changed, thereby altering... status and The clamping time of the state, where, This is the DC side voltage; The control module is configured to compare the three-phase sinusoidal modulation wave with the square wave after adjusting the compensation voltage to determine the DPWM common-mode modulation wave. The formula for determining the DPWM common-mode modulation wave is as follows: in, It is a DPWM common-mode modulation wave. DC side voltage It is a square wave signal. , , These are the three-phase sinusoidal modulation waves of the inverter, namely a, b, and c. The DPWM common-mode modulation wave is superimposed on the three-phase sinusoidal modulation wave to obtain the DPWM modulation wave, and the switching transistor is controlled according to the DPWM modulation wave. The common-mode resonance suppression process is as follows: the error between the given value and the actual value of the common-mode resonant current is input into the PI controller to generate a control variable. The control variable is used as a square wave compensation voltage to adjust the three-phase switching function in real time. By changing the switching function, the amplitude of the common-mode voltage at the resonant frequency is reduced, thus suppressing the common-mode resonant current.

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