Component carrier and method of manufacturing the same

Abstract

The present application provides a component carrier and a method of manufacturing the same. The component carrier comprises a stack having at least four electrically insulating layer structures and at least five electrically conductive layer structures stacked on top of each other in an alternating manner along a stacking direction, wherein one of the electrically conductive layer structures forms a first outer electrically conductive layer of the stack and another one of the electrically conductive layer structures forms a second outer electrically conductive layer of the stack, and wherein the first outer electrically conductive layer and the second outer electrically conductive layer are opposite outer layers of the stack. The component carrier further comprises a first identification mark detectable by a detection device, wherein the first identification mark is formed in the electrically conductive layer structure arranged closest to the first outer electrically conductive layer, and a second identification mark detectable by the detection device, wherein the second identification mark is formed in the electrically conductive layer structure arranged closest to the second outer electrically conductive layer. The first identification mark and the second identification mark are formed on top of each other in the stacking direction.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to utility model application CN 202120247645.0, filed on January 28, 2021, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] This application relates to a component carrier that includes an identification mark. Background Technology

[0004] With the increasing functionality of products equipped with component carriers containing one or more parts, the gradual miniaturization of these parts, and the growing number of parts to be connected to component carriers such as printed circuit boards, increasingly robust array-shaped components or packages with multiple contacts or connections are being adopted. These array-shaped components or packages have increasingly smaller intervals between these contacts. In particular, component carriers must be mechanically robust and electrically reliable to operate even under harsh conditions. More and more functional components are being integrated into component carriers.

[0005] During the manufacture of complex component carriers such as printed circuit boards (PCBs), it is important to align and orient the component carriers precisely and accurately. To align the component carriers, identification marks can be formed within the layered structure of the component carrier. These identification marks can be measured using appropriate detection devices such as X-ray detectors, where the corresponding alignment of the component carrier can be determined based on the image of the measured identification marks.

[0006] However, if the corresponding layer containing the identification mark is covered by multiple additional layers during the manufacturing process, the image of the identification mark (e.g., the contrast and outline in the image of the identification mark) becomes increasingly uncertain.

[0007] Therefore, it may be necessary to provide identification marks that can be correctly determined by the detection device to ensure proper alignment of the component carrier. Summary of the Invention

[0008] According to an exemplary embodiment of this application, a component carrier is described. The component carrier includes a stack comprising at least four electrically insulating layer structures and at least five electrically conductive layer structures, which are stacked one on top of the other alternately along a stacking direction. One of the electrically conductive layer structures forms a first outer electrically conductive layer of the stack, while another electrically conductive layer structure forms a second outer electrically conductive layer of the stack, wherein the first and second outer electrically conductive layers are opposite outer layers of the stack.

[0009] The component carrier also includes a first identification mark detectable by a detection device, wherein the first identification mark is formed in an electrically conductive layer structure. In an exemplary embodiment, the first identification mark is formed in an electrically conductive layer structure disposed closest to the first outer electrically conductive layer, and a second identification mark is detectable by a detection device, wherein the second identification mark is formed in an electrically conductive layer structure. In an exemplary embodiment, the second identification mark is formed in an electrically conductive layer structure disposed closest to the second outer electrically conductive layer. The first identification mark and the second identification mark are formed vertically relative to each other in the stacking direction.

[0010] According to an exemplary embodiment of this application, a method for manufacturing the aforementioned component carrier is described. Electrically insulating layer structures and at least five electrically conductive layer structures are alternately stacked one on top of the other along a stacking direction, such that one electrically conductive layer structure forms a first outer electrically conductive layer of the stack, while another electrically conductive layer structure forms a second outer electrically conductive layer of the stack, wherein the first and second outer electrically conductive layers are opposite outer layers of the stack. Furthermore, a first identification mark detectable by a detection device is formed in the electrically conductive layer structures. In an exemplary embodiment, the first identification mark is formed in the electrically conductive layer structure closest to the first outer electrically conductive layer. A second identification mark detectable by a detection device is formed in the electrically conductive layer structures. In an exemplary embodiment, the second identification mark is formed in the electrically conductive layer structure closest to the second outer electrically conductive layer. The first and second identification marks are formed one on top of the other in the stacking direction.

[0011] In the context of this application, the term "component carrier" can specifically refer to any support structure capable of accommodating one or more components on and / or within the support structure to provide mechanical support and / or electrical connection. In other words, a component carrier can be configured as a mechanical and / or electronic carrier for a component. Specifically, a component carrier can be one of a printed circuit board, an organic interposer, a metal core substrate, an inorganic substrate, and an IC (integrated circuit) substrate. A component carrier can also be a hybrid board combining different component carriers of the above types.

[0012] In the context of this application, the term "component carrier material" may specifically refer to a connection arrangement of one or more electrically insulating layer structures and / or one or more electrically conductive layer structures used in component carrier technology. More specifically, such component carrier material may be a material used for printed circuit boards (PCBs) or IC substrates. In particular, the electrically conductive material of such component carrier material may include copper. The electrically insulating material of the component carrier material may include resins, particularly epoxy resins, and the electrically insulating material may optionally be bonded to reinforcing particles such as glass fibers or glass spheres.

[0013] In one embodiment, the component carrier is a laminated component carrier. In such an embodiment, the component carrier is a compound of multilayer structural components that are stacked and connected together by applying pressure and / or heat.

[0014] In embodiments, the at least one electrically insulating layer structure comprises at least one of the following: resins or polymers, such as epoxy resins, cyanate ester resins, benzocyclobutene resins, amine triazine resins, polyphenylene derivatives (e.g., based on polyphenylene ether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymers (LCP), polytetrafluoroethylene (PTFE), and / or combinations thereof. Reinforcing structures, such as meshes, fibers, spherical elements, or other types of filler particles, made, for example, of glass (multilayer glass), may also be used to form a composite. The semi-cured resin combined with the reinforcing agent, such as fibers impregnated with the aforementioned resins, is called a prepreg. These prepregs are typically named for their properties, such as FR4 or FR5, which describe the flame-retardant properties of the prepreg. While prepregs, particularly FR4, are generally preferred for rigid PCBs, other materials, particularly epoxy-based laminates (e.g., laminated films) or photoemissive dielectric materials, may also be used. For high-frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymers, and / or cyanate resins are preferred. In addition to these polymers, low-temperature co-fired ceramics (LTCC) or other low-DK, extremely low, or ultra-low-DK materials can be implemented as electrical insulating layer structures in component carriers.

[0015] In an embodiment, the at least one electrically conductive layer structure comprises at least one of copper, aluminum, nickel, silver, gold, palladium, tungsten, and magnesium. Although copper is generally preferred, other materials or other types of coatings thereof are also possible, particularly materials coated with superconducting materials or conductive polymers, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT), respectively.

[0016] The first and second identification marks are formed vertically relative to each other in the stacking direction. Therefore, the stack can be formed from multiple electrically insulating layer structures and multiple electrically conductive layer structures, wherein corresponding identification marks are formed in the spaced-apart electrically conductive layer structures of the stack. If the first and second identification marks are formed vertically relative to each other in the stacking direction, a properly aligned image of the identification marks captured by the detection device can be provided. In other words, the first and second identification marks are formed such that, on a projection plane having a projection normal parallel to the stacking direction, the identification marks and the other identification mark completely overlap each other.

[0017] The identification marker is formed within one of the electrically conductive layer structures in the electrically conductive layer structure. Specifically, using this method, the identification marker is formed in the electrically conductive layer structure closest to the outermost electrically conductive layer. Therefore, (e.g., X-ray) detection devices can more easily detect the peripheral shape and orientation of the identification marker separately.

[0018] According to an exemplary embodiment, at least one of the first and second identification marks includes an internal volume portion that does not contain material of the electrically conductive layer structure. For example, the internal volume portion of the identification mark is hollow and, for example, does not contain copper. In an exemplary embodiment, the internal volume portion of the identification mark is filled with an electrically insulating material. The electrically insulating material may be similar to an electrically insulating layer structure laminated on top of the corresponding electrically conductive layer structure, and the electrically insulating material may be, for example, polypropylene (PP).

[0019] According to an exemplary embodiment, the identification mark includes a triangular shape. By providing a triangular shape, it is easier to detect the orientation and alignment of the identification mark, and correspondingly, the orientation and alignment of the component carrier.

[0020] According to another exemplary embodiment, the identification mark includes an arrow shape. By providing an arrow shape, it is easier to detect the orientation and alignment of the identification mark, and correspondingly, the orientation and alignment of the component carrier.

[0021] According to another exemplary embodiment, the identification mark includes three identification points forming a triangular shape, wherein each identification point includes an internal volume portion free of electrically conductive material. The orientation of the identification mark is also possible by providing, for example, hollow points or contours (circular, elliptical, or rectangular), which are arranged relative to each other such that a specific orientation can be determined. For example, the three identification points may be formed at the corners of a virtual triangle.

[0022] According to another exemplary embodiment, the identification mark is formed at the edge portion of an electrically conductive layer structure.

[0023] According to another exemplary embodiment, the identification mark is formed at the corner portion of an electrically conductive layer structure.

[0024] According to another exemplary embodiment, the first identification mark and the second identification mark include the same peripheral shape. For example, both identification marks have a triangular shape or an arrow shape, specifically, the first identification mark and the second identification mark have a triangular shape or an arrow shape.

[0025] According to another exemplary embodiment, the second identification mark is filled with an electrically conductive material. For example, the second identification mark only includes a circumferential extension or path without electrically conductive material. Therefore, the detection device only detects the circumferential path of the identification mark. However, since the second identification mark and the aforementioned identification mark with no electrically conductive material in the internal volume are formed one above the other, the corresponding overlap and matching of the two identification marks on the image captured by the detection device can be detected.

[0026] According to another exemplary embodiment, the second identification mark includes an internal volume portion that does not contain electrically conductive material.

[0027] According to another exemplary embodiment, the component carrier further includes a removable core layer, wherein the removable core layer is removably arranged between at least one electrically insulating layer structure and at least one electrically conductive layer structure on one side and at least one additional electrically insulating layer structure and at least one additional electrically conductive layer structure on the other side.

[0028] Therefore, on opposite sides of the disassembled core layer, corresponding stacked components having electrically conductive layer structures and electrically insulating layer structures can be formed in a layered manner. A first identification mark and a second identification mark can be arranged in the corresponding electrically conductive layer structures arranged on opposite sides of the disassembled core layer. After the corresponding stacked portions on both sides of the disassembled core layer are formed, the disassembled core layer can be removed (e.g., by applying heat or a chemical solution), so that the two stacked portions can be formed in a common manufacturing / lamination step. By forming the first and second identification marks, the orientation of the corresponding component carrier can be detected both before and after the disassembled core layer is removed.

[0029] In one embodiment, the first identification mark is arranged closest to the first external electrical conductive layer, and / or the second identification mark is arranged closest to the second external electrical conductive layer.

[0030] In an embodiment, the component carrier further includes: an additional first identification mark and / or an additional second identification mark formed in each of the other conductive layer structures besides the first and second external conductive layers.

[0031] In one embodiment, the component carrier further includes an additional identification mark that can be detected by a detection device, wherein the additional identification mark is formed in a corresponding conductive layer structure arranged closest to the first or second external conductive layer.

[0032] In one embodiment, the stack includes a mirror plane parallel to the stacking direction, wherein an additional identification mark is arranged on the opposite side of the first identification mark with respect to the mirror plane.

[0033] In one embodiment, the stack includes a mirror plane parallel to the stacking direction, wherein an additional identification mark is arranged on the same side relative to the second identification mark with respect to the mirror plane.

[0034] In an implementation, additional identification markers include internal volumes that do not contain electrically conductive material.

[0035] In one embodiment, an additional identification mark is formed in each of the other conductive layer structures besides the first and second external conductive layers.

[0036] In an implementation, additional identification markers include internal volumes that do not contain electrically conductive material.

[0037] In this implementation, additional identification markers include a triangular shape.

[0038] In this implementation, additional identification markers include arrow shapes.

[0039] In one embodiment, additional identification markers include three identification points forming a triangular shape, each identification point comprising an internal volume portion free of electrically conductive material.

[0040] In one embodiment, additional identification markers are formed at the edge portion of an electrically conductive layer structure.

[0041] In one embodiment, additional identification marks are formed at the corner portions of the electrically conductive layer structure.

[0042] In an implementation, the additional identification mark, the first identification mark, and / or the second identification mark include the same peripheral shape.

[0043] In one embodiment, the additional identification marker is filled with an electrically conductive material.

[0044] In an implementation, additional identification markers include internal volumes that do not contain electrically conductive material.

[0045] In this implementation, the component carrier is shaped as a plate. This contributes to a compact design, whereby the component carrier still provides a large base for mounting components on the component carrier. Furthermore, in particular, bare wafers, as examples of embedded electronic components, can be easily embedded into thin plates such as printed circuit boards due to their small thickness.

[0046] In one embodiment, the component carrier is configured as one of a printed circuit board, a substrate (particularly an IC substrate), and an interposer.

[0047] In the context of this application, the term "printed circuit board" (PCB) can specifically refer to a plate-shaped component carrier formed by laminating multiple electrically conductive layer structures with multiple electrically insulating layer structures, for example, by applying pressure and / or supplying heat. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, while the electrically insulating layer structures may include resin and / or glass fiber, so-called prepreg, or FR4 material. Various electrically conductive layer structures can be connected to each other in a desired manner by forming through-holes through the laminate, for example, by laser drilling or mechanical drilling, and by filling the through-holes with an electrically conductive material (particularly copper) to form vias or any other through-hole connections. A filled hole connects the entire stack (extending through multiple layers or the entire stack through-hole connections), or a filled hole connects at least two electrically conductive layers; this hole is called a via. Similarly, optical interconnects can be formed through the various layers of the stack to receive electro-optical circuit boards (EOCBs). In addition to being able to embed one or more components into a printed circuit board, a printed circuit board is typically constructed to house one or more components on one or two opposite surfaces of a plate-shaped printed circuit board. One or more components can be soldered to their respective main surfaces. The dielectric portions of the PCB may include resin with reinforcing fibers (such as glass fiber).

[0048] In the context of this application, the term "substrate" can specifically refer to a small component carrier. A substrate can be a relatively small component carrier, on which one or more components can be mounted, and which can serve as a connection medium between one or more chips and another PCB. For example, the substrate can have approximately the same dimensions as the components (particularly electronic components) to be mounted on it (e.g., in the case of chip-scale packages (CSP)). More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks and a component carrier with a comparable but much higher density of lateral and / or vertically arranged connections to a printed circuit board (PCB). Lateral connections are, for example, conductive channels, while vertical connections can be, for example, drilled holes. These lateral and / or vertical connections are arranged within the substrate and can be used to provide electrical, thermal, and / or mechanical connections between the housed or unhoused components (such as bare wafers)—particularly IC chips—and the printed circuit board or intermediate printed circuit board. Therefore, the term "substrate" also includes "IC substrate." The dielectric portion of the substrate may include a resin with reinforcing particles (such as reinforcing spheres, particularly glass spheres).

[0049] The substrate or interlayer may include or be composed of the following: at least one layer of glass, silicon (Si), and / or an organic material that is photo-imageable or dry-etchable, such as an epoxy-based laminate (e.g., an epoxy-based laminate film), or a polymer compound (which may or may not include photosensitive molecules and / or thermosensitive molecules), such as polyimide or polybenzoxazole.

[0050] At least one component may be embedded in the stack and / or surface-mounted on the stack. Such a component may be selected from non-electrically conductive inlays, point-and-blade inlays (such as metallic inlays, preferably including copper or aluminum), heat transfer units (e.g., heat pipes), light guiding elements (e.g., optical waveguides or optical conductor connectors), electronic components, or combinations thereof. The inlay may be, for example, a metal block (IMS inlay) with or without an insulating material coating, which may be embedded or surface-mounted to facilitate heat dissipation. Suitable materials are defined based on their thermal conductivity, which should be at least 2 W / mK. Such materials are typically based on, but not limited to, metals, metal oxides, and / or ceramics, such as copper, alumina (Al₂O₃), or aluminum nitride (AlN). Other geometries with increased surface area are also frequently used to increase heat exchange capacity. Furthermore, the components can be active electronic components (having at least one implemented pn junction), passive electronic components such as resistors, inductors or capacitors, electronic chips, storage devices (e.g., DRAM or another data memory), filters, integrated circuits (e.g., field-programmable gate arrays (FPGAs), programmable array logic (PALs), general-purpose array logic (GALs) and complex programmable logic devices (CPLDs)), signal processing components, power management components (such as field-effect transistors (FETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), complementary metal-oxide-semiconductor (CMOS) transistors, junction field-effect transistors (JFETs), or insulated gate transistors (IGMTs). In-field field-effect transistors (IGFETs), all of the aforementioned power management components are based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs), and / or any other suitable inorganic composites; optoelectronic interface elements; light-emitting diodes; optocouplers; voltage converters (e.g., DC / DC converters or AC / DC converters); cryptographic components; transmitters and / or receivers; electromechanical transducers; sensors; actuators; microelectromechanical systems (MEMS); microprocessors; capacitors; resistors; inductors; batteries; switches; cameras; antennas; logic chips; and energy harvesting units. However, other components can be embedded in the component carrier. For example, magnetic elements can be used as components. Such magnetic elements can be permanent magnets (e.g., ferromagnetic, antiferromagnetic, multiferroic, or ferrimagnetic elements, such as ferrite cores), or they can be paramagnetic. However, the component can also be, for example, an IC substrate in a board-in-board configuration, an interposer, or another component carrier. Components may be surface-mounted on a component carrier and / or embedded in a component carrier. Furthermore, other components may be used as components, particularly those that generate and emit electromagnetic radiation and / or are sensitive to electromagnetic radiation propagating from the environment.

[0051] After the internal layer structure of the component carrier has been treated, one or more additional electrically insulating and / or electrically conductive layer structures can be used to symmetrically or asymmetrically cover (particularly by lamination) one of the main surfaces of the treated layer structure or the two opposite main surfaces. In other words, lamination can continue until the desired number of layers is obtained.

[0052] After the formation of the stacked component of the electrical insulation layer structure and the electrical conductivity layer structure is completed, the surface treatment of the obtained layer structure or component carrier can be carried out.

[0053] Specifically, in terms of surface treatment, an electrically insulating solder resist can be applied to one or both opposing main surfaces of the laminate or component carrier. For example, the solder resist can be formed over the entire main surface and the resist layer can then be patterned to expose one or more electrically conductive surface portions that will be used to electrically couple the component carrier to electronic peripherals. The solder resist-covered surface portions of the component carrier are effectively protected from oxidation or corrosion, particularly the copper-containing surface portions.

[0054] Regarding surface treatment, surface trimmings can also be selectively applied to exposed electrically conductive surface portions of the component carrier. Such surface trimmings can be electrically conductive covering materials on exposed electrically conductive layer structures (such as pads, conductive traces, etc., particularly including or made of copper) on the surface of the component carrier. Without protecting such exposed electrically conductive layer structures, the exposed electrically conductive component carrier material (especially copper) may oxidize, resulting in lower reliability of the component carrier. The surface trimmings can then be formed as, for example, a joint between a surface-mounted component and the component carrier. The surface trimmings function to protect the exposed electrically conductive layer structures (especially copper circuitry) and, for example, to achieve bonding processes with one or more components via soldering. Examples of suitable materials for surface trimmings are organic solderable corrosion inhibitors (OSP), electroless nickel immersion gold (ENIG), electroless nickel immersion palladium immersion gold (ENIPIG), gold (especially hard gold), electroless tin, nickel-gold, nickel-palladium, etc.

[0055] The above-defined aspects and other aspects of the invention will become apparent from the examples of embodiments described below, and these examples of embodiments will be used to illustrate the above-defined aspects and other aspects of the invention. Attached Figure Description

[0056] Figure 1 A schematic diagram of a conventional component carrier with standard identification markings is shown.

[0057] Figure 2A schematic diagram of a component carrier including a removable core layer and identification markings according to an exemplary embodiment is shown.

[0058] Figure 3 A schematic diagram of a component carrier including three identification marks according to an exemplary embodiment is shown.

[0059] Figure 4 A schematic diagram of a component carrier including three identification marks according to an exemplary embodiment is shown, the three identification marks being arranged vertically to each other along the stacking direction.

[0060] Figure 5 A schematic diagram of an arrow-shaped identification mark according to an exemplary embodiment is shown.

[0061] Figure 6 A schematic diagram of an identification mark formed by three dots according to an exemplary embodiment is shown. Detailed Implementation

[0062] The illustrations in the accompanying drawings are schematic. In different drawings, similar or identical elements are given the same reference numerals.

[0063] Figure 1 A schematic diagram of a conventional component carrier 1000 with conventional identification marks 1001, 1002 is shown.

[0064] The conventional component carrier 1000 includes a stack 101 having an electrically insulating layer structure 102 and electrically conductive layer structures 103, 16, which are made of electrically conductive material. The electrically insulating layer structure 102 and the electrically conductive layer structures 103, 106 are stacked on top of each other alternately along the stacking direction 104.

[0065] A conventional identification mark 1001 is formed in a triangular shape in the electrically conductive layer structure 103 (upper layer L6, mirrored internal pattern). Another conventional identification mark 1002 is formed in a triangular shape in the electrically conductive layer structure 106 (lower layer L6). Identification marks 1001 and 1002 are filled with an electrically conductive material. The two conventional identification marks 1001 and 1002 are not arranged vertically relative to each other along the stacking direction 104, and are offset relative to each other along the stacking direction 104. Furthermore, the conventional identification marks 1001 and 1002 are mirror images and have the same pattern in both the upper and lower layers L6. An X-ray detection device captures a corresponding image 110 and detects the peripheral shape and orientation of the identification mark 107.

[0066] The external conductive layer structures 103, 106 (L7) can be carrier copper foil, the thickness of which can be between 3 μm and 18 μm. Due to the thick external conductive layer structures 103, 106 (L7), this will affect the contrast in the image 110 of the detection device (e.g., an X-ray detection device). Even by adjusting the X-ray source and contrast, the different directions of the triangular identification marks 1001, 1002 pointing in different directions before the core is removed will also affect orientation recognition in the corresponding image 110.

[0067] Figure 2 A schematic diagram of a component carrier 100 including a removable core layer 109 and identification marks 107, 108 according to an exemplary embodiment is shown.

[0068] The component carrier 100 includes a stack 101 having four electrically insulating layer structures 102 and at least one electrically conductive layer structure 103, 106. The electrically conductive layer structures 103, 106 are made of electrically conductive material. The four electrically insulating layer structures 102 and the at least one electrically conductive layer structure 103, 106 are stacked alternately on top of each other along the stacking direction. One of the electrically conductive layer structures 103, 106 forms a first outer electrically conductive layer 111 of the stack 101, and the other electrically conductive layer structure 103, 106 forms a second outer electrically conductive layer 112 of the stack 101. The first outer electrically conductive layer 111 and the second outer electrically conductive layer 112 are opposite outer layers of the stack 101. A first identification mark 107, detectable by a detection device, is formed in the electrically conductive layer structure 103 closest to the first outer electrically conductive layer 111. Additionally, a first identification mark 107 and / or a second identification mark 108 may also be formed in each of the other conductive layer structures 103 and 106 besides the outer conductive layers 111 and 112.

[0069] Furthermore, a second identification mark 108 capable of being detected by a detection device is formed, wherein the second identification mark 108 is formed in the conductive layer structure 106 arranged closest to the second outer conductive layer 112. The first identification mark 107 and the second identification mark 108 are formed vertically to each other along the stacking direction 104.

[0070] The first identification mark 107 and / or the second identification mark 108 includes an internal volume portion that does not contain electrically conductive material. Identification marks 107, 108 extend along the plane of the respective electrically conductive layer structures 103, 106 and include a corresponding normal parallel to the normal of the plane of the respective electrically conductive layer structures 103, 106.

[0071] To illustrate the shape of identification marks 107 and 108 in the figure, they are shown tilted at 90°. Furthermore, electrically conductive layers 103 and 106 are designated by layer numbers L4 to L8.

[0072] Identification marks 107 and 108 are respectively formed in at least one of the electrically conductive layer structures 103 and 106 (layer L6, mirror image of the internal pattern) closest to the outer electrically conductive layers 111 and 112. Specifically, for example, identification mark 107 includes an internal volume portion that does not contain material of the electrically conductive layer structure. For example, the internal volume portion of identification mark 107 is hollow and, for example, does not contain copper. The electrically insulating material may be similar to the electrically insulating layer structure 102, which is laminated on top of the corresponding electrically conductive layer structure 103. An X-ray detection device (e.g., X-ray) captures the corresponding image 110 and detects the peripheral shape and orientation of identification mark 107, respectively.

[0073] The covering electrically conductive layer structures 103, 106 (L7) can be copper foil, and the thickness of the copper foil can be between 3 μm and 18 μm.

[0074] The first identification mark 107 and the second identification mark 108 are formed vertically relative to each other in the stacking direction 104. Therefore, the stack 101 can be formed from a plurality of electrically insulating layer structures 102, 105 and a plurality of electrically conductive layer structures 103, 106, wherein corresponding identification marks 107, 108 are formed in the spaced-apart electrically conductive layer structures 103, 106 of the stack 101. If the first identification mark 107 and the second identification mark 108 are formed vertically relative to each other in the stacking direction 104, a suitable image 110 of the alignment of the identification marks 107, 108, captured by the detection device, can be provided.

[0075] In the example shown, identification marks 107 and 108 include the same triangular shape. In other words, the first identification mark 107 and the second identification mark 108 are formed such that on a projection plane having a projection normal parallel to the stacking direction 104, the first identification mark 107 and the second identification mark 108 completely overlap each other.

[0076] The component carrier 100 also includes a removable core layer 109, which is detachably arranged between a central electrically conductive layer structure 103 (L5) on one side and another electrically conductive layer structure 106 (L5) on the other side. On opposite sides of the removable core layer 109, corresponding stacked portions of the stack 101 made of electrically conductive layer structures 103, 106 and electrically insulating layer structures 102, 105 can be formed in layers. A first identification mark 107 and a second identification mark 108 are formed in the corresponding electrically conductive layer structures 103, 106 arranged on opposite sides of the removable core layer 109. After the corresponding stacked portions on both sides of the removable core layer 109 are formed, the removable core layer 109 can be removed, allowing two stacked portions to be formed in the same manufacturing / lamination step. By forming identification marks 107 and 108, the orientation of the corresponding component carrier 100 can be detected before and after the removal of the disassembly core layer 109.

[0077] exist Figure 2 In this configuration, the three conductive layer structures 103, 106 (L5, L6, and L7) are copper layers. Identification marks 107 and 108 are formed in the conductive layer structure L6 because patterning is completed in these L6 layers, and identification marks 107 and 108 can be formed within this corresponding patterning process. In the conductive layer structures 103 and 106 (L5), closest to the removal core layer 109, and the top outer conductive layers 111 and 112 (L7), no patterning was completed before removal from the removal core layer 109.

[0078] Figure 3 A schematic diagram of a component carrier 100 including three identification marks 107, 301 according to an exemplary embodiment is shown. The stacked component 101 including conductive layer structures L5, L6, and L7 is... Figure 2 The inverted stacked portion of the upper part of the stacked member 101. The first identification mark 107 is related to... Figure 2 The first identification mark 107 is the same. Figure 2 The first identification mark 107 can be formed in the electrically conductive layer structure 103 (L6) before the electrically conductive layer structure 103 (L6) is removed from the disassembly core layer 109, and Figure 3 The third identification mark 301 is an additional mark formed in the conductive layer structures L5 and L7 after they have been removed from the disassembly core layer 109. The third identification mark 301 may have the same outline, for example, a triangular outline, and the third identification mark 301 is formed vertically on top of each other in the stacking direction 104. The third identification mark is similar to... Figure 2The first identification mark 107 and the second identification mark 108 are shown. The stack 101 includes a mirror plane 201 parallel to the stacking direction 104, wherein an additional identification mark 301 is arranged about the mirror plane 201 on the opposite side relative to the first identification mark 107.

[0079] Figure 3 The component carrier 100 shown can be formed by laminating additional electrical insulating layer structures 102, 105 and additional external electrical conductive layers 302 (L4, L8) on top of external electrical conductive layers 111 (L5, L7). Identification mark 107 is due to... Figure 2 The upper stacked portion is flipped and arranged on the right side, and the identification mark 107 is still formed in the center of the stack 101 in the electrically conductive layer structure 103 (L6). Therefore, although the central identification mark 107 is almost invisible in the image 110 of the detection device, additional identification marks 301 are formed in the electrically conductive layer structures 103, 106 (L5, L7), which are arranged closest to the additional outer electrically conductive layer 302 (L4, L8), and therefore closest to the surface of the stack 101. Therefore, the shape of the additional identification marks 301 can be clearly shown in the image 110 of the detection device. The additional identification marks 301 may have an internal volume without electrically conductive material. In addition, the additional identification marks 301 may also be formed in each of the other electrically conductive layer structures 103, 106 besides the outer electrically conductive layers 111, 112.

[0080] Figure 4 A schematic diagram of a component carrier including three identification marks 108, 301 according to an exemplary embodiment is shown, the three identification marks 108, 301 being arranged vertically to each other along the stacking direction 104. Figure 4 The component carrier 100 shown can be formed by laminating additional electrical insulating layer structures 102, 105 and additional external electrical conductive layers 302 (L4, L8) on top of external electrical conductive layers 112 (L5, L7).

[0081] The stacked component 101, including conductive layer structures L5, L6, and L7, is Figure 2 The lower part of the stacked component 101 in the middle. The second identification mark 108 and Figure 2 The second identification mark 108 is the same, Figure 2 The second identification mark 108 can be formed in the electrically conductive layer structure 103 (L6) before the electrically conductive layer structure 103 (L6) is removed from the disassembly core layer 109, and Figure 4The third identification mark 301 is an additional mark formed in the conductive layer structures L5 and L7 after they have been removed from the disassembly core layer 109. The third identification mark 301 may have the same outline, such as a triangle, and the third identification mark 301 is formed vertically relative to each other along the stacking direction and resembles... Figure 2 The first identification mark 107 and the second identification mark 108 are shown. The stack 101 includes a mirror plane 201 parallel to the stacking direction 104, wherein additional identification marks 301 are arranged on the same side of the mirror plane 201 relative to the second identification mark 108. Furthermore, additional identification marks 301 may also be formed in each of the other electrically conductive layer structures 103, 106 besides the outer electrically conductive layers 111, 112.

[0082] Since the second identification mark 108 and the third identification mark 301, which has an internal volume without electrically conductive material, are formed one above the other, the corresponding overlap and match of all identification marks 108 and 301 on the image 110 captured by the detection device can be detected.

[0083] Figure 5 A schematic diagram of an arrow-shaped first identification mark 107 according to an exemplary embodiment is shown. The first identification mark 107 includes an arrow shape. The second identification mark 108 and the third identification mark 301 may also have corresponding shapes.

[0084] Figure 6 A schematic diagram of an identification mark 107 formed by three points according to an exemplary embodiment is shown. The three identification points form a triangular shape, wherein each identification point includes an internal volume portion that has no electrically conductive material. For example, the three identification points may be formed at the corners of a virtual triangle to form the identification mark 107. The second identification mark 108 and the third identification mark 301 may also have corresponding shapes.

[0085] It should be noted that the term "comprising" does not exclude other elements or steps, and "a" or "an" does not exclude multiple. Furthermore, elements described in association with different embodiments may be combined.

[0086] It should also be noted that the reference numerals in the claims should not be interpreted as limiting the scope of the claims.

[0087] The implementation of this application is not limited to the preferred embodiments shown in the accompanying drawings and described above. Instead, various modifications can be made using the illustrated solutions and in accordance with the principles of this application, even in fundamentally different implementations.

[0088] List of reference numerals in the attached diagram:

[0089] 100 component carriers

[0090] 101 stacked components

[0091] 102 Electrical Insulation Layer Structure

[0092] 103 Electrically Conductive Layer Structure

[0093] 104 stacking direction

[0094] 105. Other electrical insulation layer structures

[0095] 106 Other electrical conduction layer structures

[0096] 107 Identification Marker

[0097] 108 Second Identification Mark

[0098] 109 Disassembly of the core layer

[0099] 110 X-ray image

[0100] 111 First external electrical conduction layer

[0101] 112 Second External Electrical Conductive Layer

[0102] 201 Mirror Plane

[0103] 301 Third Identification Mark, Other Identification Marks

[0104] 302. Another external electrical conductive layer.

Claims

1. A component carrier, characterized in that, The component carrier (100) includes: The stacked component (101) has at least four electrically insulating layer structures (102) and at least five electrically conductive layer structures (103, 106), wherein the electrically insulating layer structures (102) and the electrically conductive layer structures (103, 106) are stacked one on top of the other alternately along the stacking direction (104). Wherein, one of the electrically conductive layer structures (103, 106) forms the first external electrically conductive layer (111) of the stack (101), and the other electrically conductive layer structure (103, 106) forms the second external electrically conductive layer (112) of the stack (101). Wherein, the first external conductive layer (111) and the second external conductive layer (112) are two opposite external layers of the stack (101). The first identification mark (107) is detectable by the detection device. The first identification mark (107) is formed in the electrically conductive layer structure (103, 106). The second identification mark (108) is detectable by the detection device. The second identification mark (108) is formed in the electrically conductive layer structure (103, 106). The first identification mark (107) and the second identification mark (108) are formed vertically relative to each other in the stacking direction (104). The component carrier is a laminated component carrier, and at least one of the first identification mark (107) and the second identification mark (108) is configured to detect the orientation of the component carrier (100).

2. The component carrier according to claim 1, characterized in that, The first identification mark (107) includes an internal volume portion that does not contain electrically conductive material.

3. The component carrier according to claim 2, characterized in that, The first identification mark (107) includes a triangular shape.

4. The component carrier according to claim 2, characterized in that, The first identification mark (107) includes an arrow shape.

5. The component carrier according to claim 2, characterized in that, The first identification marker (107) includes three identification points forming a triangle shape. Each identification point includes an internal volume that does not contain electrically conductive material.

6. The component carrier according to claim 2, characterized in that, The first identification mark (107) is formed at the edge portion of an electrically conductive layer structure.

7. The component carrier according to claim 2, characterized in that, The first identification mark (107) is formed at the corner portion of an electrically conductive layer structure.

8. The component carrier according to claim 1, characterized in that, The first identification mark (107) and the second identification mark (108) have the same peripheral shape.

9. The component carrier according to claim 1, characterized in that, The second identification mark (108) is filled with an electrically conductive material.

10. The component carrier according to claim 9, in, The second identification mark (108) includes a circumferential path that does not contain electrically conductive material.

11. The component carrier according to claim 1, characterized in that, The second identification mark (108) includes an internal volume portion that does not contain electrically conductive material.

12. The component carrier according to claim 1, characterized in that, The component carrier (100) also includes: Remove the core layer (109). The detachable core layer (109) is detachably arranged between at least one of the electrical insulating layer structures (102) and at least one of the electrical conductive layer structures on one side and at least one additional electrical insulating layer structure (105) and at least one additional electrical conductive layer structure on the other side.

13. The component carrier according to claim 1, characterized in that, The first identification mark (107) is arranged closest to the first external electrically conductive layer (111), and / or The second identification mark (108) is arranged closest to the second external electrical conductive layer (112).

14. The component carrier according to claim 1, characterized in that, The component carrier (100) also includes: Additional first identification mark and / or additional second identification mark, the additional first identification mark and / or the additional second identification mark, are formed in each of the other electrical conductive layer structures besides the first external electrical conductive layer (111) and the second external electrical conductive layer (112).

15. The component carrier according to claim 1, characterized in that, The component carrier (100) also includes: An additional identification mark (301), which is detectable by the detection device, The additional identification mark (301) is formed in the corresponding conductive layer structure arranged closest to the first external conductive layer (111) or the second external conductive layer (112).

16. The component carrier according to claim 15, characterized in that, The stacked component (101) includes a mirror plane (201) parallel to the stacking direction (104). The additional identification mark (301) is arranged on the opposite side of the first identification mark (107) relative to the mirror plane (201).

17. The component carrier according to claim 15, characterized in that, The stacked component (101) includes a mirror plane (201) parallel to the stacking direction (104). The additional identification mark (301) is arranged on the same side as the second identification mark (108) relative to the mirror plane (201).

18. The component carrier according to claim 15, characterized in that, The additional identification mark (301) includes an internal volume portion that does not contain electrically conductive material.

19. The component carrier according to claim 15, characterized in that, In each of the electrical conductive layer structures other than the first external electrical conductive layer (111) and the second external electrical conductive layer (112), an additional identification mark (301) is formed.

20. The component carrier according to claim 15, characterized in that, The additional identification marker (301) includes a triangular shape.

21. The component carrier according to claim 15, characterized in that, The additional identification marker (301) includes an arrow shape.

22. The component carrier according to claim 15, characterized in that, The additional identification marker (301) includes three identification points forming a triangle shape. Each identification point includes an internal volume that does not contain electrically conductive material.

23. The component carrier according to claim 15, characterized in that, The additional identification mark (301) is formed at the edge portion of an electrically conductive layer structure.

24. The component carrier according to claim 15, characterized in that, The additional identification mark (301) is formed at the corner portion of the electrically conductive layer structure (103, 106).

25. The component carrier according to claim 15, characterized in that, The additional identification mark (301), the first identification mark (107), and / or the second identification mark (108) all have the same peripheral shape.

26. The component carrier according to claim 15, characterized in that, The additional identification mark (301) is filled with an electrically conductive material.

27. The component carrier according to claim 1, in, The first identification mark (107) and the second identification mark (108) are formed such that the first identification mark (107) and the second identification mark (108) completely overlap each other on a projection plane having a projection normal parallel to the stacking direction (104).

28. The component carrier according to claim 1, in, The first external conductive layer (111) and / or the second external conductive layer (112) covering the stack (101) are copper foils, and in particular, the copper foils have a thickness between 3µm and 18µm.

29. A method for manufacturing a component carrier (100), the method comprising: A stack (101) is formed, the stack (101) having at least four electrically insulating layer structures (102) and at least five electrically conductive layer structures (103, 106), the electrically insulating layer structures (102) and the electrically conductive layer structures (103, 106) being stacked one on top of the other alternately along the stacking direction (104). Wherein, one of the electrically conductive layer structures (103, 106) forms the first external electrically conductive layer (111) of the stack (101), and the other electrically conductive layer structure (103, 106) forms the second external electrically conductive layer (112) of the stack (101). Wherein, the first external conductive layer (111) and the second external conductive layer (112) are two opposite external layers of the stack (101). Provide a first identification mark (107), the first identification mark (107) being detectable by a detection device, and The first identification mark (107) is formed in the electrically conductive layer structure (103, 106). A second identification mark (108) is provided, the second identification mark (108) being detectable by a detection device, and The second identification mark (108) is formed in the electrically conductive layer structure (103, 106). The first identification mark (107) and the second identification mark (108) are formed vertically relative to each other in the stacking direction (104). The component carrier is a laminated component carrier, and at least one of the first identification mark (107) and the second identification mark (108) is configured to detect the orientation of the component carrier (100).

30. The method of claim 29, further comprising: Forming the disassembled core layer (109). The detachable core layer (109) is detachably arranged between at least one of the electrical insulating layer structures (102) and at least one of the electrical conductive layer structures (103) located on one side and at least one additional electrical insulating layer structure (105) and at least one additional electrical conductive layer structure (106) located on the other side.

31. The method of claim 30, further comprising: By forming the first identification mark (107) and the second identification mark (108), the orientation of the corresponding component carrier (100) is detected before and after the removal of the disassembly core layer (109).

32. The method of claim 30, further comprising: Before the electrically conductive layer structure (103, 106) is removed from the disassembled core layer (109), the second identification mark (108) is formed in the electrically conductive layer structure (103, 106).

33. The method of claim 32, further comprising: This forms an additional identification mark (301), which is detectable by the detection device. The additional identification mark (301) is formed in a corresponding conductive layer structure (103, 106) arranged closest to the first external conductive layer (111) or the second external conductive layer (112). The additional identification mark (301) is an additional mark formed in the electrically conductive layer structure (103, 106) after the electrically conductive layer structure (103, 106) is removed from the disassembled core layer (109).

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