A high-precision operational amplifier hybrid test system and method

By combining two-wire OTA and three-wire SPI testing, high-precision operational amplifiers can be tested efficiently, the impact of the test interface on operational amplifier performance can be resolved, and the testing speed can be improved and the cost can be reduced.

CN116840666BActive Publication Date: 2026-01-16COMMON MODE (GONGMO) SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202310925866.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-26
Publication Date
2026-01-16
Estimated Expiration
2043-07-26

AI Technical Summary

Technical Problem

The design of test interfaces for high-precision operational amplifiers makes it difficult to balance test accuracy and speed. Existing protocols such as Onewire/I2C/SPI protocols affect operational amplifier performance and lack a four-wire SPI multiplexing interface.

Method used

Combining two-wire OTA testing and three-wire SPI testing, the CP and FT phases are tested and calibrated through packaged pins. A hybrid test system and method are used, including a pin selector, a two-wire OTA controller, and a three-wire SPI controller, supporting two-wire and three-wire protocol switching.

Benefits of technology

Without affecting the normal operation of the op-amp, the test accuracy and speed were improved, the test cost was reduced, and the problem of the test interface affecting the accuracy of the op-amp was solved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides a high-precision operational amplifier mixed test system and method, which comprises a chip part and four packaging pins packaged together with the chip part; the chip part comprises a functional module, a test module and a test pin; the functional module is a conventional high-precision operational amplifier circuit; the test module is used for completing the test and correction of the operational amplifier; the third and fourth packaging pins are connected with the functional module; the first and second packaging pins are connected with the test module; the first and second packaging pins connected with the test module are simultaneously connected with the functional module; the test pin is connected with the test module and is used for CP stage test in chip production. The application defines a two-wire OTA test interface and mixes it with a standard three-wire SPI, and adds a non-packaging test pin, which solves the problem of high-precision operational amplifier test precision, improves the overall test speed and reduces the test cost.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of operational amplifier performance testing, and more particularly, to a high-precision operational amplifier hybrid testing system and method. BACKGROUND

[0002] High-precision operational amplifiers are basic components of high-performance analog systems. In addition to design and manufacture, high-precision operational amplifiers also need to be tested and corrected during chip production and after packaging to achieve optimal performance.

[0003] During actual use by users after leaving the factory, there is no need to turn on the test function. Therefore, chip manufacturers do not reserve dedicated test pins, but reuse functional pins to enter the test mode in order to save costs.

[0004] Due to the high requirements of high-precision operational amplifiers on the performance and leakage current of functional pins and the strict restrictions on input and output pins, standard test protocols cannot be directly used. It is necessary to develop a test interface specifically for high-performance operational amplifiers.

[0005] Existing Onewire / I2C / SPI protocols are suitable for small devices as test interfaces limited by pins. Onewire, I2C, and three-wire SPI have special requirements for pins, requiring bidirectional data lines with pull-up and tri-state, which will increase the leakage current of operational amplifier pins and affect the performance of the operational amplifier. Four-wire SPI does not have the problem of leakage current, but the operational amplifier cannot provide a four-pin multiplex test interface. SUMMARY

[0006] The purpose of the present application is to solve the problem of testing high-precision operational amplifiers, and to propose a high-precision operational amplifier hybrid testing system and method. The present application combines two-wire OTA testing and three-wire SPI testing, and realizes CP stage testing and correction through the first, second packaging pins and test pins, and realizes FT stage testing and correction through the first and second packaging pins. Without affecting the normal operation of high-precision operational amplifiers, the highest testing efficiency is achieved.

[0007] The technical solution of the present application is as follows:

[0008] The present application provides a high-precision operational amplifier hybrid testing system, which includes a chip part and four packaging pins packaged together with the chip part;

[0009] The chip part includes a function module, a test module and a test pin, the function module is a conventional high-precision operational amplifier circuit, the test module is used for completing the test and correction of the operational amplifier, the third and fourth packaging pins are connected with the function module, the first and second packaging pins are connected with the test module, the first and second packaging pins connected with the test module are simultaneously connected with the function module, the test pin is connected with the test module and is used for CP stage test in chip production.

[0010] Further, the test module includes a pin selector, a two-wire OTA controller, a three-wire SPI controller and an internal register, the input end of the pin selector is connected with the first and second packaging pins, and the connection points are respectively connected with the function module, the output end of the pin selector is connected with the control signal end of the two-wire OTA controller and the three-wire SPI controller respectively, the other control signal end of the three-wire SPI controller is connected with the test pin, the two-wire OTA controller and the three-wire SPI controller are both connected with the internal register, and the test and correction signal output end of the internal register is connected with the corresponding signal input end of the function module.

[0011] Further, in the two-wire mode, the first and second packaging pins respectively input clock signals and data; the two-wire OTA controller is used for processing the OTA protocol and generating a register write signal to control the test and correction of the operational amplifier.

[0012] Further, the two-wire OTA protocol timing is that the high data detected on the clock rising edge is taken as a start bit, the first byte is inputted as a write address, and the second byte is inputted as write data.

[0013] Further, in the three-wire mode, the first and second packaging pins respectively input chip selection and clock signals, and the test pin is used for inputting and outputting test signals; the three-wire SPI controller is used for processing the SPI protocol and controlling the test and correction of the operational amplifier.

[0014] A test method based on a high-precision operational amplifier hybrid test system, a test module executes CP test in chip production process and FT test after chip packaging is completed.

[0015] Further, the method includes the following steps:

[0016] CP test is executed in chip production, the internal register is written through the two-wire OTA protocol to switch to the three-wire SPI protocol, the three-wire SPI interface is supported based on the test pin and the first and second packaging pins, and test is executed;

[0017] After the CP test is completed, the chip is packaged, wherein: the functional module, the test module and the test pin are wrapped in the packaging shell, one end of the third and fourth packaging pins is connected with the functional module in the packaging shell, the first and second packaging pins are connected with the test module in the packaging shell, and the other end of the first, second, third and fourth packaging pins is exposed;

[0018] After the chip is packaged, the rest of the chip test and correction is completed through the two-wire OTA protocol.

[0019] The beneficial effects of the present application are:

[0020] The present application solves the problem of the influence of the test interface on the precision of the operational amplifier during high-precision operational amplifier testing. By defining a two-wire OTA test interface and mixing with a standard three-wire SPI, non-packaging test pins are added, which on the one hand solves the problem of high-precision operational amplifier test precision, and on the other hand improves the overall test speed and reduces the test cost.

[0021] The test method of the present application is applied, the three-wire SPI protocol is used in the CP stage to complete most of the test and correction items at a high speed, and the two-wire OTA is used in the FT stage to complete the test and correction items sensitive to packaging, and the overall test ratio in the FT stage is low, and the influence on the test speed is small.

[0022] Other features and advantages of the present application will be described in detail in the subsequent specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0023] The above and other objects, features and advantages of the present application will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which like reference characters refer to like parts throughout the several views, and wherein the exemplary embodiments of the present application are shown.

[0024] Figure 1 A general structure diagram according to one embodiment of the present application is shown.

[0025] Figure 2 A two-wire OTA protocol timing diagram according to one embodiment of the present application is shown. DETAILED DESCRIPTION

[0026] The preferred embodiments of the present application will be described in detail with reference to the accompanying drawings. Although the preferred embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments described herein.

[0027] As Figure 1 shown, the present application provides a high-precision operational amplifier mixed test system, which includes a chip part and four packaging pins packaged together with the chip part;

[0028] The chip part comprises a functional module, a test module and a test pin, the functional module is a conventional high-precision operational amplifier circuit, the test module is used for completing the test and correction of the operational amplifier, the third and fourth packaging pins are connected with the functional module, the first and second packaging pins are connected with the test module, the first and second packaging pins connected with the test module are simultaneously connected with the functional module, the test pin is connected with the test module and is used for CP stage test in chip production.

[0029] The test module comprises a pin selector, a two-wire OTA controller, a three-wire SPI controller and an internal register, the input end of the pin selector is connected with the first and second packaging pins, and the connection points are respectively connected with the functional module, the output end of the pin selector is connected with the control signal end of the two-wire OTA controller and the three-wire SPI controller respectively, the other control signal end of the three-wire SPI controller is connected with the test pin, the two-wire OTA controller and the three-wire SPI controller are both connected with the internal register, and the test and correction signal output end of the internal register is connected with the corresponding signal input end of the functional module.

[0030] In the two-wire mode, the first and second packaging pins respectively input clock signals and data; the two-wire OTA controller is used for processing the OTA protocol and generating a register write signal to control the test and correction of the operational amplifier; as shown in the figure, the two-wire OTA protocol timing is that the high data on the clock rising edge is detected as a start bit, the first byte inputs a write address, and the second byte inputs write data. Figure 2

[0031] In the three-wire mode, the first and second packaging pins respectively input chip selection and clock signals, and the test pin is used for inputting test signals; the three-wire SPI controller is used for processing the SPI protocol to control the test and correction of the operational amplifier, and can provide faster processing speed to speed up the test process.

[0032] A test method based on a high-precision operational amplifier hybrid test system, a test module executes CP test in chip production process and FT test after chip packaging is completed, and comprises the following steps:

[0033] CP test is executed in chip production, the internal register is switched to three-wire SPI protocol through two-wire OTA protocol writing, three-wire SPI interface is supported based on the test pin and the first and second packaging pins, and test is executed;

[0034] After the CP test is completed, the chip is packaged, wherein the functional module, the test module and the test pin are wrapped in the packaging shell, one end of the third and fourth packaging pins is connected with the functional module in the packaging shell, the first and second packaging pins are connected with the test module in the packaging shell, and the other end of the first, second, third and fourth packaging pins is exposed.​

[0035] After the chip is packaged, the rest of the chip test and correction is completed through the two-wire OTA protocol.

[0036] In the embodiments of the present application, the functional module is responsible for completing the normal high-precision operational amplifier, and the test module is responsible for completing the test and correction functions of the operational amplifier. The test module is only used before the product is sent to the user. Once sent to the user, only the functional module will work.

[0037] The whole chip test is divided into CP test in the production process and FT test after packaging. In the CP test, additional test pins can be provided to support the three-wire SPI interface. After the user starts the machine, the internal test register is written through the two-wire OTA protocol to switch to the three-wire SPI protocol. Using the three-wire SPI protocol in the CP stage can complete most of the test and correction items at a higher speed.

[0038] After the chip is packaged, the test pins have no external leads. The user completes the rest of the chip test items and corrections by using the two-wire OTA protocol. Since only the packaging-sensitive test items and correction items need to be completed in the FT stage, the overall proportion is low, and the impact on the test speed is small.

[0039] In summary, the present application mixes two-wire OTA test interface with standard three-wire SPI and adds non-packaging test pins, which on the one hand solves the problem of high-precision operational amplifier test precision, and on the other hand improves the overall test speed and reduces the test cost.

[0040] The above has described the embodiments of the present application, the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A test method based on a high-precision operational amplifier hybrid test system, characterized in that, The system comprises a chip part and four package pins packaged together with the chip part; The chip part comprises a functional module, a test module and a test pin, the functional module is a high-precision operational amplifier circuit, the test module is used for completing the test and correction of the high-precision operational amplifier circuit, the third and fourth package pins are connected with the functional module, the first and second package pins are connected with the test module, the first and second package pins connected with the test module are simultaneously connected with the functional module, the test pin is connected with the test module and is used for CP stage test in chip production; The test module comprises a pin selector, a two-wire OTA controller, a three-wire SPI controller and an internal register, the input end of the pin selector is connected with the first and second package pins, and the connection points are connected with the functional module respectively, the output end of the pin selector is connected with the control signal ends of the two-wire OTA controller and the three-wire SPI controller respectively, the other control signal end of the three-wire SPI controller is connected with the test pin, the two-wire OTA controller and the three-wire SPI controller are connected with the internal register, and the test and correction signal output end of the internal register is connected with the corresponding signal input end of the functional module; In the two-wire mode, the first and second package pins input clock signals and data respectively; the two-wire OTA controller is used for processing OTA protocol and generating register write signals to control the test and correction of the high-precision operational amplifier circuit; In the three-wire mode, the first and second package pins input chip selection and clock signals respectively, and the test pin is used for inputting and outputting test signals; the three-wire SPI controller is used for processing SPI protocol and controlling the test and correction of the high-precision operational amplifier circuit; The test module executes CP test in chip production process and FT test after chip packaging is completed.

2. The test method of claim 1, wherein, The two-wire OTA protocol timing is that the high data on the clock rising edge is detected as a start bit, the first byte is inputted as a write address, and the second byte is inputted as write data.

3. The test method of claim 1, wherein, The method comprises the following steps: CP test is executed in chip production, the internal register is switched to three-wire SPI protocol through two-wire OTA protocol, the three-wire SPI interface is supported based on the test pin and the first and second package pins, and test is executed; After the CP test is completed, the chip is packaged, wherein the functional module, the test module and the test pin are wrapped in a packaging shell, one end of the third and fourth package pins is connected with the functional module in the packaging shell, the first and second package pins are connected with the test module in the packaging shell, and the other end of the first, second, third and fourth package pins is exposed; After the chip packaging is completed, the rest of the chip test and correction are completed through two-wire OTA protocol.

Citation Information

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