Logic configuration implementation system for rupture disk explosion alarm in primary circuit compartment of high temperature gas-cooled reactor
By encapsulating the algorithm block within the DCS controller and utilizing the trigger condition module, the pressure measurement point value assignment module, and the pressure measurement point value retention module, the problem of the DCS control station being unable to timely monitor the containment positive pressure exceeding the limit was solved, and timely alarm of the bursting disk pressure was achieved, thereby enhancing the safety of the reactor.
Patent Information
- Application Number
- CN202310804519.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-03
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2043-07-03
AI Technical Summary
The DCS control station was unable to obtain historical data from the historical server for calculation, resulting in the inability to timely monitor whether the containment positive pressure exceeded the limit in the event of a large-diameter pipe break in a single-loop circuit, and the inability to effectively trigger the bursting disk explosion alarm.
By encapsulating the algorithm block within the DCS controller and utilizing the trigger condition module, the pressure measurement point value assignment module, and multiple pressure measurement point value retention modules, temporary storage and judgment of temporary pressure values of different time sequences can be achieved. Combined with the bursting membrane pressure alarm module for cyclic calculation, it is ensured that the main control room can timely monitor whether the bursting membrane pressure exceeds the limit.
The historical data calculation is realized in the DCS controller, ensuring that the main control room can timely monitor whether the bursting disk pressure exceeds the limit, thus consolidating the safety of the reactor.
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Figure CN116844312B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of high-temperature gas-cooled reactors, and in particular to a system and method for realizing a bursting disk burst alarm logic configuration for a primary circuit compartment of a high-temperature gas-cooled reactor. Background Art
[0002] The KLC system serves the reactor containment compartment, fuel loading and unloading compartment, and helium purification system equipment room. The KLC40 subsystem ensures the structural integrity of each compartment by venting pressure directly to the atmosphere through bursting disks in the event of a large-diameter primary circuit pipe break. Therefore, the distributed control system (DCS) monitors the containment positive pressure and issues a bursting disk alarm to the main control room if it exceeds a limit.
[0003] However, the DCS control station cannot obtain historical data from the historical server for calculation. When data calculations with a certain time interval are required, local variables must be defined and maintained in the controller in order to perform historical data calculations. Summary of the Invention
[0004] The present disclosure aims to solve at least one of the technical problems existing in the prior art and to provide a system and method for realizing a logic configuration of a bursting disk explosion alarm for a primary circuit compartment of a high-temperature gas-cooled reactor.
[0005] One aspect of the present disclosure provides a system for implementing a logic configuration for a bursting disk explosion alarm in a primary circuit compartment of a high-temperature gas-cooled reactor, comprising:
[0006] The trigger condition module is used to set the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence;
[0007] A pressure measurement point value assignment module, configured to assign the pressure measurement point value of the current time sequence to a temporary pressure value according to the first trigger signal and the automatic cycle trigger signal;
[0008] a plurality of pressure measurement point value holding modules, each of the pressure measurement point value holding modules being used to assign and hold temporary pressure values of different time sequences according to the first trigger signal and the automatic cycle trigger signal, so as to temporarily store the plurality of temporary pressure values of different time sequences;
[0009] The bursting disk pressure alarm module is used to determine whether to issue a bursting disk pressure alarm according to the temporarily stored pressure values at different time sequences.
[0010] Optionally, the trigger condition module includes a first equivalent gate, a first reset priority trigger unit, a first AND gate and a first rising edge detection unit;
[0011] The output end of the first equivalent gate is connected to the input end of the first reset priority trigger unit, and is used to compare the input pressure measurement point value of the current time sequence with the preset equivalent value and output the comparison result;
[0012] The output terminal of the first reset priority trigger unit is connected to the input terminal of the first AND gate, and is used to obtain a first reset signal according to the comparison result of the first equivalent gate and the alarm reset condition;
[0013] The output end of the first AND gate is connected to the input end of the first rising edge detection unit, and is used to perform an AND operation on the first reset signal and the alarm flag bit to obtain the automatic cycle trigger signal;
[0014] The first rising edge detection unit is used to detect the rising edge of the automatic cycle trigger signal and generate the first trigger signal according to the rising edge of the automatic cycle trigger signal.
[0015] Optionally, the pressure measurement point value assignment module includes a first OR gate, a first timing unit, a first selection unit, a second rising edge detection unit and a second AND gate;
[0016] Two input terminals of the first OR gate are connected to the output terminal of the first rising edge detection unit and the output terminal of the second AND gate, respectively. The output terminal of the first OR gate is connected to the input terminal of the first timing unit, and is configured to perform an OR operation on the first trigger signal and the output result of the second AND gate to obtain a first trigger signal.
[0017] The output end of the first timing unit is inverted and connected to the first input end of the first selection unit, so as to generate a first pulse signal with a preset width according to the first trigger signal;
[0018] The second input end of the first selection unit is connected to the output end of the first selection unit, the third input end of the first selection unit is used to input the pressure measurement point value of the current time sequence, and the first selection unit is used to selectively output the input signal of the second input end or the third input end according to the first pulse signal;
[0019] The input end of the second rising edge detection unit is connected to the inverted output end of the first timing unit, and is used to detect the rising edge of the inverted first pulse signal, and generate a second pulse signal lasting for one operation cycle according to the inverted rising edge of the first pulse signal;
[0020] Two input terminals of the second AND gate are respectively connected to the output terminal of the second rising edge detection unit and the output terminal of the first AND gate, and are used to perform an AND operation on the second pulse signal and the automatic cycle trigger signal.
[0021] Optionally, when the first pulse signal is negative, the first selection unit outputs the input signal of its third input terminal to assign the pressure measurement point value of the current time sequence to the temporary pressure value;
[0022] When the first pulse signal is positive, the first selection unit outputs the input signal of its second input terminal to perform self-locking input.
[0023] Optionally, the pressure measurement point value holding module includes a second OR gate, a second timing unit, a second selection unit, a third rising edge detection unit and a third AND gate;
[0024] Two input terminals of the second OR gate are respectively connected to the output terminal of the first rising edge detection unit and the output terminal of the third AND gate, and the output terminal of the second OR gate is connected to the input terminal of the second timing unit, and is used to perform an OR operation on the first trigger signal and the output result of the third AND gate to obtain a second trigger signal;
[0025] The output end of the second timing unit is connected to the first input end of the second selection unit after being inverted, and is used to generate a third pulse signal of a preset width according to the second trigger signal;
[0026] The second input end of the second selection unit is connected to the output end of the second selection unit, the third input end of the second selection unit is used to input the temporary pressure values of different time sequences, and the second selection unit is used to selectively output the input signal of the second input end or the third input end according to the third pulse signal;
[0027] The input end of the third rising edge detection unit is connected to the inverted output end of the second timing unit, and is used to detect the rising edge of the inverted third pulse signal, and generate a fourth pulse signal lasting for one operation cycle according to the inverted rising edge of the third pulse signal;
[0028] The two input ends of the third AND gate are respectively connected to the output end of the third rising edge detection unit and the output end of the first AND gate, and are used to perform an AND operation on the fourth pulse signal and the automatic cycle trigger signal.
[0029] Optionally, when the third pulse signal is negative, the second selection unit outputs the input signal of its third input terminal to assign and maintain the temporary pressure value of the next time sequence;
[0030] When the third pulse signal is positive, the second selection unit outputs the input signal of its second input terminal to perform self-locking input.
[0031] Optionally, the bursting disk pressure alarm module includes a delay unit, a pulse width changing unit, a difference gate, a third selection unit, a second equivalent gate and a second reset priority trigger unit;
[0032] The input end of the delay unit is connected to the output end of the first AND gate, and is used to delay the automatic cycle trigger signal to obtain a delayed signal;
[0033] The input end of the pulse width changing unit is connected to the output end of the delay unit, and is used to change the pulse width of the delay signal to obtain a fifth pulse signal;
[0034] The two input terminals of the difference gate are used to input two temporary pressure values of different time sequences, respectively, to obtain the difference between the two temporary pressure values of different time sequences;
[0035] The first input terminal of the third selection unit is connected to the output terminal of the pulse width changing unit, the second input terminal of the third selection unit is set to zero, the third input terminal of the third selection unit is connected to the output terminal of the difference gate, and the third selection unit is used to selectively output the input signal of the second input terminal or the third input terminal according to the fifth pulse signal;
[0036] The input end of the second equivalent gate is connected to the output end of the third selection unit, and is used to compare the output signal of the third selection unit with a preset limit value and output a comparison result;
[0037] The input end of the second reset priority trigger unit is connected to the output end of the second equivalent gate, and is used to obtain a second reset signal according to the comparison result of the second equivalent gate and the alarm reset condition.
[0038] Optionally, the bursting disk pressure alarm module further includes a third OR gate, a third timing unit, a fourth rising edge detection unit and a fourth AND gate;
[0039] The two input ends of the third OR gate are respectively connected to the output end of the pulse width changing unit and the output end of the fourth AND gate, and the output end of the third OR gate is connected to the third timing unit and the first input end of the third selection unit, and is used to perform an OR operation on the fifth pulse signal and the output result of the fourth AND gate to obtain a third trigger signal. The third selection unit is used to selectively output the input signal of its second input end or the third input end according to the third trigger signal;
[0040] The output end of the third timing unit is connected to the input end of the fourth rising edge detection unit after being inverted, and is used to generate a sixth pulse signal of a preset width according to the third trigger signal;
[0041] The fourth rising edge detection unit is used to detect the rising edge of the inverted sixth pulse signal, and generate a seventh pulse signal lasting for one operation cycle according to the inverted rising edge of the sixth pulse signal;
[0042] The two input ends of the fourth AND gate are respectively connected to the output end of the fourth rising edge detection unit and the output end of the first AND gate, and are used to perform an AND operation on the seventh pulse signal and the automatic cycle trigger signal.
[0043] Another aspect of the present disclosure provides a method for implementing a logic configuration for a bursting disk explosion alarm in a primary circuit compartment of a high-temperature gas-cooled reactor, comprising:
[0044] Set the first trigger signal and automatic cycle trigger signal according to the pressure measurement point value of the current time sequence;
[0045] Assigning the pressure measurement point value of the current time sequence to the temporary pressure value according to the first trigger signal and the automatic cycle trigger signal;
[0046] Assigning and maintaining temporary pressure values of different time sequences according to the first trigger signal and the automatic cycle trigger signal to temporarily store a plurality of temporary pressure values of different time sequences;
[0047] Whether to issue a bursting disk pressure alarm is determined according to the temporarily stored pressure values at different time sequences.
[0048] Optionally, setting the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence includes:
[0049] Comparing the pressure measurement point value of the current time series with a preset equivalent value to obtain a comparison result;
[0050] obtaining a first reset signal according to the comparison result and the alarm reset condition;
[0051] Inverting the first reset signal and the alarm flag bit and performing an AND operation to obtain the automatic cycle trigger signal;
[0052] A rising edge of the automatic cycle trigger signal is detected, and the first trigger signal is generated according to the rising edge of the automatic cycle trigger signal.
[0053] The system and method for implementing the logic configuration for the bursting disk burst alarm in the primary compartment of a high-temperature gas-cooled reactor in the disclosed embodiments utilize the periodic operation sequence of the DCS controller to encapsulate an algorithm block. Multiple pressure measurement point value retention modules temporarily store multiple temporary pressure values of different time sequences. In other words, local variables are defined and retained within the controller for historical data calculation. The bursting disk pressure alarm module implements cyclic calculation of the DCS for the bursting disk burst alarm, enabling main control room personnel to conveniently and promptly monitor whether the bursting disk pressure exceeds the limit, thereby enhancing reactor safety. BRIEF DESCRIPTION OF THE DRAWINGS
[0054] Figure 1 Schematic diagram of a system for implementing a logic configuration for a bursting disk explosion alarm in a primary circuit compartment of a high-temperature gas-cooled reactor according to an embodiment of the present disclosure;
[0055] Figure 2 This is a schematic diagram of the principle of a timing unit according to another embodiment of the present disclosure;
[0056] Figure 3 This is a schematic diagram of the principle of a reset priority trigger unit according to another embodiment of the present disclosure;
[0057] Figure 4 This is a schematic diagram of the principle of a pulse width changing unit according to another embodiment of the present disclosure;
[0058] Figure 5 Schematic diagram of the principle of a rising edge detection unit according to another embodiment of the present disclosure;
[0059] Figure 6 This is a schematic diagram of the principle of a delay unit according to another embodiment of the present disclosure;
[0060] Figure 7 This is a schematic diagram of the principle of a selection unit according to another embodiment of the present disclosure;
[0061] Figure 8 This is a flow chart of a method for implementing a logic configuration for a bursting disk explosion alarm in a primary circuit compartment of a high-temperature gas-cooled reactor according to another embodiment of the present disclosure;
[0062] Figure 9 The figure is a flow chart of a method for implementing a logic configuration of a bursting disk explosion alarm for a primary circuit compartment of a high-temperature gas-cooled reactor according to another embodiment of the present disclosure. DETAILED DESCRIPTION
[0063] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the present disclosure is further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0064] To enable those skilled in the art to better understand the technical solutions of the present disclosure, the present disclosure is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It is apparent that the described embodiments are only a portion of the embodiments of the present disclosure, not all of them. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without the need for creative work are within the scope of protection of the present disclosure.
[0065] Unless otherwise specified, the technical or scientific terms used in this disclosure should have the ordinary meaning understood by people with ordinary skills in the field to which this disclosure belongs. The words "including" or "comprising" used in this disclosure do not limit the shapes, numbers, steps, actions, operations, components, originals and / or groups thereof mentioned, nor do they exclude the presence or addition of one or more other different shapes, numbers, steps, actions, operations, components, originals and / or groups thereof, or the addition of these. In the description of this disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically limited.
[0066] It should be noted that before discussing in more detail, some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the various operations (steps) as sequential processes, many of the operations therein can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the various operations can be rearranged. When the operations are completed, the process can be terminated, but can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.
[0067] Below, we will refer to Figure 1 A system for implementing a rupture disk burst alarm logic configuration for a primary circuit compartment of a high-temperature gas-cooled reactor according to another embodiment of the present disclosure is described.
[0068] like Figure 1 As shown, the high-temperature gas-cooled reactor primary circuit compartment bursting disk burst alarm logic configuration implementation system includes a trigger condition module 100, a pressure measurement point value assignment module 200, a plurality of pressure measurement point value holding modules 300 and a bursting disk pressure alarm module 400.
[0069] Specifically, the trigger condition module 100 is configured to set an initial trigger signal DM02 and an automatic cycle trigger signal DM01 based on the current time series pressure measurement point value IN1. For example, the trigger condition module may compare the current time series pressure measurement point value IN1 with a preset equivalent value YZ and set the initial trigger signal and the automatic cycle trigger signal based on the comparison result. For example, those skilled in the art may select different devices to detect pressure measurement point values based on specific usage scenarios, and this embodiment is not specifically limited thereto.
[0070] Specifically, the pressure measurement point value assignment module 200 is configured to assign the current time series pressure measurement point value IN1 to the temporary pressure storage value AM01 based on the initial trigger signal DM02 and the automatic cycle trigger signal DM01. Exemplarily, the pressure measurement point value assignment module may periodically assign the current time series pressure measurement point value to the temporary pressure storage value according to a preset detection period. For example, the preset detection period may be 10 seconds, and the pressure measurement point value assignment module may assign the current time series pressure measurement point value to the temporary pressure storage value every 10 seconds.
[0071] Specifically, multiple pressure measurement point value holding modules 300 are each configured to assign and hold temporary pressure values of different time sequences based on the initial trigger signal DM02 and the automatic cycle trigger signal DM01, thereby temporarily storing multiple temporary pressure values of different time sequences. Exemplarily, each pressure measurement point value holding module can temporarily store one temporary pressure value. That is, the number of pressure measurement point value holding modules determines the number of temporary pressure values that can be temporarily stored, and thus the number of pressure measurement point values that can be temporarily stored.
[0072] Specifically, the bursting disk pressure alarm module 400 is configured to determine whether to issue a bursting disk pressure alarm based on the stored pressure values at different time periods. For example, the module may compare the difference between the stored pressure values at different time periods with a preset limit, and determine whether to issue a bursting disk pressure alarm based on the comparison result.
[0073] For example, if the design requires the DCS to monitor the containment positive pressure and calculate the current containment positive pressure value against the value 60 seconds ago every 10 seconds, a bursting disk explosion alarm is issued to the main control room when the limit is exceeded. To achieve this design requirement, an algorithm block is encapsulated using the DCS controller's own periodic operation sequence. The algorithm block takes a containment positive pressure value as input every 10 seconds and holds it for 10 seconds, recording a total of six containment positive pressure values within one minute. The final containment positive pressure value is subtracted from the initial containment positive pressure value and compared with the limit value to determine the alarm. The bursting disk explosion alarm is determined every 10 seconds. For example, the containment positive pressure value is reflected in the DCS controller as a pressure measurement point value. For example, those skilled in the art can set the limit value according to actual usage requirements, for example, setting the limit value to 2. This is not specifically limited in this embodiment.
[0074] Exemplarily, to achieve the above design requirements, the containment positive pressure value needs to be detected every 10 seconds to obtain the pressure measurement point value. Therefore, the preset detection period is set to 10 seconds. The pressure measurement point value assignment module assigns the pressure measurement point value to the pressure temporary storage value every 10 seconds. At the same time, five pressure measurement point value retention modules are required to temporarily store the pressure temporary storage values of the first five time series within 1 minute. After the last pressure measurement point value within 1 minute is assigned to the pressure temporary storage value by the pressure measurement point value assignment module, the last pressure measurement point value is subtracted from the initial pressure measurement point value and compared with the limit value. In other words, the difference is calculated by subtracting the first pressure measurement point value from the sixth pressure measurement point value within 1 minute. When the difference exceeds the limit, a judgment alarm is issued, thus completing a judgment alarm. Exemplarily, the bursting disk pressure alarm module determines the bursting disk burst alarm every 10 seconds. In the above example, the five pressure measurement point value retention modules are used to define and retain local variables within the controller, thereby realizing historical data calculation. This allows the current containment positive pressure value to be calculated every 10 seconds against the value 60 seconds ago. When the limit is exceeded, a rupture disk explosion alarm is issued to the main control room.
[0075] The high-temperature gas-cooled reactor primary compartment bursting disk alarm logic configuration implementation system of the disclosed embodiment utilizes the DCS controller's own periodic operation sequence to encapsulate an algorithm block. Multiple pressure measurement point value retention modules temporarily store multiple temporary pressure values of different time sequences. In other words, local variables are defined and retained within the controller for historical data calculation. The bursting disk pressure alarm module implements the DCS's cyclic calculation of bursting disk burst alarms, enabling main control room personnel to conveniently and promptly monitor whether the bursting disk pressure exceeds the limit, thereby enhancing reactor safety.
[0076] Next, combine Figure 1 A specific example illustrates the specific structure of the trigger condition module of another embodiment of the present disclosure.
[0077] It should be noted that Figure 1 The number in the upper right corner of the algorithm block of the DCS controller is the operation order identifier of the algorithm block. The algorithm block constitutes a logical configuration. For example, the operation order identifier marked in the upper right corner of the algorithm block of the first equivalent gate GE is 0, which means that the operation order of this algorithm block is 0 and it runs first in the algorithm. The operation order identifier marked in the upper right corner of the algorithm block of the first reset priority trigger unit RS01 is 1, which means that the operation order of this algorithm block is 1 and it is operated after the first equivalent gate GE in the algorithm.
[0078] It should be noted that in the following description, the algorithm block is described in the form of "algorithm block (operation order identifier)". For example, the algorithm block of the first equivalent gate GE is represented by "GE(0)" in the following description, and the algorithm block of the first reset priority trigger unit RS01 is represented by "RS01(1)" in the following description. The representation methods of other algorithm blocks are the same and are not listed one by one here.
[0079] For example, Figure 1 As shown, the trigger condition module 100 includes a first equivalent gate GE (0), a first reset priority trigger unit RS01 (1), a first AND gate AND (2) and a first rising edge detection unit R_TRIG08 (4).
[0080] Specifically, the two input terminals of the first equivalent gate GE(0) are used to input the pressure measurement point value IN1 of the current time sequence and the preset equivalent value YZ, respectively. Those skilled in the art may set the equivalent value YZ according to actual usage, and this is not specifically limited in this embodiment. The output terminal of the first equivalent gate GE(0) is connected to the input terminal SET of the first reset priority trigger unit RS01(1). GE(0) is used to compare the input pressure measurement point value IN1 of the current time sequence with the preset equivalent value YZ and output the comparison result.
[0081] For example, Figure 3 As shown, Figure 3 (a) and (b) are the algorithm block diagram and timing diagram of the reset-priority trigger unit RS, respectively. This algorithm block implements a reset-priority trigger function. Specifically, when the reset signal RESET1 is TRUE, the output is always FALSE; when both the reset signal RESET1 and the SET signal are FALSE, the output remains held; and when the reset signal RESET1 is FALSE and the SET signal is TRUE, the output is TRUE. It should be noted that the "?" in the figure refers to possible representations of the algorithm block, such as RS01.
[0082] Specifically, the output terminal Q1 of the first reset priority trigger unit RS01 (1) is connected to the input terminal of the first AND gate AND (2), and the reset terminal RESET1 pin of the first reset priority trigger unit RS01 (1) is connected to the alarm reset condition RES. The first reset priority trigger unit RS01 (1) is used to obtain a first reset signal based on the comparison result output by the first equivalent gate GE (0) and the alarm reset condition RES, and output it to the first AND gate AND (2).
[0083] Specifically, the output end of the first AND gate AND (2) is connected to the input end CLK of the first rising edge detection unit R_TRIG08 (4), and the other input end of the first AND gate AND (2) is connected to the inverted phase of the alarm flag ALM. When ALM is 0, it means that there is no alarm, and the inverted phase is 1, which meets the condition for entering the loop judgment. The first AND gate AND (2) is used to perform an AND operation on the inverted phase of the first reset signal and the alarm flag ALM to obtain the automatic loop trigger signal DM01.
[0084] It should be noted that when ALM is 1, it means an alarm, and when it is inverted, it is 0. At this time, since an alarm is generated, this logic no longer loops and can only operate normally after the alarm is eliminated.
[0085] For example, Figure 5 As shown, Figure 5 (a) and (b) are schematic diagrams and timing diagrams of the algorithm block for the rising edge detection unit R_TRIG, respectively. After detecting a rising edge, this algorithm block outputs a pulse with a scan cycle width. Those skilled in the art can adjust the scan cycle width based on actual usage, for example, to 50ms. This is not a specific limitation in this embodiment. It should be noted that the "?" in the figures refers to possible representations of the algorithm block, such as R_TRIG08.
[0086] Specifically, the first rising edge detection unit R_TRIG08 (4) is used to detect the rising edge of the automatic cycle trigger signal DM01 and generate the first trigger signal DM02 according to the rising edge of the automatic cycle trigger signal.
[0087] Exemplarily, the first equivalent gate GE(0) compares the input current timing pressure measurement point value IN1 with the preset equivalent value YZ. When IN1 is greater than YZ, GE(0) outputs 1. At this time, the alarm reset condition RES is 0, and the output Q1 of RS01(1) is set to 1. The alarm flag ALM is negated (representing no alarm) and an AND operation is performed. At this time, the alarm flag ALM is 0 and the negation is 1. Therefore, after the AND operation, the automatic cycle trigger signal DM01 is set to 1, and the first rising edge detection unit R_TRIG08(4) triggers DM02 to 1 for one operation cycle. Exemplarily, the operation cycle can be 50ms.
[0088] It should be noted that the above working process is only an exemplary description. Those skilled in the art can set YZ, RES, and ALM according to actual usage conditions, and different inputs of IN1 will also output different results. No specific limitations are made in this embodiment.
[0089] The high-temperature gas-cooled reactor primary-loop compartment bursting membrane explosion alarm logic configuration implementation system of the disclosed embodiment sets the trigger condition module to a combination of a first equivalent gate, a first reset priority trigger unit, a first AND gate, and a first rising edge detection unit. The first reset priority trigger unit is used to determine whether an alarm reset is required, and the first AND gate and the first rising edge detection unit are used to generate a first trigger signal and an automatic cycle trigger signal. The structure is simple and the configuration logic complexity is low.
[0090] Next, combine Figure 1 A specific example illustrates the specific structure of the pressure measurement point value assignment module of another embodiment of the present disclosure.
[0091] For example, Figure 1 As shown, the pressure measurement point value assignment module 200 includes a first OR gate OR (36), a first timing unit TPR06 (37), a first selection unit SEL (38), a second rising edge detection unit R_TRIG06 (40) and a second AND gate AND (41).
[0092] Specifically, the two input terminals of the first OR gate OR (36) are respectively connected to the output terminal of the first rising edge detection unit R_TRIG08 (4) and the output terminal of the second AND gate AND (41), and are respectively used to input the first trigger signal DM02 and the AND operation result of the second AND gate. The output terminal of the first OR gate OR (36) is connected to the input terminal IN of the first timing unit TPR06 (37). The first OR gate OR (36) is used to perform an OR operation on the first trigger signal DM02 and the output result of the second AND gate AND (41) to obtain the first trigger signal.
[0093] For example, Figure 2 As shown, Figure 2 (a) and (b) are the algorithm block diagram and timing diagram of the timing unit TPR, respectively. This algorithm block implements a retriggerable timer algorithm. When the IN pin is TRUE, the Q pin emits a pulse with a width of PT. If the pulse duration of the Q pin is less than PT, when the IN pin is set to TRUE again, the Q pin emits a pulse with a width of PT again. It should be noted that the "?" in the figure refers to possible representations of the algorithm block, such as TPR06.
[0094] Specifically, the output terminal Q of the first timing unit TPR06 (37) is connected to the first input terminal of the first selection unit SEL (38) after being inverted. The first timing unit TPR06 (37) is used to generate a first pulse signal of a preset width PT according to the first trigger signal inputted from its IN pin. Those skilled in the art can set the width PT according to actual usage, for example, to 10s, and this is not specifically limited in this embodiment.
[0095] For example, Figure 7 The figure shows the algorithm block diagram of the selection unit SEL. The algorithm block is a two-choice algorithm. When the input of the top left pin is 1, the output value of the right output pin is the value corresponding to the lower left pin. When the input of the top left pin is 0, the output value of the right output pin is the value corresponding to the middle left pin.
[0096] Specifically, the second input end of the first selection unit SEL (38) is connected to the output end of the first selection unit SEL (38), the third input end of the first selection unit SEL (38) is used to input the pressure measurement point value IN1 of the current time sequence, and the first selection unit SEL (38) is used to selectively output the input signal of its second input end or the third input end according to the first pulse signal.
[0097] Exemplarily, when the first pulse signal is negative, it is inverted and input to the first selection unit SEL (38) as a positive signal, and the first selection unit SEL (38) outputs the input signal IN1 of its third input terminal to assign the pressure measurement point value IN1 of the current timing to the pressure temporary storage value AM01; when the first pulse signal is positive, it is inverted and input to the first selection unit SEL (38) as a negative signal, and the first selection unit outputs the input signal of its second input terminal as AM01 to perform self-locking input.
[0098] Specifically, the input terminal CLK of the second rising edge detection unit R_TRIG06 (40) is connected to the inverted output terminal Q of the first timing unit TPR06 (37), and is used to detect the rising edge of the inverted first pulse signal and generate a second pulse signal lasting one operation cycle based on the inverted rising edge of the first pulse signal. The principle of the algorithm block of the rising edge detection unit R_TRIG has been explained above and will not be repeated here.
[0099] Specifically, the two input terminals of the second AND gate AND (41) are respectively connected to the output terminal Q of the second rising edge detection unit R_TRIG06 (40) and the output terminal of the first AND gate AND (2), and are used to perform an AND operation on the second pulse signal and the automatic cycle trigger signal DM01, and output the AND operation result to the first OR gate OR (36).
[0100] For example, as mentioned above, DM01 and DM02 are 1, and after DM02 is triggered, it is ORed with the output signal of the AND (41) algorithm block through OR (36), and the first trigger signal is output as 1, and the width PT of the first pulse signal output by TPR06 (37) is set to 10s. Therefore, the output Q of TPR06 (37) is 1 for 10s, and becomes 0 after being inverted, and is output to the first input terminal of SEL (38), so that SEL (38) outputs the input signal of its second input terminal, that is, the output value AM01 of SEL (38) is self-locked. After 10 seconds, in the first operation cycle, the output Q of TPR06 (37) changes to 0, and after being inverted, becomes 1 and is output to the first input terminal of SEL (38), so that SEL (38) outputs the input signal of its third input terminal, that is, the input value IN1 of SEL (38) is assigned to AM01, so that the pressure measurement point value of the current timing is assigned to the pressure temporary value. At the same time, the input pin CLK of R_TRIG06 (40) changes from 0 to 1, generating a rising edge, so that after R_TRIG06 (40) detects the rising edge, the output Q generates a 1 signal that lasts for one operation cycle, and performs an AND operation with DM01, so that the output value of AND (41) becomes 1 and lasts for one operation cycle. When the next operation cycle arrives, the operation of TPR06 (37) is triggered again.
[0101] It can be seen that DM02 is used as the first triggering condition to trigger the pressure measurement point value assignment module to start working, and DM01 and R_TRIG06 (40) are used as the conditions for automatic cycle triggering to re-trigger the operation of TPR06 (37). Since a re-triggerable timer algorithm (TPR) is adopted and iterative operation is performed, and the width PT of the first pulse signal output by TPR06 (37) is set to 10s, it is possible to assign the current pressure measurement point value IN1 to AM01 every 10s, and within 10s, the assigned AM01 is maintained through the self-locking input, thereby achieving the assignment of the pressure measurement point value of the current time sequence to the pressure temporary storage value every 10s.
[0102] The high-temperature gas-cooled reactor primary-loop compartment bursting membrane burst alarm logic configuration implementation system of the disclosed embodiment sets the pressure measurement point value assignment module as a combination of a first OR gate, a first timing unit, a first selection unit, a second rising edge detection unit, and a second AND gate, realizes automatic circulation through the second rising edge detection unit and the automatic circulation trigger signal, and periodically assigns the pressure measurement point value of the current time sequence to the pressure temporary storage value through the first timing unit, thereby realizing periodic assignment of the pressure measurement point value of the current time sequence to the pressure temporary storage value, utilizing the periodic operation sequence of the DCS controller itself, realizing the design requirement of loop iteration, meeting the alarm requirement while reducing the complexity of the configuration logic.
[0103] Next, combine Figure 1 A specific example illustrates the specific structure of the pressure measurement point value holding module according to another embodiment of the present disclosure.
[0104] For example, Figure 1 As shown, the pressure measurement point value holding module 300 includes a second OR gate OR (6), a second timing unit TPR01 (7), a second selection unit SEL (8), a third rising edge detection unit R_TRIG01 (10) and a third AND gate AND (11).
[0105] Specifically, the two input terminals of the second OR gate OR (6) are respectively connected to the output terminal of the first rising edge detection unit R_TRIG08 (4) and the output terminal of the third AND gate AND (11), and are respectively used to input the first trigger signal DM02 and the AND operation result of the third AND gate. The output terminal of the second OR gate OR (6) is connected to the input terminal IN of the second timing unit TPR01 (7). The second OR gate OR (6) is used to perform an OR operation on the first trigger signal DM02 and the output result of the third AND gate AND (11) to obtain the second trigger signal.
[0106] Specifically, the output terminal Q of the second timing unit TPR01 (7) is inverted and connected to the first input terminal of the second selection unit SEL (8). The second timing unit TPR01 (7) is used to generate a third pulse signal of a preset width PT according to the second trigger signal input to its IN pin. Those skilled in the art can set the width PT according to actual usage, for example, to 10s, and this is not specifically limited in this embodiment. The principle of the algorithm block of the timing unit TPR has been explained above and will not be repeated here.
[0107] Specifically, the second input terminal of the second selection unit SEL (8) is connected to the output terminal of the second selection unit SEL (8), the third input terminal of the second selection unit SEL (8) is used to input the temporary pressure value AM05 of the different time sequence, and the second selection unit SEL (8) is used to selectively output the input signal of the second input terminal or the third input terminal according to the third pulse signal. The principle of the algorithm block of the selection unit SEL has been explained above and will not be repeated here.
[0108] Exemplarily, when the third pulse signal is negative, it is inverted and input to the second selection unit SEL (8), and the second selection unit SEL (8) outputs the input signal AM05 of its third input terminal to assign the next timing pressure temporary value AM05 to AM06 for assignment and maintenance; when the third pulse signal is positive, it is inverted and input to the second selection unit SEL (8), and the second selection unit SEL (8) outputs the input signal of its second input terminal AM06 for self-locking input.
[0109] It should be noted that the temporary pressure value of the next time sequence here refers to the temporary pressure value of the next time sequence compared with the temporary pressure value of the time sequence currently stored in the pressure measurement point value holding module. For example, when SEL (8) performs a self-locking input, AM06 is self-locked input. AM06 is the temporary pressure value of the currently stored time sequence, and AM05 is the temporary pressure value of the next time sequence. When SEL (8) assigns AM05 to AM06, the temporary pressure value of the new time sequence is replaced by the temporary pressure value of the old time sequence.
[0110] Specifically, the input terminal CLK of the third rising edge detection unit R_TRIG01 (10) is connected to the inverted output terminal Q of the second timing unit TPR01 (7), and is used to detect the rising edge of the inverted third pulse signal and generate a fourth pulse signal lasting one operation cycle based on the inverted rising edge of the third pulse signal. The principle of the algorithm block of the rising edge detection unit R_TRIG has been explained above and will not be repeated here.
[0111] Specifically, the two input terminals of the third AND gate AND (11) are respectively connected to the output terminal Q of the third rising edge detection unit R_TRIG01 (10) and the output terminal of the first AND gate AND (2), and are used to perform an AND operation on the fourth pulse signal and the automatic cycle trigger signal DM01, and output the AND operation result to the second OR gate OR (6).
[0112] For example, as mentioned above, DM01 and DM02 are 1, and after DM02 is triggered, it is ORed with the output signal of the AND (11) algorithm block through OR (6), and the second trigger signal is output as 1, and the width PT of the third pulse signal output by TPR01 (7) is set to 10s. Therefore, the output Q of TPR01 (7) is 1 for 10s, and becomes 0 after being inverted, and is output to the first input terminal of SEL (8), so that SEL (8) outputs the input signal of its second input terminal, that is, the output value AM06 of SEL (8) is self-locked. After 10 seconds, in the first operation cycle, the output Q of TPR01 (7) changes to 0, and after being inverted, becomes 1, and is output to the first input terminal of SEL (8), so that SEL (8) outputs the input signal of its third input terminal, that is, the input value AM05 of SEL (8) is assigned to AM06, so that the pressure temporary storage value AM05 of the next timing is assigned to AM06 for assignment and retention. At the same time, the input pin CLK of R_TRIG01 (10) changes from 0 to 1, generating a rising edge, so that after R_TRIG01 (10) detects the rising edge, the output Q generates a 1 signal that lasts for one operation cycle, and performs an AND operation with DM01, so that the output value of AND (11) becomes 1 and lasts for one operation cycle. When the next operation cycle arrives, the operation of TPR01 (7) is triggered again.
[0113] It can be seen that DM02 is used as the first triggering condition to trigger the pressure measurement point value holding module to start working, and DM01 and R_TRIG01 (10) are used as the conditions for automatic cycle triggering to re-trigger the operation of TPR01 (7). Since the re-triggerable timer algorithm (TPR) is adopted and iterative operation is performed, and the width PT of the first pulse signal output by TPR01 (7) is set to 10s, it is possible to assign the next time sequence pressure temporary value AM05 to AM06 every 10s, and within 10s, the assigned AM06 is maintained by the self-locking input, thereby achieving the assignment and maintenance of the next time sequence pressure temporary value every 10s.
[0114] For example, Figure 1As shown, in this embodiment, five pressure measurement point value holding modules are used. The working principles of the five pressure measurement point value holding modules are similar, and AM(n) is assigned to AM(n+1) every 10 seconds. No further details are given here. In the specific working process, the five pressure measurement point value holding modules assign AM05 to AM06, AM04 to AM05, AM03 to AM04, AM02 to AM03, and AM01 to AM02 in sequence, respectively. In this way, the temporary pressure value of the first 50 seconds within 1 minute can be assigned and maintained. Then, the current pressure measurement point value IN1 is assigned to AM01 through the pressure measurement point value assignment module. At this time, the DCS controller realizes the temporary storage of the temporary pressure values of 6 time series separated by 10 seconds within 1 minute, that is, the temporary storage of the pressure measurement point values of 6 time series separated by 10 seconds within 1 minute is realized, providing historical data for subsequent pressure alarm determination.
[0115] The high-temperature gas-cooled reactor primary-loop compartment bursting membrane burst alarm logic configuration implementation system of the disclosed embodiment sets the pressure measurement point value holding module as a combination of a second OR gate, a second timing unit, a second selection unit, a third rising edge detection unit and a third AND gate, realizes automatic circulation through the third rising edge detection unit and the automatic circulation trigger signal, and periodically assigns the pressure measurement point value of the current time sequence to the pressure temporary storage value through the second timing unit, thereby realizing periodic assignment and retention of the pressure temporary storage value of the previous time sequence, and realizes temporary storage of pressure measurement point values of multiple different time sequences by setting multiple pressure measurement point value holding modules, utilizes the periodic operation sequence of the DCS controller itself, realizes the design requirement of loop iteration, meets the alarm requirement while reducing the complexity of the configuration logic.
[0116] Next, combine Figure 1 A specific example illustrates the specific structure of a bursting disk pressure alarm module according to another embodiment of the present disclosure.
[0117] For example, Figure 1 As shown, the bursting membrane pressure alarm module 400 includes a delay unit TON01 (42), a pulse width change unit TP01 (43), a difference gate SUB (46), a third selection unit SEL (47), a second equivalent gate GE (48) and a second reset priority trigger unit RS02 (49).
[0118] For example, Figure 6 As shown, Figure 6(a) and (b) are the algorithm block diagram and timing diagram of the delay unit TON, respectively. This algorithm block delays the output pulse. When the input pin IN is triggered to 1, the output pin Q will output 1 after the PT1 time. The width of the Q output 1 is the input IN pulse width minus the PT1 time. When the input IN pulse width is less than the PT1 time, Q does not output 1 but remains 0. It should be noted that the "?" in the figure refers to possible representations of the algorithm block, such as TON01.
[0119] Specifically, the input terminal IN of the delay unit TON01 (42) is connected to the output terminal of the first AND gate AND (2), and is used to delay the automatic cycle trigger signal DM01 by a delay time PT1 to obtain a delayed signal. For example, PT1 can be set to 60s. Those skilled in the art can set PT1 according to actual usage conditions, and this is not specifically limited in this embodiment.
[0120] For example, Figure 4 As shown, Figure 4 (a) and (b) are schematic diagrams and timing diagrams of the algorithm block for the pulse width variation unit TP, respectively. This algorithm block varies the pulse width. When the input pin IN is triggered to 1, the output pin Q outputs a pulse with a width equal to the duration PT. For example, PT can be set to 10 seconds. Those skilled in the art can adjust PT based on actual usage, and this embodiment does not impose any specific limitations. It should be noted that the "?" in the figure refers to possible representations of the algorithm block, such as TP01.
[0121] Specifically, the input terminal IN of the pulse width changing unit TP01 (43) is connected to the output terminal Q of the delay unit TON01 (42) to change the pulse width of the delayed signal to obtain the fifth pulse signal.
[0122] Specifically, the two input ends of the difference gate SUB (46) are respectively used to input two temporary pressure values of different time sequences, and are used to obtain the difference between the two temporary pressure values of different time sequences. For example, the temporary pressure value AM06 of the first time sequence and the temporary pressure value AM01 of the last time sequence within 1 minute can be input to perform the difference operation. Those skilled in the art can select two temporary pressure values of different time sequences according to actual usage conditions, and no specific limitation is made in this embodiment.
[0123] Specifically, a first input terminal of the third selection unit SEL (47) is connected to the output terminal Q of the pulse width changing unit TP01 (43), a second input terminal of the third selection unit SEL (47) is set to zero, and a third input terminal of the third selection unit SEL (47) is connected to the output terminal of the difference gate SUB (46). The third selection unit SEL (47) is used to selectively output the input signal of its second input terminal or the third input terminal according to the fifth pulse signal. The principle of the algorithm block of the selection unit SEL has been explained above and will not be repeated here.
[0124] Specifically, the input end of the second equivalent gate GE (48) is connected to the output end of the third selection unit SEL (47), and the other input end of the second equivalent gate GE (48) is used to input a preset limit value. The second equivalent gate GE (48) is used to compare the output signal of the third selection unit SEL (47) with the preset limit value and output a comparison result. For example, the limit value can be set to 2. When the output signal of the third selection unit SEL (47) exceeds the limit value, a bursting disk explosion alarm is issued to the main control room. Those skilled in the art can set the limit according to specific circumstances, and this is not limited in this embodiment.
[0125] Specifically, the input terminal SET of the second reset priority trigger unit RS02 (49) is connected to the output terminal of the second equivalent gate GE (48), and the reset terminal RESET1 pin of the second reset priority trigger unit RS02 (49) is connected to the alarm reset condition RES. The second reset priority trigger unit RS02 (49) is used to obtain a second reset signal according to the comparison result of the second equivalent gate GE (48) and the alarm reset condition RES. For example, the second reset signal can be assigned to the alarm flag ALM.
[0126] For example, Figure 1 As shown, the bursting disk pressure alarm module 400 further includes a third OR gate OR (44), a third timing unit TPR07 (45), a fourth rising edge detection unit R_TRIG07 (51) and a fourth AND gate AND (52).
[0127] Specifically, the two input terminals of the third OR gate OR (44) are respectively connected to the output terminal Q of the pulse width changing unit TP01 (43) and the output terminal of the fourth AND gate AND (52), the output terminal of the third OR gate OR (44) is connected to the input terminal IN of the third timing unit TPR07 (45) and the first input terminal of the third selection unit SEL (47), the third OR gate OR (44) is used to perform an OR operation on the fifth pulse signal and the output result of the fourth AND gate AND (52) to obtain a third trigger signal, and the third selection unit SEL (47) is used to selectively output the input signal of its second input terminal or the third input terminal according to the third trigger signal.
[0128] Exemplarily, when the third trigger signal output by the third OR gate OR (44) is positive, the third selection unit SEL (47) outputs the input signal of its third input terminal, that is, outputs the difference between the difference gate SUB (46) and the third selection unit SEL (47); when the third trigger signal output by the third OR gate OR (44) is negative, the third selection unit outputs the input signal 0 of its second input terminal.
[0129] Specifically, the output terminal Q of the third timing unit TPR07 (45) is connected to the input terminal CLK of the fourth rising edge detection unit R_TRIG07 (51) after being inverted, and is used to generate a sixth pulse signal of a preset width PT according to the third trigger signal. For example, PT can be set to 10s. The principle of the algorithm block of the timing unit TPR has been explained above and will not be repeated here.
[0130] Specifically, the fourth rising edge detection unit R_TRIG07 (51) is used to detect the rising edge of the inverted sixth pulse signal and generate a seventh pulse signal lasting for one operation cycle based on the rising edge of the inverted sixth pulse signal. The principle of the algorithm block of the rising edge detection unit R_TRIG has been explained above and will not be repeated here.
[0131] Specifically, the two input terminals of the fourth AND gate AND (52) are respectively connected to the output terminal Q of the fourth rising edge detection unit R_TRIG07 (51) and the output terminal of the first AND gate AND (2), and are used to perform an AND operation on the seventh pulse signal and the automatic cycle trigger signal DM01, and output the AND operation result to the third OR gate OR (44).
[0132] For example, as mentioned above, DM01 and DM02 are 1, and the delay time PT1 of TON01 (42) is set to 60s. DM01 triggers TON01 (42) to delay the input signal of the IN pin by 60s and then output 1 through the output terminal Q. The fifth pulse signal is input to TP01 (43) to change the pulse width to obtain a fifth pulse signal. The fifth pulse signal is then input to OR (44). After the fifth pulse signal and the output result of AND (52) are ORed through OR (44), a third trigger signal set to 1 is obtained. The third trigger signal triggers SEL (47) to output the input signal of its third input terminal, that is, the output result of SUB (46) and the difference between AM06 and AM01 are selected for output. At the same time, the third trigger signal sets the IN pin of TPR07 (45) to 1. SEL (47) outputs the difference between AM06 and AM01. To GE (48), GE (48) determines whether the difference is greater than the limit 2. If so, the SET pin of RS02 (49) is triggered to be set to 1, so that the Q1 output of RS02 (49) is 1, and then ALM is set to 1, indicating an alarm; the output Q of TPR07 (45) is 1 for 10 seconds, and becomes 0 after being inverted. After 10 seconds, the output Q of TPR07 (45) changes to 0 in the first operation cycle, and becomes 1 after being inverted. The input pin CLK of R_TRIG07 (51) changes from 0 to 1, generating a rising edge, so that after R_TRIG07 (51) detects the rising edge, the output Q generates a 1 signal that lasts for one operation cycle, and performs an AND operation with DM01, so that the output value of AND (52) becomes 1 and lasts for one operation cycle. When the next operation cycle arrives, the operation of TPR07 (45) is triggered again.
[0133] It can be seen that the logic configuration composed of OR (44), TPR07 (45), R_TRIG07 (51), and AND (52) has the same function as the logic configuration composed of OR (6), TPR01 (7), R_TRIG01 (10), and AND (11) above, which is the condition for automatic loop triggering.
[0134] It should be noted that the RESET1 pin of RS02 (49) and the RESET1 pin of RS01 (1) both have the same alarm reset condition as the input, and when the condition is met, the output of the RS flip-flop is cleared.
[0135] It can be seen that the bursting membrane pressure alarm module delays DM01 by 60 seconds through TON01 (42), adjusts the pulse width through TP01, obtains the difference between the temporary pressure value AM06 of the first time sequence and the temporary pressure value AM01 of the last time sequence within 1 minute through SUB (46), and compares the difference with the limit value through GE (48), so as to judge the difference between the current pressure measurement point value and the pressure measurement point value 60 seconds ago and the limit value every 10 seconds, thereby determining whether to issue a bursting membrane pressure alarm.
[0136] The high-temperature gas-cooled reactor primary-circuit compartment bursting disk alarm logic configuration implementation system of the disclosed embodiment configures the bursting disk pressure alarm module as a combination of a delay unit, a pulse width change unit, a difference gate, a third selection unit, a second equivalence gate, a second reset priority trigger unit, a third OR gate, a third timing unit, a fourth rising edge detection unit, and a fourth AND gate. This system determines the difference between the current pressure measurement point value and the pressure measurement point value of the previous time sequence and the limit value at preset intervals, thereby determining whether to issue a bursting disk pressure alarm. This utilizes the periodic operation sequence of the DCS controller itself to achieve cyclic iteration design requirements, meet alarm requirements, and reduce the complexity of the configuration logic.
[0137] It should be noted that Figure 1 During the execution of the DCS controller algorithm blocks, the DCS controller periodically operates in the ascending order of the numbers in the upper right corner of the algorithm blocks. This logic configuration operates each of algorithm blocks 0 through 52 once during each operation cycle. For example, the logic configuration consisting of algorithm blocks 0 through 41 corresponds to a trigger condition module, a pressure measurement point value assignment module, and multiple pressure measurement point value retention modules, which are used to assign and retain values for input pressure measurement points of different time sequences for temporary storage. The logic configuration consisting of algorithm blocks 42 through 52 implements the numerical calculation alarm function.
[0138] It should be noted that the entire configuration utilizes the DCS's own cyclic operation sequence. Since the DCS performs an operation on each algorithm block in the numerical order of the upper right corner during each operation cycle, each cycle will inevitably produce an output. Therefore, the entire 6 to 41 logic configuration must prioritize SEL(8), then SEL(14), then SEL(20), then SEL(26), then SEL(32), and finally SEL(38) to ensure that the data transmission order is IN1 → AM01 → AM02 → AM03 → AM04 → AM05 → AM06, thus achieving the design requirement of cyclic iteration.
[0139] Next, we will combine Figure 8Another embodiment of the present disclosure describes a method for implementing a logic configuration for a bursting disk alarm in a primary compartment of a high-temperature gas-cooled reactor. This method can utilize the previously described system for implementing a logic configuration for a bursting disk alarm in a primary compartment of a high-temperature gas-cooled reactor. For details, please refer to the relevant descriptions above and will not be repeated here. The method includes:
[0140] S100: Setting the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence.
[0141] S200: Assigning the pressure measurement point value of the current time sequence to the temporary pressure value according to the first trigger signal and the automatic cycle trigger signal.
[0142] S300: assigning and maintaining temporary pressure values of different time sequences according to the first trigger signal and the automatic cycle trigger signal, so as to temporarily store a plurality of temporary pressure values of different time sequences.
[0143] S400: Determine whether to issue a bursting disk pressure alarm based on the temporarily stored pressure values at different time sequences.
[0144] For example, Figure 9 As shown, the step S100 sets the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence, including:
[0145] S110: Compare the pressure measurement point value of the current time series with a preset equivalent value to obtain a comparison result.
[0146] S120: Obtain a first reset signal according to the comparison result and the alarm reset condition.
[0147] S130: Invert the first reset signal and the alarm flag bit, and perform an AND operation to obtain the automatic cycle trigger signal.
[0148] S140: Detecting a rising edge of the automatic cycle trigger signal, and generating the first trigger signal according to the rising edge of the automatic cycle trigger signal.
[0149] The method for implementing the logic configuration of the bursting disk burst alarm for the primary compartment of a high-temperature gas-cooled reactor in the disclosed embodiment utilizes the periodic operation sequence of the DCS controller to encapsulate an algorithm block. Multiple pressure measurement point value retention modules temporarily store multiple temporary pressure values of different time sequences. Specifically, local variables are defined and retained within the controller for historical data calculation. The bursting disk pressure alarm module implements cyclic calculation of the DCS for the bursting disk burst alarm, enabling main control room personnel to conveniently and promptly monitor whether the bursting disk pressure exceeds the limit, thereby enhancing reactor safety.
[0150] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and features of different embodiments or examples, unless they are mutually inconsistent.
[0151] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.
Claims
1. High-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system, characterized by: include: The trigger condition module is used to set the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence; A pressure measurement point value assignment module, configured to assign the pressure measurement point value of the current time sequence to a temporary pressure value according to the first trigger signal and the automatic cycle trigger signal; a plurality of pressure measurement point value holding modules, each of the pressure measurement point value holding modules being used to assign and hold temporary pressure values of different time sequences according to the first trigger signal and the automatic cycle trigger signal, so as to temporarily store the plurality of temporary pressure values of different time sequences; The bursting disk pressure alarm module is used to determine whether to issue a bursting disk pressure alarm according to the temporarily stored pressure values at different time sequences.
2. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 1 is characterized by: The trigger condition module includes a first equivalent gate, a first reset priority trigger unit, a first AND gate and a first rising edge detection unit; The output end of the first equivalent gate is connected to the input end of the first reset priority trigger unit, and is used to compare the input pressure measurement point value of the current time sequence with the preset equivalent value and output the comparison result; The output terminal of the first reset priority trigger unit is connected to the input terminal of the first AND gate, and is used to obtain a first reset signal according to the comparison result of the first equivalent gate and the alarm reset condition; The output end of the first AND gate is connected to the input end of the first rising edge detection unit, and is used to perform an AND operation on the first reset signal and the alarm flag bit to obtain the automatic cycle trigger signal; The first rising edge detection unit is used to detect the rising edge of the automatic cycle trigger signal and generate the first trigger signal according to the rising edge of the automatic cycle trigger signal.
3. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 2 is characterized by: The pressure measurement point value assignment module includes a first OR gate, a first timing unit, a first selection unit, a second rising edge detection unit and a second AND gate; Two input terminals of the first OR gate are connected to the output terminal of the first rising edge detection unit and the output terminal of the second AND gate, respectively. The output terminal of the first OR gate is connected to the input terminal of the first timing unit, and is configured to perform an OR operation on the first trigger signal and the output result of the second AND gate to obtain a first trigger signal. The output end of the first timing unit is inverted and connected to the first input end of the first selection unit, so as to generate a first pulse signal with a preset width according to the first trigger signal; The second input end of the first selection unit is connected to the output end of the first selection unit, the third input end of the first selection unit is used to input the pressure measurement point value of the current time sequence, and the first selection unit is used to selectively output the input signal of the second input end or the third input end according to the first pulse signal; The input end of the second rising edge detection unit is connected to the inverted output end of the first timing unit, and is used to detect the rising edge of the inverted first pulse signal, and generate a second pulse signal lasting for one operation cycle according to the inverted rising edge of the first pulse signal; Two input terminals of the second AND gate are respectively connected to the output terminal of the second rising edge detection unit and the output terminal of the first AND gate, and are used to perform an AND operation on the second pulse signal and the automatic cycle trigger signal.
4. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 3 is characterized by: When the first pulse signal is negative, the first selection unit outputs the input signal of its third input terminal to assign the pressure measurement point value of the current time sequence to the temporary pressure value; When the first pulse signal is positive, the first selection unit outputs the input signal of its second input terminal to perform self-locking input.
5. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 4 is characterized by: The pressure measurement point value holding module includes a second OR gate, a second timing unit, a second selection unit, a third rising edge detection unit and a third AND gate; Two input terminals of the second OR gate are respectively connected to the output terminal of the first rising edge detection unit and the output terminal of the third AND gate, and the output terminal of the second OR gate is connected to the input terminal of the second timing unit, and is used to perform an OR operation on the first trigger signal and the output result of the third AND gate to obtain a second trigger signal; The output end of the second timing unit is connected to the first input end of the second selection unit after being inverted, and is used to generate a third pulse signal of a preset width according to the second trigger signal; The second input end of the second selection unit is connected to the output end of the second selection unit, the third input end of the second selection unit is used to input the temporary pressure values of different time sequences, and the second selection unit is used to selectively output the input signal of the second input end or the third input end according to the third pulse signal; The input end of the third rising edge detection unit is connected to the inverted output end of the second timing unit, and is used to detect the rising edge of the inverted third pulse signal, and generate a fourth pulse signal lasting for one operation cycle according to the inverted rising edge of the third pulse signal; The two input ends of the third AND gate are respectively connected to the output end of the third rising edge detection unit and the output end of the first AND gate, and are used to perform an AND operation on the fourth pulse signal and the automatic cycle trigger signal.
6. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 5 is characterized by: When the third pulse signal is negative, the second selection unit outputs the input signal of its third input terminal to assign and maintain the temporary pressure value of the next time sequence; When the third pulse signal is positive, the second selection unit outputs the input signal of its second input terminal to perform self-locking input.
7. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 6 is characterized by: The bursting disk pressure alarm module includes a delay unit, a pulse width changing unit, a difference gate, a third selection unit, a second equivalent gate and a second reset priority trigger unit; The input end of the delay unit is connected to the output end of the first AND gate, and is used to delay the automatic cycle trigger signal to obtain a delayed signal; The input end of the pulse width changing unit is connected to the output end of the delay unit, and is used to change the pulse width of the delay signal to obtain a fifth pulse signal; The two input terminals of the difference gate are used to input two temporary pressure values of different time sequences, respectively, to obtain the difference between the two temporary pressure values of different time sequences; The first input terminal of the third selection unit is connected to the output terminal of the pulse width changing unit, the second input terminal of the third selection unit is set to zero, the third input terminal of the third selection unit is connected to the output terminal of the difference gate, and the third selection unit is used to selectively output the input signal of the second input terminal or the third input terminal according to the fifth pulse signal; The input end of the second equivalent gate is connected to the output end of the third selection unit, and is used to compare the output signal of the third selection unit with a preset limit value and output a comparison result; The input end of the second reset priority trigger unit is connected to the output end of the second equivalent gate, and is used to obtain a second reset signal according to the comparison result of the second equivalent gate and the alarm reset condition.
8. The high-temperature gas-cooled reactor primary circuit compartment bursting disk explosion alarm logic configuration implementation system according to claim 7 is characterized by: The bursting disk pressure alarm module further includes a third OR gate, a third timing unit, a fourth rising edge detection unit and a fourth AND gate; The two input ends of the third OR gate are respectively connected to the output end of the pulse width changing unit and the output end of the fourth AND gate, and the output end of the third OR gate is connected to the third timing unit and the first input end of the third selection unit, and is used to perform an OR operation on the fifth pulse signal and the output result of the fourth AND gate to obtain a third trigger signal. The third selection unit is used to selectively output the input signal of its second input end or the third input end according to the third trigger signal; The output end of the third timing unit is connected to the input end of the fourth rising edge detection unit after being inverted, and is used to generate a sixth pulse signal of a preset width according to the third trigger signal; The fourth rising edge detection unit is used to detect the rising edge of the inverted sixth pulse signal, and generate a seventh pulse signal lasting for one operation cycle according to the inverted rising edge of the sixth pulse signal; The two input ends of the fourth AND gate are respectively connected to the output end of the fourth rising edge detection unit and the output end of the first AND gate, and are used to perform an AND operation on the seventh pulse signal and the automatic cycle trigger signal.
9. A method for implementing a logic configuration for a bursting disk explosion alarm in a primary circuit compartment of a high-temperature gas-cooled reactor, characterized in that: include: Set the first trigger signal and automatic cycle trigger signal according to the pressure measurement point value of the current time sequence; Assigning the pressure measurement point value of the current time sequence to the temporary pressure value according to the first trigger signal and the automatic cycle trigger signal; Assigning and maintaining temporary pressure values of different time sequences according to the first trigger signal and the automatic cycle trigger signal to temporarily store a plurality of temporary pressure values of different time sequences; Whether to issue a bursting disk pressure alarm is determined according to the temporarily stored pressure values at different time sequences.
10. The method for realizing logic configuration of bursting disk explosion alarm of primary circuit compartment of high temperature gas-cooled reactor according to claim 9, characterized in that: The step of setting the first trigger signal and the automatic cycle trigger signal according to the pressure measurement point value of the current time sequence includes: Comparing the pressure measurement point value of the current time series with a preset equivalent value to obtain a comparison result; obtaining a first reset signal according to the comparison result and the alarm reset condition; Inverting the first reset signal and the alarm flag bit and performing an AND operation to obtain the automatic cycle trigger signal; A rising edge of the automatic cycle trigger signal is detected, and the first trigger signal is generated according to the rising edge of the automatic cycle trigger signal.
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