Radio frequency front-end integrated device with pin diode structure at drain end and preparation method thereof

Abstract

The application relates to a radio frequency front-end integrated device with a PIN diode structure at a drain end and a preparation method, wherein the device comprises, from bottom to top, a substrate layer, a buffer layer, a GaN channel layer and an AlGaN barrier layer which are sequentially stacked, a two-dimensional electron gas is formed between the GaN channel layer and the AlGaN barrier layer; a vertically arranged PIN diode structure is located on one end of the AlGaN barrier layer; and a drain electrode is located on the PIN diode structure, when a direct current positive voltage is applied to the drain electrode, the PIN diode structure is in a conduction state, and when a direct current negative voltage is applied to the drain electrode, the PIN diode structure is in an off state. The radio frequency switch and the power amplifier are integrated on one device by forming the vertical PIN diode structure at the drain end, the number of radio frequency front-end devices can be greatly reduced, and the chip area is greatly reduced.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of semiconductor devices, in particular to a radio frequency front-end integrated device with a PIN diode structure at a drain end and a preparation method. BACKGROUND

[0002] In a wireless communication transceiver system, a high-performance switch is a key module that controls the transmission and reception signals of the system. For a switching device, indicators such as insertion loss, isolation, and power capacity need to be considered. Currently, mainstream switching devices include MEMS devices, GaAs pHEMT, PIN diodes, GaN HEMT, etc. In 2021, Professor Han Shaowen of the School of Electrical Engineering, Zhejiang University, first comprehensively studied the dependence of the forward transient behavior of a vertical GaN PIN diode on time, current, and temperature, and found that it can provide excellent dynamic on-resistance performance after switching from a high-voltage off state. In the same year, Balun Stephen of Villanova University in Villanova, Pennsylvania, USA, studied the influence of surface effects on radio frequency switch PIN diodes. Smaller devices have the advantage of lower capacitance, which affects the upper limit of the frequency used by these devices. In recent years, the research results of PIN diode switch applications have become mature. However, the above research results are only for single functions of the device, and the design of a multifunctional radio frequency front-end device is relatively less. SUMMARY

[0003] In order to solve the above problems in the prior art, the application provides a radio frequency front-end integrated device with a PIN diode structure at a drain end and a preparation method. The technical problem to be solved by the application is solved by the following technical scheme:

[0004] A radio frequency front-end integrated device with a PIN diode structure at a drain end, the radio frequency front-end integrated device comprising:

[0005] a substrate layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer are sequentially stacked from bottom to top, and a two-dimensional electron gas is formed between the GaN channel layer and the AlGaN barrier layer;

[0006] a PIN diode structure arranged vertically, the PIN diode structure being located above one end of the AlGaN barrier layer;

[0007] a T-shaped gate electrode, the T-shaped gate electrode being arranged on the AlGaN barrier layer;

[0008] a passivation layer, covering the T-shaped gate electrode and being located on the AlGaN barrier layer;

[0009] a source electrode, the source electrode being located on the GaN channel layer away from one end of the PIN diode structure;

[0010] a field plate structure, the field plate structure is located on the SiN passivation layer, and the T-shaped gate electrode is located below the lower surface of the field plate structure, and the source electrode and the field plate structure are connected;

[0011] a drain electrode, the drain electrode is located on the PIN diode structure, when the drain electrode applies a direct current positive voltage, the PIN diode structure is in a conducting state, and when the drain electrode applies a direct current negative voltage, the PIN diode structure is in an off state.

[0012] In an embodiment of the present application, the PIN diode structure comprises, from bottom to top, an n-type heavily doped GaN layer, an undoped GaN layer, and a p-type heavily doped GaN layer.

[0013] In an embodiment of the present application, the source electrode and the GaN channel layer are in ohmic contact, and the drain electrode and the PIN diode structure are in ohmic contact.

[0014] In an embodiment of the present application, the substrate layer comprises a SiC substrate layer, and the buffer layer comprises a GaN buffer layer.

[0015] In an embodiment of the present application, the passivation layer comprises a SiN passivation layer.

[0016] In an embodiment of the present application, the materials of the source electrode and the drain electrode comprise, from bottom to top, Ti / Al / Ni / Au.

[0017] The present application also provides a preparation method of a radio frequency front-end integrated device with a PIN diode structure at the drain end, the preparation method being used for preparing the radio frequency front-end integrated device of any one of the above-mentioned embodiments, and the preparation method comprising:

[0018] preparing a laminated structure, the laminated structure comprising, from bottom to top, a substrate layer, a buffer layer, a GaN channel layer, an AlGaN barrier layer, an n-type heavily doped GaN layer, an undoped GaN layer, and a p-type heavily doped GaN layer;

[0019] performing photolithography and etching treatment, etching to the surface of the AlGaN barrier layer, and reserving the n-type heavily doped GaN layer, the undoped GaN layer, and the p-type heavily doped GaN layer at one end as a PIN diode structure;

[0020] photolithographing a source region and a drain region, evaporating metal in the source region and the drain region, and forming a source electrode and a drain electrode in the source region and the drain region respectively through annealing treatment;

[0021] preparing a passivation layer on the AlGaN barrier layer;

[0022] etching a gate trench on the passivation layer to the upper surface of the AlGaN barrier layer;

[0023] lithographing a gate cap region, evaporating metal in the gate trench and the gate cap region to form a T-gate electrode;

[0024] continuing to form a passivation layer on the T-gate electrode and the AlGaN barrier layer so that the passivation layer covers the T-gate electrode;

[0025] interconnecting the metal lithography and the metal evaporation to form a field plate structure.

[0026] In an embodiment of the present application, the source electrode and the GaN channel layer are ohmic contact, and the drain electrode and the PIN diode structure are ohmic contact.

[0027] In an embodiment of the present application, the substrate layer comprises a SiC substrate layer, and the buffer layer comprises a GaN buffer layer.

[0028] In an embodiment of the present application, the passivation layer comprises a SiN passivation layer.

[0029] Compared with the prior art, the present application has the following beneficial effects:

[0030] The device of the present application forms a two-dimensional electron gas between the GaN channel layer and the AlGaN barrier layer, and is provided with a PIN diode structure at one end above the AlGaN barrier layer, and a drain electrode on the PIN diode structure, thereby integrating the radio frequency switch and the power amplifier on one device by forming a vertical PIN diode structure at the drain electrode, which can greatly reduce the number of radio frequency front-end devices and the chip area. Moreover, the p-type region of the PIN diode structure as the switch and the drain electrode of the GaN HEMT power amplifier device as the power amplifier use the same electrode, and the same direct current bias voltage is applied, so that the amplification and switching functions can be realized at the same time, which reduces the direct current power consumption to a certain extent. The parasitic capacitance introduced by the field plate structure for improving the breakdown voltage of the GaN HEMT does not affect the switching performance of the integrated device.

[0031] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 is a planar structure schematic diagram of a radio frequency front-end integrated device provided by an embodiment of the present application, wherein the drain electrode adopts a PIN diode structure;

[0033] Figure 2A three-dimensional structure schematic diagram of a radio frequency front-end integrated device with a PIN diode structure at a drain end provided by an embodiment of the present application;

[0034] Figure 3 A working state diagram of a radio frequency front-end integrated device with a PIN diode structure at a drain end provided by an embodiment of the present application;

[0035] Figure 4 A working state diagram of a PIN diode structure provided by an embodiment of the present application;

[0036] Figure 5 A process schematic diagram of a preparation method of a radio frequency front-end integrated device with a PIN diode structure at a drain end provided by an embodiment of the present application. DETAILED DESCRIPTION

[0037] The present application will be further described in detail below with specific embodiments, but the embodiments of the present application are not limited thereto.

[0038] Embodiment one

[0039] The radio frequency front-end starts from an antenna, passes through radio frequency switches, power amplifiers and other modules, and ends at a modem. In addition, there are many radio frequency technologies applied between the antenna and the modem. With the increase of the complexity and area of the radio frequency front-end switch circuit, the isolation and insertion loss will deteriorate to a certain extent. The purpose of the present application is to solve the problems of a large number of radio frequency front-end switch and power amplifier modules, large area, non-ideal switching speed, and deterioration of radio frequency performance.

[0040] Based on this, please refer to Figure 1 and Figure 2 , Figure 1 A plane structure schematic diagram of a radio frequency front-end integrated device with a PIN diode structure at a drain end provided by an embodiment of the present application, Figure 2 A three-dimensional structure schematic diagram of a radio frequency front-end integrated device with a PIN diode structure at a drain end provided by an embodiment of the present application, the radio frequency front-end integrated device comprises:

[0041] The substrate layer, the buffer layer, the GaN channel layer and the AlGaN barrier layer are sequentially stacked from bottom to top, and a two-dimensional electron gas (2-DEG) is formed between the GaN channel layer and the AlGaN barrier layer;

[0042] The PIN diode structure is vertically arranged and located on one end of the AlGaN barrier layer;

[0043] The T-shaped gate electrode is arranged on the AlGaN barrier layer;

[0044] a passivation layer covering the T-shaped gate electrode and located on the AlGaN barrier layer;

[0045] a source electrode located on the GaN channel layer away from one end of the PIN diode structure;

[0046] a field plate structure located on the SiN passivation layer, and the T-shaped gate electrode is located below the lower surface of the field plate structure, and the source electrode and the field plate structure are connected;

[0047] a drain electrode located on the PIN diode structure, when the drain electrode applies a direct current positive voltage, the PIN diode structure is in a conducting state, and when the drain electrode applies a direct current negative voltage, the PIN diode structure is in an off state.

[0048] In the embodiment, the source electrode is in ohmic contact with the GaN channel layer, and the drain electrode is in ohmic contact with the PIN diode structure.

[0049] Optionally, the PIN diode structure comprises, from bottom to top, an n-type heavily doped GaN layer, an undoped GaN layer and a p-type heavily doped GaN layer.

[0050] Optionally, the substrate layer comprises a SiC substrate layer, and the buffer layer comprises a GaN buffer layer.

[0051] Optionally, the passivation layer comprises a SiN passivation layer.

[0052] Optionally, the materials of the source electrode and the drain electrode comprise, from bottom to top, Ti / Al / Ni / Au.

[0053] The prior art only focuses on the switching device or the power amplifier device itself, regardless of whether the device structure or the circuit topology is optimized, and rarely uses one device to realize the overall function of two devices with different functions. The prior art adopts a traditional device interconnection, which has a large area, a slow switching speed and a large loss. On the other hand, the number of devices used by the traditional method is large, and the direct current power consumption is large. The present application optimizes the transmitting end in the radio frequency front end, changes the mode of connecting the power amplifier and the antenna through an independent radio frequency switch in the traditional mode, and specifically comprises the following steps: first, the device of the present application forms a two-dimensional electron gas between the GaN channel layer and the AlGaN barrier layer, and a PIN diode structure is arranged at one end above the AlGaN barrier layer, and a drain electrode is arranged on the PIN diode structure, so that Figure 3 and Figure 4, the AC signal from the gate, the amplified AC signal through the two-dimensional electron gas layer under the potential barrier layer by the flow of charge, through the AlGaN barrier layer, to the n-type heavily doped GaN end, and then, when the drain electrode gives a DC positive voltage +Vd, the PIN diode structure is biased, at this time the PIN diode structure is equivalent to a small resistance, the P-end of the majority carrier is a hole, flowing to the n-end, and the n-end of the majority carrier is an electron, flowing to the p-end, and the majority and minority carriers recombine in the undoped GaN layer region, forming a current flow through the entire PIN diode structure, and the AC signal from the n-type heavily doped GaN end passes through the PIN diode structure from the AlGaN barrier layer, and finally is output from the drain electrode, at this time the RF switch part of the RF front-end integrated device is in an open state.

[0054] When the drain electrode is given a DC negative voltage -Vd, the PIN diode structure is reverse biased, at this time the PIN diode structure is equivalent to a resistance in series with a capacitor, and the p-type GaN at the junction of the p-type heavily doped GaN layer and the undoped GaN layer forms a charge depletion region on one side, and similarly, the n-type GaN at the junction of the n-type heavily doped GaN and the undoped GaN also forms a charge depletion region on one side, which is equivalent to two parallel capacitor plates, and has a capacitive effect, and the AC signal transmitted to the AlGaN barrier layer cannot pass through the depletion region to reach the drain electrode, at this time the RF switch part of the RF front-end integrated device is in a closed state.

[0055] Therefore, the drain electrode can be applied with a control DC bias +Vd / -Vd; when the drain electrode is applied with a DC positive voltage +Vd, the PIN diode structure as the RF switch part is in a conducting state, and the RF signal is transmitted from the gate electrode of the power amplifier device part, amplified by the power amplifier device, and then transmitted to the next stage from the drain electrode; the drain electrode is applied with a DC negative voltage -Vd, and the PIN diode structure is in an off state, so that the amplified RF signal from the gate electrode into the two-dimensional electron gas channel of the power amplifier device cannot be transmitted to the next stage from the drain end.

[0056] The RF front-end integrated device of the embodiment of the present application uses a PIN diode structure as the RF switch part of the device, so that the RF front-end integrated device simultaneously integrates the RF switch and the power amplifier, and the integrated device of the power amplifier and the RF switch is applied to massive antenna technology (Massive MIMO), and in the case of ensuring good switch characteristics and power amplifier characteristics, due to the large number of channels of the massive antenna, the integrated device can greatly reduce the number of RF front-end devices, so that the chip area is greatly reduced.

[0057] The p-type region (i.e. the p-type heavily doped GaN layer) of the PIN diode structure as the switch and the drain electrode of the GaN HEMT power amplifier device as the power amplifier are the same electrode (i.e. the drain electrode) in the integrated device of the application, and the same direct current bias voltage is applied, so that the direct current bias required for the switching of the PIN diode structure can be realized by the drain bias, thereby realizing the functions of amplification and switching at the same time, which can reduce the direct current power consumption to a certain extent.

[0058] In addition, unlike the use of the double-gate structure to achieve the functions of switching and power amplification, the integrated device of the application can reduce one gate-controlled direct current source, further reducing the direct current power consumption, and in addition, the method of using the double-gate structure to achieve the functions of switching and power amplification can introduce the capacitance between the direct current gate and the field plate, while the integrated device of the application does not use the direct current gate, so that the field plate structure can be used to improve the breakdown voltage of the GaN HEMT, and the field plate structure does not have additional effects on the PIN diode structure, so that the parasitic capacitance introduced does not affect the switching performance of the integrated device, and the distance between the source and the drain of the device can be appropriately reduced.

[0059] Embodiment Two

[0060] The application further provides a preparation method of the radio frequency front-end integrated device with the PIN diode structure at the drain end based on the embodiment one, please refer to Figure 5 , Figure 5 is a process schematic diagram of the preparation method of the radio frequency front-end integrated device with the PIN diode structure at the drain end provided by the embodiment of the application, and the preparation method of the radio frequency front-end integrated device with the PIN diode structure at the drain end provided by the application includes the following steps:

[0061] Step 1, preparing a laminated structure, which includes a substrate layer, a buffer layer, a GaN channel layer, an AlGaN barrier layer, an n-type heavily doped GaN layer, an undoped GaN layer and a p-type heavily doped GaN layer arranged in sequence from bottom to top.

[0062] Optionally, the substrate layer includes a SiC substrate layer, and the buffer layer includes a GaN buffer layer.

[0063] Step 2, performing photolithography and etching treatment, etching to the surface of the AlGaN barrier layer, and retaining the n-type heavily doped GaN layer, the undoped GaN layer and the p-type heavily doped GaN layer at one end as the PIN diode structure.

[0064] Specifically, a single-layer photoresist photolithography process is performed on the wafer surface, the PIN diode structure region pattern is photoetched, and then a Cl-based etching is performed to the surface of the AlGaN barrier layer by using an ICP etching device, so as to form a vertical PIN diode structure at the drain electrode after the photoresist is removed.

[0065] Step 3, photoetching source and drain regions, evaporating metal in the source and drain regions, and forming source and drain electrodes by annealing treatment.

[0066] Specifically, the preparation of source and drain ohmic metal is performed. A double-layer photoresist lithography process is used to photoetch the source and drain regions using SF6 photoresist and then EPI621 photoresist. Then, ohmic metal evaporation is performed with a metal thickness of Ti / Al / Ni / Au = 20 / 160 / 55 / 45 nm. After that, the photoresist is removed. Finally, annealing is performed to form ohmic contacts in the source and drain regions.

[0067] Step 4, injection isolation process to form the device active region.

[0068] Step 5, preparation of a passivation layer on the AlGaN barrier layer.

[0069] Specifically, PECVD technology is used to grow a SiN passivation layer with a thickness of 120 nm. A single-layer EPI621 photoresist is used to photoetch the opening region. Then, ICP etching equipment is used for opening F-based etching to the surface of the ohmic metal, with the purpose of exposing the ohmic metal of the source and drain two electrodes covered by the SiN passivation layer. Finally, the photoresist is removed.

[0070] Step 6, etching a gate slot on the passivation layer to the surface of the AlGaN barrier layer.

[0071] Specifically, the preparation of the gate recess (i.e., gate slot) is performed on the surface of the SiN passivation layer using a single-layer photoresist lithography process with EPI621 photoresist to photoetch the gate recess region. Then, recess etching is performed using ICP etching equipment for F-based etching to the surface of the AlGaN barrier layer, and the excess part of the SiN passivation layer is etched away. Finally, the photoresist is removed.

[0072] Step 7, photoetching the gate cap region, evaporating metal in the gate slot and the gate cap region to prepare a T-shaped gate electrode.

[0073] Specifically, a double-layer photoresist lithography process is performed on the surface of the passivation layer using SF6 photoresist and then EPI621 photoresist to photoetch the gate cap region. Then, gate metal evaporation is performed with a gate metal of Ni / Au = 45 / 400 nm. Finally, the photoresist is removed to prepare a T-shaped gate electrode.

[0074] Step 8, continuing to prepare a passivation layer on the T-shaped gate electrode and the AlGaN barrier layer so that the passivation layer covers the T-shaped gate electrode.

[0075] Specifically, the second SiN passivation layer is grown by PECVD technology, with a thickness of 120 nm. A single layer of EPI621 photoresist is used to photoetch the opening area. Then, the opening F base etching is performed by using an ICP etching device, until the source surface is etched. Finally, the photoresist is removed.

[0076] Step 9, interconnection metal photoetching and interconnection metal evaporation, forming a field plate structure, the interconnection metal is, for example, Ti / Au.

[0077] In the description of the present application, the terms "first", "second" are only used for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" can be explicitly or implicitly included one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0078] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the description of the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the specification.

[0079] Although the present application is described herein in connection with various embodiments, those skilled in the art will understand and appreciate the disclosure of the disclosed embodiments upon reading the description of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "one" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. Some measures are described in mutually different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0080] The above is a further detailed description of the present application in combination with specific preferred embodiments, and cannot be considered as limiting the specific implementation of the present application to these descriptions. For those skilled in the art, modifications made without departing from the concept of the present application should be considered as falling within the scope of protection of the present application.

Claims

1. An integrated radio frequency front-end device with a PIN diode structure at the drain terminal, characterized in that, The integrated radio frequency front-end device includes: A substrate layer, a buffer layer, a GaN channel layer, and an AlGaN barrier layer are stacked sequentially from bottom to top, with a two-dimensional electron gas formed between the GaN channel layer and the AlGaN barrier layer. A vertically arranged PIN diode structure is located above one end of the AlGaN barrier layer; the PIN diode structure includes an n-type heavily doped GaN layer, an undoped GaN layer and a p-type heavily doped GaN layer stacked sequentially from bottom to top. The T-shaped gate electrode is disposed on the AlGaN barrier layer; A passivation layer covers the T-shaped gate electrode and is located on the AlGaN barrier layer; The source electrode is located on the GaN channel layer at one end away from the PIN diode structure; A field plate structure is located on a SiN passivation layer, and the T-shaped gate electrode is located below the lower surface of the field plate structure. The source electrode is connected to the field plate structure. The drain electrode is located on the PIN diode structure. When a positive DC voltage is applied to the drain electrode, the PIN diode structure is in a conducting state, and when a negative DC voltage is applied to the drain electrode, the PIN diode structure is in a turning-off state.

2. The integrated radio frequency front-end device according to claim 1, characterized in that, The source electrode and the GaN channel layer are in ohmic contact, and the drain electrode and the PIN diode structure are in ohmic contact.

3. The integrated radio frequency front-end device according to claim 1, characterized in that, The substrate layer includes a SiC substrate layer, and the buffer layer includes a GaN buffer layer.

4. The integrated radio frequency front-end device according to claim 1, characterized in that, The source electrode and the drain electrode are made of Ti / Al / Ni / Au, which are stacked sequentially from bottom to top.

5. A method for fabricating an integrated radio frequency front-end device with a PIN diode structure at the drain terminal, characterized in that, The fabrication method is used to fabricate the integrated radio frequency front-end device according to any one of claims 1 to 4, and the fabrication method includes: A stacked structure is prepared, the stacked structure comprising, from bottom to top, a substrate layer, a buffer layer, a GaN channel layer, an AlGaN barrier layer, an n-type heavily doped GaN layer, an undoped GaN layer and a p-type heavily doped GaN layer; Photolithography and etching processes are performed to etch to the surface of the AlGaN barrier layer, retaining an n-type heavily doped GaN layer, an undoped GaN layer, and a p-type heavily doped GaN layer at one end as a PIN diode structure; The source region and the drain region are photolithographically etched, metal is evaporated in the source region and the drain region, and the source electrode and the drain electrode are formed in the source region and the drain region respectively by annealing. A passivation layer is prepared on the AlGaN barrier layer; Etch a gate trench that extends through the upper surface of the AlGaN barrier layer onto the passivation layer; Photolithography is performed on the gate cap region to evaporate metal within the gate trench and the gate cap region, thereby fabricating a T-shaped gate electrode; A passivation layer is further fabricated on the T-type gate electrode and the AlGaN barrier layer to cover the T-type gate electrode. Interconnect metal photolithography and interconnect metal evaporation form a field plate structure.

6. The method for fabricating an integrated radio frequency front-end device according to claim 5, characterized in that, The source electrode and the GaN channel layer are in ohmic contact, and the drain electrode and the PIN diode structure are in ohmic contact.

7. The method for fabricating an integrated radio frequency front-end device according to claim 5, characterized in that, The substrate layer includes a SiC substrate layer, and the buffer layer includes a GaN buffer layer.

Images