Three-dimensional high-density integrated structure based on silicon-based adapter plate folding and preparation method thereof

Abstract

The present application relates to a novel three-dimensional high-density integrated structure based on silicon-based adapter plate folding, which adopts a silicon-based adapter plate as a base material, integrates micro modules on the surface, forms a hexahedral integrated structure with a hexahedral core structure provided with grooves through a folding mode, effectively utilizes the vertical packaging space in the micro system in the z direction, greatly reduces the volume of the micro system, realizes miniaturization and high integration, and has the characteristics of high performance, high density and three-dimensionality.

Description

Technical Field

[0001] This invention relates to the field of advanced integrated circuit packaging technology, specifically to a three-dimensional high-density integrated structure based on silicon-based adapter folding and its fabrication method. Background Technology

[0002] As semiconductor manufacturing processes gradually reach the limits of transistor physical size, the time and cost required increase, and Moore's Law is slowing down. The integrated circuit industry continues to develop along Moore's Law by proportionally shrinking the size of transistors, while simultaneously developing microsystem packaging and integration technologies based on the development of microelectromechanical systems (MEMS). By increasing the integration density and complexity of systems, system costs and power consumption are reduced, making it one of the most promising technologies for "beyond Moore's Law." Electronic devices are increasingly exhibiting characteristics such as high integration density, high overall performance, and miniaturization. Therefore, high-density microsystem integration processes are a very important area of ​​current research.

[0003] Traditional 3D integration involves vertically stacking multiple packaged chips, but using packaged chips for integration increases the size of the microsystem and reduces the integration density. Summary of the Invention

[0004] To reduce the size of microsystems and achieve miniaturization and high-density integration, this invention provides a three-dimensional high-density integrated structure based on silicon-based adapter board folding.

[0005] Another object of the present invention is to provide a method for preparing the aforementioned three-dimensional high-density integrated structure.

[0006] To achieve the above objectives, the present invention provides the following technical solution.

[0007] The first aspect of this invention provides a three-dimensional high-density integrated structure based on a folded silicon-based interposer, comprising:

[0008] A hexahedral core structure, wherein each face of the hexahedral core structure has an inwardly recessed groove for accommodating a chip; and

[0009] The hexahedral shell structure includes: six micro-module structures, each micro-module structure including an adapter board and multiple chips connected thereto, the chips being embedded in the grooves; and a flexible conductive structure connecting adjacent micro-module structures, enabling electrical connection and communication between the micro-modules.

[0010] A second aspect of the present invention provides a method for fabricating the aforementioned three-dimensional high-density integrated structure based on silicon-based interposer folding, comprising the following steps:

[0011] A cross-shaped adapter plate is provided, which is divided into 6 regions. The adapter plate can be folded to form a hexahedral structure.

[0012] A TSV structure is formed on each of the regions, and a redistribution layer is formed on both the upper and lower surfaces of each region.

[0013] A flexible conductive structure is formed on the upper surface of the adapter plate, exposing at least a portion of the redistribution layer;

[0014] Remove the adapter plate portion between adjacent areas;

[0015] Multiple chips are mounted on the upper surface of the region to obtain a folded structure; and

[0016] A hexahedral core structure is provided, wherein each face of the hexahedral core structure has an inwardly recessed groove; and the hexahedral core structure is used as the core to fold the folded structure into a hexahedron, so that the chip is embedded in the groove.

[0017] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0018] 1. This invention provides a three-dimensional high-density integrated structure based on silicon-based adapter board folding. It uses a silicon-based adapter board as the substrate and integrates micro-modules on the surface. Through folding and with a hexahedral core structure with grooves as the core, a hexahedral integrated structure is formed. It effectively utilizes the vertical packaging space in the z-direction within the microsystem, greatly reduces the volume of the microsystem, and achieves miniaturization and high integration. It has the characteristics of high performance, high density, and three-dimensionality.

[0019] In addition, the thermal expansion coefficient of the adapter board can be well matched with the chip, and it is compatible with wafer-level processes and thin-film multilayer processes, enabling high-performance heterogeneous integration of passive devices, MEMS, cavities, microchannels, and multiple chips.

[0020] Furthermore, each micromodule fabricated using the adapter plate has an independent function and can be tested and screened individually. The screened micromodules are then integrated using a flexible connection method, ensuring that the integration of modules does not affect the preceding structure and process conditions, reducing the complexity of the integration process and thus significantly improving the production efficiency and yield of the microsystem.

[0021] 2. This invention uses bare chips for integration, which further reduces the size of the microsystem and achieves high-density integration.

[0022] 3. The micro-module chip of the present invention is located in and in contact with the groove of the hexahedral core structure, which effectively protects the chip structure and improves the mechanical stability of the overall structure.

[0023] 4. Using TSV and flexible metal traces enables vertical stacking between chips. Compared with wire bonding, this greatly shortens the connection distance between chips, effectively reduces signal delay and loss in communication transmission, and improves operating speed and bandwidth. Attached Figure Description

[0024] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0025] Figure 1 This is a schematic diagram of a three-dimensional high-density integrated structure based on a silicon-based adapter board folding according to an embodiment of the present invention.

[0026] Figures 2-3 for Figure 1 A schematic diagram of its unfolded state.

[0027] Figures 4-14 The diagram shows the structural schematics obtained in each step of the method for fabricating a three-dimensional high-density integrated structure based on silicon-based adapter folding provided in the embodiments of the present invention.

[0028] Explanation of reference numerals in the attached figures:

[0029] 1000 is a three-dimensional high-density integrated structure based on a silicon-based adapter plate folding, 100 is a hexahedral shell structure, 110 is a micro-module structure, 111a is the first chip, 111b is the second chip, 112 is the silicon-based adapter plate, 113 is photoresist, 114 is a blind via, 115 is a SiO2 layer, 116 is a metal seed layer, 117 is a TSV structure, 118 is a redistribution layer, 200 is a hexahedral core structure, 201 is a groove, 300 is a flexible conductive structure, 301 is polyimide, and 302 is a metal trace. Detailed Implementation

[0030] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0031] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0032] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0033] Existing integration processes are insufficient to meet the demands of higher integration density and smaller size, thus requiring more efficient and innovative processes to address the challenges of high-density integration. To solve these problems, this invention presents a three-dimensional high-density integration structure based on a folded silicon-based interposer.

[0034] Specifically, such as Figure 1-3 The first aspect of the present invention provides a three-dimensional high-density integrated structure based on silicon-based interposer folding, comprising:

[0035] A hexahedral core structure, wherein each face of the hexahedral core structure has an inwardly recessed groove for accommodating a chip; and

[0036] The hexahedral shell structure includes: six micro-module structures, each micro-module structure including an adapter board and multiple chips connected thereto, the chips being embedded in the grooves; and a flexible conductive structure connecting adjacent micro-module structures, enabling electrical connection and communication between the micro-modules.

[0037] In some embodiments, the adapter plate may be made of silicon, glass, quartz, or ceramic, etc. Preferably, the adapter plate is a silicon-based adapter plate.

[0038] In some embodiments, the three-dimensional high-density integrated structure based on silicon-based interposer folding further includes an adhesive layer disposed between the hexahedral core structure and the hexahedral shell structure. The adhesive layer can reinforce the integrated structure.

[0039] Preferably, the material of the adhesive layer may include one or more of epoxy resin and conductive silver paste.

[0040] In some embodiments, the chip is a bare chip.

[0041] In some embodiments, the flexible conductive structure includes two polyimide layers and a metal trace disposed between the two polyimide layers. The flexible conductive structure is disposed on the inner surface of the hexahedral shell structure, covers at least a portion of the surface of each micromodule structure, and connects adjacent micromodule structures.

[0042] In this invention, the flexible conductive structure can not only connect adjacent micro-module structures of the hexahedral shell structure and fix the six micro-module structures together to form a folded structure, but also the metal traces in the flexible conductive structure can connect with the Pad on the adapter board and play a conductive role, realizing the electrical connection between the chip, the Pad on the adapter board, the metal traces, and the chip, thereby realizing the electrical connection and communication between the micro-modules.

[0043] Preferably, the material of the metal trace is Cr, Au, or Ni.

[0044] In some embodiments, the micro-module structure includes: an adapter board having a TSV structure; a redistribution layer (RDL) disposed on both sides of the adapter board and electrically connected to the TSV structure; and a chip disposed on the top of the adapter board.

[0045] Preferably, each micromodule structure may include multiple chips with different functions and materials. These chips are integrated on the surface of an adapter board with a TSV structure by flip-chip or wire bonding, and the electrical connection between the chips is realized by the redistribution layer on the adapter board, forming a micromodule structure with independent functions.

[0046] In some embodiments, the chip has a bump on its top, the chip is flip-chip mounted on the top of the adapter board, and the bump falls on the redistribution layer to form an electrical connection.

[0047] In other embodiments, the chip is mounted by wire bonding, specifically by using metal wires (gold wire, aluminum wire, etc.) and employing hot pressing or ultrasonic energy to connect the pads on the chip to the pads on the adapter board.

[0048] In some embodiments, the chip is in contact with the hexahedral core structure. The micromodule chip of the present invention is located within and in contact with the groove of the hexahedral core structure, effectively protecting the chip structure and improving the mechanical stability of the overall structure.

[0049] In some embodiments, the material of the hexahedral core structure is silicon.

[0050] In some embodiments, the hexahedron is a cube. That is, the hexahedral core structure is a cubic core structure, and the hexahedral shell structure is a cubic shell structure.

[0051] The second aspect of the present invention provides a method for fabricating the above-mentioned three-dimensional high-density integrated structure based on silicon-based adapter folding, comprising the following steps.

[0052] First, a cross-shaped adapter plate is provided, which is divided into 6 regions. The adapter plate can be folded to form a hexahedral structure.

[0053] The size of the cross-shaped adapter board and the size of its six regions can be designed in advance according to the volume requirements of the microsystem packaging integration structure.

[0054] Then, TSV structures are formed in each region, and redistribution layers are formed on the upper and lower surfaces of each region.

[0055] In some embodiments, the method of forming a TSV structure includes: forming blind vias in various regions; forming an insulating layer to cover the sidewalls and bottom of the blind vias; sequentially forming a diffusion barrier layer and a metal seed layer on the sidewalls of the blind vias; filling the blind vias with metal; and removing excess metal from the surface of the adapter plate after filling.

[0056] Preferably, blind vias can be etched in various areas using deep reactive ion etching (DRIE), BOSH process, or laser drilling. Blind vias have a large aspect ratio.

[0057] Preferably, the insulating layer can be made of SiO2, Si3N4, or parylene, etc. Preferably, the insulating layer can be formed by thermal oxidation, CVD, LPCVD, PECVD, or vacuum phase deposition, etc. The purpose of the insulating layer is to achieve insulation between the TSV and the adapter plate.

[0058] Preferably, a diffusion barrier layer and a metal seed layer can be formed on the sidewalls of the blind via using physical vapor deposition, magnetron sputtering, or PECVD. The metal seed layer is made of the same material as the filler metal, such as Cu, W, or a conductive polymer. The diffusion barrier layer can be made of Ta, TaN, Ta, TiN, TiW, Cr, or Ti. The diffusion barrier layer prevents the diffusion of filler metal atoms into silicon during the high-temperature annealing process. Additionally, the barrier layer also serves as an adhesive layer between the insulating layer and the filler metal.

[0059] Preferably, the method of filling metal includes magnetron sputtering, CVD, ALD, or electroplating.

[0060] In some embodiments, forming a redistribution layer includes: forming a redistribution layer on the upper surface of each region and forming an insulating layer therearound there; thinning and polishing the lower surface of each region to expose the metal within the TSV structure; forming an insulating layer on the lower surface of each region; removing a portion of the insulating layer on the lower surface of each region to expose the metal within the TSV structure again; and forming a redistribution layer on the lower surface of each region and forming an insulating layer therearound there.

[0061] Preferably, chemical mechanical polishing (CMP) can be used for thinning polishing.

[0062] Methods for removing part of the insulating layer include photolithography and etching.

[0063] Next, a flexible conductive structure is formed on the upper surface of the adapter board, exposing at least part of the redistribution layer.

[0064] The method for forming a flexible conductive structure includes: depositing polyimide on the upper surface of an adapter plate and forming a pattern; depositing metal on the resulting polyimide layer and forming a pattern to obtain metal traces; and depositing another layer of polyimide to protect the metal traces. The polyimide deposition process includes spin coating, pre-baking, exposure, development, and curing.

[0065] Next, remove the adapter plate section between adjacent areas.

[0066] Preferably, deep reactive ion etching (DRIE) can be used for removal. This step only removes the transition plate portion between adjacent areas, without removing the flexible conductive structure between them. After this step, the adjacent areas can be integrated into a single unit through the flexible conductive structure, and can also be folded.

[0067] Then, multiple chips are mounted on the upper surface of each region to obtain a folded structure.

[0068] In some embodiments, the chip fabrication method includes CMOS technology, etc.

[0069] In some embodiments, bumps are formed on the top of multiple chips, and the multiple chips are then flip-chip mounted on the upper surface of each region, so that the bumps fall on the redistribution layer, thereby obtaining a folded structure.

[0070] In other embodiments, the chip can be mounted onto the adapter board using wire bonding. The connection between the pads on the chip and the pads on the adapter board can be achieved using metal wires (gold wire, aluminum wire, etc.) and by applying heat or ultrasonic energy.

[0071] Finally, a hexahedral core structure is provided, with an inwardly recessed groove on each face of the hexahedral core structure; and using the hexahedral core structure as the core, the folded structure is folded into a hexahedron so that the chip is embedded in the groove.

[0072] Preferably, the folding can be achieved using module-level stereoscopic integration technology for chip folding.

[0073] In some embodiments, after obtaining the folded structure but before folding, the method further includes: applying an adhesive to the surface and grooves of the hexahedral core structure.

[0074] The TSV adapter board of the present invention may include active adapter boards and passive adapter boards, etc. The above description only presents one possible combination of processes and materials in the novel high-density integration process; the appropriate combination can be selected based on the application scenario.

[0075] The present invention will be further described below with reference to specific embodiments and accompanying drawings.

[0076] Example 1

[0077] First, a cross-shaped silicon-based adapter board 112 is provided, divided into 6 areas, such as... Figure 4 As shown, the silicon-based adapter plate 112 can be folded to form a hexahedral structure after subsequent processing.

[0078] Then, the patterned areas are defined using photoresist 113, and blind vias 114 with large aspect ratios are etched in each area of ​​the silicon-based interposer 112 using deep reactive ion etching. Figure 5 A cross-sectional view of region 1 is shown (region 1 is within the dashed box). Cross-sectional views of other regions can be referenced similarly. Figure 5 .

[0079] After removing the adhesive, a SiO2 layer 115 is deposited on the etched blind via 114 using chemical deposition to cover the sidewalls and bottom of the blind via 114, thereby achieving insulation between the TSV and the silicon-based adapter board 112. Figure 6 As shown ( Figure 6-13 All of these are schematic cross-sectional views of region 1.

[0080] Next, a diffusion barrier layer (not shown in the figure) and a metal seed layer 116 (Cu) are sequentially deposited on the sidewall of the blind via 114 using physical vapor deposition. Then, Cu metal is filled using electroplating. After filling, excess metal on the silicon-based adapter surface is removed using chemical mechanical polishing (CMP) to obtain the TSV structure 117. Figure 7 As shown.

[0081] Then, the upper surface of the silicon-based adapter board 112 is rewired to obtain a redistribution layer 118 (RDL), and a SiO2 layer is deposited around it for insulation, such as... Figure 8 As shown.

[0082] Subsequently, the lower surface of the silicon-based adapter 112 was thinned and polished using chemical mechanical polishing (CMP) to expose the metal within the TSV from the lower surface of the adapter, such as... Figure 9 As shown.

[0083] Next, a SiO2 insulating layer is deposited on the lower surface of the silicon-based adapter 112 to insulate the TSV from the silicon-based adapter 112. Then, photolithography and etching are used to expose the metal inside the TSV on the lower surface of the silicon-based adapter 112 again. Secondary wiring is then performed on the lower surface of the silicon-based adapter 112 to obtain a redistribution layer 118 (RDL), and a SiO2 layer is deposited around it for insulation. Figure 10 As shown.

[0084] Then, polyimide 301 is deposited and patterned on the upper surface of the silicon-based adapter plate 112, followed by the deposition and patterning of Cr metal traces 302 for electrical connection. Finally, another layer of polyimide 301 is deposited to protect the metal traces 302, resulting in a flexible conductive material 300. Figure 11 As shown.

[0085] Subsequently, the silicon-based interposer 112 is etched using a deep reactive ion etching process to remove the silicon-based interposer portions between adjacent areas, thereby forming six panels, wherein adjacent panels are connected by a flexible conductive material, such as... Figure 12 As shown.

[0086] Then, tiny copper bumps are formed on the top of the first chip 111a and the second chip 111b, and then the chips are flipped over and mounted. Figure 12 In the structure shown, copper bumps are placed on the redistribution layer 118 to form an electrical connection, thereby obtaining a folded structure, such as... Figure 13-14 As shown, each panel containing a chip is a micro-module structure 110.

[0087] Finally, employing a module-level stereolithography integration technology based on chip folding, a hexahedral core structure 200 with a groove 201 embedded in the middle is used to integrate the chip. Figure 14 The folded structure shown is folded into a hexahedral shell structure 100. The chip is embedded in the groove 201 of the hexahedral core structure 200. Metal traces 302 (i.e., metal interconnects) are located on the inside to connect the electrical properties between the various micro-modules. An adhesive is coated on the surface of the hexahedral core structure 200 and inside the groove 201 to maintain the original alignment of the silicon-based adapter board of each micro-module structure. After assembly, the resulting three-dimensional high-density integrated structure 1000 based on the folding of the silicon-based adapter board is as follows. Figure 1 As shown, its unfolded state is as follows Figure 2-3 As shown.

[0088] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A three-dimensional high-density integrated structure based on a silicon-based interposer fold, characterized in that, include: A hexahedral core structure, wherein each face of the hexahedral core structure has an inwardly recessed groove for accommodating a chip; as well as A hexahedral shell structure includes: six micro-module structures, each micro-module structure comprising a silicon-based adapter plate and multiple chips connected thereto, the chips being embedded in the grooves and in contact with the hexahedral core structure; and a flexible conductive structure connecting adjacent micro-module structures, enabling electrical connection and communication between the micro-modules, wherein there is no continuous adapter plate material beneath the flexible conductive structure between adjacent micro-module structures, and the adjacent micro-module structures are connected only through the flexible conductive structure.

2. The three-dimensional high-density integrated structure according to claim 1, characterized in that, Also includes: An adhesive layer is disposed between the hexahedral core structure and the hexahedral shell structure.

3. The three-dimensional high-density integrated structure according to claim 1 or 2, characterized in that, The chip is a bare chip.

4. The three-dimensional high-density integrated structure according to claim 1 or 2, characterized in that, The flexible conductive structure includes: two polyimide layers and a metal trace disposed between the two polyimide layers; The flexible conductive structure is disposed on the inner surface of the hexahedral shell structure, covering at least a portion of the surface of each of the micro-module structures, and connecting adjacent micro-module structures.

5. The three-dimensional high-density integrated structure according to claim 1 or 2, characterized in that, The micro-module structure includes: The adapter board is equipped with a TSV structure; A redistribution layer is disposed on both sides of the adapter board and electrically connected to the TSV structure; and The chip is located on the top of the adapter board.

6. The method for fabricating the three-dimensional high-density integrated structure according to any one of claims 1-5, characterized in that, Includes the following steps: A cross-shaped adapter plate is provided, which is divided into 6 regions. The adapter plate can be folded to form a hexahedral structure. A TSV structure is formed on each of the regions, and a redistribution layer is formed on both the upper and lower surfaces of each region. A flexible conductive structure is formed on the upper surface of the adapter plate, exposing at least a portion of the redistribution layer; Remove the adapter plate portion between adjacent areas; Multiple chips are mounted on the upper surface of each region to obtain a folded structure; and A hexahedral core structure is provided, wherein each face of the hexahedral core structure has an inwardly recessed groove; and the hexahedral core structure is used as the core to fold the folded structure into a hexahedron, so that the chip is embedded in the groove.

7. The preparation method according to claim 6, characterized in that, After obtaining the folded structure but before folding, the process further includes: applying an adhesive to the surface and grooves of the hexahedral core structure.

8. The preparation method according to claim 6 or 7, characterized in that, The method for forming the TSV structure includes: forming blind vias in each of the regions; forming an insulating layer to cover the sidewalls and bottom of the blind vias; sequentially forming a diffusion barrier layer and a metal seed layer on the sidewalls of the blind vias; filling the blind vias with metal; and removing excess metal from the surface of the adapter plate after filling. Forming the redistribution layer includes: forming a redistribution layer on the upper surface of each of the regions and forming an insulating layer therearound; thinning and polishing the lower surface of each of the regions to expose the metal within the TSV structure; forming an insulating layer on the lower surface of each of the regions; removing a portion of the insulating layer on the lower surface of each of the regions to expose the metal within the TSV structure again; forming a redistribution layer on the lower surface of each of the regions and forming an insulating layer therearound. The chip can be mounted by flip-chip mounting or by wire bonding.

9. The preparation method according to claim 6 or 7, characterized in that, The method for forming the flexible conductive structure includes: depositing polyimide on the upper surface of the adapter plate and forming a pattern; depositing metal on the obtained polyimide layer and forming a pattern to obtain metal traces; and depositing another layer of polyimide to protect the metal traces.

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