Optoelectronic hybrid computing method and array for on-chip large-scale matrix multiplication operations

Abstract

This invention discloses an optoelectronic hybrid computing method and array for on-chip large-scale matrix multiplication. This method uses an electrical bus to sum the product-bearing current output signals of parallel optoelectronic hybrid computing units in different rows. This method reduces the input power requirements of the light source and the wavelength requirements of the input light in different rows. Therefore, the optoelectronic hybrid computing array of the present invention reduces the requirements for the light source to a certain extent, enabling faster integration of light sources and photonic computing chips.

Description

Technical Field

[0001] The present invention relates to the field of photonic computing technology, and more particularly to an optoelectronic hybrid computing method and array for on-chip large-scale matrix multiplication operations. Background Art

[0002] As the semiconductor industry gradually enters the post-Moore era, the development of integrated circuits continues to evolve in different directions. On the one hand, the development of new semiconductor materials, particularly carbon nanotubes and two-dimensional semiconductor materials, continues to follow the essence of Moore's Law and further reduces the size of devices and chips, which is called "More Moore." On the other hand, the development of new architectures and heterogeneous integrated chips for specific application areas, such as neuromorphic chips, optoelectronic chips, and quantum chips, is achieving "More than Moore."

[0003] Among them, photonic chips, based on silicon-based optoelectronics technology, utilize materials and processes compatible with integrated circuits to integrate micron- and nanometer-scale photonic, electronic, and optoelectronic components on a single silicon substrate. This allows for functional integration and complementary advantages between microelectronics and optoelectronics, resulting in superior optoelectronic chips. These chips are an effective approach to addressing the performance bottlenecks and information congestion faced by traditional integrated circuits. Thanks to the mature application of fiber-optic communications, photons, as information carriers, possess more multiplexing dimensions than electrons, such as amplitude, phase, wavelength, and mode, resulting in greater bandwidth, faster speeds, and lower energy consumption. Early silicon-based optoelectronic chips were designed to replace copper interconnects and address the communication bottleneck between the processor core and memory in microelectronic chips. The microprocessor and memory cells were implemented by microelectronics, while the photonic components primarily handled signal transmission and information transmission. With the increasing maturity of silicon photonics technology and the significant advantages of optical communications, interest in silicon photonic chips has gradually shifted from information transmission to information processing, including cutting-edge applications such as analog computing, quantum computing, and brain-inspired computing.

[0004] Existing photonic computing chip implementation technologies utilize Mach-Zehnder interferometers (MZIs) or microring structures (MMRs) to achieve photonic computing. Examples of these methods include those disclosed in Chinese patents CN115905792 and CN113392965, and computing arrays based on these methods include those disclosed in Chinese patents CN10407644 and CN116107037. However, these technologies generally suffer from the following deficiencies:

[0005] 1. Computing array scale limitation: The basic computing unit area of ​​the MZI-based photonic computing chip is relatively large. When the silicon photonic platform is taped out, the mask template with a conventional wafer area makes it difficult to scale the computing array to the application level.

[0006] 2. Slow calculation speed: This is mainly due to the use of the thermo-optical tuning principle based on silicon-based optoelectronic technology. At the same time, there will be temperature drift (especially significant in MMR structures), which affects the refractive index of the optical waveguide.

[0007] 3. High difficulty in design and packaging: Each basic computing unit of the MZI-based photonic computing chip will have more than 10 electrodes, the number of wirings is extremely large, and the design difficulty and packaging complexity are high.

[0008] The applicant previously proposed a new photonic computing array that uses a crossbar switch matrix architecture (Crossbar); the crossbar switch matrix architecture is formed by a group of mutually parallel input row waveguides and a group of mutually parallel output column waveguides. Crossbars are used at the intersection of the row waveguides and the column waveguides to achieve low-loss transmission of optical signals, and column waveguide coupling devices are used on the column waveguides to sum the outputs of photonic computing units on different rows. Although the new photonic computing array uses light to sum, in engineering applications, crossbars and column waveguide coupling devices will cause large losses and place high requirements on the entire input light source. From the perspective of the photonic computing field, there are technical difficulties in the current integrated high-power light source, and it is impossible to integrate the light source and chip together in a short period of time. Therefore, some photonic computing companies currently need to use external high-power light sources. Summary of the Invention

[0009] The purpose of the present invention is to overcome the deficiencies in the prior art and to provide an optoelectronic hybrid computing method and array for on-chip large-scale matrix multiplication operations.

[0010] The purpose of the present invention is achieved through the following technical solutions:

[0011] An optoelectronic hybrid computing method for on-chip large-scale matrix multiplication operations comprises the following steps:

[0012] S1. Providing an optoelectronic hybrid computing unit, the optoelectronic hybrid computing unit comprising an interconnected photon computing unit and a photoelectric conversion device, the photon computing unit generating an optical output signal carrying encoded information; the photoelectric conversion device converting the optical output signal into a current signal, wherein the magnitude of the current signal is proportional to the power of the optical output signal;

[0013] S2. Provide an electrical bus to sum a corresponding number of current signals converted by a plurality of parallel-connected photoelectric conversion devices to generate an electrical output signal, wherein the sum of the current signals after addition is encoded in the electrical output signal.

[0014] Preferably, in step S1, "the photon computing unit generates an optical output signal with coded information" specifically includes:

[0015] S11, providing a write signal, and encoding the multiplier value into the write signal;

[0016] S12. Mapping the multiplication value to a state of the photonic computing unit using the write signal, the photonic computing unit comprising an optical waveguide and a modulation element optically coupled to the optical waveguide, the modulation element modifying a transmission, reflection, refraction, or absorption characteristic of the optical waveguide according to the modulation element's state, wherein the modulation element's state is adjustable by the write signal; the state is represented by an absorption coefficient α or a refractive index n of the optical waveguide for light;

[0017] S13. Encoding the multiplicand value into the optical input signal of the photon computing unit; generating the optical output signal after the optical input signal passes through the photon computing unit, wherein the product of the multiplier value and the multiplicand value is encoded in the optical output signal.

[0018] Preferably, the modulation element is an electro-optical modulator based on the light absorption effect, which uses an electrical signal as an external excitation, and changes the free carrier concentration in its doped region by injecting current or applying voltage to change the absorption coefficient α of the optical waveguide containing free carriers to light, thereby enabling the optical signal passing through the optical waveguide to achieve multiplication operation.

[0019] Preferably, the modulation element is a phase change material deposited on an optical waveguide; the phase change material can selectively change its own state by using an optical signal as an external stimulus (i.e., a write signal), and the state itself is manifested as modifying the absorption coefficient α of the optical waveguide containing the phase change material to light.

[0020] Alternatively, in step S1, "the photonic computing unit generates an optical output signal with coded information" is implemented using a Mach-Zehnder interferometer (MZI) or a microring structure (MMR).

[0021] Preferably, the electrical bus is a metal interconnect layer on a photonic computing chip.

[0022] The present invention also discloses an optoelectronic hybrid computing array for on-chip large-scale matrix multiplication operations, comprising:

[0023] A set of photonic computing units, each comprising an optical waveguide and a modulation element optically coupled to the optical waveguide, wherein the modulation element modifies the transmission, reflection, refraction, or absorption characteristics of the optical waveguide according to its own state, wherein the state of the modulation element can be adjusted by a written signal; the state is represented by the optical waveguide's absorption coefficient α or refractive index n; an optical input signal passes through the photonic computing unit to generate the optical output signal, wherein the product of a multiplier value and a multiplicand value is encoded in the optical output signal;

[0024] a group of photoelectric conversion devices, connected one-to-one with the output sides of the optical waveguides of the photonic computing units, to convert the optical output signals into current signals, wherein the magnitude of the current signals is proportional to the power of the optical output signals;

[0025] A crossbar switch matrix architecture; the crossbar switch matrix architecture is formed by a set of mutually parallel input optical waveguides and a set of mutually parallel electrical buses; the optical input signal is transmitted through the input optical waveguides;

[0026] There is a photonic computing unit at each intersection of an input optical waveguide and an electrical bus in the crossbar switch matrix architecture, the input side of the optical waveguide of each photonic computing unit is coupled to an adjacent input optical waveguide via a waveguide coupling device, the waveguide coupling device evanescently couples a portion of the optical power from the adjacent input optical waveguide, wherein the coupled optical power depends on the length of a portion of the waveguide coupling device that is positioned adjacent to and extends parallel to the adjacent input optical waveguide;

[0027] Each of the electrical buses is connected to a number of parallel photoelectric conversion devices. The electrical bus sums a corresponding number of current signals converted by the parallel photoelectric conversion devices to generate an electrical output signal. The sum of the current signals after addition is encoded in the electrical output signal.

[0028] Preferably, the input optical waveguide and the electrical bus are perpendicular to each other.

[0029] Preferably, the wavelengths of the optical input signals of the input optical waveguides in different rows are different or the same.

[0030] Preferably, the optical input signal has its optical power evenly distributed to each of the photonic computing units on the same row under the action of the waveguide coupling device.

[0031] Preferably, the number of columns of the input optical waveguide and the electrical bus is greater than or equal to 2.

[0032] Preferably, the electrical bus is a metal interconnect layer on the photonic computing chip.

[0033] The beneficial effects of the present invention are mainly reflected in:

[0034] (1) The basic computing unit area is small, and the mask template under the conventional wafer area can achieve the scale of the computing array at the application level; the modulation speed is fast, and the modulation speed can be increased to the nanosecond level through electric pulses, thereby improving the computing performance of the photonic computing chip, and at the same time will not cause temperature drift; each basic computing unit has only two electrodes, the number of wiring is small, and the design difficulty and packaging complexity are low;

[0035] (2) The optoelectronic hybrid computing array proposed in the present invention uses optoelectronic conversion devices and an electrical bus to sum the optical output signals with products of the photonic computing units on different rows. Firstly, the input power requirement of the light source is lower, and secondly, the wavelength requirement of the input light of different rows is also reduced. Therefore, the optoelectronic hybrid computing array of the present invention reduces the requirements for the light source to a certain extent, and can realize the integrated application of the light source and the photonic computing chip more quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The technical solution of the present invention will be further described below with reference to the accompanying drawings:

[0037] Figure 1 : A schematic flow chart of the optoelectronic hybrid computing method of the present invention;

[0038] Figure 2 : A schematic diagram of a preferred embodiment of the optoelectronic hybrid computing array of the present invention;

[0039] Figure 3 : Schematic diagram of a 3*3 optoelectronic hybrid computing array according to a preferred embodiment of the present invention;

[0040] Figure 4 : A schematic diagram of a second embodiment of the optoelectronic hybrid computing array of the present invention;

[0041] Figure 5 : A schematic diagram of a third embodiment of an optoelectronic hybrid computing array of the present invention;

[0042] Figure 6 : A schematic structural diagram of a photon computing unit according to a preferred embodiment of the present invention;

[0043] Figure 7 : Figure 6 Schematic diagram of the working principle of the photon computing unit for multiplication calculation. DETAILED DESCRIPTION

[0044] The present invention will be described in detail below with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments are not limited to the present invention, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0045] The present invention will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments.

[0046] The present invention provides an optoelectronic hybrid computing array for on-chip large-scale matrix multiplication operations, the specific structure of which is as follows: Figure 2 The preferred embodiment shown includes an optoelectronic hybrid computing unit, a waveguide coupling device 5, an input optical waveguide 31, and an electrical bus 32. The optoelectronic hybrid computing unit includes a photonic computing unit 1 and an optoelectronic conversion device 2.

[0047] The present invention utilizes the photon computing unit 1 for multiplication operations. The unit includes an optical waveguide 11 and a modulation element 12 optically coupled to the waveguide. The modulation element modifies the waveguide's transmission, reflection, refraction, or absorption properties based on its state. The modulation element's state can be adjusted by a written signal; the state is represented by the waveguide's absorption coefficient α or refractive index n. An optical input signal passes through the photon computing unit to generate the optical output signal, in which the product of the multiplier value and the multiplicand value is encoded.

[0048] In the present invention, the modulation element 12 includes three types.

[0049] like Figure 2 In the preferred embodiment shown, the modulation element 12(a) is an electro-optical modulator based on the light absorption effect. The electro-optical modulator uses an electrical signal as an external excitation, and changes the free carrier concentration in its doped region by injecting current or applying voltage to change the absorption coefficient α of the optical waveguide containing free carriers, so that the light signal passing through the optical waveguide is absorbed by the free carriers to realize multiplication operation.

[0050] The specific multiplication process is as follows Figure 6 、 Figure 7 As shown, the following steps are included:

[0051] S11, providing a write signal, encoding the multiplier value into the write signal 108;

[0052] S12, using the write signal 108 to map the multiplier value to the state of the doped region of the modulation element 12, wherein the state is represented by the absorption coefficient α of the optical waveguide to light under different free carrier concentrations;

[0053] S13, encoding the multiplied value into the optical input signal 106 of the photon computing unit;

[0054] S14 , when the optical input signal 106 passes through the optical waveguide 11 and the light absorption region of the modulation element 12 , an optical output signal 107 is generated, wherein the product of the multiplier value and the multiplicand value is encoded in the optical power of the optical output signal.

[0055] The write signal 108 for modulating the free carrier concentration in the element 12 is provided by the electrical signal generator 105. Two electrical interconnects in the metal layer of the electrical signal generator 105 transmit the generated electrical signal to the doped regions 103a and 103b of the modulating element 12 via the first contact electrode 104a and the second contact electrode 104b, respectively. The electrical signal causes the free carriers to move in a directional manner under the action of the electric field, and changes in the parameters of the electrical signal can change the free carrier concentration in the doped region, thereby changing the absorption coefficient of the free carrier-containing optical waveguide to light. The electro-optical modulator based on the light absorption effect includes a doped region based on semiconductor doping technology such as ion implantation or high-temperature diffusion, and a pair of contact electrodes that form ohmic contacts or Schottky contacts with the doped region.

[0056] The electrical signal generator 105 uses an external signal, i.e., a write signal 108, to map the multiplier value b to the optical absorption coefficient α of the free-carrier optical waveguide. The modulator element 12 injects current or applies voltage to change the free-carrier concentration (charge or hole) in the doped region, thereby altering the optical absorption coefficient α of the free-carrier optical waveguide. The energy Pwrite of the external electrical signal and the optical absorption coefficient α are mapped in the form of elementary or rational functions. The optical input signal 106 attenuates inversely proportional to the optical absorption coefficient α of the free-carrier optical waveguide, thereby generating an output signal 107 corresponding to the multiplication of the external electrical signal write signal 108 and the optical input signal 106. The output signal Pout = α × Pin of the optical waveguide 11 is the result of mapping the multiplier value b to α and the multiplicand value a to Pin.

[0057] Emerging photonic devices based on phase change materials have been widely studied in recent years. Phase change materials have the advantages of fast read and write speed (nanosecond level), high cycle number (>10 12 ), low power consumption, and is compatible with existing CMOS processes, with low technical implementation difficulty and industrial costs. Phase change materials have significant differences in optical and electrical properties between the crystalline and amorphous states, and can be induced to undergo phase changes through various means such as heat, light, and electricity, and have stable characteristics. Phase change materials do not require a static bias voltage to modulate light, and can maintain a certain state at room temperature. Therefore, the theoretical static control energy consumption of phase change materials is zero, which greatly reduces the energy consumption of the system and improves the stability of the system. These characteristics make phase change materials have the potential to become the basic functional materials for photonic computing.

[0058] like Figure 4In the second embodiment shown, the modulation element 12 (b) uses a phase change material 12' deposited on an optical waveguide; the phase change material 12' uses an optical signal as an external excitation (i.e., a write signal) to change its own state, and the state itself is manifested as a modification of the absorption coefficient α of the optical waveguide containing the phase change material 12' to light. The advantage of choosing a phase change material as a modulation element is that the phase change material is non-volatile and can remain in this state after the power is turned off after modulation, which is extremely suitable for application scenarios where artificial intelligence is used for reasoning. Due to the non-volatility of the phase change material, compared with the existing technical path of photonic computing chips, there is no maintenance power consumption, and it has an extremely high computing power energy consumption ratio.

[0059] Specifically, transmitting a light signal (e.g., a specific high-power light signal) as a write signal through an optical waveguide for a specific duration can alter the state of the phase-change material itself, modifying the absorption coefficient α of the optical waveguide containing the phase-change material. This reduces the light source requirements for optoelectronic hybrid computing arrays, enabling faster integration of light sources and photonic computing chips.

[0060] like Figure 5 In the third embodiment shown, the modulating element (c) is a modulator based on the phase change material. When optical signals are used for modulation, no doped regions are present. When electrical signals are used for modulation, doped regions are required. With this embodiment, either optical or electrical signals can be selectively used as write signals. The multiplication process for electrical signal modulation is similar to that of the preferred embodiment. The multiplication process for optical signal modulation is similar to that of the second embodiment and is therefore not further described.

[0061] Of course, the multiplication operation of the present invention can also be implemented by using the Mach-Zehnder interferometer (MZI) or micro-ring structure (MMR) in the prior art.

[0062] The photoelectric conversion device 2 is connected to the output side of the optical waveguide of the photonic computing unit 1, converting the optical output signal into a current signal, the magnitude of which is proportional to the power of the optical output signal. Therefore, the number and position of the photoelectric conversion devices 2 correspond one-to-one with the photonic computing units 1.

[0063] The optoelectronic hybrid computing array of the present invention adopts a crossbar switch matrix architecture (Crossbar); it is formed by a group of doped input optical waveguides 31 and a group of electrical buses 32. The optical input signal is transmitted through the input optical waveguides 31. The doped input optical waveguides 31 are arranged in parallel between rows, and the electrical buses 32 are arranged in parallel between columns. Preferably, the doped input optical waveguides and the electrical buses are perpendicular to each other. In the present invention, the number of columns of the doped input optical waveguides 31 and the electrical buses 32 is greater than or equal to 2.

[0064] There is a photonic computing unit 1 at the intersection of each input optical waveguide 31 and the electrical bus 32 in the crossbar switch matrix architecture. The input side of the optical waveguide 11 of each photonic computing unit 1 is coupled to the adjacent input optical waveguide 31 through a waveguide coupling device 5. The waveguide coupling device 5 evanescently couples a portion of the optical power from the adjacent input optical waveguide 31, wherein the coupled optical power depends on the length of the portion of the waveguide coupling device 5 that is placed as an adjacent input optical waveguide and extends parallel to the adjacent input optical waveguide.

[0065] The other side of the optical waveguide 11 is coupled to the adjacent electrical bus 32 through the photoelectric conversion device 2. Preferably, the electrical bus 32 is a metal interconnect layer on the photonic computing chip.

[0066] Each of the electrical buses 32 is connected to a number of parallel photoelectric conversion devices 2. The electrical bus 32 sums the corresponding number of current signals converted after passing through the parallel photoelectric conversion devices 2 to generate an electrical output signal. The sum of the current signals after addition is encoded in the electrical output signal.

[0067] The present invention is characterized by the use of a crossbar architecture to implement large-scale matrix multiplication and addition operations. That is, after the multiplication operation of the photon computing unit, the optical output signal with the product is converted into a current signal through the photoelectric conversion device and then summed on the electrical bus.

[0068] In a preferred embodiment, the wavelengths of the optical input signals in different rows of traveling waveguides 31 are different to prevent interference during addition operations, which could affect the accuracy of photon calculations. Because the present invention utilizes an optoelectronic hybrid computing architecture based on an electrical bus, the wavelengths of the light in different rows of traveling waveguides 31 can be the same, reducing the requirements for the light source wavelength.

[0069] Specific as Figure 1 and Figure 2 As shown, the present invention provides a method for performing matrix multiplication and addition operations in the optical domain. Briefly speaking, the method includes the following steps:

[0070] S1. Providing an optoelectronic hybrid computing unit, the optoelectronic hybrid computing unit comprising an interconnected photon computing unit and a photoelectric conversion device, the photon computing unit generating an optical output signal carrying encoded information; the photoelectric conversion device converting the optical output signal into a current signal, wherein the magnitude of the current signal is proportional to the power of the optical output signal;

[0071] S2. Provide an electrical bus to sum a corresponding number of current signals converted by a plurality of parallel-connected photoelectric conversion devices to generate an electrical output signal, wherein the sum of the current signals after addition is encoded in the electrical output signal.

[0072] This method realizes the calculation of the m×n order matrix P×U=A:

[0073]

[0074] The specific steps include:

[0075] (1) Encode the weight matrix U into the write signal, for example, input code U11 into the photon calculation unit in the first row and first column, input code U12 into the photon calculation unit in the first row and second column, input code U21 into the photon calculation unit in the second row and first column, and so on;

[0076] (2) using a write signal to map the multiplication value to the state of the modulation element 12 or 12' in each photon computing unit, wherein the state is represented by the absorption coefficient α of the optical waveguide 11 to light;

[0077] (3) Encoding the input data matrix P into an optical input signal. The optical input signal, under the action of the waveguide coupling device 5, has its optical power evenly distributed to each unit on the same row of input optical waveguides 31; for example, the input code P1 is input into the input optical waveguides in the first row, the input code P2 is input into the input optical waveguides in the second row, and so on;

[0078] (4) After the optical input signal passes through the optical waveguide 11 and the modulation element of the photon computing unit, an optical output signal is generated, wherein the product of the multiplier value and the multiplicand value is encoded in the optical output signal. The optical power of the optical output signal is converted into a current signal by the photoelectric conversion device and then fed into the electrical bus for summation. The magnitude of the current signal is proportional to the power of the optical output signal. The response of the optical output signal converted into a current signal is β. In practical applications, the value of β depends on the process level of the silicon photonic chip manufacturer.

[0079] For example, the power of the optical output signal of the first column is:

[0080]

[0081]

[0082] The common factor in the above formula is β / n. And so on.

[0083] Figure 3 A schematic diagram of a 3*3 optoelectronic hybrid computing array is disclosed to realize the calculation of a third-order matrix P×U=A.

[0084]

[0085] in:

[0086] 101-1, 101-2, 101-3: input optical waveguide;

[0087] 102-1, 102-2, 102-3: electrical bus;

[0088] P1, P2, P3: input (read) signal;

[0089] A1, A2, A3: electrical output signals;

[0090] U11, U12, U13, U21, U22, U23, U31, U32, U33: photon computing units for multiplication operations;

[0091] R11, R12, R13, R21, R22, R23, R31, R32, R33: waveguide coupling devices;

[0092] d11, d12, d13, d21, d22, d23, d31, d32, d33: photoelectric conversion devices;

[0093] According to the method of the present invention, the optical power output of the first column can be calculated as:

[0094]

[0095] The common factor in the above formula is β / 3.

[0096] The present invention adopts an optoelectronic hybrid computing array based on electrical bus summation. Compared with the photonic computing array based on optical bus summation, it does not have the losses caused by the cross-waveguide and column waveguide coupling devices themselves. At the same time, since there is no cross-transmission structure in the optical path, the wavelength requirement for the input light is also lower. The input channels can be of the same wavelength or different wavelengths.

[0097] The present invention injects current or applies voltage mainly in the form of electric pulses, and the duration of the electric pulses is at the nanosecond level. At the same time, the duration of the electric pulses determines the modulation speed of the optoelectronic hybrid computing array, and further determines the computing performance of the optoelectronic hybrid computing array; at the same time, it will not cause temperature drift.

[0098] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. An optoelectronic hybrid computing method for on-chip large-scale matrix multiplication operations, the optoelectronic hybrid computing method being applied to an optoelectronic hybrid computing array. The optoelectronic hybrid computing array employs a crossbar switch matrix architecture formed by a set of doped input optical waveguides and a set of electrical buses intersecting each other. The optoelectronic hybrid computing method is used to compute m×n matrices and is characterized by: The steps include: S1. Providing an optoelectronic hybrid computing unit, the optoelectronic hybrid computing unit comprising an interconnected photonic computing unit and a photoelectric conversion device, the photonic computing unit generating an optical output signal carrying encoded information; the photoelectric conversion device converting the optical output signal into an electric current signal, the magnitude of the electric current signal being proportional to the power of the optical output signal; and correspondingly, the electric bus being a metal interconnect layer on the photonic computing chip; Wherein, in step S1, "the photon computing unit generates a light output signal with coded information" specifically includes: S11, providing a write signal, and encoding the multiplier value into the write signal; S12. Mapping the multiplier value to the state of the photonic computing unit using the write signal, wherein the photonic computing unit includes an optical waveguide and a modulation element optically coupled to the optical waveguide, wherein the modulation element is a phase change material deposited on the optical waveguide, and the phase change material selects the optical signal as the write signal to change its state, wherein the state is manifested by modifying the absorption coefficient of the optical waveguide containing the phase change material to light; S13, encoding the multiplicand value into the optical input signal of the photon computing unit; the optical input signal generates the optical output signal after passing through the photon computing unit, wherein the product of the multiplicand value and the multiplicand value is encoded in the optical output signal; S2. Providing an electrical bus to sum a corresponding number of current signals converted by a plurality of parallel-connected photoelectric conversion devices to generate an electrical output signal, wherein the sum of the current signals is encoded in the electrical output signal; The summation process includes: ; Among them, A1 is the power of the first column of optical output signal, β / n is the common factor, P1, P2...P m is the input code in each row input optical waveguide, U 11 、U 21 ...U m1 Encode the input to the photon computation cells in each row in the first column; and so on.

2. The optoelectronic hybrid computing method according to claim 1, wherein: In step S1, "the photon computing unit generates an optical output signal with encoded information" is implemented using a Mach-Zehnder interferometer (MZI) or a microring structure (MMR).

3. An optoelectronic hybrid computing array for on-chip large-scale matrix multiplication operations, characterized by: The invention comprises a set of photonic computing units, each comprising an optical waveguide and a modulation element optically coupled to the optical waveguide, wherein the modulation element is a phase change material deposited on the optical waveguide. The phase change material selects an optical signal as a write signal to change its state, wherein the phase change material changes its state by modifying the absorption coefficient of the optical waveguide containing the phase change material to light. An optical input signal passes through the photonic computing unit to generate an optical output signal, wherein the product of a multiplier value and a multiplicand value is encoded in the optical output signal. a group of photoelectric conversion devices, connected one-to-one with the output sides of the optical waveguides of the photonic computing units, to convert the optical output signals into current signals, wherein the magnitude of the current signals is proportional to the power of the optical output signals; A crossbar switch matrix architecture; the crossbar switch matrix architecture is formed by a set of mutually parallel input optical waveguides and a set of mutually parallel electrical buses; the optical input signal is transmitted through the input optical waveguides, and the electrical bus is a metal interconnect layer on the photonic computing chip; There is a photonic computing unit at each intersection of an input optical waveguide and an electrical bus in the crossbar switch matrix architecture, the input side of the optical waveguide of each photonic computing unit is coupled to an adjacent input optical waveguide via a waveguide coupling device, the waveguide coupling device evanescently couples a portion of the optical power from the adjacent input optical waveguide, wherein the coupled optical power depends on the length of a portion of the waveguide coupling device that is positioned adjacent to and extends parallel to the adjacent input optical waveguide; Each of the electrical buses is connected to a plurality of parallel photoelectric conversion devices, and the electrical bus sums a corresponding number of current signals converted by the plurality of parallel photoelectric conversion devices to generate an electrical output signal, wherein the sum of the current signals after addition is encoded in the electrical output signal; The summation process includes: ; Among them, A1 is the power of the first column of optical output signal, β / n is the common factor, P1, P2...P m is the input code in each row input optical waveguide, U 11 、U 21 ...U m1 Encode the input to the photon computation cells in each row in the first column; and so on.

4. The optoelectronic hybrid computing array according to claim 3, wherein: The input optical waveguide and the electrical bus are perpendicular to each other.

5. The optoelectronic hybrid computing array according to claim 3, wherein: The wavelengths of light of the optical input signals of the input optical waveguides in different rows are different or the same.

6. The optoelectronic hybrid computing array according to claim 3, wherein: The optical input signal has its optical power evenly distributed to each of the photonic computing units on the same row under the action of the waveguide coupling device.

7. The optoelectronic hybrid computing array according to claim 3, wherein: The number of columns of the input optical waveguide and the electrical bus is greater than or equal to 2.

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