Chip identification method and device, and storage medium
By repeatedly reading and comparing the identification information of external chips and using FPGA registers to determine the number of identical chips, the problem of low chip type identification accuracy is solved, achieving efficient identification in dental imaging board scanners and reducing resource waste and time consumption.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GUILIN WOODPECKER MEDICAL INSTR CO LTD
- Filing Date
- 2023-07-27
- Publication Date
- 2026-04-28
AI Technical Summary
In existing technologies, the accuracy of chip type identification is not high enough, resulting in a waste of time or resources during the identification process. In particular, when different USB chips communicate with FPGAs via parallel port FIFO, the interface timing diagrams are inconsistent, leading to problems such as difficulty in debugging and incompatibility.
By repeatedly reading the external chip, the subsequent identification information is compared with the initial identification information to determine whether the number of matches exceeds the preset number. The chip type is determined based on the initial identification information, and the corresponding steps are executed using the registers in the FPGA to improve the identification accuracy.
It improves the accuracy of chip type identification, reduces storage space and identification time consumption, and solves the problems of difficult debugging and incompatibility of different USB chips in FPGA parallel port FIFO communication, especially in computer X-ray imaging technology sampling by dental imaging plate scanner.
Smart Images
Figure CN116956069B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic information technology, and more specifically, to a chip identification method, apparatus, and storage medium. Background Technology
[0002] In daily life and industrial production, we often encounter situations where external chips are connected. For example, when a device connects to a USB chip via a serial port, it is usually necessary to identify the type of the chip to ensure normal data communication between them.
[0003] Especially in computed X-ray imaging technology using medical scanners, communication between the host computer and the FPGA (Field-Programmable Gate Array) typically uses methods such as serial port, USB, PCIe, and Ethernet. Communication and transmission are usually achieved through a proprietary USB communication protocol chip using a FIFO interface protocol. When different USB communication chips are used, inconsistencies arise in the timing diagrams of different common interfaces in parallel FIFO communication within the FPGA. Therefore, conventional solutions often encounter problems such as difficulty in debugging and incompatibility. To adapt to different chips, accurate chip type identification is necessary.
[0004] Currently, the accuracy of chip type identification is not high enough, which can easily lead to a waste of time or resources during the identification process. Summary of the Invention
[0005] The purpose of this application is to provide a chip identification method, apparatus, and storage medium, which improves the chip identification accuracy by repeatedly reading the external chip and making judgments based on the reading results.
[0006] In a first aspect, this application provides a chip identification method, comprising: comparing subsequent identification information with initial identification information, and determining the number of identical entries in the subsequent identification information that match the initial identification information; wherein the initial identification information is obtained by first reading the chip's identification information, and the subsequent identification information is obtained by reading the chip's identification information after the initial reading of the chip; determining whether the number of identical entries exceeds a first preset number; if the number of identical entries exceeds the first preset number, then obtaining the chip identification result based on the chip type corresponding to the initial identification information.
[0007] The chip identification method described above improves the accuracy of chip type identification by repeatedly reading the external chip and comparing the subsequent identification information obtained through reading with the initial identification information. If the number of consistent results exceeds a first preset number, the chip type corresponding to the initial identification information is used as the identification result for that chip type.
[0008] In conjunction with the first aspect, optionally, the subsequent identification information includes first subsequent identification information; the step of comparing the subsequent identification information with the first identification information and determining the number of consistent items in the subsequent identification information that match the first identification information includes: obtaining the first identification information; reading the identification information of the chip to obtain the first subsequent identification information; comparing the first subsequent identification information with the first identification information and determining whether they match; if it is determined that the first subsequent identification information matches the first identification information, then updating the number of consistent items accordingly.
[0009] The aforementioned chip identification method compares subsequent identification information obtained from each subsequent chip read with the initial identification information in real time after the initial read is completed. The number of matches is updated in real time based on the comparison results, and the final identification result for the chip type is derived based on the final number of matches. This eliminates the need to store each read result during the identification process and perform a final comparison, reducing storage space usage and identification time consumption.
[0010] In conjunction with the first aspect, optionally, the subsequent identification information further includes second subsequent identification information, wherein the reading order of the second subsequent identification information is adjacent to the reading order of the first subsequent identification information; the step of comparing the subsequent identification information with the first identification information and determining the number of consistent items in the subsequent identification information that match the first identification information further includes: if it is determined that the first subsequent identification information is inconsistent with the first identification information, then reading the identification information of the chip to obtain the second subsequent identification information; comparing the second subsequent identification information with the first identification information and determining whether they are consistent; if it is determined that the second subsequent identification information is consistent with the first identification information, then updating the number of consistent items accordingly.
[0011] The chip identification method described above, by further determining whether the second subsequent identification information obtained in the next adjacent step is consistent with the first identification information when the first subsequent identification information is inconsistent with the first identification information, and by updating the number of consistent information when the second subsequent identification information is consistent with the first identification information, reduces the impact of accidental reasons in the chip identification process and ensures the accuracy of chip identification to a certain extent.
[0012] In conjunction with the first aspect, optionally, the step of comparing the subsequent identification information with the initial identification information and determining the number of consistent information in the subsequent identification information that is consistent with the initial identification information further includes: if it is determined that the second subsequent identification information is inconsistent with the initial identification information, then further determining whether the second subsequent identification information is consistent with the first subsequent identification information; if it is determined that the second subsequent identification information is consistent with the first subsequent identification information, then updating the initial identification information with the first subsequent identification information.
[0013] The aforementioned chip identification method further improves the accuracy of chip identification by determining whether the second subsequent identification information matches the first subsequent identification information when the second subsequent identification information is inconsistent with the first subsequent identification information. If the second subsequent identification information matches the first subsequent identification information, the first subsequent identification information is used as the first identification information to continue identifying the chip.
[0014] In conjunction with the first aspect, optionally, the subsequent identification information further includes third subsequent identification information, wherein the reading order of the third subsequent identification information is adjacent to the reading order of the second subsequent identification information; the step of comparing the subsequent identification information with the initial identification information and determining the number of consistent information in the subsequent identification information that matches the initial identification information further includes: if it is determined that the second subsequent identification information is inconsistent with the first subsequent identification information, then reading the identification information of the chip to obtain the third subsequent identification information; determining whether the third subsequent identification information is consistent with the second subsequent identification information; if it is determined that the second subsequent identification information is consistent with the second subsequent identification information, then updating the initial identification information with the second subsequent identification information.
[0015] The aforementioned chip identification method, when the second subsequent identification information is inconsistent with the first subsequent identification information, further determines whether the third subsequent identification information is consistent with the second subsequent identification information. If the third subsequent identification information is consistent with the second subsequent identification information, the second subsequent identification information is used as the initial identification information to continue identifying the chip. This further improves the accuracy of chip identification.
[0016] In conjunction with the first aspect, the method may optionally further include: stopping the identification of the chip when the number of subsequent identification information reaches a second preset number.
[0017] The chip identification method described above reduces resource waste by setting a time limit for chip identification to stop after a certain number of reads.
[0018] In conjunction with the first aspect, optionally, the method is applied to a register in a field-programmable gate array (FPGA); the FPGA has an interface for connecting to the chip; wherein the initial identification information is specifically determined by first acquiring the level value of the interface, and the subsequent identification information is specifically determined by acquiring the level value of the interface after the initial acquisition of the interface level value.
[0019] The chip identification method described above can be applied to FPGA by applying the chip identification method provided in the embodiments of this application. This enables the identification of chips connected to the FPGA, thereby effectively solving the problems of difficulty in debugging and incompatibility, especially in computer X-ray imaging technology that uses dental imaging plate scanners for sampling. These problems arise because the timing diagrams of different common interfaces of different USB chips in parallel port FIFO communication on the FPGA are inconsistent.
[0020] In conjunction with the first aspect, optionally, the register includes a first register, a second register, and a third register; the step of comparing subsequent identification information with initial identification information and determining the number of consistent entries in the subsequent identification information that match the initial identification information includes: comparing the subsequent identification information with the initial identification information by the first register; determining the number of consistent entries in the subsequent identification information that match the initial identification information by the second register; the step of determining whether the number of consistent entries exceeds a first preset number includes: determining whether the number of consistent entries exceeds the first preset number by the second register; the step of obtaining the chip identification result based on the chip type corresponding to the initial identification information includes: obtaining the chip identification result based on the chip type corresponding to the initial identification information by the third register.
[0021] The chip identification method described above uses different registers in the FPGA to perform corresponding steps, enabling the registers to be quickly deployed in the optimal location in the hardware, thereby improving the efficiency of chip type identification.
[0022] Secondly, this application also provides a chip identification device, including: a comparison module, a judgment module, and an identification module; wherein, the comparison module is used to compare subsequent identification information with initial identification information and determine the number of consistent entries in the subsequent identification information that match the initial identification information; wherein, the initial identification information is obtained by first reading the chip's identification information, and the subsequent identification information is obtained by reading the chip's identification information after the initial reading of the chip; the judgment module is used to determine whether the number of consistent entries exceeds a first preset number; the identification module is used to determine the chip identification result based on the chip type corresponding to the initial identification information if it is determined that the number of consistent entries exceeds the first preset number.
[0023] The chip identification device described above has the same beneficial effects as the chip identification method provided by the first aspect or any optional embodiment of the first aspect, and will not be elaborated here.
[0024] Thirdly, embodiments of this application also provide an electronic device, including: a processor and a memory, the memory storing machine-readable instructions executable by the processor, which, when executed by the processor, perform the method described above.
[0025] The aforementioned electronic device has the same beneficial effects as the chip identification method provided by the first aspect or any alternative embodiment of the first aspect, which will not be elaborated here.
[0026] Fourthly, embodiments of this application also provide a storage medium, the storage medium including a computer-readable storage medium on which a computer program is stored, the computer program being executed by a processor to perform the methods described above.
[0027] The aforementioned storage medium has the same beneficial effects as the chip identification method provided by the first aspect or any alternative embodiment of the first aspect, and will not be elaborated here.
[0028] In summary, the chip identification method, apparatus, and storage medium provided in this application improve the accuracy of chip type identification by repeatedly reading the external chip and determining the chip type based on the comparison results. Specifically, comparing each subsequent identification information obtained with the initial identification information, or comparing adjacent subsequent identification information, and determining the chip type based on the comparison results further improves the accuracy of chip identification. In particular, applying the chip identification method, apparatus, and storage medium provided in this application to an FPGA enables the identification of chips connected to the FPGA, thus effectively solving problems such as difficulty in debugging and incompatibility, especially in computed X-ray imaging technology sampling by medical scanners (e.g., dental imaging plate scanners), due to inconsistent timing diagrams of different common interfaces for parallel port FIFO communication of different USB chips on the FPGA. Attached Figure Description
[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 A first flowchart of a chip identification method provided in an embodiment of this application;
[0031] Figure 2 A detailed flowchart of step S120 in the chip identification method provided in this application embodiment;
[0032] Figure 3 A second flowchart illustrating the chip identification method provided in this application embodiment;
[0033] Figure 4 A functional block diagram of the chip identification device provided in the embodiments of this application;
[0034] Figure 5 The present application provides a schematic diagram of the structure of an electronic device. Detailed Implementation
[0035] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this application.
[0037] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.
[0038] Please refer to Figure 1 , Figure 1 This is a first flowchart of a chip identification method provided in this application embodiment. The chip identification method provided in this application embodiment may include:
[0039] Step S120: Compare the subsequent identification information with the initial identification information and determine the number of instances in the subsequent identification information that match the initial identification information. The initial identification information is obtained by reading the chip's identification information for the first time, and the subsequent identification information is obtained by reading the chip's identification information after the initial chip reading.
[0040] Step S140: Determine whether the number of identical items exceeds the first preset number.
[0041] If the number of identical values exceeds the first preset number, then step S160 is executed: the chip identification result is obtained based on the chip type corresponding to the initial identification information.
[0042] In steps S120 to S160 above, the identification information characterizing the chip type can be read several times. The chip information obtained from the first read can be used as the initial identification information, and the information obtained from subsequent reads can be used as subsequent identification information. These subsequent identification information pieces are compared one by one with the initial identification information, and a comparison result is obtained for each subsequent identification information. These comparison results include: subsequent identification information is inconsistent with the initial identification information, and subsequent identification information is consistent with the initial identification information. The number of comparison results indicating consistency is recorded.
[0043] For example, in 50 reads of the chip, typically one initial identification message and 49 subsequent identification messages are obtained. The preset first number is 40. After comparison, if the number of matching results is 41, then the chip type corresponding to the initial identification message can be used as the identification result for that chip type.
[0044] In this embodiment of the application, determining whether the number of consistent entries exceeds the first preset number can be the number of consecutive entries where subsequent identification information matches the initial identification information during the chip reading process; or it can be the cumulative number of entries where subsequent identification information matches the initial identification information during several chip reading processes.
[0045] In the above implementation process, by reading the external chip multiple times and comparing the subsequent identification information obtained by reading with the initial identification information, if the number of consistent results exceeds a first preset number, the chip type corresponding to the initial identification information is used as the identification result for that chip type, thereby improving the accuracy of chip type identification.
[0046] Please refer to Figure 2 , Figure 2 This is a flowchart illustrating step S120 of the chip identification method provided in this application embodiment. In some optional implementations, subsequent identification information may include first subsequent identification information.
[0047] Accordingly, step S120 may include:
[0048] Step S1201: Obtain initial identification information.
[0049] Step S1202: Read the chip's identification information to obtain the first subsequent identification information.
[0050] Step S1203: Compare the first subsequent identification information with the first identification information and determine whether they are consistent.
[0051] If the first subsequent identification information is determined to be consistent with the first identification information, then step S1204 is executed: update the corresponding number of consistent information.
[0052] It is worth mentioning that the aforementioned first subsequent identification information can be obtained at any subsequent reading after the initial reading of the chip. That is, in steps S1201 to S1204, during several readings of the chip, the obtained subsequent identification information is compared with the initial identification information after each reading. If the subsequent identification information obtained in that reading matches the initial identification information, the number of matches is accumulated.
[0053] For example, the first subsequent identification information is obtained from the 20th read of the chip. During the previous 19 reads of the chip, the number of consistent entries was 15. After comparison, the first subsequent identification information obtained from the 20th read of the chip is consistent with the initial identification information, so the number of consistent entries is updated to 16 accordingly.
[0054] In the above implementation, after the initial reading of the chip, each subsequent reading of the chip is compared with the initial identification information in real time. The number of matches is updated in real time based on the comparison results, and the identification result for the chip type is derived based on the final number of matches. This eliminates the need to store each reading result during the identification process and then compare them one by one, reducing storage space usage and identification time consumption.
[0055] Please continue to refer to Figure 2 In some optional implementations, the subsequent identification information may further include second subsequent identification information, wherein the reading order of the second subsequent identification information is adjacent to the reading order of the first subsequent identification information.
[0056] In other words, the aforementioned second subsequent identification information is obtained in the next adjacent read after the first subsequent identification information is obtained by reading the chip.
[0057] Accordingly, step S120 may also include:
[0058] If it is determined that the first subsequent identification information is inconsistent with the first identification information, then step S1205 is executed: read the chip's identification information to obtain the second subsequent identification information.
[0059] Step S1206: Compare the second subsequent identification information with the first identification information and determine whether they are consistent.
[0060] If the second subsequent identification information is determined to be consistent with the first identification information, then step S1207 is executed: update the corresponding number of consistent information.
[0061] In steps S1205 to S1207, if the first subsequent identification information is inconsistent with the first identification information, it is further determined whether the second subsequent identification information obtained in the next adjacent step is consistent with the first identification information. If the second subsequent identification information is consistent with the first identification information, it means that even if one subsequent identification information is read that is inconsistent with the first identification information, no adjacent subsequent identification information has yet also become inconsistent with the first identification information. This usually indicates that the inconsistency between individual subsequent identification information and the first identification information may be due to accidental reasons such as poor chip contact caused by external factors. Therefore, this situation can be ignored, and the number of consistent information is updated again when the second subsequent identification information is consistent with the first identification information.
[0062] In the above implementation process, if the first subsequent identification information is inconsistent with the first identification information, it is further determined whether the second subsequent identification information obtained in the next adjacent step is consistent with the first identification information. If the second subsequent identification information is consistent with the first identification information, the number of consistent information is updated. This reduces the impact of accidental reasons in the chip identification process and ensures the accuracy of chip identification to a certain extent.
[0063] Please continue to refer to Figure 2 In some optional implementations, step S120 may further include:
[0064] If it is determined that the second subsequent identification information is inconsistent with the first identification information, then step S1208 is executed: further determine whether the second subsequent identification information is consistent with the first subsequent identification information.
[0065] If it is determined that the second subsequent identification information is consistent with the first subsequent identification information, then step S1209 is executed: update the first identification information with the first subsequent identification information.
[0066] For example, during the chip identification process, the chip type corresponding to the initial identification information is type A. The chip type corresponding to the subsequent identification information (i.e., the first subsequent identification information) obtained in a subsequent identification is type B. The chip type corresponding to the subsequent identification information (i.e., the second subsequent identification information) obtained in the next identification is still type B. That is, the first and second subsequent identification information obtained through two consecutive reads are consistent, but neither is consistent with the initial identification information. In this case, a high probability is that the information obtained from the first or previous reads of the chip is incorrect. Therefore, the first subsequent identification information can be used as the initial identification information, and the method steps described in the previous embodiments can continue to be executed.
[0067] In the above implementation process, if the second subsequent identification information is inconsistent with the first identification information, it is further determined whether the second subsequent identification information is consistent with the first subsequent identification information. If the second subsequent identification information is consistent with the first subsequent identification information, the first subsequent identification information is used as the first identification information to continue identifying the chip. This further improves the accuracy of chip identification.
[0068] Please continue to refer to Figure 2 In some optional implementations, the subsequent identification information may further include third subsequent identification information, the reading order of which is adjacent to the reading order of the second subsequent identification information.
[0069] In other words, the aforementioned third subsequent identification information is obtained in the next adjacent read after the second subsequent identification information is obtained through the reading chip.
[0070] Accordingly, step S120 may also include:
[0071] If it is determined that the second subsequent identification information is inconsistent with the first subsequent identification information, then step S1210 is executed: read the identification information of the chip to obtain the third subsequent identification information;
[0072] Step S1211: Determine whether the third subsequent identification information is consistent with the second subsequent identification information;
[0073] If it is determined that the second subsequent identification information is consistent with the second subsequent identification information, then step S1212 is executed: update the first identification information with the second subsequent identification information.
[0074] Continuing with the example from the previous embodiment, if the second subsequent identification information is inconsistent with the first subsequent identification information, and the subsequently obtained third subsequent identification information is consistent with the second subsequent identification information, it generally indicates that the first subsequent identification information and the chip information previously read are likely incorrect. Therefore, the second subsequent identification information can be used as the initial identification information, and the method steps described in the previous embodiments can continue to be executed.
[0075] In the above implementation process, if the second subsequent identification information is inconsistent with the first subsequent identification information, it is further determined whether the third subsequent identification information is consistent with the second subsequent identification information. If the third subsequent identification information is consistent with the second subsequent identification information, the second subsequent identification information is used as the initial identification information to continue identifying the chip. This further improves the accuracy of chip identification.
[0076] In some optional implementations, the chip identification method provided in this application embodiment may further include:
[0077] Step S180: Stop recognizing the chip when the number of subsequent identification information reaches the second preset number.
[0078] In other words, once the number of times the chip has been read reaches a certain threshold, the chip recognition process will stop.
[0079] For example, the first preset number is 49. Accordingly, after reading the chip 50 times, the chip identification can be stopped regardless of whether the chip type is identified. In this way, for some cases where the chip cannot be identified due to faults or other reasons, timely stopping the identification process can reduce resource waste.
[0080] Optionally, during the chip identification process, the total duration for reading the chip can be set, such as 0.5s, 1s, etc. The time interval between each read can also be set, such as 5ms, 10ms, etc.
[0081] In the above implementation process, by setting the chip recognition to stop after a certain number of reads, resource waste is reduced.
[0082] In some optional implementations, the chip identification method provided in this application can be applied to registers in a Field Programmable Gate Array (FPGA). The FPGA has an interface for connecting chips.
[0083] Specifically, the initial identification information is determined by acquiring the interface's voltage level for the first time, while subsequent identification information is determined by acquiring the interface's voltage level after the initial acquisition.
[0084] For example, when different USB chips are connected to the FPGA chip's I / O interface, the I / O interface level will be pulled up or down to different degrees, and correspondingly, different code values will be recorded in the register. The aforementioned level value can then be determined based on the code value corresponding to the register, thereby determining the initial identification information.
[0085] Similarly, subsequent identification information can be determined in a similar manner.
[0086] In the above implementation process, by applying the chip identification method provided in the embodiments of this application to FPGA, the identification of chips connected to FPGA is realized, thereby effectively solving the problems of difficult debugging and incompatibility, especially in computer X-ray imaging technology that uses dental imaging plate scanners for sampling, due to the inconsistency of different common interface timing diagrams of different USB chips in parallel port FIFO communication on FPGA.
[0087] In some alternative implementations, the register may include a first register, a second register, and a third register.
[0088] Accordingly, step S120 may include:
[0089] Step S1213: The first register compares the subsequent identification information with the initial identification information.
[0090] Step S1214: The second register determines the number of identical information in the subsequent identification information that matches the initial identification information.
[0091] Accordingly, step S140 may include:
[0092] Step S1401: Determine whether the number of identical records exceeds the first preset number using the second register.
[0093] Accordingly, step S160 may include:
[0094] Step S1601: The third register obtains the chip identification result based on the chip type corresponding to the initial identification information.
[0095] In the above implementation process, the corresponding steps are executed by different registers in the FPGA, which enables the registers to be quickly deployed in the optimal position of the hardware, ultimately improving the efficiency of chip type identification.
[0096] For easier understanding, please refer to Figure 3 , Figure 3 This is a second flowchart of the chip identification method provided in this application. This application also provides another more detailed embodiment.
[0097] In the diagram, register usb_arbitrate_io[1:0] is used to determine the code value of the register when the corresponding I / O port level is pulled high or low when connected to the FPGA chip I / O port via different USB chips on the hardware circuit platform; register reg_arbitrate_code1: records the information code value of usb_arbitrate_io[1:0] on the first power-on; register reg_arbitrate_code2: caches the value of usb_arbitrate_io[1:0] in the register every 10ms; register reg_arbitrate_code3: when When the values of registers reg_arbitrate_code2 and reg_arbitrate_code1 do not match, the current usb_arbitrate_io[1:0] is cached in register reg_arbitrate_code3; register usb_arbitrate_io_first: records the information code value of usb_arbitrate_io[1:0] on the first power-on; register reg_arbitrate_error: caches the number of errors with different code values; register reg_arbitrate_check: caches the number of correct times with the same code value.
[0098] Please refer to Figure 4 , Figure 4 This is a functional block diagram of the chip identification device 400 provided in an embodiment of this application. Based on the same concept, the chip identification device 400 provided in an embodiment of this application may include: a comparison module 410, a judgment module 420, and an identification module 430.
[0099] The comparison module 410 can be used to compare the subsequent identification information with the initial identification information and determine the number of consistent information in the subsequent identification information. The initial identification information is obtained by reading the chip's identification information for the first time, and the subsequent identification information is obtained by reading the chip's identification information after the initial chip reading.
[0100] The judgment module 420 can be used to determine whether the number of identical items exceeds the first preset number.
[0101] The identification module 430 can be used to determine the chip identification result based on the chip type corresponding to the initial identification information if the number of identical chips exceeds a first preset number.
[0102] Please continue to refer to Figure 4 In some optional implementations, the subsequent identification information may include first subsequent identification information.
[0103] Accordingly, in the process of comparing the subsequent identification information with the initial identification information and determining the number of consistent information in the subsequent identification information, the comparison module 410 can be specifically used to: obtain the initial identification information; read the identification information of the chip to obtain the first subsequent identification information; compare the first subsequent identification information with the initial identification information and determine whether the two are consistent; if it is determined that the first subsequent identification information is consistent with the initial identification information, then update the number of consistent information accordingly.
[0104] Please continue to refer to Figure 4 In some optional implementations, the subsequent identification information may further include second subsequent identification information, wherein the reading order of the second subsequent identification information is adjacent to the reading order of the first subsequent identification information.
[0105] Accordingly, in the process of comparing the subsequent identification information with the initial identification information and determining the number of consistent information in the subsequent identification information, the comparison module 410 can also be used to: if it is determined that the first subsequent identification information is inconsistent with the initial identification information, then read the chip's identification information to obtain the second subsequent identification information; compare the second subsequent identification information with the initial identification information and determine whether they are consistent; if it is determined that the second subsequent identification information is consistent with the initial identification information, then update the number of consistent information accordingly.
[0106] Please continue to refer to Figure 4 In some optional implementations, in the process of comparing subsequent identification information with initial identification information and determining the number of consistent information in subsequent identification information that is consistent with initial identification information, the comparison module 410 may also be used to: if it is determined that the second subsequent identification information is inconsistent with the initial identification information, then further determine whether the second subsequent identification information is consistent with the first subsequent identification information; if it is determined that the second subsequent identification information is consistent with the first subsequent identification information, then update the initial identification information with the first subsequent identification information.
[0107] Please continue to refer to Figure 4 In some optional implementations, the subsequent identification information may further include third subsequent identification information, the reading order of which is adjacent to the reading order of the second subsequent identification information.
[0108] Accordingly, in the process of comparing the subsequent identification information with the first identification information and determining the number of consistent information in the subsequent identification information that is consistent with the first identification information, the comparison module 410 can also be used to: if it is determined that the second subsequent identification information is inconsistent with the first subsequent identification information, then read the chip's identification information to obtain the third subsequent identification information; determine whether the third subsequent identification information is consistent with the second subsequent identification information; if it is determined that the second subsequent identification information is consistent with the second subsequent identification information, then update the first identification information with the second subsequent identification information.
[0109] In some optional implementations, the identification device 400 provided in this application embodiment may further include a stop module 440, which can be used to stop the identification of the chip when the number of subsequent identification information reaches a second preset number.
[0110] In some alternative implementations, the identification device 400 provided in this application embodiment should be usable as a register in a field-programmable gate array (FPGA); the FPGA has an interface that can be used to connect to a chip.
[0111] Specifically, the initial identification information is determined by acquiring the interface's voltage level for the first time, while subsequent identification information is determined by acquiring the interface's voltage level after the initial acquisition.
[0112] In some alternative implementations, the register may include a first register, a second register, and a third register.
[0113] Accordingly, in the process of comparing subsequent identification information with initial identification information and determining the number of consistent information in subsequent identification information that matches the initial identification information, the comparison module 410 can be specifically used to: compare subsequent identification information with initial identification information using a first register; and determine the number of consistent information in subsequent identification information that matches the initial identification information using a second register.
[0114] In the process of determining whether the number of identical items exceeds the first preset number, the determination module 420 can specifically be used to: use the second register to determine whether the number of identical items exceeds the first preset number.
[0115] In the process of obtaining the chip identification result based on the chip type corresponding to the initial identification information, the identification module 430 can specifically be used to: obtain the chip identification result based on the chip type corresponding to the initial identification information using the third register.
[0116] It should be understood that this device corresponds to the chip identification method embodiment described above and is capable of performing the various steps involved in the above method embodiment. The specific functions of this device can be found in the description above, and detailed descriptions are omitted here to avoid repetition. The device includes at least one software functional module that can be stored in memory or embedded in the device's operating system (OS) in the form of software or firmware.
[0117] Based on the same inventive concept, please refer to Figure 5 , Figure 5 This is a schematic diagram of the structure of an electronic device 500 provided in an embodiment of this application. The electronic device 500 may include a memory 511, a memory controller 512, a processor 513, a peripheral interface 514, an input / output unit 515, and a display unit 516. Those skilled in the art will understand that... Figure 5 The structure shown is for illustrative purposes only and does not limit the structure of the electronic device 500. For example, the electronic device 500 may also include components that are more... Figure 5 The more or fewer components shown, or having the same Figure 5 The different configurations shown.
[0118] The aforementioned memory 511, memory controller 512, processor 513, peripheral interface 514, input / output unit 515, and display unit 516 are electrically connected directly or indirectly to each other to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines. The aforementioned processor 513 is used to execute executable modules stored in the memory.
[0119] The memory 511 can be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), etc. The memory 511 stores programs, and the processor 513 executes these programs upon receiving execution instructions. The methods executed by the electronic device 500, as defined in any embodiment of this application, can be applied to or implemented by the processor 513.
[0120] The aforementioned processor 513 may be an integrated circuit chip with signal processing capabilities. The processor 513 may be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it may also be a digital signal processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor.
[0121] The peripheral interface 514 described above couples various input / output devices to the processor 513 and the memory 511. In some embodiments, the peripheral interface 514, the processor 513, and the memory controller 512 can be implemented in a single chip. In other instances, they can be implemented by separate chips.
[0122] The input / output unit 515 described above is used to provide user input data. The input / output unit 515 may be, but is not limited to, a mouse and a keyboard.
[0123] The aforementioned display unit 516 provides an interactive interface (e.g., a user interface) between the electronic device 500 and the user, or displays image data for the user's reference. In this embodiment, the display unit can be a liquid crystal display (LCD) or a touch display. If it is a touch display, it can be a capacitive touchscreen or a resistive touchscreen that supports single-point and multi-point touch operations. Supporting single-point and multi-point touch operations means that the touch display can sense touch operations generated simultaneously from one or more locations on the touch display and pass the sensed touch operations to the processor for calculation and processing.
[0124] The electronic device 500 in this embodiment can be used to perform the various steps in the various methods provided in the embodiments of this application.
[0125] This application also provides a storage medium, which includes a computer-readable storage medium. A computer program is stored on the computer-readable storage medium, and the computer program is executed by a processor to perform the methods described above.
[0126] The computer-readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0127] In summary, the chip identification method, apparatus, and storage medium provided in the various embodiments of this application improve the accuracy of chip type identification by repeatedly reading external chips and determining the chip type based on the comparison results. Specifically, comparing each subsequent identification information obtained with the initial identification information, or comparing adjacent subsequent identification information, and determining the chip type based on the comparison results further improves the accuracy of chip identification. In particular, applying the chip identification method, apparatus, and storage medium provided in the various embodiments of this application to an FPGA enables the identification of chips connected to the FPGA, thereby effectively solving problems such as difficulty in debugging and incompatibility, especially in computed X-ray imaging technology using dental imaging plate scanners, where different USB chips have inconsistent timing diagrams for parallel port FIFO communication on the FPGA.
[0128] It should be understood that the disclosed apparatus and methods can also be implemented in other ways, given the several embodiments provided in this application. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0129] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.
[0130] The above description is only an optional implementation of the embodiments of this application, but the protection scope of the embodiments of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the embodiments of this application should be covered within the protection scope of the embodiments of this application.
Claims
1. A method for identifying a chip, characterized in that, include: The subsequent identification information is compared with the initial identification information, and the number of identical entries in the subsequent identification information is determined; wherein, the initial identification information is obtained by reading the chip's identification information for the first time, and the subsequent identification information is obtained by reading the chip's identification information after the initial reading of the chip; Determine whether the number of identical items exceeds a first preset number; If the number of identical chips exceeds the first preset number, the chip identification result is obtained based on the type of chip corresponding to the initial identification information.
2. The method according to claim 1, characterized in that, in, The subsequent identification information includes first subsequent identification information; The step of comparing subsequent identification information with initial identification information and determining the number of instances in subsequent identification information that match the initial identification information includes: Obtain the initial identification information; Read the chip's identification information to obtain the first subsequent identification information; The first subsequent identification information is compared with the first identification information, and it is determined whether the two are consistent. If it is determined that the first subsequent identification information is consistent with the first identification information, then the corresponding number of consistent information is updated.
3. The method according to claim 2, characterized in that, in, The subsequent identification information also includes second subsequent identification information, and the reading order of the second subsequent identification information is adjacent to the reading order of the first subsequent identification information; The step of comparing subsequent identification information with initial identification information and determining the number of identical entries in subsequent identification information that match the initial identification information further includes: If it is determined that the first subsequent identification information is inconsistent with the first identification information, then the identification information of the chip is read to obtain the second subsequent identification information; The second subsequent identification information is compared with the first identification information, and it is determined whether the two are consistent. If the second subsequent identification information is determined to be consistent with the first identification information, then the corresponding number of consistent information is updated.
4. The method according to claim 3, characterized in that, The step of comparing subsequent identification information with initial identification information and determining the number of identical entries in subsequent identification information that match the initial identification information further includes: If it is determined that the second subsequent identification information is inconsistent with the first identification information, then it is further determined whether the second subsequent identification information is consistent with the first subsequent identification information; If it is determined that the second subsequent identification information is consistent with the first subsequent identification information, then the first subsequent identification information is used to update the initial identification information.
5. The method according to claim 4, characterized in that, in, The subsequent identification information also includes third subsequent identification information, and the reading order of the third subsequent identification information is adjacent to the reading order of the second subsequent identification information; The step of comparing subsequent identification information with initial identification information and determining the number of identical entries in subsequent identification information that match the initial identification information further includes: If it is determined that the second subsequent identification information is inconsistent with the first subsequent identification information, then the identification information of the chip is read to obtain the third subsequent identification information; Determine whether the third subsequent identification information is consistent with the second subsequent identification information; If the third subsequent identification information is determined to be consistent with the second subsequent identification information, then the first identification information is updated with the second subsequent identification information.
6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: When the number of subsequent identification information reaches a second preset number, the identification of the chip is stopped.
7. The method according to any one of claims 1 to 5, characterized in that, The method is applied to registers in a field-programmable gate array (FPGA); the FPGA has an interface for connecting the chip. Specifically, the initial identification information is determined by first acquiring the voltage level of the interface, and the subsequent identification information is determined by acquiring the voltage level of the interface after the initial acquisition of the interface voltage level.
8. The method according to claim 7, characterized in that, in, The registers include a first register, a second register, and a third register; The step of comparing subsequent identification information with initial identification information and determining the number of identical entries in the subsequent identification information that match the initial identification information includes: comparing the subsequent identification information with the initial identification information by the first register; and determining the number of identical entries in the subsequent identification information that match the initial identification information by the second register. The step of determining whether the number of identical items exceeds a first preset number includes: determining whether the number of identical items exceeds a first preset number by using the second register; The step of obtaining the chip identification result based on the chip type corresponding to the initial identification information includes: obtaining the chip identification result by the third register based on the chip type corresponding to the initial identification information.
9. A chip identification device, characterized in that, include: The module includes a comparison module, a judgment module, and a recognition module. The comparison module is used to compare subsequent identification information with the initial identification information and determine the number of identical entries in the subsequent identification information that match the initial identification information; wherein the initial identification information is obtained by reading the chip's identification information for the first time, and the subsequent identification information is obtained by reading the chip's identification information after the initial reading of the chip; The judgment module is used to determine whether the number of identical items exceeds a first preset number; The identification module is used to determine the chip identification result based on the chip type corresponding to the initial identification information if it is determined that the number of identical chips exceeds the first preset number.
10. A storage medium, characterized in that, The storage medium includes a computer-readable storage medium; the computer-readable storage medium stores a computer program that, when executed by a processor, performs the method as described in any one of claims 1 to 8.
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