A load modulation power amplifier and a corresponding electronic device

Abstract

The present invention discloses a load modulation power amplifier and a corresponding electronic device. The load modulation power amplifier includes a driver stage power amplifier and its bias circuit, an input power divider, a harmonic impedance controller, a main path power amplifier and its bias circuit, a secondary path power amplifier and its bias circuit, and a load modulation combiner. Among them, the driver stage power amplifier is provided with a bias circuit with enhanced transconductance, the main path power amplifier is provided with a bias circuit with adjustable phase, and the secondary path power amplifier is provided with a bias circuit with controllable turn-on power point. Cooperating with a harmonic impedance matching circuit and a load modulation combiner with low insertion loss, each unit works together to achieve the linearization and high efficiency of the load modulation power amplifier, which can well meet the requirements of practical applications.

Description

Technical Field

[0001] The present invention relates to a load - modulated power amplifier, and also relates to an electronic device including the load - modulated power amplifier, belonging to the technical field of radio - frequency integrated circuits. Background Art

[0002] In some specific radio - frequency power amplifier applications, such as satellite communication, walkie - talkies, etc., it is necessary to improve the output power and efficiency of the power amplifier in a mobile device. Since it is necessary to transmit modulation signals, the power amplifier needs to ensure the linearity of the output signal within the rated power range. At the same time, it is desired to improve the reliability and service life of the mobile device as much as possible, reduce power consumption and lower the device temperature.

[0003] In the prior art, the design of radio - frequency power amplifiers is based on class - A or class - AB power amplifiers, and power back - off is used to obtain better linearity. However, the efficiency of class - A or class - AB power amplifiers at the back - off power is low, resulting in high power consumption and device temperature of the power amplifier. The main advantage of a load - modulated power amplifier is to improve the efficiency value at the back - off power, but its linearity is limited by the change of the load line of the main - path power amplifier and the switching of the operating state of the auxiliary - path power amplifier, making the linearity of the load - modulated power amplifier poor at the output power back - off. It needs to cooperate with the digital pre - distortion algorithm of the transceiver to obtain better linearity. However, the transceiver on the mobile device is limited by the process and power consumption, generally does not provide a digital pre - distortion algorithm, or the provided digital pre - distortion algorithm has limited capabilities, making the application of this load - modulated power amplifier limited by linearity.

[0004] Therefore, how to overcome the above - mentioned problems and provide a load - modulated power amplifier with high working efficiency and good linearity is still a very important technical research topic in this field. Summary of the Invention

[0005] The primary technical problem to be solved by the present invention is to provide a load - modulated power amplifier.

[0006] Another technical problem to be solved by the present invention is to provide an electronic device including the load - modulated power amplifier.

[0007] To achieve the above object, the present invention adopts the following technical solutions:

[0008] According to the first aspect of the embodiments of the present invention, a load - modulated power amplifier is provided, including a driver - stage power amplifier and its bias circuit, an input power divider, a harmonic impedance controller, a main - path power amplifier and its bias circuit, an auxiliary - path power amplifier and its bias circuit, and a load modulation combiner; wherein,

[0009] The input end of the driver - stage power amplifier and its bias circuit is connected to the RF signal input end, and is used to drive and amplify the input RF signal. The amplified RF signal is output to the input power divider;

[0010] The input power divider is used to divide the input one - way RF signal into two RF signals with a 90 - degree phase difference. Among them, the RF signal with a phase of + 45 degrees enters the main - path power amplifier after passing through the harmonic impedance controller; the RF signal with a phase of - 45 degrees enters the auxiliary - path power amplifier after passing through the harmonic impedance controller;

[0011] Both the main - path power amplifier and its bias circuit and the auxiliary - path power amplifier and its bias circuit are used to amplify the input RF signal, and the amplified RF signals are respectively output to the load modulation combiner;

[0012] The load modulation combiner is used to combine the input two - way RF signals into one - way RF signal, and its output end is connected to the RF signal output end;

[0013] Among them, the driver - stage power amplifier is provided with a bias circuit with enhanced transconductance, the main - path power amplifier is provided with a bias circuit with adjustable phase, the auxiliary - path power amplifier is provided with a bias circuit with controllable turn - on power point, and the harmonic impedance controller.

[0014] Preferably, the output end of the driver - stage power amplifier is connected to the input end of the input power divider, the first output end of the input power divider is connected to the first input end of the harmonic impedance controller, and the second output end of the input power divider is connected to the second input end of the harmonic impedance controller; the first output end of the harmonic impedance controller is connected to the input end of the main - path power amplifier and its bias circuit, and the second output end of the harmonic impedance controller is connected to the input end of the auxiliary - path power amplifier and its bias circuit; the output end of the main - path power amplifier and its bias circuit is connected to the first input end of the load modulation combiner, and the output end of the auxiliary - path power amplifier and its bias circuit is connected to the second input end of the load modulation combiner.

[0015] Preferably, the driver - stage power amplifier and its bias circuit include a drive - amplification power transistor, a first bias transistor and a second bias transistor, as well as a first zener diode, a second zener diode and a third zener diode, as well as a first filter capacitor, a second filter capacitor and a first feedback capacitor, as well as a first bias resistor, a second bias resistor and a first voltage - stabilizing resistor; among them,

[0016] The base of the drive - amplification power transistor is connected to the RF signal input end, the emitter is connected to the ground end, and the collector is connected to the input end of the input power divider unit;

[0017] The first bias resistor, the first voltage regulator diode, the second voltage regulator diode, the first filter capacitor and the first bias transistor form a main bias circuit for providing a first bias current;

[0018] The second bias resistor, the first voltage stabilizing resistor, the third voltage regulator diode, the second filter capacitor, the first feedback capacitor and the second bias transistor form a transconductance enhancement bias circuit for providing a second bias current.

[0019] Preferably, in the main bias circuit, the emitter of the first bias transistor is connected to the base of the drive amplification power transistor, and the collector of the first bias transistor and the first bias resistor are both connected to a first bias voltage terminal; the other end of the first bias resistor is connected to the base of the first bias transistor, the first filter capacitor and the positive electrode of the first voltage regulator diode, the negative electrode of the first voltage regulator diode is connected to the positive electrode of the second voltage regulator diode, and the negative electrode of the second voltage regulator diode and the other end of the first filter capacitor are both connected to a ground terminal.

[0020] Preferably, in the transconductance enhancement bias circuit, the emitter of the second bias transistor is connected to the base of the drive amplification power transistor and the first feedback capacitor, and the other end of the first feedback capacitor is connected to the collector of the drive amplification power transistor; the collector of the second bias transistor and the second bias resistor are both connected to a first bias voltage terminal; the other end of the second bias resistor is connected to the base of the second bias transistor, the first voltage stabilizing resistor and the second filter capacitor, the other end of the first voltage stabilizing resistor is connected to the positive electrode of the third voltage regulator diode, and the negative electrode of the third voltage regulator diode and the other end of the second filter capacitor are both connected to a ground terminal.

[0021] Preferably, when the drive stage power amplifier outputs low power, the transconductance enhancement bias circuit is in an off state and does not provide a second bias current; when the output power of the drive stage power amplifier increases and exceeds a set threshold, the transconductance enhancement bias circuit is turned on to provide a second bias current, so as to increase the transconductance of the drive amplification power transistor.

[0022] Preferably, the input power divider includes a first inductor, a second inductor, a first capacitor and a second capacitor; wherein, one ends of the first inductor, the second inductor, the first capacitor and the second capacitor are connected to each other and used as an input end to be connected to the output end of the drive stage power amplifier and its bias circuit;

[0023] The parallel-connected first inductor and the series-connected first capacitor form a high-pass network, so that the radio frequency signal of this path is advanced by 45 degrees in phase, and the other end of the first capacitor is used as a first output end and connected to the first input end of the harmonic impedance controller;

[0024] The second inductor connected in series and the second capacitor connected in parallel form a low-pass network, such that the radio frequency signal of this path has a phase delay of 45 degrees. The other end of the second inductor serves as the second output end and is connected to the second input end of the harmonic impedance controller.

[0025] Preferably, the harmonic impedance controller includes a third inductor, a fourth inductor, a fifth inductor, and a sixth inductor, as well as a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor. Among them, the third inductor, the fifth inductor, the third capacitor, and the fifth capacitor constitute the harmonic impedance matching circuit of the main path power amplifier; the fourth inductor, the sixth inductor, the fourth capacitor, and the sixth capacitor constitute the harmonic impedance matching circuit of the auxiliary path power amplifier.

[0026] Preferably, in the harmonic impedance matching circuit of the main path power amplifier, one ends of the third inductor and the third capacitor are connected to each other and serve as the first input end of the harmonic impedance controller and are connected to the first output end of the input power divider; the other ends of the third inductor and the third capacitor are connected to each other and on the one hand are connected to the fifth capacitor, and on the other hand serve as the first output end of the harmonic impedance controller and are connected to the input ends of the main path power amplifier and its bias circuit; the other end of the fifth capacitor is connected to the fifth inductor, and the other end of the fifth inductor is connected to the ground terminal.

[0027] Preferably, the main path power amplifier and its bias circuit include a main path power amplifying transistor, a third bias transistor, a first transistor, and a second transistor, as well as a fourth voltage stabilizing diode, a fifth voltage stabilizing diode, a third filter capacitor, a first coupling capacitor, a third bias resistor, and a fourth bias resistor. Among them, all components except the main path power amplifying transistor constitute the bias circuit.

[0028] In the bias circuit, the third bias transistor is an emitter follower, which is used to provide a bias current for the main path power amplifying transistor, and the fourth bias resistor is used to control the magnitude of the bias current.

[0029] The third bias resistor, the first coupling capacitor, the first transistor, and the second transistor form a phase adjustment circuit, which is used to improve the phase characteristics.

[0030] Preferably, in the main path power amplifier and its bias circuit, the base of the main path power amplifying transistor is connected to the emitter of the third bias transistor and then connected to the first output terminal of the harmonic impedance controller; the emitter of the main path power amplifying transistor is connected to the ground terminal, and the collector of the main path power amplifying transistor serves as the output terminal and is connected to the first input terminal of the load modulation power combiner; the collector of the third bias transistor is connected to the third bias resistor and the fourth bias resistor and then commonly connected to the second bias voltage terminal; the other end of the third bias resistor is connected to the collectors of the first transistor and the second transistor; the base of the first transistor is connected to the emitter of the third bias transistor through the third filter capacitor; the base and emitter of the second transistor are connected in parallel and then connected to the ground terminal, and the emitter of the first transistor is connected to the ground terminal; the base of the third bias transistor is connected to the third filter capacitor, the positive electrode of the fourth voltage stabilizing diode, and the other end of the fourth bias resistor; the other end of the third filter capacitor is connected to the ground terminal, the negative electrode of the fourth voltage stabilizing diode is connected to the positive electrode of the fifth voltage stabilizing diode, and the negative electrode of the fifth voltage stabilizing diode is connected to the ground terminal.

[0031] Preferably, the auxiliary path power amplifier and its bias circuit include an auxiliary path power amplifying transistor, a fourth bias transistor, a sixth voltage stabilizing diode, a fourth filter capacitor, a fifth bias resistor, and a second voltage stabilizing resistor; among them, all components except the auxiliary path power amplifying transistor constitute the bias circuit;

[0032] In the bias circuit, the fifth bias resistor is used to control the turn-on power point of the auxiliary path power amplifier; the fourth bias transistor is an emitter follower and is used to provide a bias current for the auxiliary path power amplifying transistor;

[0033] When the input radio frequency signal is in a small signal state, the fourth bias transistor is in a semi-cutoff state and does not provide a bias current; when the input radio frequency signal is in a large signal state, the fourth bias transistor starts to provide a bias current, so that the auxiliary path power amplifying transistor is turned on, and the output power increases rapidly, realizing the load modulation effect.

[0034] Preferably, in the auxiliary path power amplifier and its bias circuit, the base of the auxiliary path power amplifying transistor is connected to the emitter of the fourth bias transistor and then connected to the second output terminal of the harmonic impedance controller; the emitter of the auxiliary path power amplifying transistor is connected to the ground terminal, and the collector of the auxiliary path power amplifying transistor serves as the output terminal and is connected to the second input terminal of the load modulation power combiner; the collector of the fourth bias transistor and the fifth bias resistor are connected and then commonly connected to the third bias voltage terminal; the other end of the fifth bias resistor is connected to the base of the fourth bias transistor, the second voltage stabilizing resistor, and the fourth filter capacitor, the other end of the second voltage stabilizing resistor is connected to the positive electrode of the sixth voltage stabilizing diode, and the negative electrode of the sixth voltage stabilizing diode and the other end of the fourth filter capacitor are both connected to the ground terminal.

[0035] Preferably, the load modulation power combiner includes a seventh inductor, an eighth inductor, a ninth inductor, a tenth inductor, and an eleventh inductor, as well as a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, and an eleventh capacitor; wherein,

[0036] The seventh inductor, the seventh capacitor, and the eighth capacitor form a CLC type main path matching network;

[0037] The eighth inductor, the ninth inductor, the tenth inductor, the ninth capacitor, and the tenth capacitor form a CL + CLL type auxiliary path matching network;

[0038] The eleventh inductor and the eleventh capacitor form an LC type power combining matching network.

[0039] Preferably, in the load modulation power combiner, one end of the seventh capacitor is used as the first input terminal and is connected to the output terminal of the main path power amplifier and its bias circuit, the other end of the seventh capacitor is connected to the seventh inductor, the other end of the seventh inductor is connected to the eighth capacitor and the eleventh inductor, and the other end of the eighth capacitor is connected to the ground terminal; One end of the ninth capacitor and the tenth capacitor are connected and used as the second input terminal and are connected to the output terminal of the auxiliary path power amplifier and its bias circuit, the other end of the tenth capacitor is connected to the tenth inductor, and the other end of the tenth inductor is connected to the ground terminal; The other end of the ninth capacitor is connected to the eighth inductor and the ninth inductor, the other end of the eighth inductor is connected to the ground terminal, and the other end of the ninth inductor is connected to the eighth capacitor and the eleventh inductor; The other end of the eleventh inductor is connected to the eleventh capacitor and the RF signal output terminal of the load modulation power amplifier, and the other end of the eleventh capacitor is connected to the ground terminal.

[0040] According to the second aspect of the embodiments of the present invention, an electronic device is provided, which includes the above-mentioned load modulation power amplifier.

[0041] Compared with the prior art, the load modulation power amplifier provided by the present invention adopts a technical solution in which the driver stage power amplifier is provided with a transconductance booster bias circuit, and harmonic impedance matching circuits are provided for the main and auxiliary paths, and a technical solution in which the main path power amplifier is provided with a bias circuit with a phase modulation circuit and the auxiliary path power amplifier is provided with a bias circuit with a controllable turn-on power point. At the same time, by combining a load modulation power combiner with a smaller insertion loss at the output end, the linearization and high efficiency of the load modulation power amplifier are achieved through the collaborative work of each unit, which can well meet the requirements of practical applications. Therefore, the load modulation power amplifier provided by the present invention has beneficial effects such as a clever and reasonable structural design, a low design cost, a high working efficiency, and excellent circuit performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 It is a schematic structural diagram of a typical load modulation power amplifier in the prior art;

[0043] Figure 2 Schematic diagram of the load modulation power amplifier provided by the embodiment of the present invention;

[0044] Figure 3 General circuit principle diagram of the load modulation power amplifier in the embodiment of the present invention;

[0045] Figure 4 Circuit schematic diagram of the driver stage power amplifier and its bias circuit in the embodiment of the present invention;

[0046] Figure 5 Simulation test diagram of the change of the second bias current provided by the transconductance booster bias circuit with the output power in the embodiment of the present invention;

[0047] Figure 6 Comparison simulation test diagram of the change of the gain with the output power when the transconductance booster bias circuit works and does not work in the embodiment of the present invention;

[0048] Figure 7 Circuit schematic diagram of the main path power amplifier and its bias circuit in the embodiment of the present invention;

[0049] Figure 8 Comparison simulation test diagram of the change of the phase with the output power when the phase modulation circuit is set and not set in the embodiment of the present invention;

[0050] Figure 9 Circuit schematic diagram of the auxiliary path power amplifier and its bias circuit in the embodiment of the present invention;

[0051] Figure 10 Simulation test diagram of the change of the gain of the load modulation power amplifier with the output power when the auxiliary path power amplification tube (class C) is at different turn-on power points in the embodiment of the present invention;

[0052] Figure 11 Principle diagram of the load line transformation of the load modulation power amplifier in the embodiment of the present invention;

[0053] Figure 12 Circuit schematic diagram of the load modulation coupler in the embodiment of the present invention;

[0054] Figure 13 Equivalent circuit schematic diagram of the load modulation coupler when a small signal is input in the embodiment of the present invention;

[0055] Figure 14 Simulation test diagram of the linearity of the load modulation power amplifier in the embodiment of the present invention;

[0056] Figure 15 Simulation test diagram of the efficiency of the load modulation power amplifier in the embodiment of the present invention;

[0057] Figure 16 Schematic diagram of an electronic device adopting the load modulation power amplifier provided by the embodiment of the present invention. Specific embodiments

[0058] The technical content of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0059] As Figure 1 shown, a typical load modulation power amplifier in the prior art includes a main path power amplifier 101, a secondary path power amplifier 102, a quarter-wavelength input transmission line 103, a quarter-wavelength output transmission line 104, and an output matching network 105.

[0060] In an ideal situation, when a radio frequency signal is input at the radio frequency signal input port, a part of the radio frequency signal is input to the main path power amplifier branch. After being amplified by the main path power amplifier 101, it is transmitted to the output matching network 105 through the quarter-wavelength output transmission line 104; another part of the radio frequency signal is input to the secondary path power amplifier branch, passes through the quarter-wavelength input transmission line 103, and then is output to the output matching network 105 after being amplified by the secondary path power amplifier 102. The output matching network 105 synthesizes the two signals and outputs a radio frequency signal. The main path power amplifier 101 is in class AB bias state and is in the on state at small signals; the secondary path power amplifier 102 is in class C bias state and is in the off state at small signals; when the input signal is large enough, the secondary path power amplifier 102 is turned on and enters the amplified signal state.

[0061] When the load modulation power amplifier starts after the secondary path power amplifier 102 is turned on, the load impedance of the main path power amplifier 101 will decrease, and at the same time, the output power of the secondary path power amplifier 102 increases non-linearly. If the gain curve and phase curve are not optimized, its linearity is poor.

[0062] In the prior art, the quarter-wavelength output transmission line 104 and the output matching network 105 in the load modulation power amplifier are power loss points of the circuit. Since the quarter-wavelength output transmission line 104 needs to present a higher load line to the main path power amplifier 101 at low power, and a lower load line to the main path power amplifier 101 at high power, the switching of the impedance conversion ratio of the quarter-wavelength output transmission line 104 at different powers results in a large power consumption loss of the circuit.

[0063] To solve the problems existing in the above prior art, as Figure 2As shown in the figure, an embodiment of the present invention provides a load modulation power amplifier with high working efficiency and good linearity, which includes a driver stage power amplifier and its bias circuit 111, an input power divider 112, a harmonic impedance controller 113, a main path power amplifier and its bias circuit 114, a secondary path power amplifier and its bias circuit 115, and a load modulation combiner 116. Among them, the RF signal input end of the load modulation power amplifier is connected to the input end of the driver stage power amplifier and its bias circuit 111, the output end of the driver stage power amplifier and its bias circuit 111 is connected to the input end of the input power divider 112, the first output end of the input power divider 112 is connected to the first input end of the harmonic impedance controller 113, and the second output end of the input power divider 112 is connected to the second input end of the harmonic impedance controller 113; the first output end of the harmonic impedance controller 113 is connected to the input end of the main path power amplifier and its bias circuit 114, and the second output end of the harmonic impedance controller 113 is connected to the input end of the secondary path power amplifier and its bias circuit 115; the output end of the main path power amplifier and its bias circuit 114 is connected to the first input end of the load modulation combiner 116, and the output end of the secondary path power amplifier and its bias circuit 115 is connected to the second input end of the load modulation combiner 116; the output end of the load modulation combiner 116 is connected to the RF signal output end of the load modulation power amplifier.

[0064] In this load modulation power amplifier, when its RF signal input end receives an RF signal input, the driver stage power amplifier first drives and amplifies the RF signal, and the driven and amplified RF signal is output to the input power divider. The input power divider divides the input single-path RF signal into two RF signals with a 90-degree phase difference. Among them, the RF signal with a phase of +45 degrees enters the main path power amplifier after passing through the harmonic impedance controller; the RF signal with a phase of -45 degrees enters the secondary path power amplifier after passing through the harmonic impedance controller. The main path power amplifier and the secondary path power amplifier respectively amplify the RF signals with a 90-degree phase difference and then output them to the load modulation combiner 116. The load modulation combiner 116 combines the powers of the two RF signals and outputs a single-path RF signal at the RF signal output end.

[0065] When the input RF signal is in a small-signal state, the secondary path power amplifier is not turned on, and the main path power amplifier branch presents a relatively high load line impedance; when the input RF signal is in a large-signal state, the secondary path power amplifier is turned on, and both the main path power amplifier branch and the secondary path power amplifier branch present a relatively low load line impedance.

[0066] Among them, the bias circuits of the main path power amplifier, the bias circuit of the auxiliary path power amplifier, and the harmonic impedance matching circuit (i.e., the harmonic impedance controller unit) are all used to optimize the gain curve and phase curve of the power amplifier; the bias circuit of the driver stage power amplifier is used to optimize the P1dB (1 dB compression output power) of the power amplifier; these four parts of the circuit work together to improve the linearity of the load modulation power amplifier.

[0067] The load modulation combiner 116 is composed of lumped elements, and it includes a main path matching network, an auxiliary path matching network, and a combining matching network. Its insertion loss is less than the load line structure of the load modulation power amplifier in the prior art, and it can significantly improve the efficiency at the back-off power of the load modulation power amplifier.

[0068] In an embodiment of the present invention, the overall circuit principle diagram of the load modulation power amplifier is as Figure 3 shown. Among them, the driver stage power amplifier and its bias circuit 111, the input power divider 112, the harmonic impedance controller 113, the main path power amplifier and its bias circuit 114, the auxiliary path power amplifier and its bias circuit 115, and the load modulation combiner 116, the composition and structure of each unit are described in detail as follows.

[0069] The driver stage power amplifier and its bias circuit 111 include a driver amplification power transistor T3, a first bias transistor T1 and a second bias transistor T2, as well as a first zener diode D1, a second zener diode D2 and a third zener diode D3, and a first filter capacitor Cp1, a second filter capacitor Cp2 and a first feedback capacitor Cp3, and a first bias resistor R1, a second bias resistor R2 and a first zener resistor R3. Among them, the first bias resistor R1, the first zener diode D1, the second zener diode D2, the first filter capacitor Cp1 and the first bias transistor T1 constitute the main bias circuit; the second bias resistor R2, the first zener resistor R3, the third zener diode D3, the second filter capacitor Cp2, the first feedback capacitor Cp3 and the second bias transistor T2 constitute a transconductance booster (Gm-booster) bias circuit.

[0070] In a driver-stage power amplifier and its bias circuit, the radio frequency signal input terminal of the load modulation power amplifier is connected to the base of the drive amplification power transistor T3, the emitter of the first bias transistor T1, and the emitter of the second bias transistor T2; the emitter of the drive amplification power transistor T3 is connected to the ground terminal, and the collector of the drive amplification power transistor T3 serves as the output terminal of the driver-stage power amplifier and its bias circuit and is connected to the input terminal of the input power distributor unit. At the same time, it is also connected to the first feedback capacitor Cp3; the other end of the first feedback capacitor Cp3 is connected to the emitter of the second bias transistor T2; the collector of the second bias transistor T2, the collector of the first bias transistor T1, the first bias resistor R1, and the second bias resistor R2 are all connected to the first bias voltage terminal Vreg1; the other end of the second bias resistor R2 is connected to the base of the second bias transistor T2, the first voltage stabilizing resistor R3, and the second filter capacitor Cp2. The other end of the first voltage stabilizing resistor R3 is connected to the positive electrode of the third voltage stabilizing diode D3, and the negative electrode of the third voltage stabilizing diode D3 and the other end of the second filter capacitor Cp2 are both connected to the ground terminal; the other end of the first bias resistor R1 is connected to the base of the first bias transistor T1, the first filter capacitor Cp1, and the positive electrode of the first voltage stabilizing diode D1. The negative electrode of the first voltage stabilizing diode D1 is connected to the positive electrode of the second voltage stabilizing diode D2, and the negative electrode of the second voltage stabilizing diode D2 and the other end of the first filter capacitor Cp1 are both connected to the ground terminal.

[0071] The working principle of the driver-stage power amplifier and its bias circuit is as Figure 4 shown. When the driver-stage power amplifier outputs low power, the main bias circuit provides the first bias current Ic1 to turn on the drive amplification power transistor T3, and the transconductance booster bias circuit is not turned on and does not provide a bias current. When the driver-stage power amplifier outputs high power, the bias current Ic1 provided by the main bias circuit remains unchanged. As the output power gradually increases, the first feedback capacitor Cp3 will feedback the driver-stage output power to the emitter of the second bias transistor T2 of the transconductance booster bias circuit, causing the second bias transistor T2 to turn on and provide the second bias current Ic2. At this time, the bias current of the drive amplification power transistor T3 increases, increasing the transconductance (Gm) of the drive amplification power transistor T3 and improving the P1dB of the power amplifier. That is to say, when the input power of the drive amplification power transistor T3 exceeds a preset threshold, the transconductance booster bias circuit is turned on. The specific working process is shown in detail in Figure 5 and Figure 6 shown.

[0072] Figure 5 The change of the second bias current Ic2 provided by the transconductance booster bias circuit with the increase of the output power is given in Figure 5It can be seen that when the output power is low power, the second bias current Ic2 is zero, that is, the bias circuit of the transconductance booster does not provide a bias current; when the output power exceeds a certain value and continues to gradually increase, the second bias current Ic2 increases rapidly accordingly.

[0073] Figure 6 The figure shows a comparison of the variation of gain with output power when the bias circuit of the transconductance booster works (Ic2>0) and does not work (Ic2 = 0). As can be seen from Figure 6 it, the bias circuit of the transconductance booster can effectively increase the P1dB of the power amplifier, thereby improving the linearity.

[0074] The input power divider 112 includes a first inductor L1, a second inductor L2, a first capacitor C1, and a second capacitor C2. Among them, one ends of the first inductor L1, the second inductor L2, the first capacitor C1, and the second capacitor C2 are connected to each other and serve as the input end of the input power divider to be connected to the output end of the driver-stage power amplifier and its bias circuit; the other end of the first inductor L1 and the other end of the second capacitor C2 are respectively connected to the ground terminal; the other end of the first capacitor C1 serves as the first output end of the input power divider to be connected to the first input end of the harmonic impedance controller unit; the other end of the second inductor L2 serves as the second output end of the input power divider to be connected to the second input end of the harmonic impedance controller unit.

[0075] After the radio frequency signal is amplified by the driver-stage power amplifier and output to the input power divider unit, the input power divider divides the input single-path radio frequency signal into two radio frequency signals with the same amplitude and a phase difference of 90 degrees and then outputs them to the harmonic impedance controller unit. The phase difference of the radio frequency signals is generated by the matching circuit structure. The parallel-connected first inductor L1 and the series-connected first capacitor C1 form a high-pass network, making the radio frequency signal of this path lead in phase. The series-connected second inductor L2 and the parallel-connected second capacitor C2 form a low-pass network, making the radio frequency signal of this path lag in phase, so as to obtain two radio frequency signals with a phase difference of 90 degrees.

[0076] The harmonic impedance controller 113 includes a third inductor L3, a fourth inductor L4, a fifth inductor L5, and a sixth inductor L6, as well as a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6. Among them, the third inductor L3, the fifth inductor L5, the third capacitor C3, and the fifth capacitor C5 constitute the harmonic impedance matching circuit of the main path power amplifier; the fourth inductor L4, the sixth inductor L6, the fourth capacitor C4, and the sixth capacitor C6 constitute the harmonic impedance matching circuit of the auxiliary path power amplifier; and their circuit structures are exactly the same.

[0077] In the harmonic impedance control matcher circuit of the main path power amplifier, one ends of the third inductor L3 and the third capacitor C3 are connected to each other and serve as the first input end of the harmonic impedance controller unit to be connected to the first output end of the input power divider unit; the other ends of the third inductor L3 and the third capacitor C3 are connected to each other and on the one hand are connected to the fifth capacitor C5, and on the other hand serve as the first output end of the harmonic impedance controller unit to be connected to the input ends of the main path power amplifier and its bias circuit; the other end of the fifth capacitor C5 is connected to the fifth inductor L5, and the other end of the fifth inductor L5 is connected to the ground terminal.

[0078] In the harmonic impedance matching circuit of the auxiliary path power amplifier, one ends of the fourth inductor L4 and the fourth capacitor C4 are connected to each other and serve as the second input end of the harmonic impedance controller unit to be connected to the second output end of the input power divider unit; the other ends of the fourth inductor L4 and the fourth capacitor C4 are connected to each other and on the one hand are connected to the sixth capacitor C6, and on the other hand serve as the second output end of the harmonic impedance controller unit to be connected to the input ends of the auxiliary path power amplifier and its bias circuit; the other end of the sixth capacitor C6 is connected to the sixth inductor L6, and the other end of the sixth inductor L6 is connected to the ground terminal.

[0079] The harmonic impedance controller unit includes the harmonic impedance matching circuits of the main path power amplifier and the auxiliary path power amplifier with the same structure. The optimal efficiency impedance points of the main path power amplifier and the auxiliary path power amplifier can be determined through source pull simulation. The main path power amplifier transistor and the auxiliary path power amplifier transistor are matched to near the optimal fundamental wave impedance point and the optimal harmonic impedance point through the harmonic impedance controller. Among them, each matching circuit is composed of a parallel resonance circuit and a series resonance circuit; the resonance frequency of the parallel resonance circuit is the third order, and the resonance frequency of the series resonance circuit is the second order. The second-order impedance in the source impedance of the main path power amplifier transistor and the auxiliary path power amplifier transistor is low impedance, and the third-order impedance is high impedance, so that the input waveform shaping is close to a square wave shape to improve the efficiency of the circuit.

[0080] The main path power amplifier and its bias circuit 114 include the main path power amplifier transistor T7, the third bias transistor T4, the first transistor T5 and the second transistor T6, as well as the fourth voltage stabilizing diode D4, the fifth voltage stabilizing diode D5, as well as the third filter capacitor Cp4, the first coupling capacitor Cp5, as well as the third bias resistor R4 and the fourth bias resistor R5. Among them, all components except the main path power amplifier transistor T7 constitute its bias circuit.

[0081] In the main path power amplifier and its bias circuit, the base of the main path amplifying power transistor T7 and the emitter of the third bias transistor T4 are connected and then connected to the first output terminal of the harmonic impedance controller unit; the emitter of the main path amplifying power transistor T7 is connected to the ground terminal, and the collector of the main path amplifying power transistor T7 serves as the output terminal of the main path power amplifier and its bias circuit and is connected to the first input terminal of the load modulation power combiner unit. The collector of the third bias transistor T4 is connected to the third bias resistor R4 and the fourth bias resistor R5 and then jointly connected to the second bias voltage terminal Vreg2; the other end of the third bias resistor R4 is connected to the collector of the first transistor T5 and the collector of the second transistor T6; the base of the first transistor T5 is connected to the emitter of the third bias transistor T4 through the third filter capacitor Cp4; the base and emitter of the second transistor T6 are connected in parallel and then connected to the ground terminal, and the emitter of the first transistor T5 is connected to the ground terminal; the base of the third bias transistor T4 is connected to the third filter capacitor Cp4, the positive electrode of the fourth zener diode D4, and the other end of the fourth bias resistor R5; the other end of the third filter capacitor Cp4 is connected to the ground terminal, the negative electrode of the fourth zener diode D4 is connected to the positive electrode of the fifth zener diode D5, and the negative electrode of the fifth zener diode D5 is connected to the ground terminal.

[0082] As Figure 7 shown (the same as the 114 unit in Figure 2 ), in the bias circuit of the main path amplifying power transistor T7, the fourth bias resistor R5 is used to control the magnitude of the provided bias current, and the third bias transistor T4 is an emitter follower, which is used to provide a bias current for the main path amplifying power transistor T7. The third bias resistor R4, the first coupling capacitor Cp5, the first transistor T5, and the second transistor T6 form a phase modulation circuit. Among them, the third bias resistor R4 is used to control the bias points of the first transistor T5 and the second transistor T6, and the first coupling capacitor Cp5 is used to control the phase modulation amplitude. It couples the power input to the main path power amplifier to the first transistor T5 and the second transistor T6, and improves the phase characteristics of the circuit by changing the junction capacitance of the first transistor T5 and the second transistor T6 through large signals.

[0083] The function of the phase modulation circuit is detailed in Figure 8 shown in the change of the phase with the increase of the output power. Among them, curve 1 is the phase change without setting the phase modulation circuit, and curve 2 is the phase change with the phase modulation circuit. It can be seen from Figure 8 that the phase modulation circuit can well control the phase curve within about 2°, improving the linearity of the circuit.

[0084] The auxiliary power amplifier and its bias circuit 115 include an auxiliary power amplification transistor T8, a fourth bias transistor T9, a sixth zener diode D6, a fourth filter capacitor Cp6, a fifth bias resistor R7, and a second voltage stabilizing resistor R6. Among them, all components except the auxiliary power amplification transistor T8 constitute its bias circuit.

[0085] In the auxiliary power amplifier and its bias circuit, the base of the auxiliary power amplification transistor T8 and the emitter of the fourth bias transistor T9 are connected and then connected to the second output terminal of the harmonic impedance controller unit; the emitter of the auxiliary power amplification transistor T8 is connected to the ground terminal, and the collector of the auxiliary power amplification transistor T8 serves as the output terminal of the auxiliary power amplifier and its bias circuit and is connected to the second input terminal of the load modulation power combiner unit. The collector of the fourth bias transistor T9 and the fifth bias resistor R7 are connected and then commonly connected to the third bias voltage terminal Vreg3; the other end of the fifth bias resistor R7 is connected to the base of the fourth bias transistor T9, the second voltage stabilizing resistor R6, and the fourth filter capacitor Cp6. The other end of the second voltage stabilizing resistor R6 is connected to the positive electrode of the sixth zener diode D6, and the negative electrode of the sixth zener diode D6 and the other end of the fourth filter capacitor Cp6 are both connected to the ground terminal.

[0086] The bias circuit of the auxiliary power amplifier is as Figure 9 shown (the same as the 115 unit in Figure 2 ). Among them, the fifth bias resistor R7 is used to control the turn-on power point of the auxiliary power amplifier. The second voltage stabilizing resistor R6 and the sixth zener diode D6 form a voltage stabilizing circuit. The fourth bias transistor T9 is an emitter follower and is used to provide a bias current for the auxiliary power amplification transistor T8. In the small-signal state, the fourth bias transistor T9 is in a semi-cutoff state and does not provide a bias current, and the auxiliary power amplification transistor T8 is in class C operating state; as the input power increases, the input swing of the auxiliary power amplification transistor T8 becomes larger, and the fourth bias transistor T9 starts to provide a bias current, causing the auxiliary power amplification transistor T8 to enter the amplification mode and the output power to increase rapidly.

[0087] The gain curve of the load modulation power amplifier is directly related to the turn-on power point of the auxiliary power amplification transistor T8 (i.e., the class C power amplifier). As Figure 10 shown, the curves of the gain of the load modulation power amplifier changing with the increase of the output power when the class C power amplifier is turned on at different turn-on power points are given. Among them, curve 1 shows that the class C power amplifier is turned on at a relatively high power point, and the turn-on power point is close to the saturation power, resulting in an early decline of the gain curve and a poor P1dB; curve 2 shows that the class C power amplifier is turned on at a relatively low power point, and the turn-on power point is close to the lower power, resulting in an upward curvature of the gain curve and a poor return linearity; curve 3 shows that the class C power amplifier is turned on at a more appropriate power point, which can achieve a sufficiently high P1dB of the load modulation power amplifier, thereby obtaining the optimal linearity.

[0088] The load modulation power combiner 116 is composed of lumped elements, such as Figure 12 shown (the same as unit 116 in Figure 2 ), and includes a seventh inductor L7, an eighth inductor L8, a ninth inductor L9, a tenth inductor L10, and an eleventh inductor L11, as well as a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, and an eleventh capacitor C11. Among them, the seventh inductor L7, the seventh capacitor C7, and the eighth capacitor C8 form a CLC type main path matching network; the eighth inductor L8, the ninth inductor L9, the tenth inductor L10, and the ninth capacitor C9, the tenth capacitor C10 form a CL + CLL type auxiliary path matching network; the eleventh inductor L11 and the eleventh capacitor C11 form an LC type combining path matching network.

[0089] In the load modulation power combiner, one end of the seventh capacitor C7 is used as the first input end of the load modulation power combiner and is connected to the output end of the main path power amplifier and its bias circuit. The other end of the seventh capacitor C7 is connected to the seventh inductor L7. The other end of the seventh inductor L7 is connected to the eighth capacitor C8 and the eleventh inductor L11 (P node). The other end of the eighth capacitor C8 is connected to the ground terminal; one end of the ninth capacitor C9 and the tenth capacitor C10 are connected and used as the second input end of the load modulation power combiner and are connected to the output end of the auxiliary path power amplifier and its bias circuit. The other end of the tenth capacitor C10 is connected to the tenth inductor L10. The other end of the tenth inductor L10 is connected to the ground terminal; the other end of the ninth capacitor C9 is connected to the eighth inductor L8 and the ninth inductor L9. The other end of the eighth inductor L8 is connected to the ground terminal. The other end of the ninth inductor L9 is connected to the eighth capacitor C8 and the eleventh inductor L11 (P node); the other end of the eleventh inductor L11 is connected to the eleventh capacitor C11 and the RF signal output end of the load modulation power amplifier. The other end of the eleventh capacitor C11 is connected to the ground terminal.

[0090] The load line transformation of the load modulation power amplifier is as Figure 11 shown. By using Kirchhoff's theorem to analyze the load line transformation principle, the relationship between the main path working voltage and working current and the auxiliary path working voltage and working current can be deduced as:

[0091] (1)

[0092] (2)

[0093] Among them, is the main path working voltage, is the main path working current, is the auxiliary path working voltage, is the auxiliary path working current, is the output current of the main path after passing through the transmission line, is the characteristic impedance value of the λ / 4 transmission line of the main path (λ is the transmission line wavelength at the operating frequency), is the impedance at the power combining point (point P).

[0094] It can be calculated that the load line of the main path and the load line of the auxiliary path are:

[0095] (3)

[0096] (4)

[0097] It can be seen from Equation 3 and Equation 4 that when the input RF signal is a small signal, the auxiliary power amplifier is not turned on, that is, the working current of the auxiliary path is equal to 0. Assuming , then the load line of the main path power amplifier , and the load line of the auxiliary path power amplifier is infinite; when the input RF signal gradually increases and the main path power amplifier enters the saturation state, that is, the working current of the main path remains unchanged, the auxiliary path power amplifier is turned on, and when the working current of the auxiliary path increases, the load line of the main path power amplifier gradually decreases, and the load line of the auxiliary path power amplifier also gradually decreases. Assuming , , then the load line of the main path power amplifier , and the load line of the auxiliary path power amplifier ;

[0098] It can be seen from the above analysis that when the input signal increases from small to large, the load line of the main path power amplifier also changes from to decrease to , achieving the load line modulation effect and improving the efficiency at the back-off power; the load line of the auxiliary path power amplifier also changes from infinity to , improving the output power of the load modulation power amplifier.

[0099] When the input RF signal is a small signal, Figure 12 the load modulation power combiner shown in Figure 13 can be equivalent to the equivalent circuit shown in . Among them, since the auxiliary path power amplifier has no output current, the devices involved in matching by the auxiliary path matching network can be equivalent to an inductor L8’, which forms a π-type network with the combiner matching network to convert the impedance at point P to . The function of the main path matching network is to convert to a lower impedance. If the impedance conversion ratio is 2, the load line of the main path RF power amplifier is Among them, is the reference impedance designed for the matching network.

[0100] When the input RF signal is a large signal, since the auxiliary power amplifier injects working current into point P, the impedance at point P is converted to , making the load line of the main path power amplifier change from decrease to , and at this time the load line of the auxiliary power amplifier is ;

[0101] The value of the main path matching network is:

[0102] (5)

[0103] The value of the combining matching network is, assuming is 50 Ohm, is 6.25 Ohm, then the calculation shows that:

[0104] (6)

[0105] Assume that the value of device in the matching network is 10. According to the insertion loss formula, the insertion loss of the load modulation power amplifier can be calculated as:

[0106] (7)

[0107] The load modulation power combiner provided by the embodiment of the present invention can achieve the transformation of small power with high load and large power with small load, while maintaining a low insertion loss, which is beneficial to the improvement of work efficiency.

[0108] In order to verify the excellent performance of the load modulation power amplifier provided by the embodiment of the present invention, the inventor respectively carried out simulation comparison tests on this technical solution and the prior art solution, and the test results are as shown in Figure 14 and Figure 15 .

[0109] Figure 14 is the simulation test result of the linearity of the load modulation power amplifier. It can be seen from Figure 14 that as the output power increases, the ACLR (adjacent channel leakage ratio) value of the load modulation power amplifier technical solution provided by the embodiment of the present invention is lower than that of the prior art solution. That is to say, the linearity of the load modulation power amplifier provided by the embodiment of the present invention is significantly better than that of the prior art solution.

[0110] Figure 15 is the simulation test result of the working efficiency of the load modulation power amplifier. FromFigure 15 It can be seen that as the output power increases, the working efficiency of the load modulation power amplifier technical solution provided by the embodiments of the present invention is significantly higher than that of the current technical solution.

[0111] In addition, the embodiments of the present invention further provide an electronic device, which includes the above-mentioned load modulation power amplifier and can be an important part of a communication component. The electronic device mentioned here refers to a computer device that can be used in a mobile environment and supports multiple communication systems such as GSM, EDGE, CDMA, TD_SCDMA, WCDMA, TDD_LTE, FDD_LTE, and NR, including mobile phones, laptop computers, tablet computers, in-vehicle computers, etc. In addition, the technical solution provided by the present invention is also applicable to other occasions of radio frequency integrated circuit applications, such as communication base stations, intelligent connected vehicles, etc.

[0112] As Figure 16 shown, the electronic device at least includes a processor, a memory, and a communication component, and may further include a sensor component, a power supply component, a multimedia component, and an input / output interface according to actual needs. Among them, the memory, the communication component, the sensor component, the power supply component, the multimedia component, and the input / output interface are all connected to the processor. The memory can be a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, etc., and the processor can be a central processing unit (CPU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a digital signal processing (DSP) chip, etc. Other communication components, sensor components, power supply components, multimedia components, etc. can all be implemented by general components and will not be specifically described here.

[0113] In summary, the load modulation power amplifier provided by the present invention, by adopting the technical solutions of the driver stage power amplifier with a transconductance booster bias circuit, the main and auxiliary paths are provided with harmonic impedance matching circuits, and the main path power amplifier is provided with a bias circuit with a phase modulation circuit and the auxiliary path power amplifier is provided with a bias circuit with a controllable turn-on power point, and at the same time, a load modulation power combiner with a small insertion loss is set at the output end, and each unit works together to realize the linearization and high efficiency of the load modulation power amplifier, which can well meet the requirements of actual applications. Therefore, the load modulation power amplifier provided by the present invention has beneficial effects such as a clever and reasonable structural design, a low design cost, a high working efficiency, and excellent circuit performance.

[0114] It should be noted that the above-mentioned multiple embodiments are only examples, and the technical solutions of each embodiment can be combined, all within the protection scope of the present invention.

[0115] It should be noted that the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "a plurality of" means two or more unless otherwise specifically defined.

[0116] The load modulation power amplifier and the corresponding electronic device provided by the present invention have been described in detail above. For those of ordinary skill in the art, any obvious changes made to it without departing from the essence of the present invention will constitute an infringement of the patent right of the present invention and shall bear corresponding legal responsibilities.

Claims

1. A load modulation power amplifier, characterized in that It includes a driver-stage power amplifier and its bias circuit, an input power divider, a harmonic impedance controller, a main-path power amplifier and its bias circuit, a sub-path power amplifier and its bias circuit, and a load modulation combiner; wherein, The input end of the driver-stage power amplifier and its bias circuit is connected to the RF signal input end, and is used for driving and amplifying the input RF signal. The amplified RF signal is output to the input power divider; wherein, the bias circuit of the driver-stage power amplifier includes a main bias circuit and a transconductance enhancement bias circuit. When the driver-stage power amplifier outputs low power, the transconductance enhancement bias circuit is in the off state. When the output power of the driver-stage power amplifier increases and exceeds the set threshold, the transconductance enhancement bias circuit is turned on; The input power divider is used for dividing an input RF signal into two RF signals with a 90-degree phase difference; wherein, the RF signal with a phase of +45 degrees enters the main-path power amplifier after passing through the harmonic impedance controller; the RF signal with a phase of -45 degrees enters the sub-path power amplifier after passing through the harmonic impedance controller; The harmonic impedance controller is used for optimizing the impedance matching of the fundamental wave impedance point and the harmonic impedance point; Both the main-path power amplifier and its bias circuit and the sub-path power amplifier and its bias circuit are used for amplifying the input RF signal. The amplified RF signals are respectively output to the load modulation combiner; wherein, the bias circuit of the main-path power amplifier includes a phase modulation circuit for improving the phase characteristics; the bias circuit of the sub-path power amplifier is used for controlling the turn-on power point of the sub-path power amplifier; The load modulation combiner is used for combining the two input RF signals into one RF signal, and at the same time, realizing the transformation of low power with high load and high power with low load. Its output end is connected to the RF signal output end.

2. The load modulation power amplifier according to claim 1, wherein: The output end of the driver-stage power amplifier is connected to the input end of the input power divider. The first output end of the input power divider is connected to the first input end of the harmonic impedance controller. The second output end of the input power divider is connected to the second input end of the harmonic impedance controller. The first output end of the harmonic impedance controller is connected to the input end of the main-path power amplifier and its bias circuit. The second output end of the harmonic impedance controller is connected to the input end of the sub-path power amplifier and its bias circuit. The output end of the main-path power amplifier and its bias circuit is connected to the first input end of the load modulation combiner. The output end of the sub-path power amplifier and its bias circuit is connected to the second input end of the load modulation combiner.

3. The load modulation power amplifier according to claim 1, wherein: The driving-stage power amplifier and its bias circuit include a driving and amplifying power transistor, a first bias transistor, and a second bias transistor, as well as a first zener diode, a second zener diode, and a third zener diode, and a first filter capacitor, a second filter capacitor, and a first feedback capacitor, and a first bias resistor, a second bias resistor, and a first voltage-regulating resistor; wherein, The base of the driving and amplifying power transistor is connected to the radio frequency signal input terminal, the emitter is connected to the ground terminal, and the collector is connected to the input terminal of the input power divider unit; The first bias resistor, the first zener diode, the second zener diode, the first filter capacitor, and the first bias transistor constitute the main bias circuit for providing a first bias current; The second bias resistor, the first voltage-regulating resistor, the third zener diode, the second filter capacitor, the first feedback capacitor, and the second bias transistor constitute the transconductance enhancement bias circuit for providing a second bias current.

4. The load modulation power amplifier according to claim 3, wherein: In the main bias circuit, the emitter of the first bias transistor is connected to the base of the driving and amplifying power transistor, and the collector of the first bias transistor and the first bias resistor are both connected to the first bias voltage terminal; the other end of the first bias resistor is connected to the base of the first bias transistor, the first filter capacitor, and the positive electrode of the first zener diode, the negative electrode of the first zener diode is connected to the positive electrode of the second zener diode, and the negative electrode of the second zener diode and the other end of the first filter capacitor are both connected to the ground terminal.

5. The load modulation power amplifier according to claim 3, wherein: In the transconductance enhancement bias circuit, the emitter of the second bias transistor is connected to the base of the driving and amplifying power transistor and the first feedback capacitor, and the other end of the first feedback capacitor is connected to the collector of the driving and amplifying power transistor; the collector of the second bias transistor and the second bias resistor are both connected to the first bias voltage terminal; the other end of the second bias resistor is connected to the base of the second bias transistor, the first voltage-regulating resistor, and the second filter capacitor, the other end of the first voltage-regulating resistor is connected to the positive electrode of the third zener diode, and the negative electrode of the third zener diode and the other end of the second filter capacitor are both connected to the ground terminal.

6. The load modulation power amplifier according to claim 1, wherein: The input power divider includes a first inductor, a second inductor, a first capacitor, and a second capacitor; wherein, one ends of the first inductor, the second inductor, the first capacitor, and the second capacitor are connected to each other and used as the input terminal to be connected to the output terminal of the driving-stage power amplifier and its bias circuit; The parallel-connected first inductor and the series-connected first capacitor form a high-pass network, such that the radio frequency signal passing through the high-pass network has a phase lead of 45 degrees, and the other end of the first capacitor is the first output terminal and is connected to the first input terminal of the harmonic impedance controller; The second inductor connected in series and the second capacitor connected in parallel form a low-pass network, such that the phase of the radio frequency signal passing through the low-pass network is delayed by 45 degrees. The other end of the second inductor serves as the second output terminal and is connected to the second input terminal of the harmonic impedance controller.

7. The load modulation power amplifier according to claim 1, wherein: The harmonic impedance controller includes a third inductor, a fourth inductor, a fifth inductor, and a sixth inductor, as well as a third capacitor, a fourth capacitor, a fifth capacitor, and a sixth capacitor; wherein, The third inductor, the fifth inductor, the third capacitor, and the fifth capacitor constitute the harmonic impedance matching circuit of the main path power amplifier; The fourth inductor, the sixth inductor, the fourth capacitor, and the sixth capacitor constitute the harmonic impedance matching circuit of the auxiliary path power amplifier.

8. The load modulation power amplifier according to claim 7, wherein: In the harmonic impedance matching circuit of the main path power amplifier, one ends of the third inductor and the third capacitor are connected to each other and serve as the first input terminal of the harmonic impedance controller and are connected to the first output terminal of the input power divider; the other ends of the third inductor and the third capacitor are connected to each other and are connected to the fifth capacitor on one hand and serve as the first output terminal of the harmonic impedance controller and are connected to the input terminals of the main path power amplifier and its bias circuit on the other hand; the other end of the fifth capacitor is connected to the fifth inductor, and the other end of the fifth inductor is connected to the ground terminal.

9. The load modulation power amplifier according to claim 1, wherein: The main path power amplifier and its bias circuit include a main path power amplifying transistor, a third bias transistor, a first transistor, and a second transistor, as well as a fourth zener diode, a fifth zener diode, a third filter capacitor, a first coupling capacitor, a third bias resistor, and a fourth bias resistor; wherein, all components except the main path power amplifying transistor constitute the bias circuit; In the bias circuit, the third bias transistor is an emitter follower for providing a bias current for the main path power amplifying transistor, and the fourth bias resistor is used to control the magnitude of the bias current; the third bias resistor, the first coupling capacitor, the first transistor, and the second transistor form the phase modulation circuit.

10. The load modulation power amplifier according to claim 9, wherein: In the main path power amplifier and its bias circuit, the base of the main path power amplifying transistor and the emitter of the third bias transistor are connected and then connected to the first output terminal of the harmonic impedance controller; the emitter of the main path power amplifying transistor is connected to the ground terminal, and the collector of the main path power amplifying transistor serves as the output terminal and is connected to the first input terminal of the load modulation combiner. The collector of the third bias transistor is connected to the third bias resistor and the fourth bias resistor, and then they are jointly connected to the second bias voltage terminal; the other end of the third bias resistor is connected to the collector of the first transistor and the collector of the second transistor; the base of the first transistor is connected to the emitter of the third bias transistor through the third filter capacitor; the base and emitter of the second transistor are connected in parallel and then connected to the ground terminal, and the emitter of the first transistor is connected to the ground terminal; the base of the third bias transistor is connected to the third filter capacitor, the positive electrode of the fourth voltage regulator diode and the other end of the fourth bias resistor; the other end of the third filter capacitor is connected to the ground terminal, the negative electrode of the fourth voltage regulator diode is connected to the positive electrode of the fifth voltage regulator diode, and the negative electrode of the fifth voltage regulator diode is connected to the ground terminal.

11. The load modulation power amplifier according to claim 1, wherein: The auxiliary power amplifier and its bias circuit include an auxiliary power amplifier transistor, a fourth bias transistor, a sixth voltage regulator diode, a fourth filter capacitor, a fifth bias resistor, and a second voltage regulator resistor; among them, all components except the auxiliary power amplifier transistor constitute the bias circuit; In the bias circuit, the fifth bias resistor is used to control the turn-on power point of the auxiliary power amplifier; the fourth bias transistor is an emitter follower and is used to provide a bias current for the auxiliary power amplifier transistor; When the input radio frequency signal is in a small signal state, the fourth bias transistor is in a semi-cutoff state and does not provide a bias current; when the input radio frequency signal is in a large signal state, the fourth bias transistor starts to provide a bias current, so that the auxiliary power amplifier transistor is turned on to achieve the load modulation effect.

12. The load modulation power amplifier according to claim 11, wherein: In the auxiliary power amplifier and its bias circuit, the base of the auxiliary power amplifier transistor and the emitter of the fourth bias transistor are connected and then connected to the second output terminal of the harmonic impedance controller; the emitter of the auxiliary power amplifier transistor is connected to the ground terminal, and the collector of the auxiliary power amplifier transistor is used as the output terminal and is connected to the second input terminal of the load modulation combiner; The collector of the fourth bias transistor and the fifth bias resistor are connected and then jointly connected to the third bias voltage terminal; the other end of the fifth bias resistor is connected to the base of the fourth bias transistor, the second voltage regulator resistor, and the fourth filter capacitor, the other end of the second voltage regulator resistor is connected to the positive electrode of the sixth voltage regulator diode, and the negative electrode of the sixth voltage regulator diode and the other end of the fourth filter capacitor are both connected to the ground terminal.

13. The load modulation power amplifier according to claim 1, wherein: The load modulation combiner includes a seventh inductor, an eighth inductor, a ninth inductor, a tenth inductor, and an eleventh inductor, as well as a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, and an eleventh capacitor; among them, The seventh inductor, the seventh capacitor, and the eighth capacitor constitute a CLC type main path matching network; The eighth inductor, the ninth inductor, the tenth inductor, and the ninth capacitor, the tenth capacitor constitute a CL + CLL type auxiliary path matching network; The eleventh inductor and the eleventh capacitor constitute an LC type combining matching network.

14. The load modulation power amplifier according to claim 13, wherein: In the load modulation power combiner, one end of the seventh capacitor is used as the first input end and is connected to the output end of the main path power amplifier and its bias circuit. The other end of the seventh capacitor is connected to the seventh inductor. The other end of the seventh inductor is connected to the eighth capacitor and the eleventh inductor. The other end of the eighth capacitor is connected to the ground terminal. One ends of the ninth capacitor and the tenth capacitor are connected and used as the second input end and are connected to the output end of the auxiliary path power amplifier and its bias circuit. The other end of the tenth capacitor is connected to the tenth inductor. The other end of the tenth inductor is connected to the ground terminal. The other end of the ninth capacitor is connected to the eighth inductor and the ninth inductor. The other end of the eighth inductor is connected to the ground terminal. The other end of the ninth inductor is connected to the eighth capacitor and the eleventh inductor. The other end of the eleventh inductor is connected to the eleventh capacitor and the RF signal output end of the load modulation power amplifier. The other end of the eleventh capacitor is connected to the ground terminal.

15. An electronic device, characterized in that Comprising the load modulation power amplifier according to any one of claims 1 to 14.

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