Optical device for phase shifting an optical signal

Abstract

Examples described herein relate to optical devices for phase shifting an optical signal. The optical device includes an optical waveguide including a first semiconductor material region and a second semiconductor material region formed adjacent to each other and defining a junction therebetween. Further, the optical device includes an insulating layer formed on top of the optical waveguide. In addition, the optical device includes a III-V semiconductor layer formed on top of the insulating layer such that an optical mode of an optical signal passing through the optical waveguide overlaps the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, thereby causing a phase shift of the optical signal passing through the optical waveguide.

Description

BACKGROUND

[0001] Phase shifters are commonly used in photonic integrated circuits to control the phase of optical signals. For example, phase shifters are widely used in many optical devices such as optical modulators and optical Mach-Zehnder interferometers (MZIs). Due to the lack of other significant electro-optic effects on silicon, silicon-photonics-based optical phase shifters are typically designed to induce a phase shift in an optical signal using the plasmonic dispersion effect. Common types of optical phase shifters used in photonic integrated circuits are PN junctions, PIN junctions, and metal-oxide-semiconductor capacitors (MOSCAPs).

[0002] In the above phase shifters, the density of free carriers (e.g., free electrons and holes) can be controlled due to the plasmonic dispersion effect’s influence on the voltage applied to the corresponding phase shifter. For example, to achieve a phase shift in an optical signal, a PN junction can be operated in a carrier-depletion mode, while a PIN junction can be operated in a carrier-injection mode. A MOSCAP structure typically includes two semiconductor layers and a thin insulator layer sandwiched between the semiconductor layers. Thus, when an electric field is applied across the semiconductor layers, free carriers accumulate on both sides of the insulator layer. Changes in the free carrier density in a given region change the refractive index of the given region. Changes in the refractive index result in a phase shift of an optical signal passing through the given region. However, this plasmonic dispersion effect in silicon is relatively weak in inducing the desired refractive index change, resulting in a low optical phase shift efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0003] Various examples will be described with reference to the following figures.

[0004] Figure 1 A cross-sectional view of an example optical device is described.

[0005] Figure 2 A cross-sectional view of another example optical device is described.

[0006] Figure 3A And Figure 3B Graphical representations of simulated distributions of free charge carriers for example optical devices of Figure 2 at different settings of control voltages are described.

[0007] Figure 4 A cross-sectional view of another example optical device is described.

[0008] Figure 5 A cross-sectional view of yet another example optical device is described.

[0009] Figure 6 A block diagram of an example electronic system carrying an example optical device is described.

[0010] Figure 7A flowchart of an example method for manufacturing an example optical device is described.

[0011] Figure 8 A flowchart of an example method for operating an example optical device is described.

[0012] It is emphasized that in the drawings, various features are not to scale. In fact, the dimensions of the various features can have been arbitrarily expanded or reduced for the sake of discussion. It is to be understood that the same reference numerals will be used throughout several figures of the drawings to refer to the same or like parts. DETAILED DESCRIPTION

[0013] The following detailed description references the drawings. Wherever possible, the same reference designators are used in the drawings and the following description to refer to the same or like parts. It is to be understood that the drawings are for use only in conjunction with the description in the examples, and that the description in the examples, used in conjunction with the drawings, adequately describes the disclosed examples. Accordingly, the following detailed description does not limit the disclosed examples.

[0014] An optical system includes an optical device capable of generating, processing, and / or carrying an optical signal from one point to another. In certain embodiments, an optical system, such as an optical communication system, can use a smaller cable width (or diameter) to facilitate data communication over longer distances at higher bandwidths as compared to communication systems using electrical wires. In an optical communication system, an optical signal (i.e., light) can be generated by a light source, such as a laser. The optical signal can then be modulated with an information signal using an optical modulator, and this modulated optical signal can be transmitted through an optical fiber to an opto-electronic receiver. The opto-electronic receiver can demodulate the received signal to extract the information signal carried by the optical signal.

[0015] An optical component, such as an optical modulator, can use a phase shifter to phase shift an optical signal and achieve a desired modulation. In a phase shifter implemented via silicon photonics, due to the lack of other significant electro-optic effects on silicon, a well-known plasmonic dispersion effect is typically used to adjust the phase of an optical signal. The most common types of optical phase shifters using the plasmonic dispersion effect are carrier-depletion mode PN junctions, carrier-injection mode PIN junctions, and carrier-accumulation mode MOSCAPs. In the above phase shifters, the free carrier density in the respective region can be controlled by applying a voltage to the respective phase shifter, causing the optical signal passing through the given region to produce a phase shift.

[0016] Using experimental results, the refractive index change (An) of silicon at optical wavelengths of 1310 nm and 1550 nm can be represented using Equation 1 and Equation 2, respectively, as follows.

[0017] An (@ 1310 nm) = -2.98 x 10 -22 x AN1.016 -1.25×10 -18 ×ΔP 0.835 (1)

[0018] Δn(@1550nm)=-5.4×10 -22 ×ΔN 1.011 -1.53×10 -18 ×ΔP 0.838 (2)

[0019] In Equations 1 and 2, ΔN and ΔP represent the changes in free electron density and hole density, respectively. Based on the above equations, it can be understood that the change in hole density can achieve a larger refractive shift than the change in free electron density. For example, even a small change in hole density can produce a larger change in refractive index (Δn) compared to a change in electron density, due to the different multipliers of ΔP and ΔN in Equations (1) and (2). Therefore, one way to improve phase-shift efficiency is to generate more holes within the silicon waveguide. This is typically achieved by forming material regions (e.g., p-type and n-type doped regions) with plasmon dispersion junctions (e.g., PN or PIN junctions) within the silicon waveguide. However, in the case of silicon waveguides, plasmon dispersion is less efficient in generating an increased number of holes. This results in a reduced change in the refractive index of the silicon waveguide, leading to low optical phase-shift efficiency. Another common technique for improving phase-shift efficiency includes increasing the density of total free carriers (e.g., both electrons and holes) within the silicon waveguide. However, this can lead to increased optical loss due to the absorption of optical signals by free carriers.

[0020] Based on the examples presented herein, an optical device including a phase shifter is proposed, which has an optical waveguide having a PN junction or a PIN junction and a waveguide-integrated capacitor. Specifically, in some examples, the optical waveguide includes a first semiconductor material region (e.g., a p-type silicon region) and a second semiconductor material region (e.g., an n-type silicon region), the first and second semiconductor material regions being formed adjacent to each other and defining a junction (e.g., a PN junction) therebetween. Further, in some examples, a (e.g., an n-type doped) III-V (tri-pent) semiconductor layer is heterogeneously integrated on the optical waveguide through a thin oxide bonding layer (also called an insulating layer) to form a waveguide-integrated capacitor. Thus, the proposed phase shifter benefits from dual control of charge carrier density in the same optical waveguide. Specifically, a depletion-mode phase shifter can be realized in the optical waveguide when a first control voltage (e.g., a reverse bias voltage) is applied to the PN junction of the silicon waveguide. Therefore, the free carrier density on both sides of the PN junction can vary (e.g., decrease) with this applied first control voltage. Similarly, when a second control voltage (e.g., a reverse bias voltage) is applied to the silicon waveguide and the III-V semiconductor layer, positive charge carriers (e.g., holes in the first semiconductor material region and electrons in the second semiconductor material region) are dissipated (e.g., reduced in number) on both sides of the insulating layer according to the magnitude of the applied second control voltage.

[0021] The bias voltage applied to the waveguide integrated capacitor (e.g., a second bias voltage) can be determined based on the carrier modes of the junction formed in the optical waveguide. Specifically, a first bias voltage and a second bias voltage are applied to cause changes in the charge carrier density of the waveguide integrated capacitor and changes in the charge carrier density of the junction formed in the optical waveguide (e.g., an increase or decrease) in the same direction. For example, for an optical waveguide including a PN junction operating in a depletion mode (e.g., the first control voltage is a reverse bias voltage), the second bias voltage applied to the waveguide integrated capacitor can also be a reverse bias voltage, causing a decrease in the charge carrier density in the III-V semiconductor layer near the insulating layer and in the region of the first semiconductor material. The decrease in charge carrier density in a given material increases the refractive index of that material. Therefore, in this example, by operating the PN junction and waveguide integrated capacitor with a reverse bias voltage, the charge carrier density of the PN junction, the charge carrier density of the III-V semiconductor layer, and the charge carrier density of the first semiconductor material region can all be reduced, resulting in a larger overall change in refractive index (e.g., an increase in this example). This increase in refractive index improves the phase-shifting efficiency of the optical device. As used herein, the term "phase-shifting efficiency" refers to the amount of phase shift in the optical signal per unit length (e.g., per micrometer) of the optical waveguide at a unit change in the applied control voltage (e.g., per volt).

[0022] In another example implementation, where the optical waveguide includes a PIN junction operating in a charge carrier injection mode (e.g., a first control voltage is a forward bias voltage), a second bias voltage applied to the waveguide integrated capacitor can also be set to a forward bias voltage, such that the charge carrier density near the insulating layer in the III-V semiconductor layer and the first semiconductor material region also increases. An increase in charge carrier density in a given material reduces the refractive index of that material. Therefore, in this example, by operating both the PIN junction and the waveguide integrated capacitor with a forward bias voltage, the charge carrier density of the PN junction, the charge carrier density of the III-V semiconductor layer, and the charge carrier density of the first semiconductor material region can all increase, resulting in a larger overall change in refractive index (e.g., a decrease in this example). This increase in refractive index improves the phase-shifting efficiency of the optical device.

[0023] As used herein, the term "forward bias voltage" can refer to the potential difference between two contact regions such that the potential at the contact region with p-type doping (or with holes as the majority charge carriers) is higher than the potential at the contact region with n-type doping (or with electrons as the majority charge carriers). Furthermore, as used herein, the term "reverse bias voltage" can refer to the potential difference between two contact regions such that the potential at the contact region with p-type doping (or with holes as the majority charge carriers) is lower than the potential at the contact region with n-type doping (or with electrons as the majority charge carriers).

[0024] Similarly, the heterogeneous integration of the III-V semiconductor layer on the optical waveguide causes the optical mode within the waveguide to completely overlap with the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, where the charge carrier density changes with the applied voltage. The optical mode is the electric field distribution of the optical signal through the optical waveguide. Typically, the optical mode is easily confined in a high refractive index medium. Typically, the silicon waveguide is formed in a silicon device layer on top of a buried oxide layer. In the example configuration of the proposed optical device, the III-V semiconductor layer is formed on top of the silicon waveguide via wafer bonding through thin oxide and / or epitaxial growth. Compared to oxides, the III-V semiconductor layer can have a much higher refractive index. Therefore, the optical mode overlaps not only with the first and second semiconductor material regions but also with the III-V semiconductor layer.

[0025] The increased overlap between the optical mode and the phase shifter's material layers further enhances phase shift efficiency by controlling the charge carrier density in the first semiconductor material region (near the PN junction and insulating layer), the second semiconductor material region (near the PN junction), and the III-V semiconductor layer (near the insulating layer) using a control voltage. Specifically, when the optical mode of the optical signal also appears in the same region, causing a phase shift in the optical signal, the change in material properties (e.g., charge carrier concentration) in a given region due to the application of the control voltage is effective. In some examples, the proposed phase shifter structure with a PN junction-connected optical waveguide and heterogeneously integrated III-V semiconductor layer achieves an effective refractive index increase of up to approximately 43.8% for the optical waveguide compared to a single independent bias of the PN junction. This significant increase in effective refractive index is at least partly due to the complete overlap of the optical mode with the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer.

[0026] Furthermore, by controlling carrier density using two control voltages (e.g., a first voltage across the waveguide integrated capacitor and a second voltage across the PN junction of the optical waveguide), more complex tuning capabilities can be achieved using a wider range of refractive index controls. For example, by implementing such a phase shifter in an optical modulator, controlled by two different control voltages, non-return-to-zero (NRZ) modulation with a large optical modulation amplitude (OMA) and pulse amplitude modulation level 4 (PAM4) modulation with two separate NRZ electrical signals can be achieved. Similarly, because optical phase shifters are fundamental components of photonic integrated circuits, many optical devices can achieve higher performance using the efficient optical phase shifters exemplified here. Moreover, with the heterogeneous integration of III-V semiconductor layers on silicon, the resulting photonic integrated circuits remain highly compatible with other semiconductor manufacturing processes, allowing for easier integration of such photonic integrated circuits with other optical and non-optical devices.

[0027] Now referring to the attached diagram, in Figure 1The image presents a cross-sectional view 100 of an example optical device 102 with an integrated phase shifter 101. The optical device 102 can be representative of any optical device that requires phase shifting of an optical signal. For example, the optical device 102 can be an optical modulator, such as a ring modulator or a linear modulator. In another example, the optical device 102 can be an MZI. In some examples, the optical device 102 can form part of a photonic integrated circuit. In one example implementation, the photonic integrated circuit can be implemented in an optical transceiver. In some examples, the optical transceiver is located in an electronic system, such as, but not limited to, a (fixed or portable) computer, server, storage system, wireless access point, network switch, router, docking station, printer, or scanner.

[0028] In some examples, the optical device 102 may include an optical waveguide 104 and a waveguide-integrated capacitor 106, as well as electrical contact structures 108A, 108B, and 108C. Figure 1 In the example embodiment, three electrical contact structures 108A-108C are shown for illustrative purposes. In some other examples, the optical device 102 may include fewer or more electrical contact structures. During operation of the optical device 102, an optical waveguide 104 may allow light to pass through it, and a control voltage may be applied to the electrical contact structures 108A-108C to cause a phase shift in the optical signal passing through the optical waveguide 104. In some examples, the wavelength of the optical signal passing through the optical waveguide 104 may be in the range of 1100 nanometers (nm) to 2000 nm. The marked optical mode (using dashed circle 107, hereinafter referred to as optical mode 107) also overlaps with the waveguide integrated capacitor 106. The amount of phase shift induced in the optical signal may be proportional to the amplitude and / or polarity of such control voltage.

[0029] In some examples, the optical waveguide 104 can be formed using semiconductor materials: for example, silicon (Si), indium phosphide (InP), gallium arsenide (GaAs), silicon carbide (SiC), aluminum gallium arsenide (AlGaAs), indium gallium arsenate (InGaAs), or combinations thereof. For illustrative purposes, in Figure 1 In the remaining figures, the optical waveguide 104 is described as being formed using silicon. The optical waveguide 104 can be formed into various shapes depending on its respective application. For example, the optical waveguide 104 can have linear, nonlinear, or toroidal shapes, such as loop shapes or circuit shapes (e.g., circular loops, elliptical loops, rounded rectangular loops, rounded square loops, rounded triangular loops, etc.). In some examples, the optical waveguide 104 can have an elongated circuit shape (e.g., a racetrack shape).

[0030] Optical waveguide 104 may include a first semiconductor material region 110 and a second semiconductor material region 112 (hereinafter referred to as waveguide regions 110 and 112), the two semiconductor material regions being formed adjacent to each other and defining a junction 114 therebetween. In embodiments where optical waveguide 104 has a ring shape, waveguide regions 110 and 112 may also be formed in a ring shape. Waveguide regions 110 and 112 may both be formed of the same material (e.g., silicon) but are doped differently. For example, waveguide region 110 may include a first type of doping, and waveguide region 112 may include a different second type of doping. For illustrative purposes, the first type of doping is described as p-type, and the second type of doping is described as n-type. In other examples, the first type of doping may be n-type, and the second type of doping may be p-type. For illustrative purposes, in the following description and in the accompanying drawings, waveguide regions 110 and 112 are shown as including p-type doping and n-type doping, respectively.

[0031] n-type doping can be achieved by doping the corresponding semiconductor material with impurities having donor ions, including but not limited to phosphorus (P), arsenic (As), antimony (Sb), or bismuth (Bi). Therefore, an n-type doped semiconductor material can have more electrons than holes. In an n-type doped semiconductor material, these excess electrons are also called free electrons, and they function as free charge carriers. p-type doping can be achieved by doping the corresponding semiconductor material with impurities having acceptor ions, including but not limited to boron (B), gallium (Ga), indium (In), or aluminum (Al). Therefore, a p-type doped semiconductor material can have more holes than electrons. In a p-type doped semiconductor material, these excess holes are also called free holes, and they function as free charge carriers. n-type or p-type doping can be achieved using techniques such as impurity diffusion, ion implantation, and in-situ doping. In the following description, the term "free charge carrier" or "free charge carrier" can refer to a free electron in an n-type doped semiconductor material. In addition, the terms "free charge carrier" or "free charge carrier" can refer to free holes in a semiconductor material with p-type doping.

[0032] Waveguide regions 110 and 112, which are doped differently, are formed adjacent to each other, thereby defining a junction 114 (e.g., a PN junction) at the boundary of the waveguide regions 110 and 112 that are in contact with each other. Further, in some examples, the waveguide regions 110 and 112 are shaped to achieve a larger junction area between the waveguide regions 110 and 112. For example, in Figure 1In this embodiment, waveguide regions 110 and 112 are shaped to realize an L-shaped junction 114. Specifically, for example, waveguide region 112 may be formed with a rectangular cross-section, and waveguide region 110 may be formed with an L-shaped cross-section having a short side and a long side. Optical waveguide 104 may be formed such that at least a portion of waveguide region 110 is formed on waveguide region 112, and wherein an insulating layer 116 is formed on top of the first waveguide region 110, such as Figure 1 As described.

[0033] Furthermore, in some examples, the waveguide integrated capacitor 106 can be formed via an optical waveguide 104, an insulating layer 116, and a III-V semiconductor layer 118. The III-V semiconductor layer 118 can be formed of a III-V semiconductor material, such as InP, GaAs, AlGaAs, InGaAs, and InAs, or combinations thereof. For illustrative purposes, in Figure 1 In the remaining figures, the III-V semiconductor layer 118 is depicted as being formed of GaAs. Figure 1 As described, an insulating layer 116 is formed on top of the optical waveguide 104. Specifically, the insulating layer 116 is formed such that it is sandwiched between the waveguide region 110 and the III-V semiconductor layer 118. The insulating layer 116 may be formed of one or more dielectric materials, including but not limited to: a native oxide of the material of the optical waveguide 104 or the III-V semiconductor layer 118, or both, or an external dielectric material (such as a high-k dielectric or polymer that can be formed by deposition, oxidation, wafer bonding, or other dielectric coating methods). Examples of dielectric materials that can be used to form the insulating layer 116 may include silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum oxide (Al2O3), hafnium dioxide (HfO2), polyimide, benzocyclobutene (BCB), or combinations thereof.

[0034] A III-V semiconductor layer 118 can be formed on top of the insulating layer 116. Specifically, the III-V semiconductor layer 118 can be heterogeneously integrated onto the optical waveguide 104 via a thin oxide bonding layer (e.g., the insulating layer 116). In some examples, due to the heterogeneous integration of the III-V semiconductor layer 118 onto the optical waveguide, the optical mode 107 overlaps over the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, where the charge carrier density changes with the application of a control voltage (described later). This increased overlap between the optical mode 107 and the material layers of the phase shifter having such variable charge carrier density further improves the phase shifting efficiency.

[0035] In some examples, phase shifter 101 may receive a control voltage via electrical contact structures 108A-108C to control the phase shift in the optical signal passing through optical waveguide 104. Each electrical contact structure 108A-108C may include one or both of a semiconductor-based highly doped contact region and a metal contact. To induce a phase shift in the optical signal passing through optical waveguide 104, a first control voltage (e.g., a reverse bias voltage) may be applied to PN junction 114. This can be achieved by applying a first control voltage (e.g., a reverse bias voltage) to waveguide regions 110 and 112 via corresponding electrical contact structures 108A and 108B. For example, when a reverse bias voltage is applied to electrical contact structures 108A and 108B, PN junction 114 is said to operate in charge carrier depletion mode. In charge carrier depletion mode, the size of depletion region 115 at PN junction 114 may increase due to the reduced charge carrier density near PN junction 114 between waveguide regions 110 and 112. Specifically, in the depletion region 115, due to the applied reverse bias voltage, there are no majority charge carriers (e.g., electrons in n-type Si and holes in p-type Si). Typically, in the depletion region 115, there are still minority charge carriers (e.g., holes in n-type Si and electrons in p-type Si), and the number of minority charge carriers is very small compared to the majority charge carriers. This overall reduction in charge carrier density may cause an increase in the refractive index of the optical waveguide 104. Specifically, when the first control voltage is applied, the refractive index within the optical waveguide 104 may increase due to the increased size of the depletion region 115.

[0036] Furthermore, in some examples, a second control voltage (e.g., a reverse bias voltage) can be applied to the waveguide integrated capacitor 106, causing charge carriers to dissipate from both sides of the insulating layer 116. When such a control voltage causing charge carrier dissipation is applied, the waveguide integrated capacitor 106 is said to operate in a charge carrier dissipation mode. Specifically, when a reverse bias voltage is applied to the electrical contact structures 108A and 108C, electrons dissipate from the III-V semiconductor layer 118, and holes dissipate from the waveguide region 110, causing a decrease in the density of electrons and holes, respectively, in the III-V semiconductor layer 118 and the waveguide region 110 near the insulating layer 116. This decrease in the density of holes and electrons causes an increase in the refractive index of the corresponding material regions.

[0037] Similarly, in the proposed phase shifter 101 structure, because the heterogeneously integrated III-V semiconductor layer 118 has a much higher refractive index compared to the insulating layer 116, the optical mode 107 of the optical signal passing through the optical waveguide 104 overlaps with the III-V semiconductor layer 118 and the waveguide regions 110 and 112. With the application of the first and second control voltages, the charge carrier density in the waveguide regions 110 and 112 overlapping with the optical mode 107 and the III-V semiconductor layer 118 is altered, resulting in an increase in phase-shifting efficiency. Furthermore, in the example embodiment of the optical device 102, the application of the first and second control voltages simultaneously reduces the charge carrier density near the PN junction in the waveguide integrated capacitor 106 and the depletion region 115. This simultaneous reduction in charge carrier density causes a significant increase in the refractive index, thereby improving the phase-shifting efficiency. As will be described later, in some examples, the proposed phase shifter structure with PN junction optical waveguide 104 and heterogeneously integrated III-V semiconductor layer 118 achieves an effective refractive index increase of up to approximately 43.8% compared to a single independent bias of PN junction 114. In some examples, both PN junction 114 and waveguide integrated capacitor 106 operate with a forward bias voltage. This results in charge accumulation near the insulating region 116 of PN junction 114 and waveguide integrated capacitor 106, causing a significant overall reduction in the refractive index of optical waveguide 104. This significant reduction in refractive index also improves the phase shifting efficiency of the optical device.

[0038] Furthermore, in some examples, the first control voltage applied to the PN junction 114 and / or the second control voltage applied to the waveguide integrated capacitor 106 can be modulated by a signal ( Figure 1 (Not shown in the image) is modulated. Specifically, when the first control voltage is modulated, the refractive index within the optical waveguide 104 near the PN junction 114 can be changed according to this modulation signal. Similarly, when the second control voltage is modulated, the refractive index within the optical waveguide 104 near the insulating layer 116 and the refractive index of the III-V semiconductor layer 118 can be changed according to the modulation signal. This causes modulation of the optical signal passing through the optical waveguide 104 based on the modulation signal. In some examples, the modulation signals applied to the PN junction 114 and the waveguide integrated capacitor 106 can be different from each other.

[0039] Now for reference Figure 2 The image presents a cross-sectional view 200 of an example optical device 202. Optical device 202 may be an example representative of optical device 102. Optical device 202 may include a device structure 203 formed on a substrate 213. Device structure 203 may include an optical waveguide 204 and a waveguide integrated capacitor 206, the optical waveguide and the waveguide integrated capacitor being... Figure 1 The optical waveguide 104 and waveguide integrated capacitor 106 are described as examples.

[0040] Substrate 213 may be a silicon-on-insulator (SOI) substrate. In some examples, substrate 213 may include a base substrate layer 219, a base oxide layer 215, and a device layer 217. Base substrate layer 219 may be made of a semiconductor material (e.g., silicon (Si)). Other examples of materials that may be used to form base substrate layer 219 may include III-V semiconductors such as InP, GaAs, AlGaAs, or combinations thereof. Further, as... Figure 2 As described, the substrate 213 may include a base oxide layer 215 disposed on the underlying base substrate layer 219. For example, the base oxide layer 215 may be formed by oxidizing the substrate 213. Figure 2 In some embodiments, for a silicon-based substrate 219, a base oxide layer 215 may comprise SiO2, which may be formed in the presence of oxygen at a temperature ranging from 900°C to 1380°C. In some examples, the base oxide layer 215 may be a buried oxide (BOX) layer (e.g., SiO2 may be buried within the substrate 219). In some examples, depending on the application, the SiO2 layer may be buried within the substrate 219 at a depth ranging from less than 100 nm to several micrometers from the wafer surface. Other examples of the base oxide layer 215 may include, but are not limited to, Si3N4, Al2O3, HfO2, diamond, SiC, or combinations thereof.

[0041] Furthermore, the device layer 217 is disposed on top of the base oxide layer 215. Figure 2 In an example embodiment, device layer 217 is made of silicon. Device layer 217 can be suitably shaped (e.g., via techniques such as photolithography and etching) to form one or more regions, such as optical waveguide 204 and contact regions (e.g., first contact region 208A and second contact region 208B). Optical waveguide 204 can be an example representative of optical waveguide 104 and includes waveguide regions 210 and 212 formed adjacent to each other and defining a PN junction at the boundary where waveguide regions 210 and 212 contact each other. Waveguide integrated capacitor 206 can also be formed via waveguide region 210, insulating layer 216, and heterogeneously integrated III-V semiconductor layer 218 on top of insulating layer 216. Device structure 203 can also include a third contact region 208C. Contact regions 208A, 208B, and 208C, and corresponding metal contacts 220A, 220B, and 220C form electrical contact structures for optical device 202.

[0042] To illustrate the purpose, Figure 2In the diagram, contact regions 208A-208B are shown to be made of silicon, and contact region 208C is shown to be made of GaAs. In some other examples, contact regions 208A-208C may be made of other semiconductor materials, including but not limited to InP, GaAs, AlGaAs, or combinations thereof. The first contact region 208A may include a first type of doping (e.g., p-type doping) and is formed to contact waveguide region 210. Further, the second contact region 208B may include a second type of doping (e.g., n-type doping) and is formed to contact waveguide region 212. Further, the third contact region 208C may include a second type of doping (e.g., n-type doping) and is formed to contact III-V semiconductor layer 218. In some examples, for good metal contact resistance, contact regions 208A-208C may have a higher corresponding doping concentration compared to the doping concentrations in waveguide regions 210, 212, and III-V semiconductor layer 218. Therefore, the contact regions 208A-208C can be considered as highly doped regions and are used as... Figure 2 The labels “n++” and “p++” are described.

[0043] Furthermore, in some examples, the optical device 202 may include metal contacts, such as a first metal contact 220A, a second metal contact 220B, and a third metal contact 220C (hereinafter collectively referred to as metal contacts 220A-220C). Figure 2 As described, the first metal contact 220A and the second metal contact 220B are formed to make electrical contact with waveguide regions 210 and 212 (e.g., direct physical contact or via any intermediate conductive material), respectively. The third metal contact 220C is formed to make electrical contact with the III-V semiconductor layer 218. In some examples, metal contacts 220A, 220B, and 220C may be formed on top (i.e., vertically above) the waveguide regions 210 and 212 and the III-V semiconductor layer 218, respectively. Examples of materials used to form metal contacts 220A-220C may include, but are not limited to, copper (Cu), gold (Au), aluminum, and / or platinum (Pt).

[0044] During operation of the optical device 202, the optical waveguide 204 allows light to pass through it, and control voltages (V1 and V2) can be applied to the metal contacts 220A-220C to cause a phase shift in the optical signal passing through the optical waveguide 204. Specifically, the control voltages are applied to the PN junction 214 and the waveguide integrated capacitor 206 to simultaneously increase the charge carrier density near the PN junction 214 and the charge carrier density in the waveguide integrated capacitor 206. Specifically, in Figure 2In an example implementation, both control voltages V1 and V2 can be reverse bias voltages. For example, power supply 222 can be connected to contacts 220A and 220B to apply a first reverse bias voltage (V1). Therefore, PN junction 214 can operate in charge carrier depletion mode.

[0045] Furthermore, in some examples, a second reverse bias voltage (V2) can be applied to the waveguide integrated capacitor 206. Specifically, power supply 224 can be connected to contacts 220A and 220C to apply the second reverse bias voltage (V2) to the waveguide integrated capacitor 206. Due to the application of the second reverse bias voltage (V2), the waveguide integrated capacitor 206 can operate in a charge carrier dissipation mode. In some examples, the reverse bias voltages V1 and V2 can be modulated by a modulation signal (same or different) representing, for example, the data to be transmitted, to achieve the desired optical modulation. Therefore, in this example, by operating the PN junction 214 and the waveguide integrated capacitor 206 with a reverse bias voltage, the charge carrier density of the PN junction, the III-V semiconductor layer, and the first semiconductor material region can be reduced together, resulting in a larger overall change in refractive index (e.g., an increase in this example).

[0046] Figure 3A and Figure 3B Figures 300A and 300B respectively describe Figure 2 The example optical device 202 is illustrated with simulated distributions of free charge carriers under different settings of control voltages (e.g., reverse bias voltages V1 and V2). Specifically, in graphical representations 300A and 300B, only the device structure 203 (without metal contacts) is depicted to illustrate the distribution of free charge carriers. In graphical representations 300A and 300B, X-axis 302 and 304 represent the width, in μm, of the imaginary center line 301 dividing the device structure 203 into two equal parts. Further, Y-axis 306 and 308 represent the structure height, in μm. The charge density distribution scale 310 represents the distribution of free charge carrier density. Specifically, graphical representation 300A depicts a simulated distribution of free charge carriers when both voltages V1 and V2 are set to 0 (zero) volts (V) (hereinafter referred to as the first bias condition). The graphic representation 300B depicts the simulated distribution of free charge carriers when both voltages V1 and V2 are set to 2 (two) V (hereinafter referred to as the second bias condition). Figure 3A and Figure 3B The graphical representation was obtained through simulations performed using photon simulation software.

[0047] For these simulations, the thicknesses of the insulating layer 216, the optical waveguide 204, and the III-V semiconductor layer 218 were set to 10 nm, 400 nm, and 190 nm, respectively. Furthermore, for these simulations, the materials for the insulating layer 216, the optical waveguide 204, and the III-V semiconductor layer 218 were chosen to be Al₂O₃, silicon, and GaAs, respectively. As depicted in enlarged views 314 and 316, the charge carrier curves corresponding to the second bias condition differ from the electron carrier curves corresponding to the first bias condition. Specifically, compared to the first bias condition (e.g., V₁ = V₂ = 0 volts), a significant difference in the charge carrier curves was observed near the insulating layer of the PN junction and waveguide integrated capacitor structure under the second bias condition (e.g., when V₁ = V₂ = 2 volts). Specifically, in graphical representations 300A and 300B, waveguide region 212, contact region 208B, and III-V semiconductor layer 218 have electrons as the majority carriers, and the corresponding free carrier density (e.g., electron density) is read from the lower half 312A of the charge density distribution scale 310. Similarly, in graphical representations 300A and 300B, waveguide region 210 and contact region 208A have holes as the majority carriers, and the corresponding free carrier density (e.g., hole density) is read from the upper half 312B of the charge density distribution scale 310.

[0048] Furthermore, based on this spatial distribution of charge carriers, the photonic simulation software is configured to calculate the effective refractive index (n) of the optical waveguide (e.g., optical waveguide 204) corresponding to different settings (e.g., bias conditions) of voltages V1 and V2. eff Table 1 below represents the effective refractive index n of the optical waveguide for a given amplitude of control voltages V1 and V2. eff Example values.

[0049]

[0050] Table 1 Examples of Effective Refractive Indices

[0051] As can be observed from Table 1, the proposed dual control with V1 = V2 = 2V increases the effective refractive index by approximately 43.8% (= Δn4 / Δn3) compared to biasing the PN junction alone at 2V (i.e., V1 = 2V and V2 = 0V). Specifically, when both the PN junction 214 and the waveguide integrated capacitor 206 are biased at 2V (e.g., V1 = V2 = 2V), the effective refractive index increases to 3.170151, and the resulting refractive index change (Δn4) is approximately 43.8% higher than the refractive index change (Δn3) caused by the independent biasing of the PN junction 214 (e.g., when V1 = 2V and V2 = 0V).

[0052] Now go to Figure 4The image presents a cross-sectional view 400 of an example optical device 402. The optical device 402 may be... Figure 2 An example of an optical device 202 is shown, and includes... Figure 2 Several similar structural layers and aspects are described herein, the details of which will not be repeated here. For example, optical device 402 may include device structure 403 formed on substrate 413. Device structure 403 may include optical waveguide 404 and waveguide integrated capacitor 406, which are... Figure 1 The described optical waveguide 104 and waveguide integrated capacitor 106 are exemplified. The substrate 413 may include... Figure 2 The similar base substrate layer 419, base oxide layer 415, and device layer 417 described herein.

[0053] Device layer 417 can be suitably shaped (e.g., via techniques such as photolithography and etching) to form one or more regions, such as optical waveguide 404 and contact regions (e.g., first contact region 408A and second contact region 408B). Optical waveguide 404 can be a representative example of optical waveguide 104 and includes waveguide regions 410 and 412. Waveguide integrated capacitor 406 can also be formed via waveguide region 410, insulating layer 416, and heterogeneously integrated III-V semiconductor layer 418 on top of insulating layer 416. Specifically, contact region 408A is formed to contact waveguide region 410, and contact region 408B is formed to contact waveguide region 412. Further, device structure 403 may include a third contact region 408C formed on top of III-V semiconductor layer 418. In addition, metal contacts 420A, 420B, and 420C are formed to make electrical contacts with contact regions 408A, 408B, and 408C, respectively.

[0054] Waveguide regions 410 and 412 are formed adjacent to each other, thereby defining a PN junction 414 at the boundary where waveguide regions 410 and 412 contact each other. Specifically, in Figure 4 In an example implementation, waveguide regions 410 and 412 are shaped to achieve a larger junction area between waveguide regions 410 and 412. For example, in Figure 4In this embodiment, waveguide regions 410 and 412 are shaped to form an inverted U-junction 414. Waveguide region 410 may be formed on top of waveguide region 412 such that the three sides of waveguide regions 410 and 412 are in contact with each other, thereby creating an inverted U-junction or C-junction 414 between waveguide regions 410 and 412. This inverted U-junction or C-junction 414 provides a larger contact surface between waveguide regions 410 and 412, providing greater control over the charge carrier density in optical waveguide 404. This enhanced control over the charge carrier density can improve the phase shift efficiency of optical device 402. Similarly, the optical mode 407 of the optical signal passing through optical waveguide 404 also overlaps with waveguide regions 410 and 412, insulating layer 416, and III-V semiconductor layer 418, which improves the phase shift efficiency of optical device 402.

[0055] In some examples, control voltages (e.g., reverse bias voltages) for the optical waveguide 404 and waveguide integrated capacitor 406 can be applied to the optical device 402 via metal contacts 420A, 420B, and 420C. In some examples, when the control voltage is applied, the PN junction 414 operates in charge carrier depletion mode, and the waveguide integrated capacitor 406 operates in charge carrier dissipation mode. Therefore, the charge carrier density at the PN junction 414 in the optical waveguide 404 and the charge carrier density around the insulating layer 416 in the waveguide integrated capacitor 406 can be reduced simultaneously, resulting in a greater overall increase in refractive index.

[0056] Now go to Figure 5 The image presents a cross-sectional view 500 of an example optical device 502. The optical device 502 can be... Figure 2 An example of an optical device 202 is shown, and includes... Figure 2 Several structural layers and aspects similar to those described herein will not be repeated in detail here. For example, optical device 502 may include device structure 503 formed on substrate 513. Device structure 503 may include optical waveguide 504 and waveguide integrated capacitor 506, the optical waveguide and waveguide integrated capacitor being... Figure 2 The described optical waveguide 204 and waveguide integrated capacitor 206 are exemplified. The substrate 513 may include... Figure 2 The same as those described in the text, such as the base substrate layer 519, the base oxide layer 515, and the device layer 517.

[0057] Device layer 517 can be suitably shaped (e.g., via techniques such as photolithography and etching) to form one or more regions, such as optical waveguide 504 and contact regions (e.g., first contact region 508A and second contact region 508B). Specifically, with Figure 2Compared to the optical waveguide 204 with a PN junction 214, the optical waveguide 504 is formed with a PIN junction 514. The optical waveguide 504 also includes waveguide regions 510 and 512, respectively, as exemplified by waveguide regions 210 and 212. Furthermore, in this example, the optical waveguide 504 includes an intrinsic semiconductor material region 509 sandwiched between waveguide regions 210 and 212. Waveguide regions 210 and 212, and the intrinsic semiconductor material region 509 sandwiched between them, form the PIN junction 514. Although... Figure 5 The diagram shows an L-shaped PIN junction 514; within the scope of this disclosure, the use of PIN junctions of different shapes is contemplated. The optical mode 507 of the optical signal transmitted through the optical waveguide 504 also overlaps with the intrinsic semiconductor material region 509.

[0058] Furthermore, the waveguide integrated capacitor 506 can be formed via a waveguide region 510, an insulating layer 516, and a heterogeneously integrated III-V semiconductor layer 518 on top of the insulating layer 516. Further, the device structure 503 may include a third contact region 508C formed on top of the III-V semiconductor layer 518. Similarly, metal contacts 520A, 520B, and 520C are formed to make electrical contact with contact regions 508A, 508B, and 508C, respectively.

[0059] During operation of the optical device, the PIN junction 514 can be operated in charge carrier injection mode by applying a first control voltage. Figure 5 In the example implementation, the first control voltage is a forward bias voltage. Specifically, a first control voltage can be applied such that the potential at contact region 508A is higher than the potential at contact region 508B. When the PIN junction 514 is operated under this forward bias voltage, charge carriers are injected into the intrinsic semiconductor material region 509 due to the forward electric field caused by the first control voltage. Therefore, the carrier density in the intrinsic semiconductor material region 509 increases. Specifically, the increase in carrier density reduces the refractive index of the intrinsic semiconductor material region 509.

[0060] Furthermore, in Figure 5In an example implementation, the waveguide integrated capacitor 506 can be operated in a charge carrier accumulation mode by applying a forward bias second control voltage to the waveguide integrated capacitor 506. Specifically, the second control voltage can be applied such that the potential at contact region 508A is higher than the potential at contact region 508C. When the waveguide integrated capacitor 506 is operated under this forward bias voltage, charge carriers accumulate on both sides of the insulating region 516 in the III-V semiconductor layer 518 and the waveguide region 510 due to the forward electric field caused by the second control voltage. Therefore, the charge carrier density in the III-V semiconductor layer 518 increases. Specifically, the increase in charge carrier density reduces the refractive index of the intrinsic semiconductor material region 509. In some examples, by operating the waveguide integrated capacitor 506 and the PIN junction 514 simultaneously with a forward bias voltage, a larger overall change (e.g., a reduction) in the charge carrier density can be achieved, resulting in a larger change in refractive index and thus an improved phase-shift efficiency.

[0061] Now for reference Figure 6 The diagram presents a block diagram of an example electronic system 600. Examples of electronic system 600 may include, but are not limited to, (fixed or portable) computers, servers, storage systems, wireless access points, network switches, routers, docking stations, printers, or scanners. Electronic system 600 may be offered as a standalone product, a packaged solution, or can be purchased in full or used on a pay-as-you-go basis. Electronic system 600 may include one or more multi-chip modules, such as a multi-chip module (MCM) 602 for processing and / or storing data. In some examples, MCM 602 may include processing resources 604 and storage media 606 mounted on a circuit board 608. Additionally, in some examples, MCM 602 may carry a photonic chip 610 on circuit board 608. In some other examples, one or more of the processing resources 604, storage media 606, and photonic chip 610 may be carried on a separate MCM (not shown). The circuit board 608 may be a printed circuit board (PCB) including several conductive traces (not shown) to interconnect the processing resource 604, the storage medium 606 and the photonic chip 610 with each other and / or with other components arranged on or outside the PCB.

[0062] Processing resource 604 may be a physical device, such as one or more central processing units (CPUs), one or more semiconductor-based microprocessors, microcontrollers, one or more graphics processing units (GPUs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), other hardware devices capable of fetching and executing instructions stored in storage medium 606, or combinations thereof. Processing resource 604 can fetch, decode, and execute instructions stored in storage medium 606. As an alternative or supplement to executing instructions, processing resource 604 may include at least one integrated circuit (IC), control logic, electronic circuitry, or a combination thereof comprising multiple electronic components. Storage medium 606 may be any electronic, magnetic, optical, or any other physical storage device that contains or stores instructions readable and executable by processing resource 604. Therefore, storage medium 606 may be, for example, random access memory (RAM), non-volatile RAM (NVRAM), electrically erasable programmable read-only memory (EEPROM), storage devices, optical discs, etc. In some embodiments, storage medium 606 may be a non-transitory storage medium, wherein the term "non-transitory" does not cover transiently propagating signals.

[0063] Furthermore, in some examples, the photonic chip 610 may include a photonic controller 612 and one or more photonic devices, such as an optical device 614. The optical device 614 may be an example representative of any of optical devices 102, 202, 402, or 502. For illustrative purposes, in Figure 6 In this disclosure, photonic chip 610 is shown as including a single optical device 614. Different numbers of optical devices or several different types of optical devices are also contemplated within the scope of this disclosure. For example, photonic chip 610 may also include other photonic devices, such as, but not limited to, optical converters, optical cables, waveguides, optical modulators (e.g., ring modulators), optical demodulators (e.g., ring demodulators), resonators, light sources (e.g., lasers), etc. Photonic chip 610 can be used as an optical receiver, optical transmitter, optical transceiver, optical communication and / or processing medium for data and control signals (e.g., control voltages) received from photonic controller 612. Non-limiting examples of photonic controller 612 can be implemented using IC chips, such as, but not limited to, ASICs, FPGA chips, processor chips (e.g., CPUs and / or GPUs), microcontrollers, or dedicated processors. During operation of electronic system 600, photonic controller 612 can apply control voltages (e.g., ... Figure 2 The voltages V1 and V2 described herein are used to control the phase shift of the optical signal applied to the optical device 614. In some examples, greater control over the phase shift helps to achieve better optical signal modulation, thereby enabling efficient data communication.

[0064] Figure 7 Describes the formation of, for example Figure 2 Example method 700 of optical devices such as optical device 202. For illustrative purposes, in conjunction with... Figure 2 Method 700 has been described; however, the method steps described herein can also be applied to other example optical devices described above.

[0065] At block 702, a substrate is provided. In one example, the substrate may be an SOI substrate (e.g., substrate 213). Further, at block 704, an optical waveguide (e.g., optical waveguide 204) includes a first semiconductor material region (e.g., waveguide region 210) and a second semiconductor material region (e.g., waveguide region 212), which are formed adjacent to each other and define a junction (e.g., junction 214) therebetween. In some examples, the optical waveguide may be formed in a device layer (e.g., device layer 217) of the SOI substrate by suitably forming the device layer, for example, via techniques such as photolithography and etching. Specifically, in one example, the first and second semiconductor material regions are formed such that at least a portion of the first semiconductor material region is formed on the second semiconductor material region. In some examples, the first and second semiconductor material regions are formed such that an L-shaped junction or a U-shaped junction is formed at the contact surface of the first and second semiconductor material regions.

[0066] In some examples, in order to form a PIN knot (e.g., Figure 5 As described in the PIN junction 514, the device layer can be suitably shaped to form optical waveguides (e.g., optical waveguide 504) and contact regions (e.g., contact regions 508A and 508B). For example, once these regions are defined, impurity doping is performed to induce... Figure 5 The corresponding doping is described. In some examples, impurity doping may not be performed in the intrinsic semiconductor material region 509. This results in the formation of a PIN junction 514 via waveguide regions 510, 512 and intrinsic semiconductor material region 509.

[0067] Further, at frame 706, an insulating layer (e.g., insulating layer 216) can be formed on top of the optical waveguide. The insulating layer can be formed using thermal growth techniques and / or deposition techniques (such as chemical vapor deposition (CVD)). Additionally, at frame 708, a III-V semiconductor layer (e.g., III-V semiconductor layer 218) can be formed on top of the insulating layer. The III-V semiconductor layer can be formed using epitaxial growth, deposition techniques (e.g., CVD), wafer bonding, transfer printing, or combinations thereof. Specifically, techniques such as epitaxial growth and / or wafer bonding of the III-V semiconductor layer facilitate planar heterogeneous integration of other device structures (such as lasers, modulators, and photon detectors) all on a common substrate (e.g., substrate 213). As previously described, the first semiconductor material region, the insulating layer, and the III-V semiconductor layer form a waveguide integrated capacitor (e.g., waveguide integrated capacitor 206). When an optical signal passes through the optical waveguide, the optical mode of the optical signal overlaps completely with the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, resulting in an effective phase shift of the optical signal.

[0068] Furthermore, in some examples, one or more contact areas (e.g., contact areas 208A, 208B, and 208C) may be formed at box 710. For example, as Figure 2 As described, contact regions 208A, 208B, and 208C can be formed to contact the first semiconductor material region, the second semiconductor material region, and the III-V semiconductor layer, respectively. Contact regions 208A-208C can be formed using techniques such as, but not limited to, thermal growth, CVD, wafer bonding, molecular beam epitaxy (MBE), and / or doping of each region with suitable impurities. For example, contact regions 208B and 208C are doped to include a second type (e.g., n-type) doping, and contact region 208A is doped to include a first type (e.g., p-type) doping. Further, in some examples, at block 712, metal contacts (e.g., metal contacts 220A, 220B, and 220C) are formed on contact regions 208A, 208B, and 208C, respectively.

[0069] Now go to Figure 8 This shows how to operate, for example Figure 2 Example method 800 of optical devices such as optical device 202. For illustrative purposes, in conjunction with Figure 2 Method 800 has been described; however, the method steps described herein can also be applied to other example optical devices described above.

[0070] For example, at block 802, an optical signal can pass through the optical waveguide 204 of the optical device 202. Due to the heterogeneous integration of the III-V semiconductor layer 218 on the optical waveguide 204 via a thin insulating layer 216, the optical mode 207 of the optical signal overlaps with the waveguide regions 210, 212, the insulating layer 216, and the III-V semiconductor layer 218. Further, at block 804, a first control voltage is applied to a junction in the optical waveguide 204. For example, as... Figure 2 As described, a first reverse bias voltage V1 can be applied to the PN junction 214 to cause a change in the refractive index of the optical waveguide 204 (e.g., an increase in the case of the optical device 202), as previously described. Figure 2 Furthermore, in some examples, at block 806, a second control voltage is applied to the waveguide integrated capacitor 206 to cause a change in the refractive index of the waveguide integrated capacitor 206. Specifically, the second control voltage is configured such that the change in the refractive index of the waveguide integrated capacitor 206 is in the same direction as the change in the refractive index of the optical waveguide 204, thereby achieving a larger overall change in refractive index. For example, in Figure 2 In the optical device 202, the second control voltage is also a reverse bias voltage, causing the waveguide integrated capacitor 206 to operate in charge carrier dissipation mode, resulting in an increase in the refractive index of the waveguide integrated capacitor 206. In this way, by simultaneously operating both the PN junction 214 with a reverse bias voltage and the waveguide integrated capacitor 206, a large change in refractive index can be achieved, thereby improving the phase shift efficiency of the optical device 202.

[0071] In another example implementation (e.g., Figure 5 In the optical device 502, the optical waveguide has a PIN junction 514, and a first control voltage (i.e., the voltage applied to the PIN junction 514) and a second control voltage (i.e., the voltage applied to the waveguide integrated capacitor 506) are forward bias voltages. This forward bias voltage is applied to... Figure 5 The optical device 502 causes a simultaneous decrease in the refractive index of the optical waveguide and the waveguide integrated capacitor. Therefore, the refractive index of the PIN junction 514 and the refractive index of the waveguide integrated capacitor 506 can decrease together, resulting in an improvement in the phase shift efficiency of the optical device 502.

[0072] The terminology used herein is for the purpose of describing particular examples and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” used herein are intended to include the plural forms as well. The term “another” as used herein is defined as at least a second or more. Unless otherwise indicated, the term “coupled to” as used herein is limited to a connection, whether a direct connection without any intervening elements or an indirect connection with at least one intervening element. For example, two elements may be mechanically, electrically, or optically coupled to each other or communicatively connected via a communication channel, path, network, or system. Furthermore, the term “and / or” as used herein refers to and covers any and all possible combinations of the associated enumerated items. It should also be understood that although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms, as these terms are only used to distinguish one element from another unless otherwise stated or indicated by the context. As used herein, the term "includes" means including but not limited to, and the term "including" means including but not limited to. The term "based on" means "at least partially based on".

[0073] Although specific implementations have been shown and described above, various changes in form and detail can be made. For example, some features and / or functions described with respect to one implementation and / or process can be associated with other implementations. In other words, the processes, features, components, and / or properties described with respect to one implementation can be used in other implementations. Furthermore, it should be understood that the systems and methods described herein can include various combinations and / or sub-combinations of components and / or features of the different implementations described. Moreover, the method blocks described in the various methods can be executed sequentially, simultaneously, or in combination thereof. Further, the method blocks can also be executed in a different order than that described in the flowcharts.

[0074] Furthermore, numerous details have been set forth in the foregoing description to provide an understanding of the subject matter disclosed herein. However, embodiments may be made without some or all of these details. Other embodiments may include modifications, combinations, and variations of the details discussed above. The appended claims are intended to cover such modifications and variations.

Claims

1. An optical device, the optical device comprising: An optical waveguide, the optical waveguide including a first semiconductor material region and a second semiconductor material region, wherein a junction is defined between the first semiconductor material region and the second semiconductor material region; An insulating layer is formed on top of the optical waveguide; as well as A III-V semiconductor layer is formed on top of the insulating layer, such that the optical mode of the optical signal passing through the optical waveguide overlaps with the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, thereby causing a phase shift in the optical signal passing through the optical waveguide.

2. The optical device as claimed in claim 1, wherein, The junction between the first semiconductor material region and the second semiconductor material region is L-shaped, wherein at least a portion of the first semiconductor material region is formed on the second semiconductor material region, and wherein the insulating layer is formed on top of the first semiconductor material region.

3. The optical device as claimed in claim 1, wherein, The junction between the first semiconductor material region and the second semiconductor material region is inverted U-shaped, wherein the first semiconductor material region is formed on the second semiconductor material region, and wherein the insulating layer is formed on top of the first semiconductor material region.

4. The optical device as claimed in claim 1, wherein, The optical device is located in the optical transceiver.

5. The optical device as claimed in claim 4, wherein, The optical transceiver is located in one or more of a server, storage device, router, network switch, or access point.

6. The optical device as claimed in claim 1, wherein, The first semiconductor material region includes p-type doping, and the second semiconductor material region and the III-V semiconductor layer include n-type doping.

7. The optical device as claimed in claim 6, wherein, The junction is a PN junction, and the PN junction is operated in charge carrier depletion mode by applying a first control voltage to the first semiconductor material region and the second semiconductor material region to cause depletion of charge carriers from the depletion region near the PN junction.

8. The optical device as claimed in claim 7, wherein, The first semiconductor material region, the insulating layer, and the III-V semiconductor layer form a waveguide integrated capacitor integrated with the optical waveguide, wherein the waveguide integrated capacitor is operated in charge carrier dissipation mode by applying a second control voltage to cause hole dissipation in the first semiconductor material region near the insulating layer and electron dissipation in the III-V semiconductor layer near the insulating layer.

9. The optical device as claimed in claim 8, wherein, Operating the PN junction in charge carrier depletion mode and the waveguide integrated capacitor in charge carrier dissipation mode causes the effective refractive index of the optical waveguide to increase by up to 43.8%, resulting in improved phase shift efficiency.

10. The optical device as claimed in claim 7, wherein, The wavelength of the optical signal passing through the optical waveguide is in the range of 1100 nanometers (nm) to 2000 nm.

11. The optical device as claimed in claim 1, wherein, The optical waveguide further includes an intrinsic semiconductor material region sandwiched between the first semiconductor material region and the second semiconductor material region, wherein the optical mode overlaps with the intrinsic semiconductor material region.

12. An electronic system comprising: Processing resources; A storage medium, the storage medium being communicatively coupled to the processing resource; as well as A photonic chip, communicatively coupled to the processing resource and including an optical device, wherein the optical device includes: An optical waveguide, the optical waveguide including a first semiconductor material region and a second semiconductor material region, the first semiconductor material region and the second semiconductor material region being formed adjacent to each other and defining a junction therebetween; An insulating layer formed on top of the optical waveguide; and A III-V semiconductor layer is formed on top of the insulating layer, such that the optical mode of the optical signal passing through the optical waveguide overlaps with the first semiconductor material region, the second semiconductor material region, the insulating layer, and the III-V semiconductor layer, thereby causing a phase shift in the optical signal passing through the optical waveguide.

13. The electronic system of claim 12, wherein, The junction between the first semiconductor material region and the second semiconductor material region is L-shaped, wherein at least a portion of the first semiconductor material region is formed on the second semiconductor material region, and wherein the insulating layer is formed on top of the first semiconductor material region.

14. The electronic system of claim 12, wherein, The junction between the first semiconductor material region and the second semiconductor material region is inverted U-shaped, wherein the first semiconductor material region is formed on the second semiconductor material region, and wherein the insulating layer is formed on top of the first semiconductor material region.

15. The electronic system of claim 12, wherein, The first semiconductor material region includes n-type doping, and the second semiconductor material region and the III-V semiconductor layer include p-type doping.

16. The electronic system of claim 12, wherein, The optical waveguide further includes an intrinsic semiconductor material region sandwiched between the first semiconductor material region and the second semiconductor material region, wherein the optical mode also overlaps with the intrinsic semiconductor material region.

17. The electronic system of claim 12, wherein, The processing resources, the storage medium, and one or more of the photonic chips are mounted on a circuit board to form a multi-chip module.

18. A method for operating an optical device, the method comprising: An optical waveguide of the optical device is used to transmit an optical signal, wherein the optical waveguide includes a first semiconductor material region and a second semiconductor material region, a junction is defined between the first semiconductor material region and the second semiconductor material region, an insulating layer is formed on top of the optical waveguide, and a III-V semiconductor layer is formed on top of the insulating layer, wherein the first semiconductor material region, the insulating layer and the III-V semiconductor layer form a waveguide integrated capacitor, and wherein the optical mode of the optical signal in the optical waveguide overlaps with the first semiconductor material region, the second semiconductor material region, the insulating layer and the III-V semiconductor layer; A first control voltage is applied to the junction to cause a change in the refractive index of the optical waveguide; and A second control voltage is applied to the waveguide integrated capacitor to cause a change in the refractive index of the waveguide integrated capacitor in the same direction as a change in the refractive index of the optical waveguide.

19. The method of claim 18, wherein, The junction is a PN junction, and the first control voltage and the second control voltage are reverse bias voltages, causing the refractive index of the optical waveguide and the refractive index of the waveguide integrated capacitor to increase simultaneously.

20. The method of claim 18, wherein, The junction is a PIN junction, and the first control voltage and the second control voltage are forward bias voltages that cause the refractive index of the optical waveguide and the refractive index of the waveguide integrated capacitor to decrease simultaneously.

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