A PCB hole position machining precision detection method and device and a storage medium

Abstract

The embodiment of the application provides a PCB hole position machining precision detection method and device and a storage medium, and belongs to the technical field of PCB hole position machining. The method comprises the following steps: obtaining a first design hole position from a PCB hole position design file; obtaining a PCB image of a PCB; detecting the contour of the PCB image by using a findContours function method, and then determining a first machining hole position; performing coordinate conversion on the first design hole position and the first machining hole position to obtain a second design hole position and a second machining hole position in the same coordinate system; matching the second design hole position with the second machining hole position to obtain a matching result; and calculating machining precision according to the matching result. The embodiment of the application can improve the detection speed of hole position machining precision.

Description

Technical Field

[0001] The present application relates to the technical field of PCB processing and detection, and in particular to a method, device and storage medium for detecting the processing accuracy of PCB board holes. Background Art

[0002] Currently, hole machining accuracy testing is a key manufacturing process inspection method used to detect hole machining errors caused by factors such as process fluctuations and tool accuracy during PCB fabrication. Hole machining accuracy testing is an essential task in mechanical manufacturing. However, with the advancement of integrated circuit and modern PCB manufacturing processes, hole shapes vary widely, with sizes typically in the millimeter range, and the number of holes can reach tens of thousands or even hundreds of thousands. Existing hole machining accuracy inspection methods are mostly limited to inspecting a small number of holes. When inspecting a large number of holes, the inspection speed is slow and the time cost is high. Therefore, these technical issues urgently need to be addressed within the industry. Summary of the Invention

[0003] The main purpose of the embodiments of the present application is to propose a method, device and storage medium for detecting the hole processing accuracy of a PCB board, aiming to improve the detection speed of the hole processing accuracy.

[0004] The embodiments of this application disclose the following technical solutions:

[0005] On the one hand, an embodiment of the present application provides a method for detecting the machining accuracy of a PCB hole, the method comprising:

[0006] Obtain a first designed hole position from a PCB board hole position design file, where the first designed hole position is a designed position of a hole;

[0007] Get the PCB image of the PCB board;

[0008] Using a findContours function method to detect the contour of the PCB image, and then determine a first processing hole position, where the first processing hole position is an actual processing position of the hole in the PCB board;

[0009] Performing coordinate transformation on the first designed hole position and the first processed hole position to obtain a second designed hole position and a second processed hole position in the same coordinate system;

[0010] Matching the second designed hole position with the second processed hole position to obtain a matching result;

[0011] Calculate the machining accuracy based on the matching results.

[0012] In one embodiment, the detecting the contour of the PCB image using the findContours function method and then determining the first processing hole position includes:

[0013] Using the findContours function method to identify the contours in the PCB image and the level information of the contours, the level information of the contours includes the sequence number of the next contour, the sequence number of the previous contour, the sequence number of the child contour and the sequence number of the parent contour;

[0014] Determining a PCB board outline of the PCB image according to the level information of the outline;

[0015] The outline of the hole is determined from the PCB board outline in the PCB image, thereby determining the first processing hole position according to the outline of the hole.

[0016] In one embodiment, the coordinate conversion of the first designed hole position and the first processed hole position includes:

[0017] Scan the dot matrix calibration plate to obtain the calibration plate image;

[0018] Performing corner point detection on the calibration plate image to obtain corner points of the calibration plate image as calibration points;

[0019] A two-dimensional linear interpolation function is established according to the calibration points. The expression of the two-dimensional linear interpolation function is:

[0020] interp1=LinearInterp(corners pixel , corners worldx )

[0021] interp2=LinearInterp(corners pixel , corners worldy )

[0022] Among them, interp1 is the linear interpolation function of the horizontal axis, interp2 is the linear interpolation function of the vertical axis, and corners pixel are the coordinates of the calibration points on the calibration plate image, corners worldx is the horizontal coordinate of the calibration point in the world coordinate system, corners worldy It is the ordinate of the calibration point in the world coordinate system, and LinearInterp is the LinearNDlnterpolator function.

[0023] In one embodiment, the coordinate conversion of the first designed hole position and the first processed hole position further includes:

[0024] The coordinates of the first processing hole position in the world coordinate system are calculated using the two-dimensional linear interpolation function. The coordinate expression of the first processing hole position in the world coordinate system is:

[0025] xworld =interp1(x pixel )

[0026] y world =interp2(y pixel )

[0027] where x pixel is the horizontal coordinate of the first processing hole position on the PCB image, y pixel is the vertical coordinate of the first processing hole position on the PCB image, x world is the horizontal coordinate of the first processing hole in the world coordinate system, y world is the vertical coordinate of the first processing hole position in the world coordinate system.

[0028] In one embodiment, performing coordinate conversion on the first designed hole position and the first processed hole position to obtain the second designed hole position and the second processed hole position in the same coordinate system includes:

[0029] Selecting a reference design coordinate in the first design hole position;

[0030] Selecting a reference processing coordinate in the first processing hole position according to the reference design coordinate;

[0031] Performing coordinate transformation on the first designed hole position according to the reference design coordinate to obtain a second designed hole position;

[0032] The first processing hole position is coordinate-converted according to the reference processing coordinate to obtain a second processing hole position.

[0033] In one embodiment, matching the second designed hole position with the second processed hole position to obtain a matching result includes:

[0034] Creating a two-dimensional tree according to the coordinates of the second processing hole position;

[0035] The second designed hole position is matched with the second processed hole position using the two-dimensional tree to obtain a matching result, wherein the matching result includes the second designed hole position, the second processed hole position that is most similar to the second designed hole position, and the difference between the second designed hole position and the second processed hole position.

[0036] In one embodiment, creating a two-dimensional tree according to the coordinates of the second processing hole position includes:

[0037] Obtaining a coordinate set of the second processing hole position as a first set;

[0038] Take the first set as the current set;

[0039] Calculating the horizontal axis variance and the vertical axis variance of the current set;

[0040] The larger of the horizontal axis variance and the vertical axis variance is selected as the current dimension variance, and the horizontal axis or the vertical axis is selected as the segmentation dimension according to the current dimension variance. The segmentation dimension is the feature dimension used in each segmentation.

[0041] Sort the current set by the value of the segmentation dimension, and obtain the coordinate value in the middle of the sorting result as the median;

[0042] Mount the median value to a two-dimensional tree, mount the coordinate values ​​on the left side of the median value in the current set to the left subtree of the median value, and mount the coordinate values ​​on the right side of the median value in the current set to the right subtree of the median value;

[0043] Add all coordinates in the current set to the left of the median or all coordinates in the current set to the right of the median to the second set;

[0044] The second set is used as the current set, and the process returns to the step of calculating the horizontal axis variance and the vertical axis variance of the current set until the current set contains only one coordinate.

[0045] In one embodiment, using the two-dimensional tree to match the second designed hole position with the second processed hole position to obtain a matching result includes:

[0046] Using the second designed hole position as a query value to search the two-dimensional tree, and obtaining a second processing hole position that matches the second designed hole position;

[0047] The difference between the second designed hole position and the second processed hole position is calculated.

[0048] In one embodiment, calculating the machining accuracy according to the matching result includes:

[0049] Calculating a mean μ and a standard deviation σ of the difference between the second designed hole position and the second processed hole position according to the difference;

[0050] The process capability index is calculated based on the mean μ and standard deviation σ of the difference. The process capability index represents the processing accuracy in actual processing. The calculation formula of the process capability index is as follows:

[0051]

[0052] Where CPK is the process capability index, Min is the minimum function, USL is the upper specification limit, and LSL is the lower specification limit.

[0053] In one embodiment, the method further includes a step of preprocessing the PCB image, wherein the step of preprocessing the PCB image includes at least one of the following:

[0054] Using a Gaussian filtering algorithm to remove noise from the PCB image;

[0055] Converting the PCB image from a grayscale image to a binary image;

[0056] The PCB image is downsampled using an image pyramid algorithm.

[0057] On the other hand, an embodiment of the present application provides a device for detecting hole processing accuracy of a PCB board, the device comprising:

[0058] A designed hole position acquisition module is used to obtain a first designed hole position from a PCB board hole position design file, where the first designed hole position is a designed position of a hole;

[0059] An image acquisition module, used to acquire an image of the PCB board;

[0060] a detection module, configured to detect the contour of the PCB image using a findContours function method, and thereby determine a first processing hole position, where the first processing hole position is an actual processing position of the hole in the PCB board;

[0061] A coordinate conversion module, configured to perform coordinate conversion on the first designed hole position and the first processed hole position to obtain the second designed hole position and the second processed hole position in the same coordinate system;

[0062] A matching module, configured to match the second designed hole position with the second processed hole position to obtain a matching result;

[0063] The processing accuracy calculation module is used to calculate the processing accuracy based on the matching results.

[0064] On the other hand, an embodiment of the present application provides an electronic device, which includes a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, it implements the PCB board hole processing accuracy detection method described above.

[0065] On the other hand, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the above-mentioned PCB board hole processing accuracy detection method.

[0066] The present application provides a method, device, and storage medium for detecting the machining accuracy of PCB board hole positions. The method first obtains a first designed hole position and determines the first machined hole position using the findContours function method. The method then converts the first designed hole position and the first machined hole position to obtain a second designed hole position and a second machined hole position. The method then matches the second machined hole position with the second designed hole position to determine the machining accuracy. By obtaining the first designed hole position and determining the first machined hole position using the findContours function method, converting the first designed hole position and the first machined hole position, and matching the converted second designed hole position with the second machined hole position, the method achieves hole position machining accuracy detection, thereby improving the speed of hole position machining accuracy detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] Figure 1 This is a flow chart of a method for detecting PCB board hole processing accuracy provided in an embodiment of the present application;

[0068] Figure 2 yes Figure 1 Flowchart of step S103 in FIG.

[0069] Figure 3 yes Figure 1 A flow chart of step S104 in FIG.

[0070] Figure 4 It is a schematic diagram of Delaunay triangulation;

[0071] Figure 5 It is a schematic diagram of linear barycentric interpolation;

[0072] Figure 6 yes Figure 1 Another flow chart of step S104 in FIG.

[0073] Figure 7 It is a coordinate transformation diagram;

[0074] Figure 8 yes Figure 1 Flowchart of step S105 in FIG.

[0075] Figure 9 Schematic diagram of the structure of the PCB board hole processing accuracy detection device provided in an embodiment of the present application;

[0076] Figure 10 This is a schematic diagram of the hardware structure of the electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0077] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0078] It should be noted that although the device schematics illustrate functional module divisions and the flowcharts illustrate logical sequences, in certain circumstances, the steps shown or described may be performed in a sequence that differs from the module divisions in the device or the sequence in the flowcharts. The terms "first," "second," and so on, in the specification, claims, and drawings, are used to distinguish similar items and are not necessarily used to describe a specific sequence or precedence.

[0079] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application pertains. The terms used herein are for the purpose of describing the embodiments of this application only and are not intended to limit this application.

[0080] First, let’s analyze some of the terms used in this application:

[0081] PCB (Printed Circuit Board): The Chinese name for printed circuit board, also known as printed circuit board, is an important electronic component. It is the support body of electronic components and the carrier for the electrical connection between electronic components. Because it is made using electronic printing technology, it is called a "printed" circuit board.

[0082] The Process Capability Index (CPK) measures the degree to which a process meets product quality standards (such as specification ranges). Also known as the process capability index, it represents the actual processing capability of a process under control (stable state) over a given period of time. The CPK represents the inherent capability of a process, or in other words, its ability to ensure quality. The process referred to here is the combined effect of five fundamental quality factors: operator, machine, raw materials, process method, and production environment—the process that produces product quality.

[0083] Dot Pattern Calibration Board: Also known as a retinal calibration board or pixel calibration board, it is a tool used to calibrate digital devices. It can be used to detect and adjust the pixel precision and color accuracy of digital devices such as monitors, printers, scanners, and digital cameras.

[0084] Linear Interpolation Function: It is a basic interpolation function whose purpose is to interpolate between given data points and generate a continuous straight line passing through these points.

[0085] Gaussian filtering: This is an image smoothing technique based on a Gaussian function that can remove noise and detail from an image and improve image quality. The main idea behind this algorithm is to perform a weighted average of each pixel in the image and its surrounding pixels according to a Gaussian distribution, thereby blurring the image and reducing noise.

[0086] Image Pyramid: Used for multi-scale image representation and processing. The original image is divided into layers according to different resolutions, forming an image pyramid consisting of multiple scales. Each layer of the pyramid contains different resolution versions of the original image, which can be achieved through operations such as upsampling and downsampling.

[0087] The Upper Specification Limit (USL) is the maximum allowable specification value for a product. If the measurement result of a product exceeds the USL, it means that the product does not meet the specification requirements and must be considered defective or unqualified.

[0088] The Lower Specification Limit (LSL) is the minimum allowable specification value for a product. Similarly, if the measurement result of a product is lower than the LSL, it means that the product does not meet the specification requirements and must be considered defective or unqualified.

[0089] Existing methods can usually only detect up to a few hundred holes. If a large number of holes are to be detected, since existing methods directly use image processing algorithms to detect holes, such as the Hough transform method or the connected area detection method, these algorithms have a large amount of computation and it takes a long time to complete the detection of tens of thousands of holes, which cannot meet the demand for speed.

[0090] Based on this, the embodiments of the present application provide a method, device and storage medium for detecting the hole processing accuracy of a PCB board, aiming to improve the detection speed of the hole processing accuracy.

[0091] The PCB board hole processing accuracy detection method, device and storage medium provided in the embodiments of the present application are specifically illustrated through the following embodiments. First, the PCB board hole processing accuracy detection method in the embodiments of the present application is described.

[0092] The PCB board hole processing accuracy detection method provided in the embodiment of the present application relates to the field of PCB processing detection technology. The PCB board hole processing accuracy detection method provided in the embodiment of the present application can be applied in a terminal, can also be applied in a server side, and can also be software running in a terminal or a server side. In some embodiments, the terminal can be a smart phone, a tablet computer, a laptop computer, a desktop computer, etc.; the server side can be configured as an independent physical server, or can be configured as a server cluster or distributed system composed of multiple physical servers, and can also be configured as a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms; the software can be an application that implements the PCB board hole processing accuracy detection method, etc., but is not limited to the above forms.

[0093] Figure 1 This is an optional flow chart of the PCB board hole processing accuracy detection method provided in the embodiment of the present application. Figure 1 The method may include but is not limited to steps S101 to S106.

[0094] Step S101: Obtain a first designed hole position from a PCB hole position design file.

[0095] Specifically, a PCB hole design file is a file used to describe and illustrate the locations and characteristics of holes during the design and manufacturing of a printed circuit board (PCB). This application does not impose specific limitations on PCB hole design files; they can be flexibly prepared based on actual manufacturing needs. For example, a PCB hole design file may include at least one of hole dimensions, hole coordinates, and hole arrangement.

[0096] The first designed hole position is the designed position of the hole without coordinate transformation. This application does not impose any specific restrictions on the first designed hole position, and it can be flexibly selected based on actual testing needs. For example, the first designed hole position can be the center, center of gravity, center of a circumscribed circle, or the outline of the hole.

[0097] In this embodiment, the first designed hole positions are obtained from the PCB board hole position design file, which prepares for the subsequent conversion of the first designed hole positions into the second designed hole positions.

[0098] Step S102: Acquire a PCB image of the PCB board.

[0099] Specifically, the PCB image is an image of a PCB board. This application does not specifically limit the method for acquiring the PCB image, and a flexible selection can be made based on actual needs. For example, the PCB image can be acquired by optical scanning, camera shooting, or linear array scanning.

[0100] In this embodiment, acquiring the PCB image of the PCB board lays a foundation for subsequently detecting the contour of the PCB image.

[0101] In some embodiments, before step S103, the method may further include a step of preprocessing the PCB image. The step of preprocessing the PCB image includes at least one of the following:

[0102] Use Gaussian filtering algorithm to remove noise from PCB images;

[0103] Convert the PCB image from grayscale to binary image;

[0104] The PCB image is downsampled using the image pyramid algorithm.

[0105] Among them, since there are a lot of noise points outside the PCB outline range, they need to be filtered out, so the Gaussian filtering algorithm is used to remove the noise of the PCB image.

[0106] Downsampling is used to reduce the resolution of the PCB image. This application does not specifically limit the downsampling method, and it can be flexibly selected based on actual detection needs. For example, the downsampling method can be to reduce the length and width of the image to half of the original image or to average pooling;

[0107] In this embodiment, by preprocessing the image, the detection speed can be improved while ensuring the detection accuracy.

[0108] Step S103: Use the findContours function to detect the contour of the PCB image, and then determine the first processing hole position.

[0109] The first processing hole position is the actual processing position of the hole in the PCB board without coordinate transformation. This application does not make any specific restrictions on the first processing hole position, and it can be flexibly selected in combination with actual detection needs. For example, the first processing hole position can be the center, center of gravity, center of a circumscribed circle, or the outline of the hole. It is understandable that the first processing hole position corresponds to the first design hole position. If the first design hole position is the center of the hole, then the first processing hole position should also be the center of the hole.

[0110] In some embodiments, the findContours function can be used to detect the contour of the PCB image, and then the first processing hole location can be determined based on the detected contour. This application does not specifically limit the method for determining the first processing hole location. The first processing hole location can be determined based on the contour of the PCB board or the shape of the contour.

[0111] The comparison between the present invention's method for detecting the first processing hole position and the existing image detection algorithm is shown in Table 1 below:

[0112] Table 1

[0113]

[0114]

[0115] As can be seen from Table 1, the detection method based on the findContours function method of the present invention takes about 1.9 seconds, and the detection speed is significantly better than the detection method in the prior art.

[0116] In this embodiment, the contour of the PCB image is detected by the findContours function method, and then the first processing hole position is determined, so that efficient hole position detection can be achieved and tens of thousands of PCB board hole positions can be quickly detected.

[0117] Step S104 : performing coordinate transformation on the first designed hole position and the first processed hole position to obtain a second designed hole position and a second processed hole position in the same coordinate system.

[0118] Coordinate transformation is used to transform the first design hole location and the first machining hole location in different coordinate systems into the same coordinate system. This application does not specifically limit the method of coordinate transformation, and it can be flexibly selected based on actual needs. Exemplarily, the method of coordinate transformation includes but is not limited to using a linear interpolation function for coordinate transformation, and selecting a reference design coordinate and a reference machining coordinate for coordinate transformation.

[0119] The second designed hole position is the designed position of the hole after coordinate transformation. This application does not specifically limit the second designed hole position, and it can be flexibly selected based on actual testing needs. For example, the second designed hole position can be the center, center of gravity, center of a circumscribed circle, or the outline of the hole.

[0120] The second processing hole location is the actual processing position of the hole in the PCB board after coordinate transformation. This application does not specifically limit the second processing hole location, and it can be flexibly selected based on actual testing needs. For example, the second processing hole location can be the center, center of gravity, center of a circumscribed circle, or the outline of the hole.

[0121] Similarly, the second processed hole position corresponds to the second designed hole position. If the second designed hole position is the center of the hole, then the second processed hole position should also be the center of the hole.

[0122] In an embodiment of the present invention, since the first designed hole position and the first processed hole position are not in the same coordinate system, it is necessary to perform coordinate transformation on the first designed hole position and the first processed hole position to obtain the second designed hole position and the second processed hole position in the same coordinate system to prepare for subsequent hole position matching.

[0123] Step S105 , matching the second designed hole position with the second processed hole position to obtain a matching result.

[0124] This application does not impose any specific restrictions on the matching results, and can be flexibly selected based on actual detection needs. For example, the matching results can be the second design hole position, the second processed hole position that is most similar to the second design hole position, and the difference between the second design hole position and the second processed hole position.

[0125] In an embodiment of the present invention, the second designed hole location is matched with the second machined hole location to obtain a matching result. The matching method may include, but is not limited to, at least one of a convolutional neural network (CNN), a gray-level co-occurrence matrix (GLCM), or a two-dimensional tree matching method. By implementing the above method, the second designed hole location and the second machined hole location can be quickly matched, reducing time costs.

[0126] Step S106: Calculate the processing accuracy based on the matching result.

[0127] Processing accuracy refers to the level of accuracy that can be achieved during the processing. This application does not impose any specific restrictions on processing accuracy, and it can be flexibly selected based on actual testing needs.

[0128] For example, the machining accuracy may be the distance between the centers of the second designed hole position and the second machined hole position, the process capability index, or the difference between the second designed hole position and the second machined hole position.

[0129] In some embodiments, step S106 includes calculating a mean μ and a standard deviation σ of the difference between the second designed hole position and the second processed hole position, and calculating a process capability index based on the mean μ and the standard deviation σ of the difference. The process capability index represents the processing accuracy in actual processing. The calculation formula of the process capability index is as follows:

[0130]

[0131] Where CPK is the process capability index, Min is the minimum function, USL is the upper specification limit, and LSL is the lower specification limit.

[0132] In the embodiment of the present invention, by calculating the process capability index, the stability level of the machining process can be obtained, thereby evaluating the machining accuracy more objectively, quantitatively and accurately.

[0133] In steps S101 to S106 shown in the embodiment of the present application, the first design hole position is obtained and the first processing hole position is determined by using the findContours function method, the first design hole position and the first processing hole position are converted, and the converted second design hole position and the second processing hole position are matched, so that the processing accuracy is calculated according to the matching result to realize the hole processing accuracy detection, thereby improving the hole processing accuracy detection speed.

[0134] See also Figure 2 In some embodiments, step S103 may include but is not limited to steps S201 to S203:

[0135] Step S201: using the findContours function to identify the contours and the level information of the contours in the PCB image.

[0136] In some embodiments, the findContours expression is as follows:

[0137] contours, hierarchy=findcontours(image)

[0138] Among them, contours is the detected contour, and hierarchy is the level information of the contour.

[0139] The level information of the contour is the topological structure of the contour, including the sequence number of the next contour, the sequence number of the previous contour, the sequence number of the child contour and the sequence number of the parent contour.

[0140] In the embodiment of the present invention, the findContours function method is used to identify the contours and the level information of the contours in the PCB image, which lays a foundation for the subsequent determination of the PCB board contour, filtering of noise, and determination of the first processing hole position.

[0141] Step S202: determining the PCB board outline of the PCB image according to the level information of the outline.

[0142] It can be understood that, since the parent contours of the contours of all holes in the PCB board are the PCB board contour, the contour of the PCB board can be found accordingly.

[0143] In the embodiment of the present invention, since the hole in the PCB board is being detected, the parent contour of the contour of the hole in the PCB board should be the PCB board contour (i.e., the serial number of the PCB board contour appears more than once in the parent contour, generally the serial number that appears the most times). Based on this, the contour of the PCB board can be found, preparing for subsequent noise filtering and determining the first processing hole position.

[0144] For example, when the level information of the contour is shown in Table 2 below, since the parent contour numbers of the contours numbered 6 to 26 are all 5, and the number -1 represents that there is no such contour, the contour numbered 5 is the PCB board contour.

[0145] Table 2

[0146]

[0147]

[0148] Step S203: determining the outline of the hole from the PCB board outline in the PCB image, thereby determining the first processing hole position according to the outline of the hole.

[0149] In some embodiments, the first processing hole position is the center of the minimum circumscribed circle. When detecting the contour, the minimum circumscribed circle is fitted for each contour. The center position of the minimum circumscribed circle is the center position of each contour, and this position is used to represent the first processing hole position.

[0150] In some embodiments, the minimum circumscribed circle is fitted using the cv2.minEnclosing function. The pseudo code of the algorithm is as follows:

[0151]

[0152] Where P is the set of contour points, p is a contour point, and D is the minimum circumscribed circle. The pseudo code of the algorithm b_mindisk is as follows:

[0153]

[0154] where b_md(P,R) is defined as the smallest circumcircle containing P, and all points in R are on the circumcircle.

[0155] It should be noted that all contours outside the PCB board are noise contours and should be filtered out, so the contour of the hole in the PCB board contour is determined as the first processing hole position.

[0156] In this embodiment, noise filtering is performed according to the outline of the PCB board, thereby improving the anti-interference capability and effectively resisting image noise.

[0157] See also Figure 3 In some embodiments, step S104 may include but is not limited to steps S301 to S304:

[0158] Step S301 : Scan the dot matrix calibration plate to obtain an image of the calibration plate.

[0159] In some embodiments, the present application does not specifically limit the scanning method, and it can be flexibly selected in combination with actual detection needs. For example, the scanning method can be optical scanning, camera shooting, or linear array scanning.

[0160] In the embodiment of the present invention, an image of a calibration plate is obtained, which prepares for the subsequent determination of calibration points.

[0161] Step S302 : performing corner detection on the calibration plate image to obtain corner points of the calibration plate image as calibration points.

[0162] Corner detection is used to automatically detect locations in an image where angles or edges intersect. This application does not impose specific restrictions on corner detection; it can be flexibly selected based on actual detection needs. For example, the corner detection algorithm can be Harris corner detection, Shi-Tomasi corner detection, FAST corner detection, or SIFT corner detection.

[0163] The calibration points are the corner points of the calibration plate image and are used to establish a two-dimensional linear interpolation function. This application does not impose any specific restrictions on the calibration points and they can be flexibly selected based on actual detection needs.

[0164] In some embodiments, the image coordinates (in pixels) of each corner point are extracted through corner point detection, and the distance (in millimeters) between any adjacent corner points on the calibration plate is known. The corner points are used as calibration points, and the coordinates of the calibration points on the calibration plate image and the coordinates of the calibration points in the world coordinate system can be obtained.

[0165] In this embodiment, the coordinates of the calibration points on the calibration plate image and the coordinates of the calibration points in the world coordinate system are obtained through corner point detection, which prepares for the subsequent establishment of a two-dimensional linear interpolation function.

[0166] Step S303: establishing a two-dimensional linear interpolation function according to the calibration points.

[0167] In some embodiments, a world coordinate system based on the calibration points is established. The lower left corner calibration point is defined as the origin of the world coordinate system, the horizontal right direction is the positive x direction, and the vertical upward direction is the positive y direction. Based on this, two two-dimensional linear interpolation functions can be established. The expressions of the two-dimensional linear interpolation functions are:

[0168] interp1=LinearInterp(corners pixel , corners worldx )

[0169] interp2=LinearInterp(corners pixel , corners worldy )

[0170] Among them, interp1 is the linear interpolation function of the horizontal axis, interp2 is the linear interpolation function of the vertical axis, and corners pixel are the coordinates of the calibration points on the calibration plate image, corners worldx is the horizontal coordinate of the calibration point in the world coordinate system, corners worldy is the ordinate of the calibration point in the world coordinate system, and LinearInterp is the LinearNDInterpolator function.

[0171] In some embodiments, performing linear interpolation using the LinearNDInterpolator function includes:

[0172] Delaunay triangles are created based on the given calibration point matrix using the Delaunay triangulation method. The Delaunay triangulation diagram is shown in the figure below. Figure 4 As shown in Figure 2. Each point in the calibration matrix contains both world coordinates and image coordinates.

[0173] When performing linear interpolation, for a point to be interpolated, quickly find its minimum circumscribed triangle, and then use the three vertices of the triangle to perform linear barycentric interpolation. Figure 5 shown.

[0174] Assume that V1, V2, and V3 are three calibration lattice points. There is a first processing hole P located in the triangle, where X is the horizontal pixel coordinate of point P and Y is the vertical pixel coordinate of point P.

[0175] First calculate the distance D between point P and each vertex:

[0176]

[0177]

[0178]

[0179] Then calculate the world coordinates of point P (WX P , WY P ):

[0180]

[0181]

[0182] The weight W is the reciprocal of the distance D.

[0183] In this embodiment, a two-dimensional linear interpolation function is established, which lays a foundation for calculating the coordinates of the first processing hole position in the world coordinate system.

[0184] Step S304 : Calculate the coordinates of the first machining hole in the world coordinate system using a two-dimensional linear interpolation function.

[0185] In some embodiments, the coordinate expression of the first processing hole position in the world coordinate system is:

[0186] x world =interp1(x pixel )

[0187] y world =interp2(y pixel )

[0188] where x pixel is the horizontal coordinate of the first processing hole position on the PCB image, y pixel is the vertical coordinate of the first processing hole on the PCB image, x world is the horizontal coordinate of the first processing hole in the world coordinate system, y world It is the vertical coordinate of the first processing hole position in the world coordinate system.

[0189] It is understood that step S304 is the process of parameter transfer or parameter substitution into the function relationship expression calculation process. The corresponding horizontal coordinate or vertical coordinate is mapped according to the two-dimensional linear interpolation function to obtain the coordinate in the world coordinate system. For example, the corresponding horizontal coordinate or vertical coordinate can be multiplied by the two-dimensional linear interpolation function to obtain the coordinate in the world coordinate system.

[0190] In this embodiment, the coordinates of the first processing hole position in the world coordinate system are obtained through a two-dimensional linear interpolation function, which realizes the rapid conversion of pixel coordinates to world coordinates, so that the first processing hole position and the first design hole position are both in the world coordinate system, providing conditions for the subsequent coordinate conversion of the first design hole position and the first processing hole position to obtain the second design hole position and the second processing hole position in the same coordinate system.

[0191] See also Figure 6 In some embodiments, step S104 may also include but is not limited to steps S601 to S604:

[0192] Step S601: Select a reference design coordinate in the first design hole position.

[0193] The reference design coordinates are used as a basis for establishing a coordinate system to perform coordinate transformation on the first design hole location. This application does not impose specific restrictions on the reference design coordinates, and they can be flexibly selected based on actual testing needs. For example, the reference design coordinates can be the coordinates of two horizontal corners or two vertical corners in the first design hole location.

[0194] In some embodiments, optionally, a method based on x- and y-coordinate sorting is used to quickly locate the coordinates of the horizontal vertex angle and the vertical vertex angle.

[0195] It can be understood that the present embodiment selects the reference design coordinates to prepare for the subsequent coordinate transformation of the first design hole position to obtain the second design hole position.

[0196] Step S602 : selecting a reference machining coordinate in the first machining hole position according to the reference design coordinate.

[0197] The reference machining coordinates are used as a reference for establishing a coordinate system to perform coordinate transformation on the first machining hole. This application does not impose specific restrictions on the reference machining coordinates, and they can be flexibly selected based on actual inspection needs. For example, the reference machining coordinates can be the coordinates of two horizontal vertex angles or two vertical vertex angles in the first machining hole.

[0198] In some embodiments, the reference processing coordinates that match the reference design coordinates are found based on their positions. It is understood that the reference design coordinates correspond to the reference processing coordinates. If the reference design coordinates are two horizontal vertex angles, then the reference processing coordinates should also be two horizontal vertex angles.

[0199] It can be understood that the present embodiment selects the reference processing coordinates to prepare for the subsequent coordinate conversion of the first processing hole position to obtain the second processing hole position.

[0200] Step S603 : performing coordinate transformation on the first designed hole position according to the reference design coordinate to obtain the second designed hole position.

[0201] In some embodiments, coordinate transformation is performed on the first designed hole position to obtain the second designed hole position as follows: Figure 7 As shown in the figure, O1 is the original world coordinate, and P0 and P1 are the reference design coordinates. is the horizontal axis of the new coordinate. Given any first design hole position P n , establish vector P0 and P n The distance between Obtained respectively and The unit vector

[0202] and

[0203] The angle between the two Then P n The second designed hole position obtained after coordinate transformation is (d·cosθ, d·sinθ).

[0204] In this embodiment, coordinate transformation is performed on the first designed hole position according to the reference design coordinates to obtain the second designed hole position, so that the second designed hole position is located on the coordinate system formed by the reference design coordinates.

[0205] Step S604 , performing coordinate transformation on the first processing hole position according to the reference processing coordinate to obtain a second processing hole position.

[0206] Since the reference processing coordinates correspond to the reference design coordinates, a coordinate conversion method similar to step S603 can be used to determine the second processing hole position.

[0207] In this embodiment, the first processing hole position is coordinate transformed according to the reference processing coordinate to obtain the second processing hole position. The calculation process of this embodiment is simple and fast, and a fast coordinate transformation can be performed to obtain the second processing hole position located on the coordinate system formed by the reference processing coordinates, so that the second design hole position and the second processing hole position are located on the same coordinate system.

[0208] See also Figure 8 In some embodiments, step S105 may also include but is not limited to steps S801 to S802:

[0209] Step S801: Create a two-dimensional tree according to the coordinates of the second processing hole position.

[0210] A two-dimensional tree is a binary search tree that is used to solve problems such as searching and range queries in a two-dimensional space, enabling efficient data organization and search. This application does not impose any specific restrictions on two-dimensional trees, and can be flexibly selected based on actual detection needs. For example, the two-dimensional tree can be a kd tree (k-dimensional tree) when k=2 or a balanced binary search tree (AVL tree).

[0211] In step S801 of some embodiments, creating a two-dimensional tree according to the coordinates of the second processing hole position includes:

[0212] Obtaining a coordinate set of the second processing hole position as the first set;

[0213] Take the first set as the current set;

[0214] Calculate the horizontal axis variance and vertical axis variance of the current set;

[0215] The larger of the horizontal axis variance and the vertical axis variance is selected as the current dimension variance. The horizontal axis or the vertical axis is selected as the segmentation dimension based on the current dimension variance. The segmentation dimension is the feature dimension used in each segmentation.

[0216] Sort the current set by the value of the segmentation dimension, and obtain the coordinate value in the middle of the sorting result as the median;

[0217] Hang the median value to the two-dimensional tree, hang the coordinate value to the left of the median in the current set to the left subtree of the median, and hang the coordinate value to the right of the median in the current set to the right subtree of the median;

[0218] Add all coordinates in the current set to the left of the median or all coordinates in the current set to the right of the median to the second set;

[0219] Use the second set as the current set and return to the step of calculating the horizontal and vertical variances of the current set until the current set contains only one coordinate.

[0220] Specifically, the pseudo code for creating a two-dimensional tree based on the coordinates of the second processing hole position is as follows:

[0221] Set k=2;

[0222] Determine the split domain and calculate the data variance of all the coordinates of the second processing hole positions on the horizontal and vertical axes. Select the maximum value, and the corresponding dimension is the value of the split domain. A large data variance indicates that the data along the coordinate axis is more dispersed, and the data segmentation in this direction has better resolution;

[0223] Determine the Node-data field and sort the Data-set by the value of its split field. The second processing hole located in the middle is selected as the Node-data. The new Data-set' = Data-set\Node-data (this expression means that the new Data-set' is any point except the Node-data point, and the \ in the expression means except).

[0224] dataleft={d belongs to Data-set'&&d[split]≤Node-data[split]}

[0225] Left_Range={Range&&dataleft}dataright={d belongs to Data-set'&&d[split]>Node-data[split]}

[0226] Right_Range={Range&&dataright}

[0227] left = kd tree created by (dataleft, Left_Range), i.e. recursively calling createKDTree(dataleft, Left_Range). And setting the parent field of left to Kd;

[0228] right = the kd tree created by (dataright, Right_Range), i.e., calling createKDTree(dataright, Right_Range). And setting the parent domain of right to Kd;

[0229] Where Node-data is an n-dimensional vector (k-dimensional), Range is the spatial range represented by the node, split is the direction axis index perpendicular to the splitting hyperplane, Left is a kd-tree consisting of all data points in the left subspace of the node's splitting hyperplane, Right is a kd-tree consisting of all data points in the right subspace of the node's splitting hyperplane, and parent is the parent node.

[0230] It can be understood that this embodiment creates a two-dimensional tree, which prepares for the subsequent use of the two-dimensional tree to match the second designed hole position with the second processed hole position.

[0231] Step S802: Use a two-dimensional tree to match the second designed hole position with the second processed hole position to obtain a matching result.

[0232] Matching is the process of finding the second processing hole location that is most similar to the second design hole location using a two-dimensional tree. This application does not impose a specific limit on the definition of most similar, and it can be flexibly selected based on actual detection needs. For example, the most similar can be the closest distance or the most similar shape.

[0233] In some embodiments, step S802 includes querying the second designed hole position as a query value in the two-dimensional tree to obtain a second processed hole position that matches the second designed hole position, and calculating the difference between the second designed hole position and the second processed hole position.

[0234] For example, the pseudo code for matching the second designed hole position with the second processed hole position is as follows:

[0235] Start the query from the root node and move down recursively. If the input point is on the left side of the partition plane, it will enter the left child node; if it is on the right side, it will enter the right child node;

[0236] Once you reach a leaf node, consider that node the "current best point." Exit the recursion and run the following steps for each node you pass through: If the current point is closer to the input point than the current best point, make it the current best point. Check the other subtree for closer points, and if so, continue down from that node. Once the root node search is complete, the nearest neighbor search is complete.

[0237] In an embodiment of the present invention, the second designed hole position and the second processed hole position are matched through a two-dimensional tree. Compared with the prior art which matches a small number of hole positions manually, the present application can quickly match a large number of hole positions, with a high matching speed and low time cost.

[0238] A specific application embodiment of the method of the present application includes:

[0239] Get the first designed hole position from the PCB board hole position design file;

[0240] Get the PCB image of the PCB board;

[0241] Perform image preprocessing on the PCB image. Image preprocessing includes using a Gaussian filter algorithm to remove noise from the PCB image, converting the PCB image from a grayscale image to a binary image, and downsampling the PCB image using an image pyramid algorithm.

[0242] The findContours function is used to identify the contours and the level information of the contours in the PCB image;

[0243] Determine the PCB board outline of the PCB image according to the level information of the outline;

[0244] Determine the hole outline from the PCB outline in the PCB image, fit a minimum circumscribed circle to each outline, and use the center of the minimum circumscribed circle as the center of each outline. This position represents the first processing hole position, and filter out all noise outlines outside the PCB board.

[0245] Scan the dot matrix calibration plate to obtain the calibration plate image;

[0246] Perform corner detection on the calibration plate image to obtain the corner points of the calibration plate image as calibration points;

[0247] A two-dimensional linear interpolation function is established based on the calibration points. The expression of the two-dimensional linear interpolation function is:

[0248] interp1=LinearInterp(corners pixel , corners worldx )

[0249] interp2=LinearInterp(corners pixel, corners worldy )

[0250] Among them, interp1 is the linear interpolation function of the horizontal axis, interp2 is the linear interpolation function of the vertical axis, and corners pixel are the coordinates of the calibration points on the calibration plate image, corners worldx is the horizontal coordinate of the calibration point in the world coordinate system, corners worldy is the ordinate of the calibration point in the world coordinate system, and LinearInterp is the LinearNDInterpolator function;

[0251] Use the two-dimensional linear interpolation function to calculate the coordinates of the first processing hole position in the world coordinate system. The coordinate expression of the first processing hole position in the world coordinate system is:

[0252] x world =interp1(x pixel )

[0253] y world =interp2(y pixel )

[0254] where x pixel is the horizontal coordinate of the first processing hole position on the PCB image, y pixel is the vertical coordinate of the first processing hole on the PCB image, x world is the horizontal coordinate of the first processing hole in the world coordinate system, y world It is the vertical coordinate of the first processing hole position in the world coordinate system;

[0255] Select the reference design coordinates in the first design hole position;

[0256] Selecting a reference processing coordinate in the first processing hole position according to the reference design coordinate;

[0257] Performing coordinate transformation on the first designed hole position according to the reference design coordinate to obtain the second designed hole position;

[0258] Performing coordinate transformation on the first processing hole position according to the reference processing coordinate to obtain the second processing hole position;

[0259] Obtaining a coordinate set of the second processing hole position as the first set;

[0260] Take the first set as the current set;

[0261] Calculate the horizontal axis variance and vertical axis variance of the current set;

[0262] The larger of the horizontal axis variance and the vertical axis variance is selected as the current dimension variance. The horizontal axis or the vertical axis is selected as the segmentation dimension based on the current dimension variance. The segmentation dimension is the feature dimension used in each segmentation.

[0263] Sort the current set by the value of the segmentation dimension, and obtain the coordinate value in the middle of the sorting result as the median;

[0264] Hang the median value to the two-dimensional tree, hang the coordinate value to the left of the median in the current set to the left subtree of the median, and hang the coordinate value to the right of the median in the current set to the right subtree of the median;

[0265] Add all coordinates in the current set to the left of the median or all coordinates in the current set to the right of the median to the second set;

[0266] Take the second set as the current set and return to the step of calculating the horizontal and vertical variances of the current set until the current set contains only one coordinate, thus obtaining a two-dimensional tree.

[0267] The second designed hole position is used as a query value to search in the two-dimensional tree to obtain a second processing hole position that matches the second designed hole position;

[0268] Calculating the difference between the second designed hole position and the second processed hole position;

[0269] Calculate the mean μ and standard deviation σ of the difference between the second designed hole position and the second processed hole position;

[0270] The process capability index is calculated based on the mean μ and standard deviation σ of the difference. The process capability index represents the processing accuracy in actual processing. The calculation formula of the process capability index is as follows:

[0271]

[0272] Where CPK is the process capability index, Min is the minimum function, USL is the upper specification limit, and LSL is the lower specification limit.

[0273] When this application is run on a computer with an Intel(R) Core(TM) i7-9750H CPU @ 2.60GHz and 32G RAM, the overall running time is less than 3 seconds.

[0274] See also Figure 9 The present application also provides a device for detecting the machining accuracy of a PCB hole position, which can implement the above-mentioned method for detecting the machining accuracy of a PCB hole position. The device includes:

[0275] The design hole position acquisition module 901 is used to obtain a first design hole position from a PCB hole position design file, where the first design hole position is a design position of a hole;

[0276] An image acquisition module 902 is used to acquire an image of a PCB board;

[0277] A detection module 903 is configured to detect the contour of the PCB image using a findContours function method, thereby determining a first processing hole position, where the first processing hole position is an actual processing position of a hole in the PCB board;

[0278] A coordinate conversion module 904 is used to perform coordinate conversion on the first designed hole position and the first processed hole position to obtain a second designed hole position and a second processed hole position in the same coordinate system;

[0279] A matching module 905 is configured to match the second designed hole position with the second processed hole position to obtain a matching result;

[0280] The processing accuracy calculation module 906 is used to calculate the processing accuracy according to the matching result.

[0281] The specific implementation of the PCB board hole position processing accuracy detection device is basically the same as the specific embodiment of the PCB board hole position processing accuracy detection method described above, and will not be repeated here.

[0282] The contents of the method embodiments of the present invention are all applicable to the present method embodiments. The functions specifically implemented by the present method embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0283] The present application also provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the above-described method for detecting the machining accuracy of PCB hole positions. The electronic device can be any smart terminal, such as a tablet computer or an in-vehicle computer.

[0284] See also Figure 10 , Figure 10 The hardware structure of an electronic device according to another embodiment is shown. The electronic device includes:

[0285] The processor 1001 can be implemented as a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application;

[0286] The memory 1002 can be implemented in the form of a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 1002 can store an operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1002 and is called by the processor 1001 to execute the PCB board hole processing accuracy detection in the embodiments of this application;

[0287] Input / output interface 1003, used to implement information input and output;

[0288] Communication interface 1004, used to implement communication interaction between this device and other devices, which can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WiFi, Bluetooth, etc.);

[0289] Bus 1005 , which transmits information between various components of the device (e.g., processor 1001 , memory 1002 , input / output interface 1003 , and communication interface 1004 );

[0290] The processor 1001 , the memory 1002 , the input / output interface 1003 and the communication interface 1004 are connected to each other in communication within the device via the bus 1005 .

[0291] An embodiment of the present application also provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the above-mentioned PCB board hole processing accuracy detection method.

[0292] The contents of the method embodiments of the present invention are all applicable to the storage medium embodiments. The functions specifically implemented by the storage medium embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0293] The memory, as a non-transient computer-readable storage medium, can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0294] In summary, the present invention provides a method, device, and storage medium for detecting PCB hole machining accuracy, which have the following advantages:

[0295] (1) By preprocessing the image, the detection speed can be improved while ensuring the detection accuracy, and efficient hole position detection can be achieved through the findContours function method, which can quickly detect tens of thousands of PCB board holes;

[0296] (2) The present application can quickly convert the pixel coordinates of the first processing hole position into world coordinates through a two-dimensional linear interpolation function, and the present application can perform a rapid coordinate conversion so that the second design hole position and the second processing hole position are located in the same coordinate system;

[0297] (3) The present application uses a two-dimensional tree to match the second designed hole position with the second processed hole position. Compared with the existing technology that matches a small number of hole positions manually, the present application can quickly match a large number of hole positions with a high matching speed and low time cost.

[0298] The embodiments described in the embodiments of this application are intended to more clearly illustrate the technical solutions of the embodiments of this application and do not constitute a limitation on the technical solutions provided by the embodiments of this application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0299] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0300] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, i.e., they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0301] Those skilled in the art will appreciate that all or some of the steps in the methods, systems, and functional modules / units in the devices disclosed above may be implemented as software, firmware, hardware, or appropriate combinations thereof.

[0302] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0303] It should be understood that in this application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0304] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the above-mentioned units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0305] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0306] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0307] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes multiple instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of the present application. The aforementioned storage medium includes: various media that can store programs, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0308] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but are not intended to limit the scope of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and essence of the present invention should be within the scope of the present invention.

Claims

1. A method for detecting the processing accuracy of PCB board holes, characterized in that: The method comprises: Obtain a first designed hole position from a PCB board hole position design file, where the first designed hole position is a designed position of a hole; Get the PCB image of the PCB board; Using a findContours function method to detect the contour of the PCB image, and then determine a first processing hole position, where the first processing hole position is an actual processing position of the hole in the PCB board; Performing coordinate transformation on the first designed hole position and the first processed hole position to obtain a second designed hole position and a second processed hole position in the same coordinate system; Matching the second designed hole position with the second processed hole position to obtain a matching result; Calculate the machining accuracy based on the matching results.

2. The method according to claim 1, characterized in that The method of using the findContours function to detect the contour of the PCB image and then determining the first processing hole position includes: Using the findContours function method to identify the contours in the PCB image and the level information of the contours, the level information of the contours includes the sequence number of the next contour, the sequence number of the previous contour, the sequence number of the child contour and the sequence number of the parent contour; Determining a PCB board outline of the PCB image according to the level information of the outline; The outline of the hole is determined from the PCB board outline in the PCB image, thereby determining the first processing hole position according to the outline of the hole.

3. The method according to claim 1, characterized in that The coordinate conversion of the first designed hole position and the first processed hole position includes: Scan the dot matrix calibration plate to obtain the calibration plate image; Performing corner point detection on the calibration plate image to obtain corner points of the calibration plate image as calibration points; A two-dimensional linear interpolation function is established according to the calibration points. The expression of the two-dimensional linear interpolation function is: interp1=LinearInterp(corners pixel ,corners worldx ) interp2=LinearInterp(corners pixel ,corners worldy ) Among them, interp1 is the linear interpolation function of the horizontal axis, interp2 is the linear interpolation function of the vertical axis, and corners pixel are the coordinates of the calibration points on the calibration plate image, corners worldx is the horizontal coordinate of the calibration point in the world coordinate system, corners worldy is the ordinate of the calibration point in the world coordinate system, and LinearInterp is the LinearNDInterpolator function.

4. The method according to claim 1, wherein The matching of the second designed hole position with the second processed hole position to obtain a matching result includes: Creating a two-dimensional tree according to the coordinates of the second processing hole position; The second designed hole position is matched with the second processed hole position using the two-dimensional tree to obtain a matching result, wherein the matching result includes the second designed hole position, the second processed hole position that is most similar to the second designed hole position, and the difference between the second designed hole position and the second processed hole position.

5. The method according to claim 4, characterized in that The creating of a two-dimensional tree according to the coordinates of the second processing hole position includes: Obtaining a coordinate set of the second processing hole position as a first set; Take the first set as the current set; Calculating the horizontal axis variance and the vertical axis variance of the current set; The larger of the horizontal axis variance and the vertical axis variance is selected as the current dimension variance, and the horizontal axis or the vertical axis is selected as the segmentation dimension according to the current dimension variance. The segmentation dimension is the feature dimension used in each segmentation. Sort the current set by the value of the segmentation dimension, and obtain the coordinate value in the middle of the sorting result as the median; Mount the median value to a two-dimensional tree, mount the coordinate values ​​on the left side of the median value in the current set to the left subtree of the median value, and mount the coordinate values ​​on the right side of the median value in the current set to the right subtree of the median value; Add all coordinates in the current set to the left of the median or all coordinates in the current set to the right of the median to the second set; The second set is used as the current set, and the process returns to the step of calculating the horizontal axis variance and the vertical axis variance of the current set until the current set contains only one coordinate.

6. The method according to claim 4, characterized in that The using the two-dimensional tree to match the second designed hole position with the second processed hole position to obtain a matching result includes: Using the second designed hole position as a query value to search the two-dimensional tree, and obtaining a second processing hole position that matches the second designed hole position; The difference between the second designed hole position and the second processed hole position is calculated.

7. The method according to claim 6, characterized in that Calculating the machining accuracy according to the matching results includes: Calculating a mean μ and a standard deviation σ of the difference between the second designed hole position and the second processed hole position according to the difference; The process capability index is calculated based on the mean μ and standard deviation σ of the difference. The process capability index represents the processing accuracy in actual processing. The calculation formula of the process capability index is as follows: Where CPK is the process capability index, Min is the minimum function, USL is the upper specification limit, and LSL is the lower specification limit.

8. A PCB board hole processing accuracy detection device, characterized in that: The device comprises: A designed hole position acquisition module is used to obtain a first designed hole position from a PCB board hole position design file, where the first designed hole position is a designed position of a hole; An image acquisition module, used to acquire an image of the PCB board; a detection module, configured to detect the contour of the PCB image using a findContours function method, and thereby determine a first processing hole location, where the first processing hole location is an actual processing position of the hole in the PCB board; A coordinate conversion module, configured to perform coordinate conversion on the first designed hole position and the first processed hole position to obtain the second designed hole position and the second processed hole position in the same coordinate system; A matching module, configured to match the second designed hole position with the second processed hole position to obtain a matching result; The processing accuracy calculation module is used to calculate the processing accuracy based on the matching results.

9. An electronic device, characterized in that: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the PCB board hole processing accuracy detection method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method for detecting the machining accuracy of PCB board holes according to any one of claims 1 to 7 is implemented.

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