Hybrid integrated heterogeneous optoelectronic fusion integrated chip and method

Abstract

An optoelectronic fusion integrated chip and method based on hybrid integration, silicon-silicon oxide-lithium niobate chip and bulk silicon electronic chip, III-V laser chip are integrated together through hybrid integration, realizing high linearity, large bandwidth modulator and laser, high compactness passive photonic device, electronic device full integration, playing the advantages of silicon-based, silicon oxide, III-V, lithium niobate, bulk silicon material, avoiding the lattice mismatch and thermal mismatch between silicon-based material and III-V material, reducing the lattice mismatch and thermal mismatch between silicon-based material and lithium niobate material, avoiding high temperature and high cost silicon-based process.

Description

Technical Field

[0001] This invention belongs to the field of hybrid optoelectronic heterogeneous integration technology, and in particular, a heterogeneous optoelectronic fusion integrated chip and integration method based on hybrid integration. Background Technology

[0002] Since the beginning of this century, with the development of high-speed data communication technology, the requirements for communication equipment with high transmission rates, large capacity, and low latency have become increasingly stringent. Due to the bottlenecks of traditional electronic technology, such as low speed and narrow bandwidth, optoelectronic systems, which combine the advantages of photons—low jitter, low latency, and high bandwidth—have emerged. Optoelectronic fusion systems consist of both optical and electrical components. Early optoelectronic fusion systems used discrete components, which had disadvantages such as large size, unstable performance, and high losses. Currently, optoelectronic systems are developing towards integration. Optoelectronic system integration not only has the advantage of miniaturization but also reduces system power consumption, improves overall stability, and reduces system cost. Therefore, integration is of great significance to optoelectronic systems.

[0003] Optoelectronic fusion chips consist of photonic and electronic devices. Photonic devices include active components such as lasers, modulators, and amplifiers, as well as passive components such as couplers and wavelength division multiplexers. Electronic devices are used for control or driving of the photonic devices. Monolithic integration and hybrid integration are effective approaches to realizing optoelectronic fusion integrated chips. Hybrid integration refers to first using different materials to realize different optoelectronic and electronic devices on a substrate, and then fixing these different functional devices together using a certain packaging method. Monolithic integration uses optimized processes to integrate photonic and electronic devices on the same substrate, suitable for large-scale integration. Currently, the integration platform for optoelectronic fusion systems is mainly based on silicon-based materials and III-V materials. Silicon-based materials have advantages such as CMOS compatibility, low cost, high compactness, and mature processes. However, silicon-based materials are indirect bandgap semiconductors and are difficult to emit light. III-V materials overcome the deficiency of silicon-based materials in emitting light and can be used to fabricate active photonic devices such as light sources and amplifiers. However, group III-V materials are expensive, difficult to process, and suffer from lattice and thermal mismatches with silicon-based materials, limiting monolithic integration of silicon and group III-V materials. On the other hand, the performance of silicon-based modulators is limited by plasmon dispersion, resulting in low linearity and bandwidth. In recent years, various approaches have been developed to achieve high linearity and wide bandwidth modulators by introducing lithium niobate into silicon-based platforms. Finally, while it is currently possible to integrate photonic and electronic devices on the same silicon substrate, the fabrication of these electronic devices relies on thin-film silicon processes, which are more expensive than mature bulk silicon electronic devices. Furthermore, the substrates for bulk silicon electronic devices differ from those for photonic devices, making monolithic integration difficult. Compared to monolithic integration, hybrid integration technology has been developed earlier and has more mature processes, ensuring that each device uses the most suitable material, thus leveraging the advantages of different materials. While some studies have reported hybrid integration of group III-V materials with silicon or hybrid integration of photonic and electronic chips, these do not entirely align with the material selection and device configuration described in this invention. Therefore, the optoelectronic fusion chip and integration method based on hybrid integration described in this invention do not yet exist in existing work. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of existing technologies by proposing a hybrid integration-based optoelectronic fusion integrated chip and integration method. This method integrates a silicon-silicon oxide-lithium niobate chip with a bulk silicon electronic chip and a III-V laser chip through hybrid integration. This achieves full integration of high-linearity, high-bandwidth modulators and lasers, highly compact passive photonic devices, and electronic devices. It leverages the advantages of silicon-based, silicon oxide, III-V, lithium niobate, and bulk silicon materials, avoiding lattice and thermal mismatches between silicon-based and III-V materials, reducing the degree of lattice and thermal mismatches between silicon-based and lithium niobate materials, and avoiding the high-temperature, high-cost silicon-based processes.

[0005] The technical solution of the present invention is as follows:

[0006] A heterogeneous optoelectronic fusion integrated chip based on hybrid integration includes a silicon-silicon oxide-lithium niobate photonic chip, a bulk silicon electronic chip, and a III-V laser chip. The silicon-silicon oxide-lithium niobate photonic chip is used for photoelectric conversion, processing, and transmission of optical signals; the bulk silicon electronic chip is used to control and drive the silicon-silicon oxide-lithium niobate photonic chip; the III-V laser chip is used to generate optical information and transmit it to the silicon-silicon oxide-lithium niobate photonic chip; the chip structure of the silicon-silicon oxide-lithium niobate photonic chip includes a silicon substrate layer, a silicon oxide isolation layer, a lithium niobate wafer layer, a silicon oxide buffer layer, a silicon wafer layer, and a germanium thin film layer; the silicon oxide isolation layer is disposed between the silicon substrate layer and the lithium niobate layer, and between the silicon wafer layer and the germanium thin film layer. The layers serve as an isolation layer; the silicon oxide buffer layer is disposed between the lithium niobate layer and the silicon wafer layer as a buffer layer, with a feature size of 0-1 micrometer; passive photonic devices are disposed on the silicon wafer layer, including interlayer couplers, directional couplers, multimode interferometers, wavelength division multiplexers, Mach-Zehnder interferometers, microrings, and delay lines; the lithium niobate wafer and the silicon wafer form a hybrid waveguide to obtain an electro-optic modulator; a photodetector is formed by depositing a germanium thin film on the silicon wafer layer; the silicon-silicon oxide-lithium niobate photonic chip can emit light through back-side light emission or end-face coupling. In the bulk silicon electronic chip: the chip is composed of a bulk silicon layer; electronic devices are disposed in the bulk silicon layer for controlling and driving the photonic devices in the silicon-silicon oxide-lithium niobate chip; in the III-V laser chip: the chip structure includes a silicon substrate layer, a III-V buffer layer, and a III-V wafer layer; a laser is formed on the III-V wafer layer. The lithium silicon niobate electro-optic modulator and electronic devices are interconnected via metal wires; the photodetector and electronic devices are interconnected via metal wires; the passive photonic devices are interconnected with each other, with the passive photonic devices and the electro-optic modulator, and with the passive photonic devices and the photodetector via silicon waveguides; the passive photonic devices are interconnected with the III-V laser via end-face coupling; the metal electrode is placed on the bulk silicon layer and interconnected with the bulk silicon layer CMOS electronic circuit.

[0007] An integration method for heterogeneous optoelectronic fusion integrated chips based on hybrid integration includes: etching, thin film deposition, metal deposition, doping, vias, flip-chip bonding, and end-face coupling. Using the aforementioned waveguide etching technology, passive photonic devices are obtained on a silicon wafer layer, and modulators are obtained on both the silicon wafer and lithium niobate wafer layers. Etching and doping techniques are used to fabricate CMOS electronic circuits such as driver circuits and control circuits. The aforementioned waveguide etching technology is used to form a laser on a III-V wafer. The aforementioned metal deposition and via technology are used to form metal traces inside and outside the silicon-silicon oxide-lithium niobate photonic chip and the bulk silicon electronic chip. The via technology refers to the presence of small openings in the silicon oxide isolation layer and silicon oxide buffer layer, allowing for connections between different layers. The conductive connection is achieved by using the aforementioned thin film deposition and doping technology to form a silicon photodetector by combining a germanium-doped thin film and a silicon-doped thin film. The aforementioned flip-chip bonding process is used to bond the silicon-silicon oxide-lithium niobate photonic chip and the electronic chip together. The aforementioned end-face coupling process is used to bond the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip together, forming a heterogeneous optoelectronic fusion integrated chip based on hybrid integration. The flip-chip bonding process includes the following steps: chip surface metallization, solder joint deposition, chip flipping and positioning to align solder balls with external circuit connections, reflow soldering, and bottom filling.

[0008] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0009] 1) It comprehensively utilizes the advantages of high compactness of silicon-based materials, high luminous efficiency of III-V materials, excellent electro-optic properties of lithium niobate materials, and the mature process and low cost of bulk silicon.

[0010] 2) By placing the electronic devices within the bulk silicon, the high temperatures during the electronic device fabrication process are avoided from affecting the silicon-silicon oxide-lithium niobate chip. The electronic devices are electrically interconnected with the silicon-silicon oxide-lithium niobate wafer via flip-chip bonding. Using flip-chip bonding technology instead of wire bonding to integrate the photonic chip with the silicon-silicon oxide-lithium niobate chip reduces the impact of parasitic capacitance.

[0011] 3) The modulator is placed on both the silicon wafer and the lithium niobate wafer to avoid the disadvantages of lithium niobate etching, such as contaminants and incompatibility with existing silicon photonics processes.

[0012] 4) The laser is placed in the III-V material and interconnected with the silicon-silicon oxide-lithium niobate photonic chip through end-face coupling, which avoids lattice mismatch and thermal mismatch between the III-V material and the silicon-based material;

[0013] 5) A silicon oxide buffer layer is set between the lithium niobate wafer and the silicon wafer to reduce the impact of lattice mismatch and thermal mismatch between lithium niobate and silicon. In the integration method of silicon-silicon oxide-lithium niobate chip, low temperature process is used to avoid wafer cracking caused by thermal mismatch between materials, which is conducive to improving the yield of the device. Attached Figure Description

[0014] Figure 1 The following are cross-sectional views of the heterogeneous optoelectronic fusion integrated chip of the present invention, wherein (a) is a cross-sectional view of the silicon-silicon oxide-lithium niobate heterostructure wafer structure, and (b) is a cross-sectional view of the III-V laser chip structure.

[0015] Figure 2 The following are cross-sectional views of the heterogeneous optoelectronic fusion integrated chip according to an embodiment of the present invention, wherein (a) is a cross-sectional view of the heterogeneous optoelectronic fusion integrated chip of embodiment 1, and (b) is a cross-sectional view of the heterogeneous optoelectronic fusion integrated chip of embodiment 2.

[0016] Figure 3 The figures are cross-sectional views of the chip end face connection in an embodiment of the present invention, wherein (a) is a two-dimensional cross-sectional view of the connection between the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip, and (b) is a three-dimensional cross-sectional view of the connection between the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip. Detailed Implementation

[0017] The present invention will now be described in detail with reference to the accompanying drawings and embodiments, providing detailed implementation methods and structures. However, the scope of protection of the present invention is not limited to the following embodiments.

[0018] According to an embodiment of the present invention:

[0019] like Figure 1 The initial multi-material system of the present invention is shown in Figure (a), which is a cross-sectional view of the silicon-silicon oxide-lithium niobate heterostructure of the silicon-silicon oxide-lithium niobate photonic chip in two embodiments. From bottom to top, it includes a silicon substrate layer 1, a silicon oxide isolation layer 2, a lithium niobate wafer layer 3, a silicon oxide buffer layer 4, a silicon wafer layer 5, a germanium thin film layer 6, and a silicon oxide insulating layer 2. The silicon oxide isolation layer 2 is disposed between the silicon substrate layer 1 and the lithium niobate wafer layer 3, and between the silicon wafer layer 5 and the germanium thin film layer 6 as an isolation layer; the silicon oxide buffer layer 4 is disposed between the lithium niobate thin film layer and the silicon wafer layer as a buffer layer, with a feature size of 0-1 micrometer. Figure (b) is a cross-sectional view of the partial structure of the group III-V laser chip in two embodiments, which includes a silicon substrate layer 7, a group III-V buffer layer 8, and a group III-V wafer layer 9 from bottom to top. The laser is formed on the group III-V wafer layer.

[0020] like Figure 2The figure shows a cross-sectional view of the heterogeneous optoelectronic fusion integrated chip according to an embodiment of the present invention. Figure (a) illustrates an embodiment with an electronic chip on top and a photonic chip below, including a silicon-germanium photodetector 10, a silicon-lithium niobate electro-optic modulator 11, a silicon passive photonic device 12, a bulk silicon CMOS electronic circuit 13, a metal electrode 14, and a III-V laser 15. The silicon-silicon oxide-lithium niobate photonic chip emits light through end-face coupling. The silicon-lithium niobate electro-optic modulator is interconnected with the electronic device via metal wires. The photodetector is interconnected with the electronic device via metal wires. The passive photonic devices are interconnected with each other, with the electro-optic modulator, and with the photodetector via silicon waveguides. The passive photonic device is interconnected with the III-V laser through end-face coupling. The metal electrode 14 is placed on the bulk silicon layer and interconnected with the bulk silicon CMOS electronic circuit. Figure (b) shows another embodiment, employing a structure with the photonic chip on top and the electronic chip below, including a silicon-germanium photodetector 10, a silicon-lithium niobate electro-optic modulator 11, a silicon passive photonic device 12, a bulk silicon CMOS electronic circuit 13, and a metal electrode 14; the silicon-silicon oxide-lithium niobate photonic chip emits light through its back; the silicon-lithium niobate electro-optic modulator and the electronic device are interconnected through metal lines; the photodetector and the electronic device are interconnected through metal lines; the passive photonic devices are interconnected with each other, with the passive photonic device and the electro-optic modulator, and with the passive photonic device and the photodetector through silicon waveguides; the passive photonic device is interconnected with a group III-V laser through end-face coupling; the metal electrode 14 is placed on the bulk silicon layer and interconnected with the bulk silicon CMOS electronic circuit.

[0021] like Figure 3 The figures shown are cross-sectional views of the chip end face connection in the embodiments of the present invention. Figure (a) is a two-dimensional cross-sectional view of the connection between the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip. From left to right, the two chips are: silicon-silicon oxide-lithium niobate photonic chip and III-V laser chip. The photonic chip includes: a silicon passive photonic device 12. The III-V laser chip includes: a metal electrode 14 and a III-V laser 15. Figure (b) is a three-dimensional cross-sectional view of the connection between the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip. From front to back, the two chips are: silicon-silicon oxide-lithium niobate photonic chip and III-V laser chip. The photonic chip includes: a silicon passive photonic device 12. The III-V laser chip includes: a metal electrode 14 and a III-V laser 15. The metal electrode 14 is placed on the bulk silicon layer and interconnected with the bulk silicon layer CMOS electronic circuit.

Claims

1. A heterogeneous optoelectronic fusion integrated chip based on hybrid integration, characterized in that: This includes silicon-silicon oxide-lithium niobate photonic chips, bulk silicon electronic chips, and III-V laser chips; The silicon-silicon oxide-lithium niobate photonic chip comprises, from bottom to top, a silicon substrate layer (1), a lithium niobate wafer layer (3), a silicon oxide buffer layer (4), and a silicon wafer layer (5). A germanium thin film layer (6) is formed on the surface of the silicon wafer layer (5). Silicon oxide isolation layers (2) are provided between the silicon substrate layer (1) and the lithium niobate wafer layer (3), and between the silicon wafer layer (5) and the germanium thin film layer (6) for isolation. The bulk silicon electronic chip is composed of a bulk silicon layer, and electronic devices are disposed in the bulk silicon layer; The aforementioned group III-V laser chip comprises, from bottom to top, a silicon substrate layer (7), a group III-V buffer layer (8), and a group III-V wafer layer (9); the laser is formed on the group III-V wafer layer (9); The silicon-silicon oxide-lithium niobate photonic chip and the bulk silicon electronic chip are connected by a flip-chip bonding process, and the end face of the III-V laser chip is coupled to the end face of the silicon-silicon oxide-lithium niobate photonic chip.

2. The heterogeneous optoelectronic fusion integrated chip based on hybrid integration according to claim 1, characterized in that: The aforementioned silicon-silicon oxide-lithium niobate photonic chip is used for photoelectric conversion, processing, and transmission of optical signals; The bulk silicon electronic chip is used to control and drive the silicon-silicon oxide-lithium niobate photonic chip. The aforementioned III-V laser chip is used to generate optical information and transmit it to the aforementioned silicon-silicon oxide-lithium niobate photonic chip.

3. The heterogeneous optoelectronic fusion integrated chip based on hybrid integration according to claim 1 or 2, characterized in that: The silicon wafer layer (5) forms passive photonic devices and active photonic devices. The silicon wafer layer (5) and the lithium niobate wafer layer (3) form a hybrid waveguide as an active photonic device. Electronic devices are provided in the bulk silicon layer for controlling and driving the active photonic devices. The passive photonic devices are interconnected with each other and with the active photonic devices through silicon waveguides. The passive photonic devices are interconnected with the laser through end-face coupling.

4. The heterogeneous optoelectronic fusion integrated chip based on hybrid integration according to claim 3, characterized in that, The passive photonic devices include interlayer couplers, directional couplers, multimode interferometers, wavelength division multiplexers, Mach-Zehnder interferometers, microrings, and delay lines; the active photonic devices include lithium silicon niobate electro-optic modulators and photodetectors; and the electronic devices include driving circuits and control circuits.

5. An integration method for a heterogeneous optoelectronic fusion integrated chip based on hybrid integration as described in any one of claims 1-4, characterized in that: Includes the following steps: Passive photonic devices are obtained on silicon wafer layers using waveguide etching technology; Active photonic devices, including photodetectors, are obtained on silicon wafers through thin film deposition and doping techniques. Active photonic devices, including silicon-lithium niobate electro-optic modulators, are obtained by waveguide etching on silicon wafers and lithium niobate wafer layers. The passive photonic devices are interconnected with each other, with the passive photonic devices and the lithium silicon niobate electro-optic modulator, and with the passive photonic devices and the photodetector via silicon waveguides. Electronic devices are obtained by etching and doping techniques on a bulk silicon layer; Lasers are obtained by waveguide etching technology on the III-V group wafer layer; Metal traces are formed inside and outside the silicon-silicon oxide-lithium niobate photonic chip and bulk silicon electronic chip using metal deposition technology and through-hole technology. The silicon-silicon oxide-lithium niobate photonic chip and the electronic chip are bonded together using a flip-chip bonding process. The silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip are bonded together using end-face coupling. The silicon-lithium niobate electro-optic modulator and the electronic device are interconnected by metal wires, and the photodetector and the electronic device are interconnected by metal wires.

6. The integration method for heterogeneous optoelectronic fusion integrated chips based on hybrid integration according to claim 5, characterized in that, The aforementioned through-hole process technology refers to the provision of small openings in the silicon oxide isolation layer (2) and the silicon oxide buffer layer (4) to allow conductive connections between different layers.

7. The integration method for heterogeneous optoelectronic fusion integrated chips based on hybrid integration according to claim 5, characterized in that, The flip-chip bonding process includes: chip surface metallization, solder joint deposition, chip flipping and positioning to align solder balls with external circuit connections, reflow soldering, and bottom filling.

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