Electronic detonator circuit for high-reliability communication, method of application and system

Abstract

The application provides an electronic detonator circuit for high-reliability communication, an application method and a system, comprising a rectifier bridge, an instruction analysis circuit, a CRC check circuit and a feedback control circuit; the rectifier bridge is connected with an A bus and a B bus, and the rectifier bridge is connected with the instruction analysis circuit; a drain electrode of a MOS switch is connected with a power supply end of the rectifier bridge; a ground end of the rectifier bridge is connected with a source electrode of the MOS switch; the A bus and the B bus are respectively connected with the instruction analysis circuit; the source electrode of the MOS switch is grounded; a gate electrode of the MOS switch is connected with the feedback control circuit; the instruction analysis circuit is connected with the feedback control circuit and the CRC check circuit respectively. By introducing a safety distance of no less than 3 in the instruction code, the application can not be identified as other effective instructions and misoperated when a communication error of no more than 2 bits occurs.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic detonators, in particular to an electronic detonator circuit with high reliable communication, an application method and a system, and more particularly to an electronic detonator chip with high reliable communication. BACKGROUND

[0002] With the increasing perfection of electronic detonator technology, more and more electronic detonators are widely used in various civil blasting fields. In the actual blasting of electronic detonators, most application scenarios have the characteristics of long distance (more than 1 km) and large number of networked detonators (more than 200). The long distance bus will introduce a large line impedance and a large capacity impedance, and the large number of networked detonators will also introduce an additional large capacity impedance when the foot line is connected. The resistance and capacitance generated in these lines will have an adverse effect on electronic detonator communication. Because electronic detonators use a two-bus communication method, the bus is used to transmit both power and signals, and signal transmission is completed by frequent switching of high and low voltages on the bus. Due to the excessive resistance and capacitance (R, C) on the line, the capacitance on the line will be charged and discharged when the high and low voltages on the bus are switched, which will cause distortion of the communication waveform and result in communication errors.

[0003] In order to ensure the reliability of communication, many detonator schemes simply cope with this problem by reducing the communication rate. The problem brought about by this is that because the communication rate is too low, the detonator network communication time is long, and the time required to complete a detonation is very long, sometimes even tens of minutes, which is not good for the customer experience, and the reliability is also not high. In fact, many times for short distance blasting or detonator network with fewer number of detonators, the communication rate does not need to be greatly reduced, the on-site operation time can be greatly shortened, greatly improving the efficiency of the site, and also improving the reliability of communication.

[0004] The existing detonator scheme generally lacks an effective error prevention mechanism. Under the influence of the on-site environment, detonator misfires and misfires caused by communication error instructions being recognized as other instructions occur from time to time. This requires the electronic detonator chip to have a certain fault tolerance when designing the instruction decoding logic, especially once the instruction is recognized, it can be treated as an unknown instruction without processing, but it cannot be recognized as other valid instructions to cause misoperation, and it can also feedback the status of the instruction receiving and processing to the initiator after receiving the instruction.

[0005] Therefore, a new technical solution is needed to improve the above technical problems. SUMMARY

[0006] In view of the defects in the prior art, the purpose of the present application is to provide an electronic detonator circuit with high reliable communication, an application method and a system.

[0007] The application provides a high-reliability communication electronic detonator circuit, which comprises a rectifier bridge, a command analysis circuit, a CRC check circuit and a feedback control circuit.

[0008] The rectifier bridge is connected with an A bus and a B bus, and is connected with the command analysis circuit; a drain electrode of a MOS switch is connected with a power supply end of the rectifier bridge; a source electrode of the MOS switch is connected with a grounding end of the rectifier bridge; the A bus and the B bus are connected with the command analysis circuit respectively; the source electrode of the MOS switch is grounded; a gate electrode of the MOS switch is connected with the feedback control circuit; and the command analysis circuit is connected with the feedback control circuit and the CRC check circuit respectively.

[0009] Preferably, the rectifier bridge converts an alternating current signal into a direct current signal.

[0010] Preferably, the command analysis circuit decodes a command from the A bus and the B bus; transmits a received command code and command data to the CRC check circuit to obtain a CRC check value; compares the CRC check value with a CRC value transmitted in a received command; if the CRC check value is consistent with the CRC value, the command is valid; otherwise, the command is invalid; and after the command is correctly received, a signal is sent to the feedback control circuit to further control the closing of the MOS switch and perform current feedback.

[0011] Preferably, the CRC check circuit receives the command code and the command data from the command analysis circuit, calculates a CRC result and returns the CRC result to the command analysis circuit.

[0012] Preferably, the feedback control circuit receives a control signal from the command analysis circuit to control the opening and closing of the MOS switch.

[0013] The application further provides an application method of the high-reliability communication electronic detonator circuit.

[0014] Step S1: an initiator A bus and a B bus output a voltage, and an electronic detonator chip is reset after power-on and waits for receiving a command;

[0015] Step S2: the initiator receives an operation command on a user interface, converts the operation command into a command for the electronic detonator chip, and sends the command to the electronic detonator chip through the A bus and the B bus;

[0016] Step S3: the electronic detonator chip detects a command start synchronization signal, starts an internal state machine of a command analysis circuit, receives a preset number of bytes of command codes first, and judges the validity of the command codes; if the command codes do not belong to command codes supported by the chip, the command codes are considered to be invalid commands, and the current command analysis is directly exited; otherwise, the command codes are considered to be valid commands, and step S4 is entered;

[0017] Step S4: the instruction parsing circuit continues to receive the instruction data part, the specific data length is parsed according to the first byte of the instruction data, and after receiving the instruction data, the instruction data is transmitted to the CRC checking circuit together with the instruction code for calculation;

[0018] Step S5: the CRC checking circuit returns the CRC value to the instruction parsing circuit after calculation; the instruction parsing circuit continues to receive the CRC data contained in the instruction, and if the two CRC values are equal, it indicates that the instruction is a valid instruction, and step S6 is executed; otherwise, the current instruction parsing is directly exited;

[0019] Step S6: the instruction parsing circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch, the MOS switch is closed, the current feedback to the initiator is formed, the specific operation defined in the instruction is executed, and then the state of waiting for receiving a new instruction is entered again;

[0020] Step S7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and the next instruction is waiting for execution; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that there is an exception in the current communication network, the current instruction transmission is terminated, and prompt information of instruction exception and the need for troubleshooting is output to the user interface.

[0021] Preferably, the initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the feedback current of the electronic detonator in the instruction square wave and the identification feedback square wave.

[0022] Preferably, the preset number of times in step S7 is 3.

[0023] The application also provides an application system of the electronic detonator circuit with high reliable communication, the system applies the electronic detonator circuit with high reliable communication, and the system comprises the following modules:

[0024] Module M1: the initiator A and B bus output voltage, the electronic detonator chip is reset after power-on and waits for receiving an instruction;

[0025] Module M2: the initiator receives the operation command on the user interface, converts the operation command into an instruction for the electronic detonator chip, and sends the instruction to the electronic detonator chip through the A and B buses;

[0026] Module M3: the electronic detonator chip detects the instruction start synchronization signal, starts the internal state machine of the instruction parsing circuit, first receives a preset number of bytes of instruction codes, and judges the validity of the instruction codes, if the instruction codes are not supported by the chip, it is considered that the instruction is invalid, and the current instruction parsing is directly exited; otherwise, it is considered that the instruction is valid, and module M4 is entered;

[0027] Module M4: the instruction parsing circuit continues to receive the instruction data part, the specific data length is parsed according to the first byte of the instruction data, and after receiving the instruction data, the instruction data is transmitted to the CRC checking circuit together with the instruction code for calculation;

[0028] Module M5: the CRC checking circuit returns the CRC value to the instruction parsing circuit after calculation; the instruction parsing circuit continues to receive the CRC data contained in the instruction, and if the two CRC values are equal, it indicates that the instruction is a valid instruction, and module M6 is executed; otherwise, the current instruction parsing is directly exited;

[0029] Module M6: the instruction parsing circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch, the MOS switch is closed, current feedback is formed to the initiator, the specific operation defined in the instruction is executed, and the state of waiting for receiving a new instruction is entered again after completion;

[0030] Module M7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and the next instruction is waiting for execution; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that there is an exception in the current communication network, the current instruction transmission is terminated, and prompt information that the instruction is abnormal and needs to be checked is output to the user interface.

[0031] Preferably, the initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the instruction square wave and the feedback current of the electronic detonator in the identification feedback square wave.

[0032] The preset number of times in the module M7 is 3.

[0033] Compared with the prior art, the present application has the following beneficial effects:

[0034] 1. By introducing a safety distance of not less than 3 in the instruction code, the present application can not be misoperated as other valid instructions when the communication error is not more than 2 bits;

[0035] 2. By introducing the CRC check, the present application can further ensure the correctness of the entire instruction code and instruction data, and in combination with the safety distance of the instruction code, even if the received instruction code and CRC data are simultaneously wrong at a very small probability, the received end CRC check result considers that the instruction is correctly received, but the instruction will not be executed because of the protection of the instruction code safety distance;

[0036] 3、The present application can ensure that each instruction is correctly received by the electronic detonator chip through the corresponding feedback mechanism for each instruction, and once the detonator refuses to explode, the cause can be easily traced and investigated according to the instructions and feedback records in the initiator, thereby further improving the safety and reliability of the detonator. BRIEF DESCRIPTION OF DRAWINGS

[0037] Other features, objects, and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments thereof as read in conjunction with the accompanying drawings:

[0038] Figure 1 It is a network diagram of the electronic detonator of the present application;

[0039] Figure 2 It is an internal circuit diagram of the electronic detonator of the present application;

[0040] Figure 3 It is a feedback waveform diagram of the electronic detonator of the present application;

[0041] Figure 4 It is an internal instruction logic state diagram of the electronic detonator chip of the present application;

[0042] Figure 5 It is an instruction issuing and verification flowchart of the initiator of the present application;

[0043] Figure 6 It is a CRC check circuit structure diagram of the present application. DETAILED DESCRIPTION

[0044] The present application will be described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present application, but do not limit the present application in any form. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present application. These all belong to the protection scope of the present application.

[0045] Example 1:

[0046] According to the electronic detonator circuit for high-reliability communication provided by the present application, the rectifier bridge is connected with the A bus and the B bus, and the rectifier bridge is connected with the instruction analysis circuit, the power supply end of the rectifier bridge is connected with the drain electrode of the MOS switch, the ground end of the rectifier bridge is connected with the source electrode of the MOS switch, the A bus and the B bus are respectively connected with the instruction analysis circuit, the source electrode of the MOS switch is grounded, the gate electrode of the MOS switch is connected with the feedback control circuit, and the instruction analysis circuit is connected with the feedback control circuit and the CRC check circuit.

[0047] The rectifier bridge converts AC signal to DC signal. The instruction analysis circuit decodes the instruction from the A, B bus; the received instruction code and instruction data are transmitted to the CRC check circuit to calculate the CRC check value, which is compared with the CRC value transmitted in the received instruction from the communication. If they are consistent, the instruction is valid, otherwise it is invalid. After the instruction is correctly received, a signal is sent to the feedback control circuit to further control the closing of the MOS switch for current feedback. The CRC check circuit receives the instruction code and instruction data from the instruction analysis circuit, calculates the CRC result and returns it to the instruction analysis circuit. The feedback control circuit receives the control signal from the instruction analysis circuit to control the opening and closing of the MOS switch.

[0048] The application also provides an application method of the electronic detonator circuit with high reliable communication, which applies the electronic detonator circuit with high reliable communication mentioned above, and comprises the following steps:

[0049] Step S1: the output voltage of the initiator A, B bus is used to reset the electronic detonator chip, and then the electronic detonator chip waits to receive instructions;

[0050] Step S2: the initiator receives the operation command on the user interface, converts it into an instruction for the electronic detonator chip, and sends it to the electronic detonator chip through the A, B bus;

[0051] Step S3: the electronic detonator chip detects the instruction start synchronization signal, starts the internal state machine of the instruction analysis circuit, receives a preset number of bytes of instruction codes first, and judges the validity of the instruction codes. If the instruction codes are not supported by the chip, it is considered as an invalid instruction, and the current instruction analysis is directly exited. Otherwise, it is considered as a valid instruction, and step S4 is entered;

[0052] Step S4: the instruction analysis circuit continues to receive the instruction data part, and the specific data length is obtained according to the first byte of the instruction data. After receiving the instruction data, the instruction data and the instruction code are transmitted to the CRC check circuit for calculation;

[0053] The CRC check adopts a CRC-8 mode, that is, a CRC check mode with a width of 8, a generating polynomial of X^8+X^2+X+1, and an initial value of the check result of 0x00.

[0054] Figure 6 The figure is a structure diagram of the CRC check circuit. D1-D8 are eight D flip-flops, and the initial value is all 0. The adders are all modulo 2 adders, which can be directly realized by using XOR gates, that is, two data bits are the same, and 0 is output, otherwise 1 is output. The data to be calculated is input into the check circuit bit by bit for calculation. One bit is calculated every clock cycle. When all the data are calculated, the data in the final register is the CRC check value. The highest bit is D8, and the lowest bit is D1.

[0055] Step S5: the CRC checking circuit returns the CRC value to the instruction analysis circuit after calculation; the instruction analysis circuit continues to receive the CRC data contained in the instruction, and if the two CRC values are equal, it indicates that the instruction is a valid instruction, and step S6 is executed; otherwise, the current instruction analysis is directly exited;

[0056] Step S6: the instruction analysis circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch, the MOS switch is closed, a current feedback to the initiator is formed, the specific operation defined in the instruction is executed, and then the state of waiting for receiving a new instruction is entered again;

[0057] Step S7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and the next instruction is waiting for execution; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that there is an exception in the current communication network, the current instruction transmission is terminated, and prompt information of instruction exception and the need for troubleshooting is output to the user interface.

[0058] The initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the instruction square wave and identifying the feedback current of the electronic detonator in the feedback square wave. The preset number of times in step S7 is 3 times.

[0059] Example 2:

[0060] Embodiment 2 is a preferred example of Embodiment 1, which more specifically illustrates the present application.

[0061] The application further provides an application system of the electronic detonator circuit with high reliable communication, which applies the electronic detonator circuit with high reliable communication described above, and the system comprises the following modules:

[0062] Module M1: the initiator A and B bus output voltage, the electronic detonator chip is powered on and reset, and then waits for receiving an instruction;

[0063] Module M2: the initiator receives the operation command on the user interface, converts it into an instruction to the electronic detonator chip, and sends it to the electronic detonator chip through the A and B buses;

[0064] Module M3: the electronic detonator chip detects the instruction start synchronization signal, starts the internal state machine of the instruction analysis circuit, first receives a preset number of bytes of instruction codes, and judges the validity of the instruction codes, if it is not the instruction code supported by the chip, it is considered as an invalid instruction, and the current instruction analysis is directly exited; otherwise, it is considered as a valid instruction, and module M4 is entered;

[0065] Module M4: the instruction parsing circuit continues to receive the instruction data part, the specific data length is parsed according to the first byte of the instruction data, and after receiving the instruction data, the instruction data is transmitted to the CRC checking circuit together with the instruction code for calculation;

[0066] Module M5: the CRC checking circuit returns the CRC value to the instruction parsing circuit after calculation; the instruction parsing circuit continues to receive the CRC data contained in the instruction, and if the two CRC values are equal, it indicates that the instruction is a valid instruction, and module M6 is executed; otherwise, the current instruction parsing is directly exited;

[0067] Module M6: the instruction parsing circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch, the MOS switch is closed, current feedback is formed to the initiator, the specific operation defined in the instruction is executed, and then the state of waiting for receiving a new instruction is entered again;

[0068] Module M7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and the next instruction is waiting for execution; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that there is an exception in the current communication network, the current instruction transmission is terminated, and prompt information of instruction exception and the need for troubleshooting is output to the user interface.

[0069] The initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the instruction square wave and the feedback current of the electronic detonator in the identification feedback square wave. The preset number of times in module M7 is 3.

[0070] Example 3:

[0071] Embodiment 3 is a preferred example of embodiment 1, which more specifically illustrates the present application.

[0072] The present application mainly solves the communication reliability problem of the electronic detonator. The present application proposes a high-reliability communication electronic detonator chip, which realizes the reliability of communication through unique instruction code, CRC checking and instruction feedback. Specifically, when designing the instruction code, according to the characteristics of limited number of electronic detonator operation instructions (generally less than 100), two bytes are used as instruction code, and the instruction code distance (not less than 3) is designed to prevent communication errors from causing instruction misidentification; by adding CRC checking to the instruction code and instruction data, the correctness of the received instruction can be confirmed after the detonator chip receives the instruction; finally, the detonator chip can feedback to the initiator to indicate that the instruction has been correctly received through fast feedback.

[0073] Initiator: through sending command square wave and identifying feedback current of electronic detonator, it completes the work of network registration, network scanning, network initiation of electronic detonator.

[0074] Rectifier bridge: it realizes the conversion from AC signal to DC signal.

[0075] Command analysis circuit: it realizes the decoding of command from A, B bus; it transmits the received command code and command data to CRC (cyclic redundancy check) module to calculate CRC check value, and compares it with CRC value transmitted in the received command, if they are consistent, it indicates that the command is valid, otherwise it is invalid; after receiving the command correctly, it sends signal to feedback control circuit to further control the closing of MOS switch, realizing the feedback of current.

[0076] CRC check circuit: it receives command code and command data from command analysis circuit, and returns CRC result to command analysis circuit.

[0077] Feedback control circuit: it receives control signal from command analysis circuit, and is used to control the opening and closing of MOS switch.

[0078] System working principle:

[0079] Step 1: initiator A, B bus outputs voltage, electronic detonator chip is reset after power on, and the initialization of chip is completed, after the initialization, it waits for receiving command.

[0080] Step 2: initiator receives operation command on user interface, converts it into command for electronic detonator, and sends it to electronic detonator through A, B bus.

[0081] Step 3: electronic detonator chip detects command start synchronization signal, starts internal state machine of command analysis circuit, receives 2 bytes of command code first, and judges the validity of command code, if it is not the command code supported by chip, it is considered as invalid command, and directly exits current command analysis; otherwise, it is considered as valid command, and enters step 4.

[0082] Step 4: command analysis circuit continues to receive command data part, and the specific data length is obtained according to the first byte of command data, after receiving command data, it is transmitted to CRC check circuit together with command code for calculation.

[0083] Step 5: after CRC check circuit calculates CRC value, it returns to command analysis circuit; at the same time, command analysis circuit continues to receive CRC data in command, if two CRC values are equal, it indicates that the command is valid command, and step 6 is executed; otherwise, it directly exits current command analysis.

[0084] Step 6: The instruction analysis circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS tube, closes it, forms a current feedback to the initiator. Then start to execute the specific operation defined in the instruction. After completion, enter the state of waiting for receiving new instructions again.

[0085] Step 7: The initiator receives the feedback state of the detonator chip, indicating that the current instruction has been correctly received by the chip, and the next instruction can be executed; otherwise, the instruction retransmission operation will be performed, and if it is unsuccessful for a preset number of times (usually 3 times by default), it is considered that there is an exception in the current communication network, the current instruction transmission is terminated, and the prompt information of instruction exception and the need for troubleshooting is output to the user interface.

[0086] The internal instruction encoding method of the detonator chip is as follows:

[0087] Hamming distance is used in data transmission error control coding. In a code set, the number of bits with different values between any two code words is defined as the Hamming distance between the two code words. That is:

[0088]

[0089] Where: i = 0, 1,..n-1, x, y are n-bit encodings, Indicates XOR.

[0090] For example: the distance between (0000) and (0001) is 1, and the distance between (1100) and (1011) is 3. In a code set, the minimum value of the Hamming distance between any two encodings is called the minimum Hamming distance of the code set. The greater the minimum Hamming distance, the greater the anti-interference ability of the code set. We use d to represent the minimum Hamming distance of the code set. When the code set is used to detect errors, set e bits that can be detected, then e<=d-1.

[0091] The present application encodes the instruction code by using such error control coding, ensures that the minimum Hamming distance of the instruction code >=3, and improves the error prevention function of the instruction code. Especially when the instruction code and the CRC check value have errors at the same time during communication, but the final CRC check passes, the detonator chip will not consider the current instruction as a valid instruction. Because the erroneous instruction code is protected by Hamming distance, as long as the error bits do not exceed two, it can be automatically filtered, and no erroneous instruction will be executed. Such a unique instruction encoding method is very necessary for the detonator chip, greatly improving the safety and reliability of the detonator.

[0092] A specific encoding method is as follows:

[0093] The instruction code contains two bytes, each byte is independently coded, and the code distance (i.e. Hamming distance) between any two instruction codes is 3, that is, as long as the communication bit error does not exceed 2 bits, it will not be misidentified as other instructions to cause incorrect execution of instructions.

[0094] Each instruction byte supports 10 encodings, and two bytes can support 10*10=100 instructions, which can fully meet the actual application of electronic detonator.

[0095] The high and low bytes of the instruction code use the same encoding method, as shown in the following table:

[0096] Instruction encoding Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x11 0 0 0 1 0 0 0 1 0x16 0 0 0 1 0 1 1 0 0x27 0 0 1 0 0 1 1 1 0x29 0 0 1 0 1 0 0 1 0x48 0 1 0 0 1 0 0 0 0x43 0 1 0 0 0 0 1 1 0x74 0 1 1 1 0 1 0 0 0x7a 0 1 1 1 1 0 1 0 0x85 1 0 0 0 0 1 0 1 0x8c 1 0 0 0 1 1 0 0

[0097] For example, an instruction code 0x1116 instruction, in the transmission, bit0, bit1 in high byte 0x11 error, the instruction is identified as 0x1216, and the CRC check value also causes the final check to pass due to communication error, but because 0x1216 is an invalid instruction code in the detonator chip, it will be ignored and not executed, and will not produce an error action, and the initiator will also know that the current instruction has not been executed correctly, and will continue to execute the operation of retransmitting the instruction, and once the error accumulates to a certain number, an error will be reported through the user interface.

[0098] CRC check method:

[0099] The CRC check byte in the instruction is the result of CRC calculation on the entire instruction including the instruction code byte and all data bytes. The check uses CRC-8 method, i.e. the width is 8, the generating polynomial is x 8 +x 2 +x+1, and the check result initial value is 0x00.

[0100] Feedback method (typical waveform):

[0101] Instruction encoding and CRC check can only ensure that the detonator chip does not execute incorrect instructions, but cannot guarantee the correct execution of the process. In the actual blasting of the detonator, there have been problems of early explosion and refusal to explode due to missed reception of instructions.

[0102] The detonator chip in the application designs a fast feedback mode for the validity of the instruction, which is specifically implemented as follows: after the detonator chip receives and sends the instruction including the CRC check byte, a current feedback lasting for about half a byte is given, which is a level signal superimposed on the ground level on the bus, and the initiator can complete the fast detection of the current feedback within one byte after sending the instruction. If the valid feedback waveform is detected, it indicates that the instruction has been correctly executed, and if there is no feedback, it indicates that the detonator chip has not received the correct instruction, which needs to be re-sent or indicates that the instruction sending is wrong.

[0103] Through the fast feedback mode of the instruction, the initiator can confirm that the detonator chip correctly receives each instruction, thereby eliminating various abnormal problems caused by the instruction error of the detonator chip. Meanwhile, the initiator can record the sending and feedback information of each instruction, which is convenient for tracing after the detonator appears abnormal.

[0104] The feedback circuit is implemented as follows:

[0105] The instruction analysis circuit analyzes the instruction, and if it is a valid instruction code, the CRC check is further calculated through the CRC check circuit. If the CRC check is correct, the valid signal is output to the feedback control circuit, the feedback control circuit outputs a valid high level to open the MOS switch, and the power supply and the ground form a path. The MOS switch is designed to work in the saturation region, and the saturation current is typically about 30 mA. At the same time, the feedback control circuit starts a counter, and when the count is full 4 bits (half a byte) of time, the MOS switch is closed, and the current feedback is ended.

[0106] Those skilled in the art can understand the present embodiment as a more specific description of embodiment 1 and embodiment 2.

[0107] Those skilled in the art know that in addition to implementing the system provided by the application and each device, module and unit thereof in a pure computer readable program code manner, the same function can also be realized by logically programming the method steps to make the system provided by the application and each device, module and unit thereof in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers and embedded microcontrollers, etc. Therefore, the system provided by the application and each device, module and unit thereof can be considered as a hardware component, and the devices, modules and units included therein for realizing various functions can also be considered as structures in the hardware component; the devices, modules and units for realizing various functions can also be considered as both software modules realizing the method and structures in the hardware component.

[0108] The specific embodiments of the present application are described above. It needs to be understood that the present application is not limited to the specific embodiments described above, and various changes or modifications can be made by those skilled in the art within the scope of the claims, which does not affect the essential content of the present application. The embodiments of the present application and the features in the embodiments can be combined with each other at will without conflict.

Claims

1. An electronic detonator circuit for high reliability communication, characterized in that, The rectifier bridge is connected with an A bus and a B bus, and is connected with the instruction analysis circuit; a power supply end of the rectifier bridge is connected with a drain of a MOS switch; a grounding end of the rectifier bridge is connected with a source of the MOS switch; the A bus and the B bus are connected with the instruction analysis circuit respectively; the source of the MOS switch is grounded; a gate of the MOS switch is connected with the feedback control circuit; the instruction analysis circuit is connected with the feedback control circuit and the CRC check circuit respectively. The rectifier bridge converts an alternating current signal into a direct current signal. The CRC check circuit receives instruction code and instruction data from the instruction analysis circuit, and returns a CRC result to the instruction analysis circuit.

2. The electronic detonator circuit for high-reliability communication according to claim 1, characterized in that, The feedback control circuit receives a control signal from the instruction analysis circuit, and controls opening and closing of the MOS switch.

3. The electronic detonator circuit for high-reliability communication according to claim 1, wherein, The method comprises the following steps:

4. The electronic detonator circuit for high-reliability communication according to claim 1, characterized in that, Step S1: an initiator A bus and a B bus output a voltage, and an electronic detonator chip is reset after power-on and waits for receiving an instruction; 5. A method of using an electronic detonator circuit for high reliability communication, characterized in that, Step S2: the initiator receives an operation command on a user interface, converts the operation command into an instruction for the electronic detonator chip, and sends the instruction to the electronic detonator chip through the A bus and the B bus; Step S3: the electronic detonator chip detects an instruction start synchronization signal, starts an internal state machine of the instruction analysis circuit, receives a preset number of bytes of instruction code first, and judges validity of the instruction code; if the instruction code does not belong to instruction codes supported by the chip, the instruction code is considered as an invalid instruction, and the current instruction analysis is directly exited; otherwise, the instruction code is considered as a valid instruction, and step S4 is entered; Step S4: the instruction analysis circuit continues to receive an instruction data part, a specific data length is obtained according to a first byte of the instruction data, and the instruction data is transmitted to the CRC check circuit together with the instruction code for calculation after the instruction data is received completely; Step S5: the CRC check circuit returns a CRC value to the instruction analysis circuit after the CRC value is calculated; the instruction analysis circuit continues to receive CRC data in the instruction; if the two CRC values are equal, the instruction is a valid instruction, and step S6 is executed; otherwise, the current instruction analysis is directly exited; Step S6: the instruction analysis circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch, the MOS switch is closed, a current feedback is formed to the initiator, a specific operation defined in the instruction is executed, and a state of waiting for receiving a new instruction is entered again after completion. ​ ​ Step S7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and waits for the execution of the next instruction; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that the current communication network has an anomaly, the current instruction transmission is terminated, and prompt information of instruction anomaly and the need for troubleshooting is output to the user interface.

6. The method of claim 5, wherein the electronic detonator circuit for high reliability communication is applied to a circuit for a high reliability communication, and The initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the instruction square wave and identifying the feedback current of the electronic detonator in the feedback square wave.

7. The method of claim 5, wherein the electronic detonator circuit for high reliability communication is applied to a circuit for a high reliability communication, and the circuit for a high reliability communication is applied to a circuit for a high reliability communication of an electronic detonator. The preset number of times in step S7 is 3.

8. An application system of an electronic detonator circuit of high reliable communication, characterized in that, The system applies the high-reliability communication electronic detonator circuit of any one of claims 1-4, and the system comprises the following modules: Module M1: the initiator A, B bus output voltage, the electronic detonator chip power-on reset and waiting for receiving instructions; Module M2: the initiator receives the operation command on the user interface, converts it into an instruction for the electronic detonator chip, and sends it to the electronic detonator chip through the A, B bus; Module M3: the electronic detonator chip detects the instruction start synchronization signal, starts the internal state machine of the instruction analysis circuit, first receives a preset number of bytes of instruction codes, and judges the validity of the instruction codes; if it is not a supported instruction code of the chip, it is considered to be an invalid instruction, and the current instruction analysis is directly exited; otherwise, it is considered to be a valid instruction, and module M4 is entered; Module M4: the instruction analysis circuit continues to receive the instruction data part, and the specific data length is obtained according to the first byte of the instruction data; after receiving the instruction data, the instruction data is transmitted to the CRC check circuit together with the instruction code for calculation; Module M5: the CRC check circuit returns the CRC value to the instruction analysis circuit after calculation; the instruction analysis circuit continues to receive the CRC data contained in the instruction, and if the two CRC values are equal, it indicates that the instruction is a valid instruction, and module M6 is executed; otherwise, the current instruction analysis is directly exited; Module M6: the instruction analysis circuit sends an instruction valid signal to the feedback control circuit, the feedback control circuit controls the MOS switch to close the MOS switch, forms a current feedback to the initiator, executes the specific operation defined in the instruction, and then enters the state of waiting for receiving a new instruction again; Module M7: the initiator receives the feedback state of the electronic detonator chip, indicating that the current instruction has been correctly received by the electronic detonator chip, and waits for the execution of the next instruction; otherwise, the instruction retransmission operation is performed, and if it is not successful for a preset number of times, it is considered that the current communication network has an anomaly, the current instruction transmission is terminated, and prompt information of instruction anomaly and the need for troubleshooting is output to the user interface.

9. The application system of the electronic detonator circuit for high reliable communication according to claim 8, characterized in that, The initiator completes the network registration, network scanning and network initiation of the electronic detonator by sending the instruction square wave and identifying the feedback current of the electronic detonator in the feedback square wave. The preset number of times in module M7 is 3.

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