Bandwidth resource control method and device, storage medium and electronic device

Abstract

Embodiments of the present application provide a bandwidth resource control method and device, a storage medium and an electronic device, wherein the method comprises: in the process of starting the server, obtaining first device information of a first device connected with a first PCIE port; determining a first target number of bandwidth resources to be allocated to the first PCIE port according to a first target device type and a first target resource identifier; in the case that the candidate bandwidth resources are more than or equal to the first target number, allocating the first target number of bandwidth resources in the candidate bandwidth resources to the first PCIE port, wherein the candidate bandwidth resources are bandwidth resources in an idle state in a PCIE root port. Through the embodiments of the present application, the problem of low control efficiency of bandwidth resources is solved, and the effect of improving the control efficiency of bandwidth resources is achieved.

Description

Technical Field

[0001] This application relates to the field of computers, and more specifically, to a method and apparatus for controlling bandwidth resources, a storage medium, and an electronic device. Background Technology

[0002] As servers become increasingly integrated, a single motherboard can be compatible with multiple configuration packages, providing users with more flexible configuration options while also reducing costs and increasing efficiency.

[0003] Currently, server processors provide PCIe root ports via IIO (Integrated Input / Output), which can be configured with bandwidths of x2, x4, x8, and x16, and support GEN1, GEN2, GEN3, GEN4, and GEN5 speeds. With the increasing variety of PCIe interface types and the further segmentation of PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) bandwidth, related technologies often use PCH (Platform Controller Hub) GPIO (General-purpose input / output) to automatically configure PCIe bandwidth design. For example, different versions of BIOS need to be created for different PCIe requirements. Since PCIe configuration is often complex and variable, this approach often requires developing different BIOS versions for different PCIe needs, resulting in high development costs, long development cycles, and an inability to cover the bandwidth requirements of various PCIe configurations, leading to low efficiency in bandwidth resource control.

[0004] No effective solution has yet been proposed to address the technical problem of low efficiency in controlling bandwidth resources in related technologies. Summary of the Invention

[0005] This application provides a method and apparatus for controlling bandwidth resources, a storage medium, and an electronic device to at least solve the problem of low control efficiency of bandwidth resources in related technologies.

[0006] According to one embodiment of this application, a bandwidth resource control method is provided, comprising: during server startup, acquiring first device information of a first device connected to a first PCIe port, wherein the processor in the server includes a PCIe root port, the PCIe root port includes multiple PCIe ports, the multiple PCIe ports include the first PCIe port, the first device information carries a first target device type of the first device and a first target resource identifier corresponding to the first device, wherein when the device type of the first device is the first target device type, the first target resource identifier is used to indicate the number of bandwidth resources allowed to be used by the first device of the first target device type; determining a first target number of bandwidth resources to be allocated to the first PCIe port according to the first target device type and the first target resource identifier; and when the candidate bandwidth resources are greater than or equal to the first target number of bandwidth resources, allocating the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port, wherein the candidate bandwidth resources are bandwidth resources in an idle state in the PCIe root port.

[0007] In an exemplary embodiment, determining the first target quantity of bandwidth resources to be allocated to the first PCIe port based on the first target device type and the first target resource identifier includes: when the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the quantity of bandwidth resources to be allocated to the first PCIe port as a first quantity, wherein the first target quantity is the first quantity, the first resource identifier is a resource identifier in a first resource identifier set, and when the first target device type is the first type, each resource identifier in the first resource identifier set is used to represent the quantity of bandwidth resources allowed to be used by the first device of the first type, and the first resource identifier is used to represent the first type. The number of bandwidth resources that the first device is allowed to use is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is determined to be the second quantity, wherein the first target quantity is the second quantity, the second resource identifier is a resource identifier in the second resource identifier set, and when the first target device type is the second type, each resource identifier in the second resource identifier set is used to represent the number of bandwidth resources that the first device of the second type is allowed to use, and the second resource identifier is used to represent that the number of bandwidth resources that the first device of the second type is allowed to use is the second quantity; wherein the first quantity is greater than the second quantity.

[0008] In an exemplary embodiment, when the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as a first quantity includes: searching a table corresponding to the first PCIe port for a first quantity result that corresponds to the first type and the first resource identifier, wherein the table records multiple sets of corresponding device types, resource identifiers, and quantity results, and the table includes a third quantity result corresponding to the first type and a third resource identifier, wherein the third resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the first device of the first type is a third quantity, the third quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIe port, and the third quantity result is empty; when the first quantity result represents the first quantity, determining the number of bandwidth resources to be allocated to the first PCIe port is determined to be a first quantity. The quantity of bandwidth resources for the CIE port is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, determining the quantity of bandwidth resources to be allocated to the first PCIE port as the second quantity includes: searching in the table corresponding to the first PCIE port for a second quantity result that corresponds to the second type and the second resource identifier, wherein the table includes a fourth quantity result corresponding to the second type and the fourth resource identifier, the fourth resource identifier being used to indicate that the quantity of bandwidth resources allowed for the first device of the second type is the fourth quantity, the fourth quantity is greater than the maximum quantity of bandwidth resources allowed for the first PCIE port, and the fourth quantity result is empty; when the second quantity result represents the second quantity, determining the quantity of bandwidth resources to be allocated to the first PCIE port as the second quantity.

[0009] In an exemplary embodiment, when the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as a first quantity includes: when the first target device type is a board type and the first target resource identifier is the first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as a first quantity, wherein when the first target device type is the board type, the first device is a board, the first resource identifier is a resource identifier in a resource identifier set, and each resource identifier in the resource identifier set is used to represent the number of bandwidth resources allowed to be used by the board. The first resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the board is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, determining that the number of bandwidth resources to be allocated to the first PCIe port is the second quantity includes: when the first target device type is the backplane type and the first target resource identifier is the second resource identifier, determining that the number of bandwidth resources to be allocated to the first PCIe port is the second quantity, wherein when the first target device type is the backplane type, the first device is the backplane, and the second resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the backplane is the second quantity.

[0010] In one exemplary embodiment, the method further includes: when the plurality of PCIe ports include a second PCIe port and the second PCIe port is connected to a second device, obtaining second device information of the second device, wherein the second device information carries a second target device type of the second device and a second target resource identifier corresponding to the second device, and when the device type of the second device is the second target device type, the second target resource identifier is used to indicate the number of bandwidth resources allowed to be used by the second device of the second target device type; determining a second target number of bandwidth resources to be allocated to the second PCIe port based on the second target device type and the second target resource identifier; when allocating the first target number of bandwidth resources in the candidate bandwidth resources to the first PCIe port, determining whether the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are more than or equal to the second target number of bandwidth resources; when the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are more than or equal to the second target number of bandwidth resources, allocating the second target number of bandwidth resources in the candidate bandwidth resources other than the first target number of bandwidth resources to the second PCIe port.

[0011] In one exemplary embodiment, the method further includes: if the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are less than the second target number of bandwidth resources, allocating the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources to the second PCIE port.

[0012] In an exemplary embodiment, allocating the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port includes: obtaining an adjustment request sent by the Basic Input / Output System (BIOS) in the server, wherein the adjustment request requests that the value of a target register in the server be adjusted to a target value, the value of the target register representing the number of bandwidth resources allocated to the first PCIe port, and the target value representing that the number of bandwidth resources allocated to the first PCIe port is the first target number; responding to the adjustment request, adjusting the value of the target register to the target value, and allocating the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port according to the target value of the target register.

[0013] According to another embodiment of this application, a bandwidth resource control device is provided, comprising: a first acquisition module, configured to acquire first device information of a first device connected to a first PCIe port during server startup, wherein the processor in the server includes a PCIe root port, the PCIe root port includes a plurality of PCIe ports, the plurality of PCIe ports includes the first PCIe port, the first device information carries a first target device type of the first device and a first target resource identifier corresponding to the first device, wherein when the device type of the first device is the first target device type, the first target resource identifier is used to indicate the number of bandwidth resources allowed to be used by the first device of the first target device type; a first determination module, configured to determine a first target number of bandwidth resources to be allocated to the first PCIe port according to the first target device type and the first target resource identifier; and a first allocation module, configured to allocate the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port when the candidate bandwidth resources are greater than or equal to the first target number of bandwidth resources, wherein the candidate bandwidth resources are bandwidth resources in an idle state in the PCIe root port.

[0014] According to yet another embodiment of this application, a computer-readable storage medium is also provided, wherein a computer program is stored in the computer program, and the computer program is configured to execute the steps in any of the above-described bandwidth resource control method embodiments when it is run.

[0015] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above-described bandwidth resource control method embodiments.

[0016] Through the embodiments of this application, the amount of bandwidth resources to be allocated to the PCIe port can be automatically determined based on the device type and the amount of bandwidth resources allowed for the device in the device information of the device connected to the PCIe port. The amount of bandwidth resources to be allocated to the PCIe port can be automatically allocated from the idle bandwidth resources in the PCIe root port. In this way, the amount of port resources of the PCIe port can be automatically adjusted to the amount of bandwidth resources allowed for the device connected to the PCIe port. Therefore, the problem of low bandwidth resource control efficiency can be solved, and the effect of improving bandwidth resource control efficiency can be achieved. Attached Figure Description

[0017] Figure 1 This is a structural block diagram of a bandwidth resource control method according to an embodiment of this application;

[0018] Figure 2 This is a schematic diagram illustrating an application scenario of an optional bandwidth resource control method according to an embodiment of this application.

[0019] Figure 3 This is a flowchart of a bandwidth resource control method according to an embodiment of this application;

[0020] Figure 4 This is a schematic diagram illustrating an optional method for determining the amount of bandwidth resources to be allocated to a PCIe port according to an embodiment of this application;

[0021] Figure 5 This is a schematic diagram of an optional configuration where multiple PCIe ports are connected to devices, according to an embodiment of this application.

[0022] Figure 6 This is a schematic diagram illustrating the connection between a PCA9555 and a PCIE port according to an embodiment of this application;

[0023] Figure 7 This is a schematic diagram of an optional bandwidth resource control method implemented according to this application;

[0024] Figure 8This is a structural block diagram of a bandwidth resource control device according to an embodiment of this application. Detailed Implementation

[0025] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of the embodiments of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0027] The bandwidth resource control method embodiments provided in this application can be run in, for example, Figure 1 In the network architecture shown, Figure 1 This is a structural block diagram of a bandwidth resource control method according to an embodiment of this application, as shown below. Figure 1 As shown, the network architecture includes server 102, server 204 and server 206.

[0028] The method for controlling bandwidth resources in the embodiments of this application can be explained and described using server 102 as an example, but is not limited to being applicable to the embodiments of this application.

[0029] Figure 2 This is a schematic diagram illustrating an application scenario of an optional bandwidth resource control method according to an embodiment of this application, such as... Figure 2 As shown, server 102 may, but is not limited to, have a server motherboard 104 deployed on it. A CPU (Central Processing Unit) 106 is deployed on the server motherboard 104. Multiple PCIe root ports are deployed on the CPU 106, including PCIe root port 108, which in turn includes multiple PCIe ports, including PCIe port 110, which is connected to device 114. The bandwidth resource control method in this embodiment may be implemented through, but is not limited to, the following steps:

[0030] Step S202: During the startup process of server 102, first device information of device 114 connected to PCIe port 110 is obtained. The processor (or CPU 106) in server 102 includes PCIe root port 108, which includes multiple PCIe ports, including PCIe port 110. The first device information carries the first target device type of device 114 and the first target resource identifier corresponding to device 114. When the device type of device 114 is the first target device type, the first target resource identifier is used to indicate the amount of bandwidth resources that device 114 of the first target device type is allowed to use.

[0031] Step S204: Determine the first target quantity of bandwidth resources to be allocated to PCIE port 110 based on the first target device type and the first target resource identifier;

[0032] Step S206: If the number of candidate bandwidth resources is greater than or equal to the first target number of bandwidth resources, allocate the first target number of bandwidth resources from the candidate bandwidth resources to PCIE port 110, wherein the candidate bandwidth resources are the bandwidth resources in the PCIE root port 108 that are in an idle state.

[0033] Through the above steps, the amount of bandwidth resources to be allocated to the PCIe port can be automatically determined based on the device type and the amount of bandwidth resources allowed for the device in the device information of the device connected to the PCIe port. The amount of bandwidth resources to be allocated to the PCIe port can be automatically allocated from the idle bandwidth resources in the PCIe root port. In this way, the amount of port resources of the PCIe port can be automatically adjusted to the amount of bandwidth resources allowed for the device connected to the PCIe port. Therefore, the problem of low bandwidth resource control efficiency can be solved, and the effect of improving bandwidth resource control efficiency can be achieved.

[0034] This embodiment provides a method for controlling bandwidth resources running on the aforementioned mobile terminal. Figure 3 This is a flowchart of a bandwidth resource control method according to an embodiment of this application, such as... Figure 3 As shown, the process includes the following steps:

[0035] Step S302: During the server startup process, first device information of the first device connected to the first PCIe port is obtained. The processor in the server includes a PCIe root port, the PCIe root port includes multiple PCIe ports, the multiple PCIe ports include the first PCIe port, and the first device information carries the first target device type of the first device and the first target resource identifier corresponding to the first device. When the device type of the first device is the first target device type, the first target resource identifier is used to indicate the amount of bandwidth resources that the first device of the first target device type is allowed to use.

[0036] Step S304: Determine the first target quantity of bandwidth resources to be allocated to the first PCIE port based on the first target device type and the first target resource identifier;

[0037] Step S306: If the number of candidate bandwidth resources is greater than or equal to the first target number of bandwidth resources, allocate the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port, wherein the candidate bandwidth resources are the bandwidth resources in the PCIe root port that are in an idle state.

[0038] Through the above steps, the amount of bandwidth resources to be allocated to the PCIe port can be automatically determined based on the device type and the amount of bandwidth resources allowed for the device in the device information of the device connected to the PCIe port. The amount of bandwidth resources to be allocated to the PCIe port can be automatically allocated from the idle bandwidth resources in the PCIe root port. In this way, the amount of port resources of the PCIe port can be automatically adjusted to the amount of bandwidth resources allowed for the device connected to the PCIe port. Therefore, the problem of low bandwidth resource control efficiency can be solved, and the effect of improving bandwidth resource control efficiency can be achieved.

[0039] The entity performing the above steps can be a server, but is not limited to this.

[0040] In the technical solution provided in step S302 above, the processor in the server may, but is not limited to, provide multiple PCIe root ports. These multiple PCIe root ports may, but are not limited to, include PCIe root ports. Each PCIe root port may, but is not limited to, provide multiple PCIe ports, including the first PCIe port. For example, each processor integrated with I / O provides 5 PCIe root ports, defined as PE0, PE1, PE2, PE3, and PE4, respectively.

[0041] Optionally, in this embodiment, the first device information of the first device connected to the first PCIe port can be obtained, but is not limited to, by the following methods: reading the SMBUS address, reading the PCA9555 IO data, and reading the corresponding GPIO value of the PCH to obtain the first device information. The array of PCA9555 IO data and PCH GPIO values ​​can be established according to the PCIe root end, but is not limited to, by the following methods: Specifically, the PCA9555 data can be defined, but is not limited to, by the following methods:

[0042]

[0043] PCH GPIO related arrays can be defined in, but are not limited to, the following ways:

[0044]

[0045] Optionally, in this embodiment, the bandwidth resources of the PCIe root port are often limited. It is possible, but not limited to, obtaining the first device information of the first device connected to the first PCIe port. The first device information carries the device type and a first target resource identifier of the first device. The first target resource identifier can, but is not limited to, indicate the amount of bandwidth resources allowed for the first device of the first target device type. It is understood that the first target resource identifier can, but is not limited to, indicate the amount of bandwidth resources required by the first device. Each device type has corresponding allowed bandwidth resources, and the amount of allowed bandwidth resources for different device types can, but is not limited to, be the same or different, etc.

[0046] In the technical solution provided in step S304 above, in order to meet the device's bandwidth resource usage requirements, the first target quantity of bandwidth resources to be allocated to the first PCIe port can be automatically determined based on, but is not limited to, the first target device type and the first target resource identifier. It is understood that the first target quantity can be, but is not limited to, equal to the number of bandwidth resources allowed to be used by the first device of the first target device type represented by the first target resource identifier. This method avoids manually adjusting the bandwidth resources to be allocated to the PCIe port based on the device's bandwidth resource usage requirements; instead, it automatically determines the bandwidth resources to be allocated to the PCIe port, thus improving the efficiency of determining the quantity of bandwidth resources to be allocated to the PCIe port.

[0047] Optionally, in this embodiment, if at least one of the first target device type and the first target resource identifier changes, the first target quantity of bandwidth resources to be allocated to the first PCIe port, determined according to the first target device type and the first target resource identifier, will also change. For example, the quantity of bandwidth resources to be allocated to the PCIe port is quantity 1, determined according to device type 1 and resource identifier 1, and the quantity of bandwidth resources to be allocated to the PCIe port is quantity 2, determined according to device type 1 and resource identifier 2. In such cases, quantity 1 and quantity 2 are often different.

[0048] In one exemplary embodiment, a first target quantity of bandwidth resources to be allocated to a first PCIe port may be determined, but is not limited to, based on a first target device type and a first target resource identifier, in the following manner: When the first target device type is a first type and the first target resource identifier is a first resource identifier, the quantity of bandwidth resources to be allocated to the first PCIe port is determined to be a first quantity, wherein the first target quantity is the first quantity, the first resource identifier is a resource identifier in a first resource identifier set, and when the first target device type is the first type, each resource identifier in the first resource identifier set is used to represent the quantity of bandwidth resources allowed to be used by the first device of the first type, and the first resource identifier is used to represent the first type. The number of bandwidth resources that the first device is allowed to use is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is determined to be the second quantity, wherein the first target quantity is the second quantity, the second resource identifier is a resource identifier in the second resource identifier set, and when the first target device type is the second type, each resource identifier in the second resource identifier set is used to represent the number of bandwidth resources that the first device of the second type is allowed to use, and the second resource identifier is used to represent that the number of bandwidth resources that the first device of the second type is allowed to use is the second quantity; wherein the first quantity is greater than the second quantity.

[0049] Optionally, in this embodiment, the first target device type and the first target resource identifier can be represented by at least one of letters, numbers, or strings, for example: the first type can be represented by the number 1 and the second type by the number 0; the first resource identifier can be represented by the letter a and the second resource identifier by the letter b.

[0050] Optionally, in this embodiment, when the first target device type is not a first type, each resource identifier in the first resource identifier set is not used to represent the amount of bandwidth resources allowed for the first device of the first type. When the first target device type is not a second type, each resource identifier in the second resource identifier set is not used to represent the amount of bandwidth resources allowed for the first device of the second type. In this way, the allocation of bandwidth resources on the PCIe port is dynamically adjusted according to changes in the device type and the resource identifiers of the required bandwidth resources, improving the timeliness of adjusting the bandwidth resources on the PCIe port.

[0051] In an exemplary embodiment, the method further includes: when the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIE port as a first quantity, including: searching in a table corresponding to the first PCIE port for a first quantity result that corresponds to the first type and the first resource identifier, wherein the table records multiple sets of corresponding device types, resource identifiers, and quantity results, the table includes a third quantity result corresponding to the first type and a third resource identifier, the third resource identifier being used to indicate that the number of bandwidth resources allowed to be used by the first device of the first type is a third quantity, the third quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIE port, and the third quantity result is empty; when the first quantity result represents the first quantity, determining the number of bandwidth resources to be allocated to the first PCIE port as a first quantity. The quantity of bandwidth resources of the first PCIe port is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, the quantity of bandwidth resources to be allocated to the first PCIe port is determined to be the second quantity, including: searching in the table corresponding to the first PCIe port for a second quantity result that corresponds to the second type and the second resource identifier, wherein the table includes a fourth quantity result corresponding to the second type and the fourth resource identifier, the fourth resource identifier being used to indicate that the quantity of bandwidth resources allowed to be used by the first device of the second type is the fourth quantity, the fourth quantity is greater than the maximum quantity of bandwidth resources allowed to be used by the first PCIe port, and the fourth quantity result is empty; when the second quantity result represents the second quantity, the quantity of bandwidth resources to be allocated to the first PCIe port is determined to be the second quantity.

[0052] Optionally, in this embodiment, the table corresponding to the PCIe port may, but is not limited to, record the type of the corresponding device and the quantity of resource identifiers. Figure 4This is a schematic diagram illustrating an optional method for determining the amount of bandwidth resources to be allocated to a PCIe port according to an embodiment of this application, such as... Figure 4 As shown, the explanation and description can be based on PCIe port 110 as the first PCIe port. The table corresponding to PCIe port 110 records the quantity results corresponding to the first target device type and the first target resource identifier. In detail, when the first target device type is the first type and the first target resource identifier is the first resource identifier, the table corresponding to PCIe port 110 is searched for the first quantity result that corresponds to the first type and the first resource identifier. When the first quantity result represents the first quantity, the quantity of bandwidth resources to be allocated to PCIe port 110 is determined to be the first quantity.

[0053] If the first target device type is the second type and the first target resource identifier is the second resource identifier, then look up the second quantity result that corresponds to the second type and the second resource identifier in the table corresponding to PCIE port 110. If the second quantity result represents the second quantity, then determine the number of bandwidth resources to be allocated to PCIE port 110 as the second quantity.

[0054] The maximum amount of bandwidth resources allowed to be used by PCIe port 110 is often limited. In such cases, bandwidth resources may be refused to be allocated to PCIe port 110 if, but is not limited to, the amount of bandwidth resources required by the device exceeds the maximum amount of bandwidth resources allowed to be used by PCIe port 110. For example, if the first target device type is a first type and the first target resource identifier is a third resource identifier, the third quantity result corresponding to the first type and the third resource identifier is searched in the table corresponding to PCIe port 110. The third resource identifier is used to indicate that the amount of bandwidth resources allowed to be used by the first device of the first type is the third quantity, and the third quantity is greater than the maximum amount of bandwidth resources allowed to be used by PCIe port 110. The third quantity result is empty.

[0055] For example, if the first target device type is the second type and the first target resource identifier is the fourth resource identifier, the fourth quantity result corresponding to the second type and the fourth resource identifier is searched in the table corresponding to the PCIE port 110. The fourth resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the first device of the second type is the fourth quantity. The fourth quantity is greater than the maximum number of bandwidth resources allowed to be used by the PCIE port 110. The fourth quantity result is empty.

[0056] In this way, the bandwidth resources to be allocated to the PCIe port can be automatically determined based on the device type and the resource identifier of the required bandwidth resources, while also avoiding the allocation of bandwidth resources exceeding the carrying capacity of the PCIe port, thus improving the operational stability of the PCIe port.

[0057] In one exemplary embodiment, the method further includes: determining a first quantity of bandwidth resources to be allocated to the first PCIe port when the first target device type is a first type and the first target resource identifier is a first resource identifier; this includes: determining a first quantity of bandwidth resources to be allocated to the first PCIe port when the first target device type is a board type and the first target resource identifier is the first resource identifier, wherein when the first target device type is the board type, the first device is a board, and the first resource identifier is a resource identifier in a resource identifier set, where each resource identifier in the resource identifier set represents the bandwidth resources allowed to be used by the board. The quantity, wherein the first resource identifier is used to indicate that the quantity of bandwidth resources allowed to be used by the board is the first quantity; when the first target device type is the second type and the first target resource identifier is the second resource identifier, determining the quantity of bandwidth resources to be allocated to the first PCIe port as the second quantity includes: when the first target device type is the backplane type and the first target resource identifier is the second resource identifier, determining the quantity of bandwidth resources to be allocated to the first PCIe port as the second quantity, wherein when the first target device type is the backplane type, the first device is the backplane, and the second resource identifier is used to indicate that the quantity of bandwidth resources allowed to be used by the backplane is the second quantity.

[0058] Optionally, in this embodiment, the target device type may include, but is not limited to, board type, backplane type, etc., and the first device may include, but is not limited to, board, backplane, etc. In this case, the board may support, but is not limited to, x8 and x16 bandwidth, and the backplane may support, but is not limited to, x4 bandwidth.

[0059] In one exemplary embodiment, the method further includes: when the plurality of PCIe ports include a second PCIe port and the second PCIe port is connected to a second device, obtaining second device information of the second device, wherein the second device information carries a second target device type of the second device and a second target resource identifier corresponding to the second device, and when the device type of the second device is the second target device type, the second target resource identifier is used to indicate the number of bandwidth resources allowed to be used by the second device of the second target device type; determining a second target number of bandwidth resources to be allocated to the second PCIe port based on the second target device type and the second target resource identifier; when allocating the first target number of bandwidth resources in the candidate bandwidth resources to the first PCIe port, determining whether the bandwidth resources in the candidate bandwidth resources other than the first target number of bandwidth resources are more than or equal to the second target number of bandwidth resources; when the bandwidth resources in the candidate bandwidth resources other than the first target number of bandwidth resources are more than or equal to the second target number of bandwidth resources, allocating the second target number of bandwidth resources in the candidate bandwidth resources other than the first target number of bandwidth resources to the second PCIe port.

[0060] Optionally, in this embodiment, the method for determining the second target quantity of bandwidth resources to be allocated to the second PCIe port may be, but is not limited to, the same as the method for determining the first target quantity of bandwidth resources to be allocated to the first PCIe port.

[0061] Optionally, in this embodiment, multiple PCIe ports may, but are not limited to, all be connected to devices. Figure 5 This is a schematic diagram illustrating an optional configuration where multiple PCIe ports are connected to devices, according to an embodiment of this application. Figure 5 As shown, server 102 may, but is not limited to, deploy a server motherboard 104, on which a CPU 106 is deployed. Multiple PCIe root ports are deployed on the CPU 106, including PCIe root port 108, which includes multiple PCIe ports, including PCIe port 110 and PCIe port 112. PCIe port 110 is connected to device 114, and PCIe port 112 is connected to device 116.

[0062] To ensure that the bandwidth resources required by at least one device connected to a PCIe port are met, in this case, but not limited to, prioritizing the allocation of a first target number of bandwidth resources from the candidate bandwidth resources to PCIe port 114, and then determining whether the remaining bandwidth resources (excluding the first target number) are greater than or equal to a second target number. If the remaining bandwidth resources (excluding the first target number) are greater than or equal to the second target number, then the remaining bandwidth resources (excluding the first target number) of the candidate bandwidth resources are allocated to PCIe port 112. This method prioritizes the allocation of required bandwidth resources to one PCIe port, meeting the bandwidth resource needs of at least some of the devices connected to the PCIe ports, and improving the operational stability of the devices connected to the PCIe ports.

[0063] In one exemplary embodiment, the method further includes: if the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are less than the second target number of bandwidth resources, allocating the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources to the second PCIE port.

[0064] Optionally, in this embodiment, the candidate bandwidth resources are often limited. After allocating the first target number of bandwidth resources to the first PCIe port, the remaining bandwidth resources in the candidate bandwidth resources may not be sufficient to meet the bandwidth requirements of the device connected to the second PCIe port. For example, the bandwidth resources in the candidate bandwidth resources other than the first target number are less than the second target number. In such cases, all bandwidth resources in the candidate bandwidth resources other than the first target number are allocated to the second PCIe port. In this way, on the one hand, the utilization rate of the candidate bandwidth resources is improved; on the other hand, although the remaining bandwidth resources in the candidate bandwidth resources cannot meet all the bandwidth requirements of the device connected to the second PCIe port, at least a portion of the required bandwidth resources can be allocated to the second PCIe port for the device connected to the second PCIe port, thereby improving the operational stability of the device connected to the second PCIe port.

[0065] In the technical solution provided in step S306 above, the bandwidth resources of the PCIe root port are often limited. If the number of candidate bandwidth resources is less than the first target number of bandwidth resources, it indicates that the idle bandwidth resources in the PCIe root port are insufficient to meet the device's bandwidth resource requirements. In such a case, the candidate bandwidth resources can be allocated to the first PCIe port, but not limited to this.

[0066] In an exemplary embodiment, the bandwidth resources of the first target number in the candidate bandwidth resources can be allocated to the first PCIe port by, but not limited to, the first target number of bandwidth resources in the candidate bandwidth resources as follows: obtaining an adjustment request sent by the Basic Input / Output System (BIOS) in the server, wherein the adjustment request requests that the value of a target register in the server be adjusted to a target value, the value of the target register representing the number of bandwidth resources allocated to the first PCIe port, and the target value representing that the number of bandwidth resources allocated to the first PCIe port is the first target number; responding to the adjustment request, adjusting the value of the target register to the target value, and allocating the first target number of bandwidth resources in the candidate bandwidth resources to the first PCIe port according to the target value of the target register.

[0067] Optionally, in this embodiment, when allocating a first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port, the first device may, but is not limited to, communicate with the first PCIe port through the first target number of bandwidth resources.

[0068] Optionally, in this embodiment, the server motherboard hardware can be directly initialized and configured through the BIOS (Basic Input Output System) during the server startup process, but not limited to. Based on the bandwidth requirements of various Riser cards and different PCIe devices on the server motherboard, the PCIe bandwidth configuration can be dynamically adjusted according to the PCIe bandwidth configuration scheme during the initial stage of the server startup process.

[0069] To better understand the bandwidth resource control method in the embodiments of this application, the following explanation and description of the bandwidth resource control method in the embodiments of this application will be provided in conjunction with optional embodiments, including but not limited to the Intel Eaglestream two-way platform, and may be applicable to but not limited to the embodiments of this application.

[0070] Intel's Eaglestream dual-socket platform supports two processors, designated CPU0 and CPU1. Each processor integrates I / O to provide five PCIe root ports, defined as PE0, PE1, PE2, PE3, and PE4. It can be understood that CPU0PE0 represents the PCIe PE0 root port on CPU0.

[0071] Each PCIe root port supports a maximum bandwidth configuration of x16. Based on a minimum supported x2 bandwidth, each x16 port is further divided into eight ports: PortA, PortB, PortC, PortD, PortE, PortF, PortG, and PortH. PortA and PortB together support x4 bandwidth, which can be represented as PortAB, but is not limited to. Other x4 bandwidth ports follow the same pattern, represented as PortCD, PortEF, and PortGH. PortA, PortB, PortC, and PortD together support x8 bandwidth, which can be represented as PortAD, but is not limited to. PortEH represents the x8 bandwidth from PortE to PortH; PortAH represents the x16 bandwidth from PortA to PortH.

[0072] Based on the hardware motherboard design of the server, it is possible, but not limited to, to use the PCA9555 chip to expand GPIO and PCH GPIO in conjunction with two of the PCIe root ports, CPU0PE1 and CPU1PE0, to support the automatic allocation function of PCIe bandwidth.

[0073] Server motherboards typically employ OCP3.0 connectors, Gen-Z connectors, and MCIO high-speed connectors for their PCIe interface design, allowing for flexible PCIe interface expansion. OCP3.0 adapter cards support OCP3.0 network card multi-host functionality, while Gen-Z and MCIO high-speed connectors can be paired with different riser cards to connect various types of PCIe external expansion cards (graphics cards, network cards, storage devices, etc.). Figure 6 This is a schematic diagram illustrating the connection between a PCA9555 and a PCIe port according to an embodiment of this application, as shown below. Figure 6 As shown, the PE1 root port of CPU0 is brought out through two MCIO X8 connectors, defined as CPU0PE1 PortA and CPU0PE1PortEH. The PE0 root port of CPU1 has PortAD connected to an X8 OCP3.0 connector, defined as CPU1PE0 PortAD, and PortEH connected to one MCI0 X8 connector, defined as CPU1PE0 PortEH.

[0074] The PCA9555 is connected under PCH HOST_SMBUS. The PCA9555's I2C address is 0x44, and it uses the extended IO_0_2-IO_0_7 ports. CPU1PE0 PortAD connects to the OCP3.0 connector, with a default bandwidth of x8, supporting x16 expansion. It can be used in a multi-host configuration with CPU0PE1 PortAD.

[0075] The CPU1PE0 PortAD OCP3.0 connector uses a 2-pin connection to PCA9555_IO_0_2 and PCA9555_IO_0_3 to distinguish between OCP extended x16 and cross-CPU domain support for multi-host functionality. One pin represents CABLE_PRSNT (connected to PCA9555_IO_0_3), and one pin represents CPU_ADDR (connected to PCA9555_IO_0_2).

[0076] When CPU1PE0 PortAD OCP3.0 is expanded from X8 to X16, and the CABLE cable is connected to CPU1PE0 PortAD and CPU1PE0 PortEH, the CABLE_PRSNT signal is low (value 0) and the CPU_ADDR signal is high (value 1) (refer to Table 8); when the CABLE cable is connected to CPU1PE0 PortAD and CPU0PE1 PortAD, the CABLE_PRSNT signal is low and the CPU_ADDR signal is low (refer to Tables 4 to 7); the default value of CABLE_PRSNT is high, and no CABELE cable is connected. In this case, it is not necessary to determine the value of CPU_ADDR (refer to Tables 1 to 3).

[0077] When the CPU root port is brought out through the MCIO X8 connector, the downstream side will be connected to the backplane or board (e.g., PCIE Riser card). Two pins (MCIO_BP_ID0 and MCIO_BP_ID1) are used to connect to the corresponding PCA9555 chip expansion I / O on each MCIO connector.

[0078] MCIO_BP_ID0 signal: Used to distinguish the type of board connected to the MCIO downlink. 0 corresponds to backplane and 1 corresponds to riser.

[0079] MCIO_BP_ID1 signal: used to distinguish whether the MCIO downlink is connected to the x8 slot or the x16 slot. On the riser, x8 corresponds to 0 and x16 corresponds to 1.

[0080] The MCIO_BP_ID0 signal of the CPU1PE0 PortEH MCIO X8 connector is connected to PCA9555 IO_0_4, and the MCIO_BP_ID1 signal is connected to PCA9555 IO_0_5 (refer to Tables 2 and 6).

[0081] The MCIO_BP_ID0 signal of the CPU0PE1 PortAD MCIO X8 connector is connected to PCA9555IO_0_6, and the MCIO_BP_ID1 signal is connected to PCA9555 IO_0_7 (refer to Table 3).

[0082] The MCIO_BP_ID0 signal of the CPU0PE1 PortEH MCIO X8 connector is connected to PCH GPIO GPPC_B_17, and the MCIO_BP_ID1 signal is connected to PCH GPIO GPPC_B_18 (refer to Tables 3 and 7).

[0083] In this case, the specific GPIO settings are shown in Tables 1 to 8:

[0084] 1) When CABLE_PRSNT=1 and CPU_ADDR=0 or 1 (CABLE is not in the field, the default setting is used)

[0085] CPU1PE0 Table 1

[0086] PortAD X8 OCP3.0

[0087] Table 2

[0088]

[0089] CPU0PE1: Table 3

[0090]

[0091] 2) CABLE_PRSNT=0, CPU_ADDR=0 (used by multi host)

[0092] CPU1PE0 PortAD Table 4

[0093] PortAD X8 OCP3.0

[0094] CPU0PE1 PortAD Table 5

[0095] PortAD X8 OCP3.0

[0096] CPU1PE0 PortEH: Table 6

[0097]

[0098] CPU0 PE1 PortEH Table 7

[0099]

[0100] 3) CABLE_PRSNT = 0, CPU_ADDR = 1 (OCP3.0 extended X16 used) dPU1PE0 PortAH Table 8

[0101] PortAH X16 OCP3.0

[0102] CPU0PE1 is allocated according to Tables 1 to 3 when CABLE_PRSNT=1, and will not be repeated here. The bandwidth allocation of the PCIe root ports of other processors is based on the hardware design and will not be repeated here.

[0103] In detail, during the processor IIO initialization phase of the BIOS boot process, the PCA9555 I / O data is obtained by reading the SMBUS address, and the corresponding GPIO value of the PCH is read and updated in the array. Based on the obtained current PCA955 I / O value and PCH GPIO value, the amount of bandwidth resources to be allocated to the PCIe port is determined, and the PCIe root port bandwidth setting is dynamically adjusted. Tables 4 to 7 illustrate the BIOS automatic check process. If the current motherboard is configured with two cable connections to the CPU1PE0 PortAD OCP3.0 connector and the CPU0PE1 PortAD MCIO connector, and connected to a smart network card via a Riser card, and the CPU1PE0 PortEH MCIO connector is connected to the backplane via a cable configured for X4x4 access to an NVMe device, and the CPU0PE1 PortEH connector is connected to the Riser card configured for X8 access to a RAID card device...

[0104] During the boot process, at the initial IIO stage, the BIOS reads the following values: PCA9555_I0_0_3 (CABLE_PRSNT) and PCA9555_I0_0_2 (CPU_ADDR) are 0; PCA9555IO_0_4 (CPU1PE0 PortEH MCIO_BP_ID0) and PCA9555 IO_0_5 (CPU1PE0 PortEH MCIO_BP_ID1) are 0; GPIO_VER3_GPP_B17 (CPU0PE1 PortEH MCIO_BP_ID0) is 1; and GPIO_VER3_GPP_B18 (CPU0PE1 PortEH MCIO_BP_ID1) is 0. Based on these detected values, the BIOS configures CPU0PE1 PortAD, CPU0PE1 PortEH, and CPU1PE0 PortAD to x8. The PortEH port is configured as an x4x4 configuration to enable dynamic allocation of PCIe root port bandwidth. After BIOS code debugging and actual connection of a PCIe Riser card or backplane, the current Eaglestream platform servers can support dynamic adjustment of PCIe bandwidth allocation based on configuration changes.

[0105] Figure 7 This is a schematic diagram of an optional bandwidth resource control method implemented according to this application, such as... Figure 7 As shown, the steps may include, but are not limited to:

[0106] Step S701: Power on the server;

[0107] Step S702: Create an array of PCA9555 IO values ​​and PCH GPIO values ​​based on the PCIe root port;

[0108] Step S703: Read the current PCA9555 IO value and PCH GPIO value and update them to their respective arrays;

[0109] Step S704: Adjust the bandwidth of each PCIe root port sequentially according to the array values.

[0110] By utilizing the multi-channel I / O expansion function of the PCA955 chip, and connecting to the signal pins of the CABLE in-situ signal, MCIO connector, and OCP3.0 connector, combined with the existing PCH GPIO detection, flexible and automatic bandwidth allocation for various PCIe configurations on the server motherboard is achieved, improving system scalability. During the initial I / O phase of the BIOS startup process, the encoding dynamically adjusts the PCIe bandwidth configuration by detecting the PCA9555 I / O values ​​and PCH GPIO values, avoiding manual modification of PCIe port settings and improving the reliability of server production and maintenance.

[0111] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solutions of the embodiments of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0112] This embodiment also provides a bandwidth resource control device for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0113] Figure 8 This is a structural block diagram of a bandwidth resource control device according to an embodiment of this application, such as... Figure 8 As shown, the device includes:

[0114] The first acquisition module 802 is used to acquire first device information of a first device connected to a first PCIe port during the server startup process. The processor in the server includes a PCIe root port, the PCIe root port includes multiple PCIe ports, the multiple PCIe ports include the first PCIe port, and the first device information carries a first target device type of the first device and a first target resource identifier corresponding to the first device. When the device type of the first device is the first target device type, the first target resource identifier is used to indicate the amount of bandwidth resources that the first device of the first target device type is allowed to use.

[0115] The first determining module 804 is used to determine the first target quantity of bandwidth resources to be allocated to the first PCIE port based on the first target device type and the first target resource identifier.

[0116] The first allocation module 806 is configured to allocate the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port when the candidate bandwidth resources are greater than or equal to the first target number of bandwidth resources, wherein the candidate bandwidth resources are the bandwidth resources in the PCIe root port that are in an idle state.

[0117] The aforementioned device can automatically determine the amount of bandwidth resources to be allocated to the PCIe port based on the device type and the amount of bandwidth resources allowed for the device in the device information of the device connected to the PCIe port. It can also automatically allocate the amount of bandwidth resources from the idle bandwidth resources in the PCIe root port to the PCIe port. In this way, the amount of port resources of the PCIe port can be automatically adjusted to the amount of bandwidth resources allowed for the device connected to the PCIe port. Therefore, it can solve the problem of low bandwidth resource control efficiency and achieve the effect of improving bandwidth resource control efficiency.

[0118] In one exemplary embodiment, the first determining module includes:

[0119] The first determining unit is configured to determine, when the first target device type is a first type and the first target resource identifier is a first resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is a first number, wherein the first target number is the first number, the first resource identifier is a resource identifier in a first resource identifier set, and when the first target device type is the first type, each resource identifier in the first resource identifier set is used to represent the number of bandwidth resources that the first device of the first type is allowed to use, and the first resource identifier is used to represent that the number of bandwidth resources that the first device of the first type is allowed to use is the first number;

[0120] The second determining unit is configured to determine, when the first target device type is a second type and the first target resource identifier is a second resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is a second number, wherein the first target number is the second number, the second resource identifier is a resource identifier in a set of second resource identifiers, and when the first target device type is the second type, each resource identifier in the set of second resource identifiers is used to represent the number of bandwidth resources that the first device of the second type is allowed to use, and the second resource identifier is used to represent that the number of bandwidth resources that the first device of the second type is allowed to use is the second number;

[0121] Wherein, the first quantity is greater than the second quantity.

[0122] In an exemplary embodiment, the first determining unit is configured to: search in a table corresponding to the first PCIe port for a first quantity result that corresponds to the first type and the first resource identifier, wherein the table records multiple sets of corresponding device types, resource identifiers, and quantity results, the table includes a third quantity result corresponding to the first type and a third resource identifier, the third resource identifier being used to indicate that the number of bandwidth resources allowed to be used by the first device of the first type is a third quantity, the third quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIe port, and the third quantity result is empty; if the first quantity result represents the first quantity, determine that the number of bandwidth resources to be allocated to the first PCIe port is the first quantity;

[0123] The second determining unit is configured to: search in the table corresponding to the first PCIe port for a second quantity result that corresponds to the second type and the second resource identifier, wherein the table includes a fourth quantity result corresponding to the second type and the fourth resource identifier, the fourth resource identifier being used to indicate that the number of bandwidth resources allowed to be used by the first device of the second type is the fourth quantity, the fourth quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIe port, and the fourth quantity result is empty; and when the second quantity result indicates the second quantity, determine that the number of bandwidth resources to be allocated to the first PCIe port is the second quantity.

[0124] In one exemplary embodiment, the first determining unit is configured to: determine, when the first target device type is a board type and the first target resource identifier is the first resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is a first number, wherein when the first target device type is the board type, the first device is a board, the first resource identifier is a resource identifier in a resource identifier set, each resource identifier in the resource identifier set is used to represent the number of bandwidth resources allowed to be used by the board, and the first resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the board is the first number;

[0125] The second determining unit is configured to: determine the number of bandwidth resources to be allocated to the first PCIE port as a second number when the first target device type is a backplane type and the first target resource identifier is the second resource identifier, wherein when the first target device type is the backplane type, the first device is a backplane, and the second resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the backplane is the second number.

[0126] In one exemplary embodiment, the device further includes:

[0127] The second acquisition module is used to acquire second device information of the second device when the plurality of PCIe ports include a second PCIe port and the second PCIe port is connected to the second device. The second device information carries a second target device type of the second device and a second target resource identifier corresponding to the second device. When the device type of the second device is the second target device type, the second target resource identifier is used to indicate the amount of bandwidth resources that the second device of the second target device type is allowed to use.

[0128] The second determining module is used to determine the second target quantity of bandwidth resources to be allocated to the second PCIE port based on the second target device type and the second target resource identifier;

[0129] The third determining module is used to determine whether the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are more than or equal to the second target number of bandwidth resources when the first target number of bandwidth resources in the candidate bandwidth resources are allocated to the first PCIE port.

[0130] The second allocation module is configured to allocate the second target number of bandwidth resources from the candidate bandwidth resources (excluding the first target number of bandwidth resources) to the second PCIE port when the number of bandwidth resources in the candidate bandwidth resources is greater than or equal to the second target number of bandwidth resources.

[0131] In one exemplary embodiment, the device further includes:

[0132] The third allocation module is used to allocate the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources to the second PCIE port when the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are less than the second target number of bandwidth resources.

[0133] In one exemplary embodiment, the first allocation module includes:

[0134] The acquisition unit is used to acquire an adjustment request sent by the Basic Input / Output System (BIOS) in the server, wherein the adjustment request is used to request that the value of the target register in the server be adjusted to a target value, the value of the target register is used to represent the amount of bandwidth resources allocated to the first PCIe port, and the target value is used to represent that the amount of bandwidth resources allocated to the first PCIe port is the first target amount;

[0135] An adjustment unit is configured to respond to the adjustment request, adjust the value of the target register to the target value, and allocate the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIE port according to the target value of the target register.

[0136] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0137] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0138] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0139] Embodiments of this application also provide an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0140] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0141] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0142] Obviously, those skilled in the art should understand that the modules or steps of the embodiments of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the embodiments of this application are not limited to any particular combination of hardware and software.

[0143] The above description is merely a preferred embodiment of this application and is not intended to limit the embodiments of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of the embodiments of this application should be included within the protection scope of the embodiments of this application.

Claims

1. A method for controlling bandwidth resources, characterized in that, include: During server startup, the server obtains the first device information of the first device connected to the first PCIe port. The processor in the server includes a PCIe root port, which includes multiple PCIe ports, including the first PCIe port. The first device information carries the first target device type of the first device and the first target resource identifier corresponding to the first device. When the device type of the first device is the first target device type, the first target resource identifier is used to indicate the amount of bandwidth resources that the first device of the first target device type is allowed to use. Based on the first target device type and the first target resource identifier, determine the first target quantity of bandwidth resources to be allocated to the first PCIE port; If the number of candidate bandwidth resources is greater than or equal to the first target number of bandwidth resources, the first target number of bandwidth resources in the candidate bandwidth resources are allocated to the first PCIe port, wherein the candidate bandwidth resources are the bandwidth resources in the PCIe root port that are in an idle state. The method further includes: When the plurality of PCIe ports also include a second PCIe port and the second PCIe port is connected to the second device, the second device information of the second device is obtained, wherein the second device information carries the second target device type of the second device and the second target resource identifier corresponding to the second device. When the device type of the second device is the second target device type, the second target resource identifier is used to indicate the amount of bandwidth resources that the second device of the second target device type is allowed to use. Based on the second target device type and the second target resource identifier, determine the second target quantity of bandwidth resources to be allocated to the second PCIE port; When allocating the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port, determine whether the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are greater than or equal to the second target number of bandwidth resources. If the number of bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources is greater than or equal to the second target number of bandwidth resources, the second target number of bandwidth resources in the candidate bandwidth resources other than the first target number of bandwidth resources shall be allocated to the second PCIE port.

2. The method according to claim 1, characterized in that, The step of determining the first target quantity of bandwidth resources to be allocated to the first PCIe port based on the first target device type and the first target resource identifier includes: When the first target device type is a first type and the first target resource identifier is a first resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is determined to be a first quantity, wherein the first target quantity is the first quantity, the first resource identifier is a resource identifier in a first resource identifier set, and when the first target device type is the first type, each resource identifier in the first resource identifier set is used to represent the number of bandwidth resources that the first device of the first type is allowed to use, and the first resource identifier is used to represent that the number of bandwidth resources that the first device of the first type is allowed to use is the first quantity; When the first target device type is the second type and the first target resource identifier is the second resource identifier, the number of bandwidth resources to be allocated to the first PCIE port is determined to be the second number, wherein the first target number is the second number, the second resource identifier is a resource identifier in the second resource identifier set, and when the first target device type is the second type, each resource identifier in the second resource identifier set is used to represent the number of bandwidth resources that the first device of the second type is allowed to use, and the second resource identifier is used to represent that the number of bandwidth resources that the first device of the second type is allowed to use is the second number; Wherein, the first quantity is greater than the second quantity.

3. The method according to claim 2, characterized in that, When the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as a first quantity includes: searching for a first quantity result that corresponds to the first type and the first resource identifier in a table corresponding to the first PCIe port, wherein the table records multiple sets of corresponding device types, resource identifiers, and quantity results, and the table includes a third quantity result corresponding to the first type and a third resource identifier, wherein the third resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the first device of the first type is a third quantity, the third quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIe port, and the third quantity result is empty; when the first quantity result represents the first quantity, determining the number of bandwidth resources to be allocated to the first PCIe port as the first quantity; When the first target device type is the second type and the first target resource identifier is the second resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as the second quantity includes: searching in the table corresponding to the first PCIe port for a second quantity result that corresponds to the second type and the second resource identifier, wherein the table includes a fourth quantity result corresponding to the second type and the fourth resource identifier, the fourth resource identifier being used to indicate that the number of bandwidth resources allowed to be used by the first device of the second type is the fourth quantity, the fourth quantity is greater than the maximum number of bandwidth resources allowed to be used by the first PCIe port, and the fourth quantity result is empty; when the second quantity result represents the second quantity, determining the number of bandwidth resources to be allocated to the first PCIe port as the second quantity.

4. The method according to claim 2, characterized in that, When the first target device type is a first type and the first target resource identifier is a first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIE port as a first quantity includes: when the first target device type is a board type and the first target resource identifier is the first resource identifier, determining the number of bandwidth resources to be allocated to the first PCIE port as a first quantity, wherein when the first target device type is the board type, the first device is a board, the first resource identifier is a resource identifier in a resource identifier set, each resource identifier in the resource identifier set is used to represent the number of bandwidth resources allowed to be used by the board, and the first resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the board is the first quantity; When the first target device type is the second type and the first target resource identifier is the second resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as the second quantity includes: when the first target device type is the backplane type and the first target resource identifier is the second resource identifier, determining the number of bandwidth resources to be allocated to the first PCIe port as the second quantity, wherein when the first target device type is the backplane type, the first device is the backplane, and the second resource identifier is used to indicate that the number of bandwidth resources allowed to be used by the backplane is the second quantity.

5. The method according to claim 1, characterized in that, The method further includes: If the bandwidth resources in the candidate bandwidth resources, excluding the first target number of bandwidth resources, are less than the second target number of bandwidth resources, then the bandwidth resources in the candidate bandwidth resources, excluding the first target number of bandwidth resources, are allocated to the second PCIe port.

6. The method according to any one of claims 1 to 5, characterized in that, The step of allocating the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port includes: Obtain an adjustment request sent by the Basic Input / Output System (BIOS) in the server, wherein the adjustment request is used to request that the value of the target register in the server be adjusted to a target value, the value of the target register is used to represent the amount of bandwidth resources allocated to the first PCIe port, and the target value is used to represent that the amount of bandwidth resources allocated to the first PCIe port is the first target amount; In response to the adjustment request, the value of the target register is adjusted to the target value, and the first target amount of bandwidth resources in the candidate bandwidth resources is allocated to the first PCIE port according to the target value of the target register.

7. A bandwidth resource control device, characterized in that, include: The first acquisition module is used to acquire first device information of a first device connected to a first PCIe port during the server startup process. The processor in the server includes a PCIe root port, the PCIe root port includes multiple PCIe ports, and the multiple PCIe ports include the first PCIe port. The first device information carries a first target device type of the first device and a first target resource identifier corresponding to the first device. When the device type of the first device is the first target device type, the first target resource identifier is used to indicate the amount of bandwidth resources that the first device of the first target device type is allowed to use. The first determining module is used to determine the first target quantity of bandwidth resources to be allocated to the first PCIE port based on the first target device type and the first target resource identifier. The first allocation module is configured to allocate the first target number of bandwidth resources from the candidate bandwidth resources to the first PCIe port when the candidate bandwidth resources are greater than or equal to the first target number of bandwidth resources, wherein the candidate bandwidth resources are the bandwidth resources in the PCIe root port that are in an idle state. The device further includes: The second acquisition module is used to acquire second device information of the second device when the plurality of PCIe ports include a second PCIe port and the second PCIe port is connected to the second device. The second device information carries a second target device type of the second device and a second target resource identifier corresponding to the second device. When the device type of the second device is the second target device type, the second target resource identifier is used to indicate the amount of bandwidth resources that the second device of the second target device type is allowed to use. The second determining module is used to determine the second target quantity of bandwidth resources to be allocated to the second PCIE port based on the second target device type and the second target resource identifier; The third determining module is used to determine whether the bandwidth resources other than the first target number of bandwidth resources in the candidate bandwidth resources are more than or equal to the second target number of bandwidth resources when the first target number of bandwidth resources in the candidate bandwidth resources are allocated to the first PCIE port. The second allocation module is configured to allocate the second target number of bandwidth resources from the candidate bandwidth resources (excluding the first target number of bandwidth resources) to the second PCIE port when the number of bandwidth resources in the candidate bandwidth resources is greater than or equal to the second target number of bandwidth resources.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 6.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 6.

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