Evaluation of memory device health monitoring logic

Abstract

This application relates to evaluation of memory device health monitoring logic. For example, a memory device can include health monitoring logic that can be used to activate certain internal health monitors of a set of multiple monitors and communicate outputs associated with the activated monitors. In a first mode of operation, the health monitoring logic can provide a single output generated from multiple outputs of the set of monitors. In a second mode of operation, the health monitoring logic can cycle through certain monitors (e.g., in a test mode) and can generate outputs corresponding to respective active monitors as it cycles through the set of monitors. The health monitoring logic can communicate the outputs specific to each monitor to a host device so that the host device can evaluate the outputs from each monitor of the set of monitors.

Description

[0001] Cross-references

[0002] This patent application claims priority to U.S. Patent Application No. 17 / 807,813, filed June 20, 2022, entitled "Evaluation of Memory Device Health Monitoring Logic," and U.S. Provisional Patent Application No. 63 / 365,733, filed June 2, 2022, entitled "Evaluation of Memory Device Health Monitoring Logic," each of which is assigned to the assignee, and each of which is expressly incorporated herein by reference in its entirety. Technical Field

[0003] The technical field relates to the evaluation of health monitoring logic for memory devices. Background Technology

[0004] Memory devices are widely used to store information in various electronic devices such as computers, user devices, wireless communication devices, cameras, and digital displays. Information is stored by programming memory cells within the memory device into various states. For example, a binary memory cell can be programmed to support one of two states, often represented by logic 1 or logic 0. In some instances, a single memory cell can support more than two states, any of which can be stored. To access the stored information, components can read (e.g., sense, detect, retrieve, identify, determine, evaluate) the stored states in the memory device. To store information, components can write (e.g., program, set, specify) states into the memory device.

[0005] Various types of memory devices exist, including magnetic hard disks, random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase-change memory (PCM), auto-select memory, chalcogenide memory technology, NOR and NAND memory devices, etc. Memory cells can be described in terms of volatile or non-volatile configurations. Memory cells configured with non-volatile configurations can maintain their stored logic state for a long time even without an external power supply. Memory cells configured with volatile configurations may lose their stored state when disconnected from an external power supply. Summary of the Invention

[0006] A method is described. The method may include: receiving at a memory device one or more indications for evaluating logic for health monitoring of the memory device; at least in part based on the one or more indications for evaluating the logic for health monitoring, an indication for outputting a first result of the logic for health monitoring in a first configuration of the logic for health monitoring; and at least in part based on the one or more indications for evaluating the logic for health monitoring, an indication for outputting a second result of the logic for health monitoring in a second configuration of the logic for health monitoring.

[0007] A method is described. The method may include: transmitting one or more indications via a host device for evaluating logic for health monitoring of a memory device; receiving, at least in part, a first indication of a first result of the logic for health monitoring in a first configuration and a second indication of a second result of the logic for health monitoring in a second configuration based on transmitting the one or more indications for evaluating the logic for health monitoring; and evaluating the condition of the memory device based at least in part on comparing the first result and the second result.

[0008] An apparatus is described. The apparatus may include: a memory array; and logic coupled to the memory array and configured such that the apparatus: receives one or more indications for evaluating the apparatus's logic for health monitoring; outputs an indication of a first result of the logic for health monitoring in a first configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring; and outputs an indication of a second result of the logic for health monitoring in a second configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring.

[0009] An apparatus is described. The apparatus may include: logic that can be coupled to a memory device, the logic being configured such that the apparatus: transmits one or more indications for evaluating the memory device for health monitoring; receives, in a first configuration, a first indication of a first result of the logic for health monitoring, and in a second configuration, a second indication of a second result of the logic for health monitoring, based at least in part on the transmission of the one or more indications for evaluating the logic for health monitoring; and evaluates the condition of the memory device based at least in part on a comparison of the first result and the second result.

[0010] A method is described. The method may include: identifying conditions associated with a test mode at a memory device; configuring logic for health monitoring of the memory device based on an evaluation of a first degradation level, at least in part based on the identification of the conditions associated with the test mode; outputting an indication of a first result of the logic for health monitoring, at least in part based on the configuration of the logic for health monitoring based on the evaluation of the first degradation level; configuring the logic for health monitoring based on an evaluation of a second degradation level, at least in part based on the identification of the conditions associated with the test mode; and outputting an indication of a second result of the logic for health monitoring, at least in part based on the configuration of the logic for health monitoring based on the evaluation of the second degradation level. Attached Figure Description

[0011] Figure 1 Examples of systems for evaluating memory device health monitoring logic based on the examples disclosed herein are shown.

[0012] Figure 2 An example of a memory die is shown that supports the evaluation of memory device health monitoring logic according to the examples disclosed herein.

[0013] Figure 3 An example of a degradation graph is shown for the evaluation of supporting memory device health monitoring logic based on the examples disclosed herein.

[0014] Figure 4 Examples of health monitoring logic that support the evaluation of memory device health monitoring logic according to the examples disclosed herein are shown.

[0015] Figure 6 Examples of memory architectures that support the evaluation of memory device health monitoring logic based on the examples disclosed herein are shown.

[0016] Figure 5 An example of a process flow for evaluating supporting memory device health monitoring logic is shown, based on the examples disclosed herein.

[0017] Figure 7A block diagram of a memory device is shown, illustrating the evaluation of memory device health monitoring logic based on the examples disclosed herein.

[0018] Figure 8 A block diagram of a host device is shown, illustrating the evaluation of memory device health monitoring logic based on the examples disclosed herein.

[0019] Figures 9 to 11 The flowcharts shown below illustrate one or more methods for evaluating memory device health monitoring logic, based on examples disclosed herein. Detailed Implementation

[0020] Memory devices may include components (e.g., circuitry, semiconductor die structures, transistors, memory cells) that change over time, with the accumulation of access operations, or with the accumulation of stress (e.g., electrical stress, thermal stress, mechanical stress) and other conditions, and such changes may degrade the performance of the memory device (e.g., reduce the ability to write, retain, or read information). Some memory devices may include logic, such as health monitoring logic (e.g., degradation monitoring logic, wear-out monitoring logic), which may be configured to monitor degradation (e.g., wear-out or other parameters) and notify another device (e.g., a host device) of the state of the memory device or the state of one or more of its components, such as a degradation state or end-of-life state (e.g., degradation failure, degradation warning). In some instances, health monitoring logic may include a set of multiple internal monitors (e.g., internal process monitors), where each internal monitor may correspond to a different degradation metric, a different monitored component, or a different degradation level of the memory device. In some such instances, outputs from the set of internal monitors can be combined to produce a single output (e.g., a flag, a fault flag, an aggregated degradation metric), which is monitored by the host device to assess degradation. However, in implementations where the health monitoring logic provides a single output to the host device, the health monitoring logic can provide limited insight into each monitored degradation metric or component of the memory device, as well as the internal health monitors themselves.

[0021] Based on examples disclosed herein, a memory device may include health monitoring logic that can be used to cycle through a set of multiple internal monitors (e.g., individually) and communicate the outputs associated with the cycled internal health monitors (e.g., to a host device). For example, the health monitoring logic may provide a single output (e.g., aggregated output) from the set of internal monitors to the host device in a first operating mode, and may switch to a second operating mode under certain conditions (e.g., in a host-initiated test mode if a fault is detected). In the second operating mode, the health monitoring logic may activate internal monitors (e.g., selectively activate them one by one, while the remaining internal monitors are bypassed or otherwise deactivated) and may generate outputs corresponding to the currently active internal monitor as it cycles through the set of internal monitors. The health monitoring logic may communicate outputs specific to each internal monitor to the host device, allowing the host device to evaluate the outputs from each of the set of internal monitors. Such a configuration of the health monitoring logic may be implemented to provide greater insight into each degradation metric of the memory device or the state of the monitored components and the internal monitors themselves.

[0022] First, as referenced Figure 1 and 2 The features of this disclosure are described in the context of the system and the bare die. (See references...) Figures 3 to 6 The features of this disclosure are described within the context of the degradation graph, health monitoring logic, memory architecture, and process flow. These and other features of this disclosure are further illustrated and described with reference to device diagrams and flowcharts relating to, as referenced... Figures 7 to 11 Evaluation of the described memory device health monitoring logic.

[0023] Figure 1 An example of a system 100 supporting the evaluation of memory device health monitoring logic according to the examples disclosed herein is shown. System 100 may include a host device 105, a memory device 110, and a plurality of channels 115 coupling the host device 105 to the memory device 110. System 100 may include one or more memory devices 110, but aspects of the one or more memory devices 110 may be described in the context of a single memory device (e.g., memory device 110).

[0024] System 100 may include portions of electronic devices such as computing devices, mobile computing devices, wireless devices, graphics processing devices, vehicles, or other systems. For example, system 100 may include aspects of computers, laptop computers, tablet computers, smartphones, cellular phones, wearable devices, internet-connected devices, vehicle controllers, etc. Memory device 110 may be a component of system 100 operable to store data for one or more other components of system 100.

[0025] A portion of system 100 may be an example of host device 105. Host device 105 may be an example of a processor (e.g., circuitry, processing circuitry, processing component) within a device that uses memory to perform processes within, for example, a computing device, mobile computing device, wireless device, graphics processing device, computer, laptop computer, tablet computer, smartphone, cellular phone, wearable device, internet-connected device, vehicle controller, system-on-a-chip (SoC), or other fixed or portable electronic device, and other examples. In some examples, host device 105 may refer to the hardware, firmware, software, or a combination thereof that implements the functions of external memory controller 120. In some examples, external memory controller 120 may be referred to as a host (e.g., host device 105).

[0026] Memory device 110 may be a separate device or component that can be used to provide physical memory address / space that can be used or referenced by system 100. In some instances, memory device 110 may be configurable to work with one or more different types of host devices. Signaling between host device 105 and memory device 110 may be used to support one or more of the following: modulation schemes for modulating signals, various pin configurations for conveying signals, various form factors for the physical packages of host device 105 and memory device 110, clock signaling and synchronization between host device 105 and memory device 110, timing conventions, or other functions.

[0027] Memory device 110 may be used to store data of components of host device 105. In some instances, memory device 110 (e.g., as an auxiliary device to host device 105, or as a dependent device of host device 105) may respond to and execute commands provided by host device 105 through external memory controller 120. Such commands may include one or more of the following: write commands for write operations, read commands for read operations, refresh commands for refresh operations, or other commands.

[0028] The host device 105 may include an external memory controller 120, a processor 125, a basic input / output system (BIOS) component 130, or one or more other components such as one or more peripheral components or one or more input / output controllers. The components of the host device 105 may be coupled to each other via bus 135.

[0029] Processor 125 may be used to provide functionality (e.g., control functionality) for system 100 or host device 105. Processor 125 may be a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or combinations thereof. In such instances, processor 125 may be an instance of a central processing unit (CPU), graphics processing unit (GPU), general-purpose GPU (GPGPU), or SoC, as well as other instances. In some instances, external memory controller 120 may be implemented by processor 125 or be part of said processor.

[0030] BIOS component 130 may be a software component containing a BIOS used as firmware, which can initialize and run various hardware components of system 100 or host device 105. BIOS component 130 may also manage data flow between processor 125 and various components of system 100 or host device 105. BIOS component 130 may contain instructions (e.g., programs, software) stored in one or more read-only memory (ROM), flash memory, or other non-volatile memory.

[0031] Memory device 110 may include device memory controller 155 and one or more memory dies 160 (e.g., memory chips) to support a capacity (e.g., desired capacity, specified capacity) for data storage. Each memory die 160 (e.g., memory die 160-a, memory die 160-b, memory die 160-N) may include a local memory controller 165 (e.g., local memory controller 165-a, local memory controller 165-b, local memory controller 165-N) and a memory array 170 (e.g., memory array 170-a, memory array 170-b, memory array 170-N). Memory array 170 may be a collection of memory cells (e.g., one or more grids, one or more libraries, one or more tiles, one or more segments), wherein each memory cell can be used to store one or more data bits. A memory device 110 containing two or more memory dies 160 may be referred to as a multi-die memory or multi-die package, or a multi-chip memory or multi-chip package.

[0032] The device memory controller 155 may include components (e.g., circuitry, logic) for controlling the operation of the memory device 110. The device memory controller 155 may include hardware, firmware, or instructions that enable the memory device 110 to perform various operations and are used to receive, transmit, or execute commands, data, or control information associated with components of the memory device 110. The device memory controller 155 may be used to communicate with one or more of an external memory controller 120, one or more memory dies 160, or processor 125. In some instances, the device memory controller 155 may be used in conjunction with a local memory controller 165 of the memory die 160 to control the operation of the memory device 110 described herein.

[0033] In some instances, memory device 110 may receive information (e.g., data, commands, or both) from host device 105. For example, memory device 110 may receive a write command instructing memory device 110 to store data in host device 105 or a read command instructing memory device 110 to provide data stored in memory die 160 to host device 105.

[0034] A local memory controller 165 (e.g., local to memory die 160) may include components (e.g., circuitry, logic) for controlling the operation of memory die 160. In some instances, the local memory controller 165 may be used to communicate with a device memory controller 155 (e.g., to receive or transmit data or commands, or both). In some instances, memory device 110 may not include a device memory controller 155, and either the local memory controller 165 or the external memory controller 120 may perform the various functions described herein. Thus, the local memory controller 165 may be used to communicate with the device memory controller 155, with other local memory controllers 165, or directly with the external memory controller 120 or the processor 125, or combinations thereof. Examples of components that may be included in the device memory controller 155 or the local memory controller 165 or both may include a receiver for receiving signals (e.g., from the external memory controller 120), a transmitter for transmitting signals (e.g., to the external memory controller 120), a decoder for decoding or demodulating the received signals, an encoder for encoding or modulating the signals to be transmitted, or various other components that may be used to support the operation of the described device memory controller 155 or the local memory controller 165 or both.

[0035] External memory controller 120 can be used to implement communication of information (e.g., data, commands, or both) between components of system 100 (e.g., between components of host device 105, such as processor 125 and memory device 110). External memory controller 120 can process (e.g., translate, transpose) the communication exchanged between components of host device 105 and memory device 110. In some instances, external memory controller 120, or other components of system 100 or host device 105, or the functionality described herein, may be implemented by processor 125. For example, external memory controller 120 may be hardware, firmware, or software, or combinations thereof, implemented by processor 125, system 100, or other components of host device 105. Although external memory controller 120 is depicted as being external to memory device 110, in some instances, external memory controller 120, or the functionality described herein, may be implemented by one or more components of memory device 110 (e.g., device memory controller 155, local memory controller 165), or vice versa.

[0036] Components of host device 105 may exchange information with memory device 110 using one or more channels 115. Channels 115 may be used to support communication between external memory controller 120 and memory device 110. Each channel 115 may be an example of a transmission medium carrying information between host device 105 and memory device 110. Each channel 115 may include one or more signal paths (e.g., transmission medium, conductors) between terminals associated with components of system 100. Signal paths may be examples of conductive paths that can be used to carry signals. For example, channel 115 may be associated with a first terminal (e.g., including one or more pins, including one or more pads) at host device 105 and a second terminal at memory device 110. Terminals may be examples of conductive input or output points of devices of system 100, and terminals may be used to serve as portions of channels.

[0037] Channel 115 (and associated signal paths and terminals) may be dedicated to conveying one or more types of information. For example, channel 115 may include one or more command and address (CA) channels 186, one or more clock signal (CK) channels 188, one or more data (DQ) channels 190, one or more other channels 192, or combinations thereof. In some instances, single data rate (SDR) signaling or double data rate (DDR) signaling may be used to convey signaling on channel 115. In SDR signaling, one modulation symbol (e.g., signal level) of the signal may be registered for each clock cycle (e.g., on the rising or falling edge of the clock signal). In DDR signaling, two modulation symbols (e.g., signal levels) of the signal may be registered for each clock cycle (e.g., on both the rising and falling edges of the clock signal).

[0038] Memory device 110 may include components (e.g., circuitry, semiconductor die structures, transistors, memory cells) that change over time, with accumulated access operations, or with accumulated stress and other conditions, and such changes may degrade the performance of memory device 110. In some instances, memory device 110 (e.g., device memory controller 155, local memory controller 165) may include logic, such as health monitoring logic, configured to monitor degradation and notify another device (e.g., host device 105, via channel 115) of the state of memory device 110 or the state of one or more of its components, such as a degradation state or end-of-life state. In some instances, the health monitoring logic may include a set of multiple internal monitors, each corresponding to a different metric of memory device 110, a monitored component, or a degradation level. In such instances, outputs from the set of internal monitors may be combined to produce a single output, which is monitored by host device 105 to assess degradation. However, in an implementation where the health monitoring logic provides a single output (e.g., to host device 105), the health monitoring logic can provide limited insight into each monitored degradation metric or component of memory device 110 as well as the internal health monitor itself.

[0039] According to examples disclosed herein, memory device 110 (e.g., device memory controller 155, local memory controller 165) may include health monitoring logic that can be used to cycle through a set of multiple internal monitors and communicate the outputs associated with the cycled internal health monitors to host device 105. For example, the health monitoring logic may provide a single output generated from the outputs of the set of internal monitors to host device 105 in a first operating mode, and may switch to a second operating mode under certain conditions (e.g., in a test mode initiated by host device 105 if a fault is detected). In the second operating mode, the health monitoring logic may activate internal monitors (e.g., selectively activate them one by one, while the remaining internal monitors are bypassed or otherwise inactive) and may generate outputs corresponding to the currently active internal monitors as it cycles through the set of internal monitors. The health monitoring logic may communicate outputs specific to each internal monitor to host device 105, such that host device 105 can evaluate the outputs from each of the set of internal monitors. Such a configuration of health monitoring logic can be implemented to provide greater insight into the state of each monitored metric or component of the memory device 110 as well as the internal monitor itself.

[0040] Figure 2An example of a memory die 200 supporting the evaluation of memory device health monitoring logic according to the examples disclosed herein is shown. The memory die 200 may be a reference. Figure 1 Examples of the described memory die 160. In some instances, the memory die 200 may be referred to as a memory chip, memory device, or electronic memory device. The memory die 200 may include one or more memory cells 205, which may be programmable to store different logical states (e.g., programmed to be one of a set of two or more possible states). For example, the memory cell 205 may be used to store one bit of information at a time (e.g., logic 0 or logic 1). In some instances, the memory cell 205 (e.g., a multi-level memory cell) may be used to store more than one bit of information at a time (e.g., logic 00, logic 01, logic 10, logic 11). In some instances, the memory cells 205 may be arranged in an array, such as referenced in [reference]. Figure 1 The memory array 170 is described.

[0041] In some instances, memory cell 205 may store charge representing a programmable state in a capacitor. DRAM architectures may include capacitors containing dielectric material to store charge representing a programmable state. Other memory devices and components are also possible in other memory architectures. For example, nonlinear dielectric materials may be used. Memory cell 205 may include logic storage components, such as capacitor 230 and switching components 235 (e.g., cell selection components). Capacitor 230 may be an example of a dielectric capacitor or a ferroelectric capacitor. Nodes of capacitor 230 may be coupled to a voltage source 240, which may be a cell board reference voltage, such as Vpl, or may be ground, such as Vss.

[0042] The memory die 200 may include access lines (e.g., word lines 210 and digital lines 215) arranged in a pattern such as a grid. Access lines may be wires coupled to memory cells 205 and may be used to perform access operations on memory cells 205. In some instances, word lines 210 may be referred to as row lines. In some instances, digital lines 215 may be referred to as column lines or bit lines. References to access lines, row lines, column lines, word lines, digital lines, or bit lines, or the like, may be interchanged without affecting understanding. Memory cells 205 may be located at the intersection of word lines 210 and digital lines 215.

[0043] Operations such as reading and writing can be performed on memory cells 205 by activating access lines such as word line 210 or digital line 215. A single memory cell 205 at its intersection can be accessed by biasing word line 210 and digital line 215 (e.g., by applying voltage to word line 210 or digital line 215). The intersection point of word line 210 and digital line 215 in a two-dimensional or three-dimensional configuration can be referred to as the address of memory cell 205. Activating word line 210 or digital line 215 may involve applying voltage to the corresponding line.

[0044] Access to memory cell 205 can be controlled via row decoder 220, column decoder 225, or a combination thereof. For example, row decoder 220 may receive a row address from local memory controller 260 and activate word line 210 based on the received row address. Column decoder 225 may receive a column address from local memory controller 260 and activate digital line 215 based on the received column address.

[0045] The selection or deselection of memory cell 205 can be achieved by activating or deactivating switching component 235 using word line 210. Capacitor 230 can be coupled to digital line 215 using switching component 235. For example, when switching component 235 is deactivated, capacitor 230 can be isolated from digital line 215, and when switching component 235 is activated, capacitor 230 can be coupled to digital line 215.

[0046] Sensing component 245 can be used to detect the state (e.g., charge) stored on capacitor 230 of memory cell 205 and determine the logic state of memory cell 205 based on the stored state. Sensing component 245 may include one or more sensing amplifiers to amplify or additionally convert the signal generated by accessing memory cell 205. Sensing component 245 can compare the signal detected from memory cell 205 with reference 250 (e.g., reference voltage). The detected logic state of memory cell 205 can be provided as an output of sensing component 245 (e.g., to input / output 255) and can indicate the detected logic state to another component of a memory device (e.g., memory device 110) including memory die 200.

[0047] The local memory controller 260 can control access to the memory cell 205 through various components (e.g., row decoder 220, column decoder 225, sensing component 245). The local memory controller 260 can be a reference. Figure 1Examples of local memory controller 165 described herein. In some instances, one or more of row decoder 220, column decoder 225, and sensing components 245 may be co-located with local memory controller 260. Local memory controller 260 may be used to receive one or more commands or data from one or more different memory controllers (e.g., external memory controller 120 associated with host device 105, another controller associated with memory die 200), translate the commands or data (or both) into information usable by memory die 200, perform one or more operations on memory die 200, and transfer data from memory die 200 to host (e.g., host device 105) based on the performance of said one or more operations. Local memory controller 260 may generate row signals and column address signals to activate target word line 210 and target digital line 215. Local memory controller 260 may also generate and control various signals (e.g., voltage, current) used during operation of memory die 200. Generally, the amplitude, shape, or duration of the applied voltage or current discussed herein may vary and may differ for the various operations discussed when operating the memory die 200.

[0048] The local memory controller 260 can be used to perform one or more access operations on one or more memory cells 205 of the memory die 200. Examples of access operations may include write operations, read operations, refresh operations, precharge operations, or activation operations, etc. In some instances, the local memory controller 260 may execute or otherwise coordinate access operations in response to various access commands (e.g., from the host device 105). The local memory controller 260 can be used to perform other access operations not listed herein or other operations related to the operation of the memory die 200 that are not directly related to accessing the memory cells 205.

[0049] One or more components of memory die 200 may change over time, with the accumulation of access operations, with the accumulation of stress, and other conditions, and such changes may degrade the performance of one or more components of memory die 200. In some instances, memory die 200 (e.g., local memory controller 260) may include logic, such as health monitoring logic, configured to monitor the degradation of memory die 200 and notify another device (e.g., host device 105) of the state of memory die 200 or the state of one or more of its components, such as a degradation state or end-of-life state. In some instances, the health monitoring logic may include a set of multiple internal monitors, each of which may correspond to a different degradation metric, a different monitored component, or a different degradation level of memory die 200. In such instances, the outputs from the set of internal monitors may be combined to produce a single output, which is monitored by host device 105 to assess degradation. However, in an implementation where the health monitoring logic provides a single output, the health monitoring logic can provide limited insight into each monitored degradation metric or component of the memory die 200 as well as the internal health monitor itself.

[0050] According to examples disclosed herein, memory die 200 (e.g., local memory controller 260) may include health monitoring logic that can be used to cycle through a set of multiple internal monitors and communicate outputs associated with the cycled internal health monitors (e.g., to device memory controller 155, to host device 105). For example, the health monitoring logic may provide a single output generated from the outputs of the set of internal monitors in a first operating mode, and may switch to a second operating mode under certain conditions (e.g., in a host-initiated test mode if a fault is detected). In the second operating mode, the health monitoring logic may cycle through the internal monitors and generate outputs corresponding to the currently active internal monitor as it cycles through them. The health monitoring logic may communicate outputs specific to each internal monitor to host device 105, allowing host device 105 to evaluate the outputs from each of the set of internal monitors. Such a configuration of the health monitoring logic may be implemented to provide greater insight into the state of each monitored metric or component of memory die 200 and the internal monitors themselves.

[0051] Figure 3An example of a degradation graph 300 is shown, illustrating an evaluation of memory device health monitoring logic according to the examples disclosed herein. Degradation graph 300 shows three exemplary degradation curves, including a first degradation curve 310 (e.g., a decelerating degradation curve), a second degradation curve 320 (e.g., a linear degradation curve), and a third degradation curve 330 (e.g., an accelerating degradation curve). Each degradation curve may be associated with, for example, a degradation level (e.g., a wear level) of a corresponding component of memory device 110 over time, one or more of which may be monitored by memory device 110 or a host device 105 coupled to memory device 110.

[0052] Each degradation curve may be associated with a corresponding metric (e.g., degradation metric, degradation level, degradation mechanism, degradation phenomenon), which may be normalized relative to expected lifetime (e.g., expressed as a percentage of expected lifetime). In various instances, degradation metrics or curves may be associated with threshold voltage drift, current-driven drift, hot carrier stress degradation, negative bias temperature instability (NBTI) stress degradation, dielectric degradation, charge capacity (e.g., capacitance, polarization) degradation, material state degradation, or other degradation. In some instances, degradation curves may be associated with a corresponding transistor type (e.g., N-type metal-oxide-semiconductor (NMOS) or P-type metal-oxide-semiconductor (PMOS) transistor). In some instances, different metrics may be evaluated for different types of components, which may include evaluating different metrics for different transistors, diodes, capacitors, resistors, oscillators, metal lines (e.g., measuring electromigration in lines), different dielectric portions (e.g., measuring charge leakage), or other components or portions of the memory device 110.

[0053] In an example of degradation graph 300, the first degradation curve 310 may be associated with degradation of a first metric (e.g., threshold voltage degradation of a first transistor (e.g., a PMOS transistor) over time), which may be an example of decelerating degradation. The third degradation curve 330 may be associated with degradation of a second metric (e.g., threshold voltage degradation of a second transistor (e.g., an NMOS transistor) over time), which may be an example of accelerating degradation. The second degradation curve 320 may be associated with degradation of a third metric, or may represent linear (e.g., normalized, averaged) degradation of one or more metrics (e.g., the average of the first and second metrics). Although three degradation curves are shown in degradation graph 300, memory device 110 may monitor any number of metrics (e.g., and associated degradation curves) associated with a corresponding component, including the metrics listed herein, or other metrics not explicitly described herein.

[0054] In some situations, the health monitoring logic of memory device 110 may support notifying another device, such as host device 105, when a threshold is met or not met. This may indicate that a threshold degradation level (e.g., 90% of expected lifespan, or some other threshold level) of an associated component has been met. For example, for a component of memory device 110 associated with a first degradation curve 310, memory device 110 may determine that the component has reached a threshold of 90% of expected lifespan (e.g., 90% threshold degradation level) approximately nine years after operating memory device 110. In some instances, host device 105 may receive this determination and may determine or indicate device or operational information, such as health status or warning information, based on the indication of meeting the threshold degradation level.

[0055] In some situations, memory device 110 or host device 105 may be unaware of the degradation curve or its characteristics (e.g., degradation slope, degradation acceleration, degradation deceleration) associated with the monitored components of memory device 110, and may rely on the assumption that the degradation of the monitored components follows a default curve, such as a linear curve (e.g., as shown by the second degradation curve 320), or some other assumed degradation curve (e.g., a nominal degradation curve). For example, based on determining a 90% threshold degradation level for a first metric at approximately nine years of operation, the logic of memory device 110 or host device 105 may (e.g., based on linear extrapolation 315) assume that the component associated with the first metric will reach 100% of the estimated expected lifetime at approximately the tenth year of operation of the memory device. This may be overly conservative, as the component may reach this threshold (e.g., as shown by the first degradation curve 310) closer to the twelfth year of operation of memory device 110. In another instance, for a component of memory device 110 associated with the third degradation curve 330, memory device 110 may identify that the component has reached a threshold of 90% of its expected lifetime in almost the tenth year of operating memory device 110. However, the logic of memory device 110 or host device 105 may (e.g., based on linear extrapolation 335) assume that the component associated with the third metric will reach 100% of its estimated expected lifetime in approximately the eleventh year of operating memory device 110. This may overestimate the remaining operational lifetime, as the component may reach this threshold (e.g., as shown by the third degradation curve 330) before the eleventh year of operating memory device 110.

[0056] In some instances, differences in degradation curves between different components of memory device 110 can produce varying degrees of accuracy in estimating the remaining operational lifetime of memory device 110 or a portion thereof. Therefore, health monitoring logic for memory device 110 can be used to assess different threshold degradation levels, supporting assessments of whether degradation is decelerating (e.g., according to a first degradation curve 310), linear (e.g., according to a second degradation curve 320), or accelerating (e.g., according to a third degradation curve 330), and other instances. For example, the health monitoring logic can assess corresponding metrics for different components at 10 percent of expected lifetime intervals (e.g., based on the value of the metric at each 10 percent of expected lifetime), allowing host device 105 or memory device 110 to perform curve fitting over time between assessments of multiple degradation levels over time to perform an estimate of the end of the operational lifetime of memory device 110.

[0057] In some instances, host device 105 can control (e.g., command, request) the configuration of health monitoring logic at different threshold degradation levels. This may include host device 105 setting threshold degradation levels for the health monitoring logic to evaluate. Memory device 110 coupled to this host device 105 can indicate when a threshold degradation level has been met, which may subsequently allow host device 105 to set different threshold degradation levels (e.g., subsequent wear levels) for the health monitoring logic. For example, the health monitoring logic may initially evaluate whether a threshold of 10% of the expected lifetime has been met, and based at least in part on a threshold that determines and indicates that 10% of the expected lifetime has been met, the health monitoring logic may be configured (e.g., control, command, request) to evaluate whether a threshold of 20% of the expected lifetime has been met, and so on. Such techniques enable a system (e.g., system 100) to predict the end-of-life conditions for memory device 110 more accurately than when assuming degradation curves, thereby improving system reliability.

[0058] In some instances, the health monitoring logic of memory device 110 may monitor multiple metrics or multiple components, or any combination thereof, according to multiple degradation levels. This may be implemented as a set of multiple internal monitors (e.g., via multiple monitoring circuits). In some instances, if any one or more indications from the internal monitors have met the corresponding threshold degradation level (e.g., as a combined result, as an aggregation result), then the health monitoring logic may output an indication that memory device 110 (e.g., overall) or a set of its components has met the threshold degradation level. While such aggregation may support relatively low overhead, or the associated overall state of memory device 110, such techniques may not provide insight into which of the set of internal monitors has met its corresponding threshold degradation level.

[0059] Based on examples disclosed herein, the health monitoring logic can be implemented in multiple configurations, allowing the health monitoring logic to output corresponding indications for each of the multiple internal monitors by scanning them. For example, host device 105 can send one or more indications (e.g., commands, requests, instructions, loop indications, series of indications) to memory device 110 (e.g., to initiate a test mode), and in response, memory device 110 can initiate multiple configurations to test the health monitoring logic. Each configuration can correspond to a different internal monitor activating the health monitoring logic (e.g., associated with different degradation metrics, different monitored components, different degradation levels), such that the health monitoring logic can output an indication specific to a first internal monitor according to a first configuration, and an indication specific to a second monitor according to a second configuration, and other examples. Therefore, the health monitoring logic can support aggregate assessments of degradation (e.g., reporting the general state of memory device 110) via a relatively low-overhead interface, and can also support modes that can provide more granular assessments (e.g., for different degradation metrics, for different components that can degrade at different rates), which can improve insight into the degradation mechanisms of memory device 110.

[0060] Figure 4 An example of health monitoring logic 400 is shown, which supports the evaluation of memory device health monitoring logic according to examples disclosed herein. For example, health monitoring logic 400 shows a group of multiple internal monitors 410 (e.g., internal monitors 410-a to 410-e, process monitors, degradation monitors) that can support outputs 435 (e.g., as output by aggregation component 430, as a health monitor failure). Health monitoring logic 400 may show an example for implementing health monitor selection at memory device 110, and may be as described in reference... Figure 1 The described device memory controller 155 or local memory controller 165 or as referenced Figure 2 Examples of aspects of the described local memory controller 260.

[0061] Internal monitors 410 may be configured to monitor the degradation of various components of memory device 110 (e.g., circuitry, logic). For example, each internal monitor 410 may be configured to monitor a corresponding degradation metric (e.g., a corresponding degradation mechanism, a corresponding electrical or other characteristic associated with a particular degradation phenomenon), or to monitor the characteristics of a corresponding component of memory device 110 (e.g., a circuit element, circuit section) associated with a specific degradation mechanism, or to monitor according to a specific degradation level. Each internal monitor 410 may be configured to generate an output 415 indicating whether the degradation level or other characteristic monitored by the internal monitor 410 meets (e.g., meets, exceeds) a threshold degradation level. In some instances, each internal monitor 410 may be configured to employ one of a set of multiple threshold degradation levels, which may support incremental assessment of the degradation of each internal monitor 410 (e.g., to generate a degradation curve, as referenced). Figure 3 (As described).

[0062] The health monitoring logic 400 may also include an aggregation component 430, which performs aggregation of the results of the internal monitors 410 (e.g., aggregation of output 415) to produce output 435. In some instances, the aggregation component 430 may be an OR gate, or another component (e.g., another type of OR gate or other logic), which can be used to provide an aggregation indication: if any indication in the coupled internal monitors 410 has satisfied the threshold degradation level, then the threshold degradation level has been satisfied. In some instances, using the aggregation component 430 to produce output 435 can provide an overall indication of the degradation level of the memory device 110 or its component set (e.g., an initial indication, a conservative indication) (e.g., as a general state of the memory device 110 or its component set according to multiple degradation mechanisms), which can be provided via a relatively low-overhead interface (e.g., as a single indication rather than multiple indications). Output 435 may be provided to a register (e.g., a mode register) of memory device 110, which may be monitored by host device 105 to assess the degradation state of memory device 110, which includes health monitoring logic 400.

[0063] The health monitoring logic 400 may also include switching components 420 that support different configurations of the health monitoring logic 400 (e.g., different activations of internal monitors 410). For example, each switching component 420 may be a gate, a transistor, or another switch that can be used to couple a corresponding internal monitor 410 to the aggregation component 430, or to isolate a corresponding internal monitor 410 from the aggregation component 430, in response to a control input 425 (e.g., an activation input, a selection input). While instances of the health monitoring logic 400 include switching components 420 for each of the internal monitors 410, in some other instances, one or more of the switching components 420 may be omitted. For example, switching components 420-e may be omitted, such that outputs 415-e are provided directly to the aggregation component 430. This may involve fewer resources (e.g., fewer circuit components for configuration registers, fewer activation signals, fewer bits) but, according to examples disclosed herein, can still support certain evaluations between the internal monitors 410.

[0064] In some instances (e.g., during operation in a first mode, or during operation in an aggregation mode), a set of multiple switching components 420, such as all switching components 420, may be configured to couple their respective internal monitors 410 to the aggregation component 430, such that the aggregation component 430 can generate an output 435 based on the set of coupled internal monitors 410 (e.g., internal monitors 410-a to 410-e, as an aggregation of all outputs 415). For example, in this mode of operation, if any one of the set of coupled internal monitors 410 provides certain indications (e.g., as an aggregation indication, as an aggregation general flag, as an aggregation fault), then the aggregation component 430 can provide a specific indication. In such instances, health monitoring logic 400 can provide an overall indication of the health of the monitored components of the memory device 110, such as an indication that at least one of the monitored components has met a threshold degradation level. However, when a set of multiple internal monitors 410 are coupled to the aggregation component 430, the output 435 may lack the granularity to indicate which of the internal monitors 410 may have produced a given indication.

[0065] According to the examples disclosed herein (e.g., during operation in a second mode, during operation in a test mode, during operation in a loop mode), the health monitoring logic 400 may also support one or more of the internal monitors 410 coupled to the aggregation component 430 (e.g., via a selected switching component 420), while one or more other internal monitors 410 are isolated from the aggregation component 430 (e.g., via a deselected switching component 420). Thus, the switching component 420 illustrates an example that can support the activation or deactivation of various internal monitors 410 based on the aggregated output (e.g., based on output 435). Therefore, including the switching component 420 can support the evaluation of which of the internal monitors 410 has been flagged with a specific indication (e.g., which monitored component has reached a threshold degradation level). In various instances, this operating mode may be commanded by the host device 105 or initiated by the memory device 110 containing the health monitoring logic 400 based on various criteria.

[0066] In some instances, the configuration of the health monitoring logic 400 in the described mode may be at least partially based on registers of the memory device 110 containing the health monitoring logic 400. This register may be associated with multiple bit fields, where different bits may indicate different aspects of the configuration. For example, this configuration may be supported by a mode register MR122, where MR122 OP[2:0] (e.g., evaluation configuration bits of the mode register) may be associated with the health monitor sensitivity configuration of one or more of the internal monitors 410 (e.g., all internal monitors 410), and MR122 OP[7:3] (e.g., monitor selection bits of the mode register) may be associated with different configurations via switching component 420.

[0067] In some such instances, a first value of MR122 OP[2:0] (e.g., MR122 OP[2:0] = 000) may be associated with an assessment based on a first percentage of expected lifespan (e.g., 100% expected lifespan), and a second value of MR122 OP[2:0] (e.g., MR122 OP[2:0] = 001) may be associated with an assessment based on a second percentage of expected lifespan (e.g., 90% expected lifespan), and so on. In some instances, the same value of MR122 OP[2:0] may be provided to all internal monitors 410, or internal monitors 410 may be otherwise configured to assess the same threshold degradation level (e.g., some internal monitors among internal monitors 410 may be internally enabled or disabled based on the value of MR122 OP[2:0]), which may enable health monitoring logic 400 (e.g., via output 435) to perform aggregate assessments at the same threshold degradation level. In some instances, certain bits of MR122 OP[7:3] may correspond to the activation of different internal monitors. For example, MR122 OP[3] may be used to activate internal monitor 410-a (e.g., as an activation 1 signal, activating switching component 420-a, coupling internal monitor 410-a to aggregation component 430), MR122 OP[4] may be used to activate internal monitor 410-b, and so on. In some instances (e.g., depending on the test mode), a single bit of MR122 OP[7:3] may be set to a specific value (e.g., logic 0, which may correspond to a relatively low energy state used to activate switching component 420) to activate a single internal monitor 410, or a subset of multiple bits of MR122 OP[7:3] may be set to specific values ​​to activate a subset of multiple internal monitors 410. In some other instances (e.g., in aggregation mode), each of the bits in MR122 OP[7:3] can be set to a specific value to activate all internal monitors 410. Although this illustrative example is described in the context of an eight-bit register, such techniques can be applied to mode registers with any number of bits.

[0068] In some instances, the value of this register may be written by host device 105 (e.g., based on host device 105 issuing one or more mode register write commands). This could be an instance where host device 105 issues one or more instructions to enable health monitoring logic 400 in multiple configurations associated with a second operating mode (e.g., host-initiated test mode operation). In some situations, host device 105 may issue a series of such write commands, where each mode register value may correspond to a different configuration of health monitoring logic 400. Alternatively, host device 105 may issue a single instruction that may instruct memory device 110 to sweep (e.g., cycle) through multiple configurations of health monitoring logic 400.

[0069] In some instances, the output of the health monitoring logic 400 in the described mode may be based at least in part on another register of the memory device 110 containing the health monitoring logic 400. This register may be associated with a single bit field that indicates whether any of the coupled internal monitors 410 has met a threshold degradation level. For example, this configuration may be supported by the mode register MR123, where the value of MR123 OP[0] provides this indication.

[0070] In test mode, memory device 110 enables health monitoring logic to scan multiple configurations coupling internal monitor 410 to aggregation component 430 and provide corresponding indications via output 435. In some instances, such techniques may include scanning different threshold degradation levels (e.g., scanning the values ​​of MR122 OP[2:0]) to further understand which aspects of health monitoring indicators meet the criteria. In each configuration, memory device 110 may selectively activate switching component 420 based on a specific degradation level to produce output 435 corresponding to a specific internal monitor 410. For example, in a first configuration, memory device 110 may activate switching component 420-a while deactivating switching component 420-b to 420-e, and the first indication of output 435 may be based on the indication of internal monitor 410-a (e.g., corresponding to the configured degradation level). The host device 105 may know that the first indication corresponds to internal monitor 410-a at the configured degradation level based on a transmit command or by reading the associated configuration register (e.g., MR122 OP[7:0]). Additional configuration may be implemented to evaluate indications corresponding to one or more of the remaining internal monitors 410-b to 410-e.

[0071] In some instances, host device 105 may evaluate health monitoring logic 400 (e.g., the condition of health monitoring logic 400) and memory device 110 based on indications received during this test mode. In some situations, host device 105 may determine that the health monitoring logic is functioning normally based on indications received during the test mode. In other situations, host device 105 may determine a failure of health monitoring logic 400 if two or more indications are equivalent (e.g., indications corresponding to different degradation levels). Host device 105 may also determine a failure in the health monitoring circuitry if an indication associated with a higher degradation level (e.g., late-life degradation, a larger percentage of degradation) indicates a failure while an indication associated with a lower degradation level does not indicate a failure, or if no indication corresponds to the expected output (e.g., according to the first operating mode). In such situations, host device 105 may transmit a status (e.g., end-of-life status, degradation status) to a user considering replacing memory device 110.

[0072] Figure 5 An example of a memory device architecture 500 supporting the evaluation of memory device health monitoring logic according to the examples disclosed herein is shown. The memory device architecture 500 may include a memory device 505, which may be as described in reference... Figure 1 The described memory device 110 or as referenced Figure 2 Examples of aspects of the described memory die 200.

[0073] Memory device 505 may include memory array 510, which may be as described in reference. Figure 1 The memory array 170 described or as referenced Figure 2 Examples of aspects of the described memory cell array 205. Memory array 510 may comprise a collection of memory cells (e.g., one or more grids, one or more libraries, one or more tiles, one or more segments), wherein each memory cell can be used to store at least one bit of data.

[0074] The memory device 505 may also include a circuitry 515 coupled to the memory array 510. In some instances, the circuitry 515 may include components for operating (e.g., accessing) the memory array 510. The circuitry 515 may be as described in Reference 1 Figure 1 The described device memory controller 155 or local memory controller 165 or as referenced Figure 2 Examples of aspects of the described local memory controller 260. For example, circuitry 515 can be used to access one or more memory cells in response to a command received from a source external to memory device 505 (e.g., a host device 105 (not shown) coupled to memory device 505). In some instances, circuitry 515 may include components of row decoder 220, column decoder 225, sensing component 245, input / output 255, and other components or combinations of components.

[0075] The memory device 505 may also include one or more pins 520 (e.g., communication pins, CA pins, DQ pins, contacts) that can be coupled to the circuit system 515. For example, pins 520 may enable the circuit system 515 to exchange data with a host device 105 or other sources external to the memory device 505. Pins 520 may include a conductive material (e.g., a conductive interface) that can interact with, as referenced... Figure 1 The described channel 115 is associated with data channel 190 and CA channel 186, as well as other instances.

[0076] Memory device 505 may also include one or more registers 525 (e.g., register 525-a, register 525-b, programmable register, mode register, configuration register, adaptive flag register, read register) that can be written to or read from memory device 505 or from a device external to memory device 505 (e.g., via host device 105) or a combination thereof. Register 525 may be coupled to pin 520, which may enable register access (e.g., write, read) via host device 105. Alternatively, register 525 may be coupled to circuitry 515, which may enable register access via circuitry 515 (e.g., via health monitoring logic of circuitry 515). In some instances, one or more registers 525 may act as access points for monitoring status or information associated with the health of memory device 505, and may be enabled or disabled on a device-by-device basis.

[0077] Circuit system 515 may include health monitoring logic for monitoring the degradation level of one or more components of memory array 510 or other portions of circuit system 515. For example, such health monitoring logic may include circuit system configured to monitor one or more metrics associated with degradation profiles (e.g., as described with reference to degradation figure 300), such metrics as the wear level of components of memory device 505 (e.g., resistors, capacitors, transistors, diodes, oscillators, drivers, latches, registers), the temperature of components of memory device 505, the operating frequency of components of memory device 505, and other metrics. In various instances, such monitoring may be performed on circuit components that support (e.g., directly support, used during this period) the operation of memory array 510 (e.g., circuit components that support access operations) or on components that do not support the operation of memory array 510 (e.g., replacement components, circuit components that simulate or estimate the degradation level of circuit components that support access operations), or any combination thereof.

[0078] In some instances, the health monitoring logic of circuit system 515 may monitor one or more degradation metrics, one or more components, or one or more degradation levels, or any combination thereof, based on a configuration (e.g., reporting configuration, monitoring configuration) received via register 525 (e.g., register 525-a) or based on a default (e.g., predefined, constructed) configuration. For example, memory device 505 may be configured with a set of one or more indexed degradation levels for memory device 505, and host device 105 may indicate the corresponding index to memory device 505 via register 525-a (e.g., as mode register MR122 OP[2:0]). Alternatively or concurrently, memory device 505 may be configured with a set of multiple internal monitors 410, and host device 105 may activate one or more of the multiple internal monitors 410 via register 525-a (e.g., as mode register MR122 OP[7:3]). Therefore, the host device 105 can dynamically indicate the configuration of the health monitoring logic based on the degradation level, activation of one or more internal monitors 410 or a combination thereof.

[0079] Circuitry system 515 can be configured to monitor register 525-a (e.g., read values ​​from said register). For example, after host device 105 writes a value to register 525-a (e.g., indicating a corresponding set of activated internal monitors and degradation levels), circuitry system 515 can read the value of register 525-a and identify one or more indices corresponding to said value to establish a configuration for health monitoring logic of circuitry system 515. Circuitry system 515 can determine a degradation level, or a set of internal monitors 410 to be activated (e.g., for determining output 435), or both, based on one or more indices. The health monitoring logic of circuitry system 515 can be enabled to monitor one or more metrics of memory array 510 based on the indicated degradation level or internal monitors 410. Based on the configuration indicated via register 525-a, circuitry 515 can also be used to read data or access health monitoring information stored in memory array 510, or to access health monitoring information written to another register 525 (e.g., written to register 525-b as mode register MR123 OP[0]), or both. In some instances, circuitry 515 can determine whether a metric of memory device 505 meets a degradation level based on access to health monitoring information.

[0080] If one or more internal monitors of memory device 505 satisfy the indicated degradation level, then circuitry 515 or register 525-b can be used to send an indication to host device 105. For example, circuitry 515 can write a value to register 525-b (e.g., a bit of a mode register) to indicate that a degradation level has been met; this may include setting a bit high (e.g., setting it to the value "1") to indicate that the degradation level has been met. Host device 105 can read register 525-b, which can indicate to host device 105 whether the indicated degradation level has been met. For example, host device 105 can periodically (e.g., at set time intervals) or in response to an indication from memory device 505 and other initiating conditions (e.g., reading from the register, monitoring the register). Host device 105 can use a read command (e.g., a mode register read command) to read bit values ​​from register 525-b. For example, host device 105 may issue a read command to memory device 505, and memory device 505 may read a value from register 525-b and send the value to host device 105 in response to the read command.

[0081] In some instances, the health monitoring logic of circuit system 515 can indicate when one or more metrics meet a threshold level (e.g., a static threshold, associated with one or more degradation levels) by writing values ​​to register 525-b. In some instances, when a fault is detected, host device 105 can send signaling (e.g., one or more indications for evaluating logic) to memory device 505 to initiate a test mode. In test mode, memory device 505 can enable circuit system 515 to operate in multiple configurations to write indications specific to each internal monitor to register 525-b, and host device 105 can monitor register 525-b to read each indication. Thus, host device 105 can attribute the fault to one or more specific internal monitors and can evaluate which metrics meet the corresponding indicated threshold levels. Furthermore, host device 105 can evaluate whether the health monitoring logic of circuit system 515 is functioning correctly.

[0082] In some instances, host device 105 may issue a series of instructions (e.g., commands, requests, writes to register 525-a) each corresponding to different configurations among multiple configurations, and memory device 505 may scan the configurations of circuitry 515 according to said series of instructions. In some other instances, host device 105 may issue a single instruction to scan multiple configurations of circuitry 515. In each configuration, memory device 505 may select an internal monitor of the health monitoring circuitry (e.g., individually), while in some instances, other monitors may be bypassed or otherwise kept inactive, and memory device 505 may write an instruction specific to an internal monitor to register 525-b. Host device 105 may read the instruction from register 525-b. Thus, memory device 505 may write an instruction corresponding to each internal monitor of the health monitoring circuitry to register 525-b, and host device 105 may read each instruction.

[0083] In these and other instances, host device 105 can evaluate one or more degradation metrics (e.g., degradation level) of memory device 505 and the health monitoring logic of circuitry 515 itself (e.g., in test mode) by comparing indications read from register 525-b. Such comparisons allow host device 105 to identify which internal monitor triggered a failure, providing greater insight into the state of memory device 505 (e.g., degradation state, end-of-life state), including whether the health monitoring logic of circuitry 515 is functioning correctly. Therefore, various techniques for evaluating the health monitoring logic of memory device 505, as disclosed herein, can improve the reliability of memory device 505.

[0084] Figure 6 An example of a process flow 600 for evaluating memory device health monitoring logic according to the examples disclosed herein is shown. Process flow 600 illustrates the operation of memory device 605 and host device 610, and the signaling therebetween. In some instances, host device 610 and memory device 605 may represent, as referenced... Figures 1 to 5 The described aspects of the host device and memory device. For example, the host device 610 may be at least part of a vehicle or vehicle controller, and the memory device 605 may provide storage media for one or more functions of the vehicle or vehicle controller. Process flow 600 may illustrate a process for evaluating health monitoring logic (e.g., health monitoring logic 400 of circuit system 515) in a test mode, which may include comparisons of multiple outputs of the health monitoring logic as generated in a test mode configuration.

[0085] At 615, host device 610 may, in some instances, transmit one or more indications (e.g., commands, requests, instructions) for evaluating health monitoring logic, which may be received by memory device 605. Host device 610 may (e.g., depending on a test mode) transmit one or more indications at 615 to instruct memory device 605 to operate the health monitoring logic in multiple configurations. Multiple configurations may be associated with specific outputs (e.g., configured outputs, output 415), which may support host device 610 in performing various evaluations. For example, one or more indications at 615 may include at least indications for a first internal monitor 410 and a second internal monitor 410, or indications for a first degradation level and a second degradation level, or otherwise indicate configurations associated with different internal monitoring configurations of memory device 605 (e.g., corresponding to different configurations of the health monitoring logic).

[0086] In various instances, the indication of 615 may comprise a single indication initiating a sweep of health monitoring configuration via memory device 605, or the indication of 615 may comprise multiple indications, each corresponding to a specific health monitoring configuration, and other instances. In some instances, to support the indication of 615, host device 610 may issue one or more indications (e.g., commands) for writing to registers (e.g., mode registers, register 525-a) of memory device 605, which may be received by memory device 605. In some instances, the value written to this register may be interpreted by memory device 605 as instructions for configuring health monitoring logic according to a corresponding health monitoring configuration (e.g., according to a threshold degradation level).

[0087] In some instances, operation 615 may be omitted, and memory device 605 may otherwise identify conditions associated with a test mode (e.g., power conditions, fault conditions, error conditions, evaluation modes). For example, a test mode may be associated with initial conditions of memory device 605 (e.g., initial operation, initial power supply, debugging), such that memory device 605 can identify the initial power-on of memory device 605 (e.g., the first time power is supplied to memory device 605, the first time power is supplied to the circuitry 515 of memory device 605), or identify the initial power-on of memory device 605 when coupled to host device 610 (e.g., to avoid entering test mode the first time power is applied when not connected to host device, such as during manufacturing evaluation operations or probe testing). In some instances, identifying the conditions associated with the test mode may be at least in part based on the duration of operation of the memory device 605, such as identifying that the duration of operation of the memory device 605 meets (e.g., exceeds) a threshold duration, which could be the initial duration of powering on or operating the memory device 605 or some other later time (e.g., according to a service or evaluation interval). In some instances, identifying the conditions associated with the test mode may be at least in part based on a register (e.g., the mode register, register 525-a) being set to an initial state (e.g., manufacturing state), which could prompt the memory device 605 to enter a test mode (e.g., during initial power-on or startup operation).

[0088] At 620 (e.g., based on the indication at 615, based on the conditions associated with the test mode identified by memory device 605), memory device 605 can configure the health monitoring logic in a first configuration. Memory device 605 performs the configuration at 620 in response to an indication at 615 initiating a scan of multiple configurations of the health monitoring logic (e.g., an indication at 615 indicating a first configuration among multiple configurations, an indication for multiple internal monitors 410 for corresponding evaluation, an indication for multiple degradation levels for health monitoring) or in response to an indication at 615 dedicated to the first configuration (e.g., an indication at 615 indicating the first configuration but not another configuration, an indication for a single internal monitor 410 for evaluation, an indication for a single degradation level for health monitoring). In some instances, the first configuration may correspond to an output of the health monitoring logic (e.g., a known output, a configured output, output 415), which may be associated with a first internal monitor 410 of the health monitoring logic. In some instances, the configuration of 620 may include configuring health monitoring logic according to a first degradation level (e.g., according to evaluating the first degradation level), which may be associated with enabling an internal monitor corresponding to the first degradation level or otherwise configuring the internal monitor to evaluate memory device 605 or one or more components of memory device 605 according to the first degradation level.

[0089] In response to or as part of operation 620, memory device 605 may generate a first result of health monitoring logic based on a first configuration. For example, memory device 605 may generate an indication of whether health monitoring conditions are met in the first configuration, such as whether a degradation level of memory device 605 meets an indication of a first degradation level associated with the first configuration. In some instances, the generated indication may be stored in a register of memory device 605 (e.g., in register 525-b), which may be accessed (e.g., read by) host device 610.

[0090] At 625, memory device 605 may output a first result corresponding to the health monitoring logic of the first configuration, which may be received by host device 610. In some instances, the first result may include an indication of whether the degradation level of memory device 605 meets (e.g., exceeds) a first degradation level or whether the assessment of internal monitoring in the first configuration otherwise meets a threshold. In some instances, to support the indication at 625, host device 610 may issue a command to read a register (e.g., a mode register, register 525-b), and memory device 605 may respond to the command by accessing the register and providing a stored indication.

[0091] At 630 (e.g., based on the indication at 615, based on the condition associated with the test mode identified by memory device 605), memory device 605 may configure the health monitoring logic in a second configuration different from the first configuration. In various instances, memory device 605 may enable the health monitoring logic in a second configuration in response to an indication at 615 that initiates a scan of the health monitoring logic (e.g., received before an indication conveying the first result at 625) or in response to an indication at 615 dedicated to enabling the second configuration (e.g., an indication for a single internal monitor 410 or a degradation level for health monitoring, which may be conveyed before or after the indication conveying the first result at 625). The second configuration may also correspond to an output of the health monitoring logic (e.g., a known output, a configured output, output 415), which may be associated with a second internal monitor 410 of the health monitoring logic. In some instances, the configuration of 630 may include configuring health monitoring logic according to a second degradation level (e.g., according to evaluating a second degradation level), which may be associated with enabling an internal monitor corresponding to the second degradation level or otherwise configuring the internal monitor to evaluate memory device 605 or one or more components of memory device 605 according to the second degradation level.

[0092] In response to or as part of operation 630, memory device 605 may generate a second result of health monitoring logic based on the second configuration. For example, memory device 605 may generate an indication of whether health monitoring conditions are met in the second configuration, such as whether the degradation level of memory device 605 meets an indication of a second degradation level associated with the second configuration. In some instances, the generated indication may be stored in a register of memory device 605 (e.g., in register 525-b), which is accessible by host device 610.

[0093] At 635, the memory device 605 may output a second result corresponding to the health monitoring logic of the second configuration, which may be received by the host device 610. In some instances, the second result may include an indication of whether the degradation level of the memory device 605 meets (e.g., exceeds) a second degradation level or whether the assessment of internal monitoring in the second configuration otherwise meets a threshold. In some instances, to support the indication at 635, the host device 610 may issue a command to read a register, and the memory device 605 may respond to the command by accessing the register and providing a stored indication.

[0094] Therefore, according to the instructions of 625 and 635, the memory device 605 can provide separate indications of the results of the health monitoring logic depending on the different configurations of the health monitoring logic. In instances where the first and second results are additionally aggregated into a single result (e.g., through an aggregation component coupled to multiple internal monitors 410), the indication of 625 can provide a more detailed insight into the health monitoring of the memory device 605 by possibly indicating which internal monitor 410 is associated with a given result.

[0095] In some instances, the indications at 625 and 635 may support further evaluation or other operations performed by memory device 605 and host device 610. For example, at 640, host device 610 may evaluate (e.g., infer, confirm, determine) the condition of memory device 605 based at least in part on the first result of 625 and the second result of 635. For example, based on the first result of 625 and the second result of 635, host device 610 may determine that memory device 605 or its health monitoring is operating as expected (e.g., normally, nominally) or in a manner indicating a fault (e.g., a fault in memory device 605, a fault in health monitoring logic, such as an indication of a fault in one or more internal monitors).

[0096] In some instances, the evaluation at 640 may involve a comparison between a first result and a second result. For example, under normal operating conditions, the health monitoring logic of memory device 605 may be expected to output different results in a first configuration and a second configuration (e.g., for a case where a first degradation threshold should be met and a second degradation threshold should not be met). In such instances, if host device 610 determines that the first result and the second result are different, then host device 610 may continue normal operation; or if host device 610 determines that the first result and the second result are the same, then host device 610 may continue correction operations. In some instances, the first configuration (e.g., associated with a smaller degradation level) may be expected to have a specific result in an earlier stage of operation than the second configuration (e.g., associated with a larger degradation level). In such instances, if the second configuration indicates a specific result (e.g., a threshold degradation level has been met) and the first configuration does not indicate such a result, then host device 610 may continue correction operations.

[0097] The host device 610 can support various corrective operations based on the evaluation of 640. For example, based on fault identification, the host device 610 can stop the operation of the memory device 605, or use the memory device 605 for lower priority information or operations, or operate the memory device 605 in a degraded mode or a safe mode, or perform operations on a different memory device 605 (not shown). In some instances, the host device 610 can provide indications (e.g., status indications, to the user), such as indications that the memory device 605 should be discarded or replaced (e.g., a degradation state, an end-of-life state). In some such instances, the host device 610 can respond by signaling indications (e.g., to the user, to another part of the system containing the memory device 605 and the host device 610) that the host device 610 has determined a fault in the memory device 605 (e.g., health monitoring logic).

[0098] The host device 610 can also support various normal operations based on the evaluation at 640. For example, based on the identification of expected results, the host device 610 can perform normal access operations to write to or read from the memory device 605 (e.g., according to normal operation, nominal operation). In some such instances, the host device 610 can continue to perform other health monitoring operations on the memory device 605 (e.g., operations including 645 and 650, and other operations).

[0099] In some instances, at 645 (e.g., based at least in part on determining that the health monitoring logic is operating as expected), host device 610 may transmit an indication of a degradation level, which may be received by memory device 605. The indicated degradation level at 645 may be associated with a threshold degradation level used to evaluate memory device 605 using health monitoring logic. In response, memory device 605 may configure its health monitoring logic according to the degradation level indicated at 645 (e.g., in evaluation mode). For example, memory device 605 may evaluate whether degradation metrics associated with one or more components of memory device 605 meet the indicated degradation level.

[0100] In some instances, at 650, memory device 605 may output an indication of the result of health monitoring logic based on the degradation level. For example, memory device 605 may output an indication that one or more components of the memory device meet the degradation level indicated at 645, or that one or more components of memory device 605 do not meet the degradation level indicated at 645. In some instances, when memory device 605 indicates that one or more components of memory device 605 meet the degradation level indicated at 645, the operations at 645 and 650 may be repeated for a new degradation level (e.g., a subsequent degradation level), which may support host device 610 in curve fitting of the degradation curve.

[0101] Although in some instances the evaluation of 640 can be performed at the host device 610, in other instances this evaluation can be performed at the memory device 605. For example, the memory device 605 can understand the expected or relative output of the health monitoring logic in the test mode, and the memory device 605 can compare a first result and a second result produced by the health monitoring logic in the test mode. In the case where there is a difference between the first result and the second result, the memory device 605 can instruct the host device 610 that the health monitoring logic is operating as expected (e.g., nominally, normally). In the case where the first result and the second result are the same, the memory device 605 can instruct the host device 610 that the health monitoring logic is not operating as expected (e.g., malfunctioning, abnormally operating). Based on such instructions from the memory device 605, the host device 610 can continue with normal operation or corrective operation, such as those described herein.

[0102] Therefore, according to the examples disclosed herein, memory device 605 and host device 610 can support evaluation using multiple configurations of the health monitoring logic of memory device 605 (e.g., according to different sets of one or more activated internal monitors 410, according to multiple degradation levels), which can support improved insight into the degradation of memory device 605 (e.g., whether memory device 605 or its components are degrading or accelerating according to a deceleration or acceleration degradation curve). Furthermore, by implementing evaluations of the health monitoring logic itself (e.g., by comparing outputs generated according to multiple configurations), memory device 605 and host device 610 can support greater reliability for providing this understanding of the operational lifetime of memory device 605, which can further improve operational reliability.

[0103] Figure 7 A block diagram 700 illustrates a memory device 720 that supports the evaluation of memory device health monitoring logic according to the examples disclosed herein. The memory device 720 may be as described in the references... Figures 1 to 6 Examples of aspects of the described memory device. Memory device 720 or its various components may be examples of components for performing various aspects of the evaluation of the memory device health monitoring logic as described herein. For example, memory device 720 may include an evaluation instruction receiving component 725, a health monitoring output component 730, a test pattern recognition component 735, a health monitoring configuration component 740, a health monitoring generation component 745, a mode register component 750, a mode register command receiving component 755, a health monitoring configuration receiving component 760, or any combination thereof. Each of these components may communicate with each other directly or indirectly (e.g., via one or more buses).

[0104] The evaluation instruction receiving component 725 may be configured or otherwise supported to include means for receiving one or more instructions for evaluating the logic for health monitoring of the memory device 720. The health monitoring output component 730 may be configured or otherwise supported to include means for outputting an instruction for a first result of the logic for health monitoring in a first configuration of the logic for health monitoring, based at least in part on one or more instructions for evaluating the logic for health monitoring. In some instances, the health monitoring output component 730 may be configured or otherwise supported to include means for outputting an instruction for a second result of the logic for health monitoring in a second configuration of the logic for health monitoring, based at least in part on one or more instructions for evaluating the logic for health monitoring.

[0105] In some instances, the health monitoring configuration component 740 may be configured or otherwise supported to configure the logic for health monitoring in a first configuration based at least in part on receiving one or more instructions for evaluating the logic for health monitoring. In some instances, the health monitoring generation component 745 may be configured or otherwise supported to generate a first result based at least in part on configuring the logic for health monitoring in the first configuration. In some instances, the health monitoring configuration component 740 may be configured or otherwise supported to configure the logic for health monitoring in a second configuration based at least in part on receiving one or more instructions for evaluating the logic for health monitoring. In some instances, the health monitoring generation component 745 may be configured or otherwise supported to generate a second result based at least in part on configuring the logic for health monitoring in the second configuration.

[0106] In some instances, configuring the logic for health monitoring with a first configuration may be at least partially based on configuring the logic for health monitoring according to a first output value of the logic for health monitoring. In some instances, configuring the logic for health monitoring with a second configuration may be at least partially based on configuring the logic for health monitoring according to a second output value of the logic for health monitoring.

[0107] In some instances, configuring the logic for health monitoring with a first configuration may be at least partially based on configuring the logic for health monitoring according to a first degradation level. In some instances, configuring the logic for health monitoring with a second configuration may be at least partially based on configuring the logic for health monitoring according to a second degradation level.

[0108] In some instances, one or more indications may include indications for the first degradation level and indications for the second degradation level.

[0109] In some instances, the indication of the first result may include an indication of whether the degradation level of the memory device satisfies a first degradation level, and the indication of the second result may include an indication of whether the degradation level of the memory device satisfies a second degradation level.

[0110] In some instances, configuring the logic for health monitoring with a first configuration may be at least partially based on receiving one of one or more indications. In some instances, configuring the logic for health monitoring with a second configuration may be at least partially based on receiving said indication of one or more indications.

[0111] In some instances, configuring the logic for health monitoring with a first configuration may be based at least in part on receiving a first instruction from one or more instructions. In some instances, configuring the logic for health monitoring with a second configuration may be based at least in part on receiving a second instruction from one or more instructions.

[0112] In some instances, the mode register component 750 may be configured or otherwise supported to write an indication of a first result to the mode register, at least in part based on the configuration of the logic for health monitoring in a first configuration. In some instances, the health monitoring output component 730 may be configured or otherwise supported to output an indication of a first result from the mode register. In some instances, the mode register component 750 may be configured or otherwise supported to write an indication of a second result to the mode register, at least in part based on the configuration of the logic for health monitoring in a second configuration. In some instances, the health monitoring output component 730 may be configured or otherwise supported to output an indication of a second result from the mode register.

[0113] In some instances, the mode register command receiving component 755 may be configured or otherwise supported to receive a first command for reading the mode register, and an indication of outputting a first result from the mode register may be at least partially based on the first command. In some instances, the mode register command receiving component 755 may be configured or otherwise supported to receive a second command for reading the mode register, and an indication of outputting a second result from the mode register may be at least partially based on the second command.

[0114] In some instances, the mode register command receiving component 755 may be configured or otherwise supported to receive one or more commands for writing to a mode register of a memory device, and receiving one or more indications for evaluating logic for health monitoring may be at least partially based on reading the mode register.

[0115] In some instances, the test mode identification component 735 may be configured or otherwise supported to support means for identifying conditions of the memory device 720 associated with a test mode. In some instances, the health monitoring configuration component 740 may be configured or otherwise supported to support means for configuring the logic for health monitoring of the memory device 720 based at least in part on the identification of conditions associated with the test mode according to an evaluation of a first degradation level. In some instances, the health monitoring output component 730 may be configured or otherwise supported to support means for outputting an indication of a first result of the logic for health monitoring based at least in part on the configuration of the logic for health monitoring according to an evaluation of a first degradation level. In some instances, the health monitoring configuration component 740 may be configured or otherwise supported to support means for configuring the logic for health monitoring based at least in part on the identification of conditions associated with the test mode according to an evaluation of a second degradation level. In some instances, the health monitoring output component 730 may be configured or otherwise supported as a component for outputting an indication of a second result of the logic for health monitoring, which is configured according to the evaluation of a second degradation level.

[0116] In some instances, the health monitoring configuration receiving component 760 may be configured or otherwise supported to receive a first indication of a first degradation level and a second indication of a second degradation level, and the logic for health monitoring may be configured based at least in part on the first indication based on the evaluation of the first degradation level, and the logic for health monitoring may be configured based at least in part on the evaluation of the second degradation level.

[0117] In some instances, the mode register component 750 may be configured or otherwise supported to support means for writing an indication of a first result to the mode register. In some instances, the health monitoring output component 730 may be configured or otherwise supported to support means for outputting an indication of a first result from the mode register. In some instances, the mode register component 750 may be configured or otherwise supported to support means for writing an indication of a second result to the mode register. In some instances, the health monitoring output component 730 may be configured or otherwise supported to support means for outputting an indication of a second result from the mode register.

[0118] In some instances, the mode register command receiving component 755 may be configured or otherwise supported to receive a first command for reading the mode register, and an indication of outputting a first result from the mode register may be at least partially based on the first command. In some instances, the mode register command receiving component 755 may be configured or otherwise supported to receive a second command for reading the mode register, and an indication of outputting a second result from the mode register may be at least partially based on the second command.

[0119] Figure 8 A block diagram 800 illustrates a host device 820 that supports the evaluation of memory device health monitoring logic according to examples disclosed herein. The host device 820 may be as described in the references... Figures 1 to 5 Examples of aspects of the described host device. Host device 820 or its various components may be examples of components for performing various aspects of the evaluation of the memory device health monitoring logic as described herein. For example, host device 820 may include an evaluation instruction transmitting component 825, a health monitoring result receiving component 830, a health monitoring evaluation component 835, a status transmitting component 840, a health monitoring configuration transmitting component 845, a mode register command transmitting component 850, or any combination thereof. Each of these components may communicate with each other directly or indirectly (e.g., via one or more buses).

[0120] The evaluation indication transmitting component 825 may be configured or otherwise supported to transmit one or more indications for evaluating the logic for health monitoring of the memory device. The health monitoring result receiving component 830 may be configured or otherwise supported to receive, in a first configuration, a first indication of a first result of the logic for health monitoring based at least in part on the transmission of one or more indications for evaluating the logic for health monitoring, and in a second configuration, a second indication of a second result of the logic for health monitoring. The health monitoring evaluation component 835 may be configured or otherwise supported to evaluate the conditions of the memory device based at least in part on a comparison of the first and second results.

[0121] In some instances, the state emission component 840 may be configured or otherwise supported to provide a means for emitting an indication of the state of the memory device based at least in part on the fact that the first result is the same as the second result.

[0122] In some instances, the health monitoring configuration transmission component 845 may be configured or otherwise supported to transmit an indication for evaluating the degradation level of a memory device using logic for health monitoring, based at least in part on a first result differing from a second result. In some instances, the health monitoring configuration transmission component 845 may be configured or otherwise supported to receive an indication of whether a memory device meets a degradation level, based at least in part on the transmission of the degradation level indication.

[0123] In some instances, the first configuration may be associated with a first degradation level of the logic used for health monitoring, and the second configuration may be associated with a second degradation level of the logic used for health monitoring.

[0124] In some instances, one or more indications may include indications for the first degradation level and indications for the second degradation level.

[0125] In some instances, one or more indications for evaluating the logic used for health monitoring include a single indication for evaluating the logic used for health monitoring in a first configuration and a second configuration. In some instances, one or more indications for evaluating the logic used for health monitoring may include a first indication for evaluating the logic used for health monitoring in a first configuration and a second indication for evaluating the logic used for health monitoring in a second configuration.

[0126] In some instances, the mode register command issuing component 850 may be configured or otherwise support components for issuing one or more commands to read the mode register of a memory device, and a first indication for receiving a first result and a second indication for receiving a second result may be based at least in part on issuing one or more commands to read the mode register.

[0127] In some instances, the mode register command issuing component 850 may be configured or otherwise support components for issuing one or more commands for writing to a mode register of a memory device, and issuing one or more indications for evaluating logic for health monitoring may be at least partially based on issuing one or more commands for writing to the mode register.

[0128] Figure 9 A flowchart illustrating a method 900 for evaluating memory device health monitoring logic, based on examples disclosed herein, is provided. Operation of method 900 may be implemented by a memory device or its components as described herein. For example, operation of method 900 may be performed by, as referenced... Figures 1 to 7 The described memory device performs the functions described. In some instances, the memory device may execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively, the memory device may use dedicated hardware to perform aspects of the described functions.

[0129] At 905, the method may include (e.g., at a memory device) receiving one or more indications for evaluating logic for health monitoring of the memory device. This may be based on, as referenced... Figures 3 to 6 The disclosed instances perform the 905 operation. In some instances, aspects of the 905 operation may be provided as per the reference. Figure 7 The described evaluation instructions are performed by receiving component 725.

[0130] At 910, the method may include, at least in part, an indication based on one or more indications for evaluating logic for health monitoring, outputting an indication of a first result of the logic for health monitoring in a first configuration of the logic for health monitoring. This may be according to reference... Figures 3 to 6 The disclosed instances perform the operation of 910. In some instances, aspects of the operation of 910 may be provided as referenced. Figure 7 The described health monitoring output component 730 is executed.

[0131] At 915, the method may include, at least in part, an indication of a second result of the logic for health monitoring, outputting in a second configuration of the logic for health monitoring, based on one or more indications for evaluating the logic for health monitoring. This may be in accordance with, as referenced... Figures 3 to 6 The disclosed instances perform the 915 operation. In some instances, aspects of the 915 operation may be provided as per the reference. Figure 7 The described health monitoring output component 730 is executed.

[0132] In some instances, the device as described herein may perform one or more methods, such as method 900. The device may include features, circuitry, logic, components, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) or any combination thereof for performing aspects of this disclosure:

[0133] Aspect 1: A method, apparatus, or non-transitory computer-readable medium comprising operations, features, circuitry, logic, components, or instructions, or any combination thereof, for performing the following steps: (e.g., at a memory device) receiving one or more indications for evaluating logic for health monitoring of the memory device; an indication for outputting a first result of the logic for health monitoring in a first configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring; and an indication for outputting a second result of the logic for health monitoring in a second configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring.

[0134] Aspect 2: The method, apparatus, or non-transitory computer-readable medium according to Aspect 1 further includes operations, features, circuitry, logic, components, or instructions, or any combination thereof, for performing the following steps: configuring the logic for health monitoring in a first configuration, at least in part based on receiving one or more indications for evaluating the logic for health monitoring; generating a first result, at least in part based on configuring the logic for health monitoring in the first configuration; configuring the logic for health monitoring in a second configuration, at least in part based on receiving one or more indications for evaluating the logic for health monitoring; and generating a second result, at least in part based on configuring the logic for health monitoring in the second configuration.

[0135] Aspect 3: The method, device, or non-transitory computer-readable medium according to aspect 2, wherein configuring the logic for health monitoring with a first configuration is at least partially based on configuring the logic for health monitoring with a first output value of the logic for health monitoring, and configuring the logic for health monitoring with a second configuration is at least partially based on configuring the logic for health monitoring with a second output value of the logic for health monitoring.

[0136] Aspect 4: The method, apparatus or non-transitory computer-readable medium according to any one of Aspects 2 to 3, wherein configuring the logic for health monitoring with a first configuration is at least partially based on configuring the logic for health monitoring according to a first degradation level, and configuring the logic for health monitoring with a second configuration is at least partially based on configuring the logic for health monitoring according to a second degradation level.

[0137] Aspect 5: The method, apparatus, or non-transitory computer-readable medium according to aspect 4, wherein one or more indications include indications of a first degradation level and indications of a second degradation level.

[0138] Aspect 6: The method, apparatus, or non-transitory computer-readable medium according to any one of Aspects 4 to 5, wherein the indication of the first result includes whether the degradation level of the memory device satisfies the indication of the first degradation level, and the indication of the second result includes whether the degradation level of the memory device satisfies the indication of the second degradation level.

[0139] Aspect 7: The method, apparatus, or non-transitory computer-readable medium according to any one of aspects 2 to 6, wherein configuring the logic for health monitoring in a first configuration is based at least in part on receiving one of one or more indications, and configuring the logic for health monitoring in a second configuration is based at least in part on receiving said indication among one or more indications.

[0140] Aspect 8: The method, apparatus or non-transitory computer-readable medium according to any one of Aspects 2 to 6, wherein configuring the logic for health monitoring in a first configuration is based at least in part on receiving a first instruction among one or more instructions, and configuring the logic for health monitoring in a second configuration is based at least in part on receiving a second instruction among one or more instructions.

[0141] Aspect 9: The method, apparatus, or non-transitory computer-readable medium according to any one of Aspects 1 to 8 further comprises an operation, feature, circuit system, logic, component, or instruction, or any combination thereof, for performing the following steps: configuring logic for health monitoring in at least part of a first configuration, writing an indication of a first result to a mode register; outputting an indication of the first result from the mode register; configuring logic for health monitoring in at least part of a second configuration, writing an indication of a second result to the mode register; and outputting an indication of the second result from the mode register.

[0142] Aspect 10: The method, apparatus, or non-transitory computer-readable medium according to aspect 9 further includes operations, features, circuitry, logic, components, or instructions or any combination thereof for performing the following steps: receiving a first command to read a mode register, wherein an indication to output a first result from the mode register is at least partially based on the first command; and receiving a second command to read a mode register, wherein an indication to output a second result from the mode register is at least partially based on the second command.

[0143] Aspect 11: The method, apparatus, or non-transitory computer-readable medium according to any one of aspects 1 to 10 further comprises operations, features, circuit systems, logic, components, or instructions or any combination thereof for performing the following steps: receiving one or more commands for writing to a mode register of a memory device, wherein receiving one or more indications for evaluating logic for health monitoring is at least partially based on reading the mode register.

[0144] Figure 10 A flowchart illustrating a method 1000 for evaluating memory device health monitoring logic, based on examples disclosed herein, is provided. Operation of method 1000 may be implemented by a host device or its components as described herein. For example, operation of method 1000 may be performed by, as referenced... Figures 1 to 5 The host device described in section 8 performs the functions described therein. In some instances, the host device may execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively, the host device may use dedicated hardware to perform aspects of the described functions.

[0145] At point 1005, the method may include (e.g., via a host device) transmitting one or more indications for evaluating logic for health monitoring of the memory device. This may be based on, as referenced... Figures 3 to 6 The described instance performs operation 1005. In some instances, aspects of operation 1005 may be derived from, as referenced... Figure 8 The described evaluation instructions are performed by launch assembly 825.

[0146] At 1010, the method may include at least in part based on transmitting one or more indications for evaluating logic for health monitoring, receiving a first indication of a first result of the logic for health monitoring in a first configuration, and receiving a second indication of a second result of the logic for health monitoring in a second configuration. This may be according to reference... Figures 3 to 6 The described instance performs operation 1010. In some instances, aspects of the operation 1010 may be derived from, as referenced... Figure 8 The described health monitoring results receiving component 830 is executed.

[0147] At 1015, the method may include evaluating the conditions of the memory device based at least in part on comparing a first result with a second result. This can be based on, as referenced... Figures 3 to 6 The described instance performs operation 1015. In some instances, aspects of operation 1015 may be derived from, as referenced... Figure 8 The described health monitoring and assessment component 835 is implemented.

[0148] In some instances, the device as described herein may perform one or more methods, such as method 1000. The device may include features, circuitry, logic, components, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) or any combination thereof for performing aspects of this disclosure:

[0149] Aspect 12: A method, apparatus, or non-transitory computer-readable medium comprising operations, features, circuitry, logic, components, or instructions, or any combination thereof, for performing the following steps: (e.g., via a host device) transmitting one or more indications for evaluating logic for health monitoring of a memory device; receiving, at least in part, a first indication of a first result of the logic for health monitoring in a first configuration and a second indication of a second result of the logic for health monitoring in a second configuration, based at least in part on transmitting the one or more indications for evaluating the logic for health monitoring; and evaluating the condition of the memory device based at least in part on comparing the first result with the second result.

[0150] Aspect 13: The method, apparatus, or non-transitory computer-readable medium according to aspect 12 further includes operations, features, circuit systems, logic, components, or instructions or any combination thereof for performing the following steps: transmitting an indication of the state of the memory device based at least in part on the first result being the same as the second result.

[0151] Aspect 14: The method, apparatus, or non-transitory computer-readable medium according to any one of Aspects 12 to 13 further comprises an operation, feature, circuit system, logic, component, or instruction or any combination thereof for performing the following steps: transmitting an indication of a degradation level at least in part based on a first result being different from a second result, for evaluating a memory device using logic for health monitoring; and receiving an indication of whether the memory device meets a degradation level at least in part based on the transmission of the degradation level indication.

[0152] Aspect 15: A method, apparatus or non-transitory computer-readable medium according to any one of Aspects 12 to 14, wherein a first configuration is associated with a first degradation level of logic for health monitoring and a second configuration is associated with a second degradation level of logic for health monitoring.

[0153] Aspect 16: The method, apparatus, or non-transitory computer-readable medium according to aspect 15, wherein one or more indications include an indication of a first degradation level and an indication of a second degradation level.

[0154] Aspect 17: A method, apparatus, or non-transitory computer-readable medium according to any one of aspects 12 to 16, wherein one or more indications for evaluating logic for health monitoring include a single indication for evaluating logic for health monitoring in a first configuration and a second configuration.

[0155] Aspect 18: The method, apparatus or non-transitory computer-readable medium according to any one of aspects 12 to 16, wherein one or more indications for evaluating logic for health monitoring include a first indication for evaluating logic for health monitoring in a first configuration and a second indication for evaluating logic for health monitoring in a second configuration.

[0156] Aspect 19: The method, apparatus or non-transitory computer-readable medium according to any one of aspects 12 to 18 further comprises an operation, feature, circuit system, logic, component or instruction or any combination thereof for performing the following steps: issuing one or more commands for reading a mode register of a memory device, wherein a first indication for receiving a first result and a second indication for receiving a second result are at least partially based on issuing one or more commands for reading the mode register.

[0157] Aspect 20: The method, apparatus, or non-transitory computer-readable medium according to any one of aspects 12 to 19 further comprises an operation, feature, circuit system, logic, component, or instruction or any combination thereof for performing the following steps: issuing one or more commands for writing to a mode register of a memory device, wherein issuing one or more indications for evaluating logic for health monitoring is at least partially based on issuing one or more commands for writing to the mode register.

[0158] Figure 11 A flowchart illustrating a method 1100 for evaluating memory device health monitoring logic, based on examples disclosed herein, is provided. Operation of method 1100 may be implemented by a memory device or its components as described herein. For example, operation of method 1100 may be performed by, as referenced... Figures 1 to 7 The described memory device performs the functions described. In some instances, the memory device may execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively, the memory device may use dedicated hardware to perform aspects of the described functions.

[0159] At 1105, the method may include (e.g., at the memory device) identifying conditions of the memory device associated with a test mode. This can be based on, as referenced... Figures 3 to 6 The disclosed instances perform operation 1105. In some instances, aspects of operation 1105 may be provided as referenced. Figure 7 The described test pattern recognition component 735 is executed.

[0160] At 1110, the method may include, at least in part, configuration of logic for health monitoring of the memory device based on the evaluation of a first degradation level, according to conditions associated with the identification and testing mode. This may be in accordance with, as referenced... Figures 3 to 6 The disclosed instance performs operation 1110. In some instances, aspects of the operation 1110 may be provided as referenced. Figure 7 The described health monitoring configuration component 740 is executed.

[0161] At 1115, the method may include, at least in part, an indication of a first result of the logic for health monitoring, configured according to an evaluation of a first degradation level, and outputting such an indication. This may be based on, as referenced... Figures 3 to 6 The disclosed instances perform operation 1115. In some instances, aspects of operation 1115 may be provided as referenced. Figure 7 The described health monitoring output component 730 is executed.

[0162] At 1120, the method may include configuring logic for health monitoring based at least in part on identifying conditions associated with the test mode, according to the evaluation of a second degradation level. This may be in accordance with, as referenced... Figures 3 to 6 The disclosed instance performs operation 1120. In some instances, aspects of operation 1120 may be provided as referenced. Figure 7 The described health monitoring configuration component 740 is executed.

[0163] At 1125, the method may include, at least in part, an indication of a second result of the logic for health monitoring, based on configuring the logic for health monitoring according to an evaluation of a second degradation level. This may be based on, as referenced... Figures 3 to 6 The disclosed instance performs operation 1125. In some instances, aspects of operation 1125 may be provided as referenced. Figure 7 The described health monitoring output component 730 is executed.

[0164] In some instances, the device as described herein may perform one or more methods, such as method 1100. The device may include features, circuitry, logic, components, or instructions (e.g., a non-transitory computer-readable medium storing instructions executable by a processor) or any combination thereof for performing aspects of this disclosure:

[0165] Aspect 21: A method, apparatus, or non-transitory computer-readable medium comprising operations, features, circuitry, logic, components, or instructions, or any combination thereof, for performing the following steps: (e.g., at a memory device) identifying conditions of the memory device associated with a test mode; configuring logic for health monitoring of the memory device according to an evaluation of a first degradation level, based at least in part on the identification of conditions associated with the test mode; outputting an indication of a first result of the logic for health monitoring, based at least in part on the configuration of the logic for health monitoring according to the evaluation of the first degradation level; configuring logic for health monitoring according to an evaluation of a second degradation level, based at least in part on the identification of conditions associated with the test mode; and outputting an indication of a second result of the logic for health monitoring, based at least in part on the configuration of the logic for health monitoring according to the evaluation of the second degradation level.

[0166] Aspect 22: The method, apparatus, or non-transitory computer-readable medium according to aspect 21 further includes operations, features, circuitry, logic, components, or instructions or any combination thereof for performing the following steps: receiving a first indication of a first degradation level and a second indication of a second degradation level, wherein configuring logic for health monitoring based on an evaluation of the first degradation level is at least partially based on the first indication, and configuring logic for health monitoring based on an evaluation of the second degradation level is at least partially based on the second indication.

[0167] Aspect 23: The method, apparatus, or non-transitory computer-readable medium according to any one of aspects 21 to 22 further comprises an operation, feature, circuit system, logic, component, or instruction or any combination thereof for performing the following steps: writing an indication of a first result to a mode register; outputting an indication of a first result from the mode register; writing an indication of a second result to the mode register; and outputting an indication of a second result from the mode register.

[0168] Aspect 24: The method, apparatus, or non-transitory computer-readable medium according to aspect 23 further includes operations, features, circuitry, logic, components, or instructions or any combination thereof for performing the following steps: receiving a first command to read a mode register, wherein an indication to output a first result from the mode register is at least partially based on the first command; and receiving a second command to read a mode register, wherein an indication to output a second result from the mode register is at least partially based on the second command.

[0169] It should be noted that the methods described herein describe possible implementations, and the operations and steps can be rearranged or otherwise modified, and other implementations are possible. Furthermore, two or more parts from the methods described may be combined.

[0170] A device is described. An overview of various aspects of the device as described herein is provided below:

[0171] Aspect 25: An apparatus comprising: a memory array (e.g., a memory device); and logic (e.g., a memory device coupled to the memory array) configured such that the apparatus: receives one or more indications for evaluating logic for health monitoring of the apparatus; outputs an indication of a first result of the logic for health monitoring in a first configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring; and outputs an indication of a second result of the logic for health monitoring in a second configuration of the logic for health monitoring, based at least in part on the one or more indications for evaluating the logic for health monitoring.

[0172] Aspect 26: The device according to aspect 25, wherein the logic is configured such that the device: configures the logic for health monitoring in a first configuration at least in part based on receiving one or more indications for evaluating the logic for health monitoring; generates a first result based at least in part based on the first configuration; configures the logic for health monitoring in a second configuration at least in part based on receiving one or more indications for evaluating the logic for health monitoring; and generates a second result based at least in part based on the second configuration.

[0173] Aspect 27: The device according to aspect 26, wherein the logic is configured such that the device: configures the logic for health monitoring at least in part based on a first output value of the logic for health monitoring, configuring the logic for health monitoring with a first configuration; and configures the logic for health monitoring at least in part based on a second output value of the logic for health monitoring, configuring the logic for health monitoring with a second configuration.

[0174] Aspect 28: The device according to any one of Aspects 26 to 27, wherein the logic is configured such that the device: is configured at least in part based on a first degradation level for the logic used for health monitoring, and is configured with a first configuration for the logic used for health monitoring; and is configured at least in part based on a second degradation level for the logic used for health monitoring, and is configured with a second configuration for the logic used for health monitoring.

[0175] Aspect 29: The device according to aspect 28, wherein the one or more indications include an indication of a first degradation level and an indication of a second degradation level.

[0176] Aspect 30: The device according to any one of Aspects 28 to 29, wherein: the indication of the first result includes an indication of whether the degradation level of the device satisfies a first degradation level; and the indication of the second result includes an indication of whether the degradation level of the device satisfies a second degradation level.

[0177] Another device is described. An overview of various aspects of the device as described in this article is provided below:

[0178] Aspect 31: An apparatus comprising: logic that can be coupled to a memory device, the logic being configured such that the apparatus: transmits one or more indications for evaluating the memory device for health monitoring; receives, in a first configuration, a first indication of a first result of the logic for health monitoring, and in a second configuration, a second indication of a second result of the logic for health monitoring, based at least in part on transmitting the one or more indications for evaluating the logic for health monitoring; and evaluates a condition of the memory device based at least in part on comparing the first result with the second result.

[0179] Aspect 32: The device according to aspect 31, wherein the logic is configured such that the device: at least in part, transmits an indication of the state of the memory device based on the first result being the same as the second result.

[0180] Aspect 33: The device according to any one of Aspects 31 to 32, wherein the logic is configured such that the device: transmits an indication of a degradation level at least in part based on a first result being different from a second result, for evaluating the memory device using logic for health monitoring; and receives an indication of whether the memory device meets the degradation level, at least in part based on the indication of transmitting the degradation level.

[0181] Aspect 34: The device according to any one of Aspects 31 to 33, wherein: a first configuration is associated with a first degradation level of logic for health monitoring; and a second configuration is associated with a second degradation level of logic for health monitoring.

[0182] Aspect 35: The device according to aspect 34, wherein the one or more indications include an indication of a first degradation level and an indication of a second degradation level.

[0183] The information and signals described herein can be represented using any of a variety of different techniques and skills. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof. Some diagrams may illustrate a signal as a single signal; however, the signal may represent a bus of signals, which may have various bit widths.

[0184] The terms “electronic connection,” “conductive contact,” “connection,” and “coupling” refer to the relationship between components that supports the flow of signals between them. Components are considered electronically connected (e.g., electrically connected, connected, or coupled) if there is any electrical path (e.g., a conductive path) between them that can support the flow of signals (e.g., charge, current, voltage) between them at any given time. At any given time, the conductive path between components that are electronically connected (e.g., electrically connected, connected, or coupled) can be an open or closed circuit based on the operation of the device containing the connected component. The conductive path between connected components can be a direct conductive path between the components, or it can be an indirect conductive path that may include intermediate components such as switches, transistors, or other components. In some instances, one or more intermediate components, such as switches or transistors, may be used to interrupt the signal flow between connected components for a period of time.

[0185] The term "coupling" refers to the condition that moves from an open-circuit relationship between components to a closed-circuit relationship, in which a signal cannot currently be transmitted between the components (e.g., via a conductive path), and in which a signal can be transmitted between the components (e.g., via the conductive path). When a component, such as a controller, couples other components together, the component initiates a change that allows signals to flow between the other components via conductive paths that were previously not permitted.

[0186] The term "isolation" refers to a relationship between components where signals cannot currently flow between them. Components are isolated from each other if there is an open circuit between them. For example, components separated by a switch positioned between them are isolated from each other when the switch is open. When a controller isolates two components, it prevents signals from flowing between them using previously permitted conductive paths.

[0187] The devices discussed herein, including memory arrays, can be formed on semiconductor substrates such as silicon, germanium, silicon-germanium alloys, gallium arsenide, and gallium nitride. In some instances, the substrate is a semiconductor wafer. In other instances, the substrate can be a silicon-on-insulator (SOI) substrate, such as silicon-on-glass (SOG) or silicon-on-sapphire (SOP), or an epitaxial layer of semiconductor material on another substrate. The conductivity of the substrate or subregions of the substrate can be controlled by doping with various chemicals including, but not limited to, phosphorus, boron, or arsenic. Doping can be performed during the initial formation or growth of the substrate, either by ion implantation or by any other doping method.

[0188] The switching components (e.g., transistors) discussed herein may represent field-effect transistors (FETs) and may include three-terminal components comprising a source (e.g., a source terminal), a drain (e.g., a drain terminal), and a gate (e.g., a gate terminal). The terminals may be connected to other electronic components via a conductive material (e.g., a metal, an alloy). The source and drain may be conductive and may include doped (e.g., heavily doped, degenerate) semiconductor regions. The source and drain may be separated by doped (e.g., lightly doped) semiconductor regions or a channel. If the channel is n-type (e.g., the majority of charge carriers are electrons), then the FET may be called an n-type FET. If the channel is p-type (e.g., the majority of charge carriers are holes), then the FET may be called a p-type FET. The channel may be capped by an insulating gate oxide. The channel conductivity can be controlled by applying a voltage to the gate. For example, applying a positive or negative voltage to an n-type FET or a p-type FET, respectively, can cause the channel to become conductive. When a voltage greater than or equal to the transistor's threshold voltage is applied to the transistor's gate, the transistor can be "turned on" or "activated". When a voltage less than the transistor's threshold voltage is applied to the transistor's gate, the transistor can be "turned off" or "deactivated".

[0189] The description herein, illustrated with reference to the accompanying drawings, describes exemplary configurations and does not represent all instances that can be implemented or that are within the scope of the claims. The term "exemplary" as used herein means "serving as an example, illustration, or description" and is not "preferred" or "superior" to other instances. The detailed description includes specific details that provide an understanding of the described techniques. However, these techniques can be practiced without these specific details. In some cases, well-known structures and apparatuses are shown in block diagram form to avoid obscuring the concepts of the described instances.

[0190] In the accompanying drawings, similar components or features may have the same reference numerals. Furthermore, various components of the same type can be distinguished by a dash following the reference numeral and a second numeral used to differentiate them among similar components. If only the first reference numeral is used in the specification, the description applies to any of the similar components having the same first reference numeral, regardless of the second reference numeral.

[0191] The functions described herein can be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions can be stored on or transmitted via a computer-readable medium as one or more instructions (e.g., code). Other examples and embodiments are within the scope of this disclosure and the appended claims. For example, due to the nature of software, the functions described herein can be implemented using software executed by a processor, hardware, firmware, hardwired, or any combination thereof. Features implementing the functions can also be physically located in various locations, including distributed configurations such that portions of the functions are implemented in different physical locations.

[0192] For example, processors such as DSPs, ASICs, FPGAs, discrete gate logic, discrete transistor logic, discrete hardware components, other programmable logic devices, or any combination thereof designed to perform the functions described herein can be used to implement or execute the various illustrative blocks and modules described in conjunction with the disclosure herein. A processor can be a microprocessor, controller, microcontroller, state machine, or an instance of any type of processor. A processor can also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors incorporating a DSP core, or any other such configuration).

[0193] As used herein, the word "or" in a list of items included in the claims (e.g., a list of items beginning with phrases such as "at least one of..." or "one or more of...") indicates an inclusive list, such that a list of at least one of A, B, or C means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Additionally, as used herein, the phrase "based on" should not be construed as referring to a closed set of conditions. For example, an exemplary step described as "based on condition A" may be based on both condition A and condition B without departing from the scope of this disclosure. In other words, as used herein, the phrase "based on" should also be interpreted as the phrase "at least partially based on".

[0194] Computer-readable media includes both non-transitory computer storage media and communication media, with communication media encompassing any media that facilitates the transfer of a computer program from one place to another. Non-transitory storage media can be any available media accessible by a computer. By example, and not as a limitation, non-transitory computer-readable media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), optical disc (CD) ROM or other optical disc storage devices, magnetic disk storage devices or other magnetic storage devices, or any other non-transitory media that can be used to carry or store desired program code components in the form of instructions or data structures and is accessible by a computer or processor. Furthermore, any connection is appropriately referred to as computer-readable media. For example, if software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then such coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave are included in the definition of media. As used in this article, disks and optical discs include CDs, laser discs, optical discs, digital multifunction discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of these are also included within the scope of computer-readable media.

[0195] The description provided herein enables those skilled in the art to make or use this disclosure. Various modifications to this disclosure will become apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the scope of this disclosure. Therefore, this disclosure is not limited to the examples and designs described herein, but is given the broadest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method comprising: receiving, at a memory device from a host device, one or more indications to evaluate a logic for health monitoring of the memory device according to both a first configuration of the logic for health monitoring and a second configuration of the logic for health monitoring; based at least in part on the one or more indications to evaluate the logic for health monitoring, outputting, from the memory device, a first indication of a first result of the logic for health monitoring according to the first configuration of the logic for health monitoring; and based at least in part on the one or more indications to evaluate the logic for health monitoring, outputting, from the memory device, a second indication of a second result of the logic for health monitoring according to the second configuration of the logic for health monitoring.

2. The method of claim 1, further comprising: based at least in part on receiving the one or more indications to evaluate the logic for health monitoring, configuring the logic for health monitoring according to the first configuration; based at least in part on configuring the logic for health monitoring according to the first configuration, generating the first result; based at least in part on receiving the one or more indications to evaluate the logic for health monitoring, configuring the logic for health monitoring according to the second configuration; based at least in part on configuring the logic for health monitoring according to the second configuration, generating the second result.

3. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on configuring the logic for health monitoring according to a first output value of the logic for health monitoring; and configuring the logic for health monitoring according to the second configuration is based at least in part on configuring the logic for health monitoring according to a second output value of the logic for health monitoring.

4. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on configuring the logic for health monitoring according to a first degradation level; and configuring the logic for health monitoring according to the second configuration is based at least in part on configuring the logic for health monitoring according to a second degradation level.

5. The method of claim 4, wherein the one or more indications comprise an indication of the first degradation level and an indication of the second degradation level.

6. The method of claim 4, wherein: the first indication of the first result comprises an indication of whether a degradation level of the memory device meets the first degradation level; and the second indication of the second result comprises an indication of whether the degradation level of the memory device meets the second degradation level.

7. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on receiving an indication of the one or more indications; and configuring the logic for health monitoring according to the second configuration is based at least in part on receiving an indication of the one or more indications. ​ ​ ​ Configuring the logic for health monitoring according to the second configuration is based at least in part on receiving the indication of the one or more indications.

8. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on receiving a first indication of the one or more indications; and configuring the logic for health monitoring according to the second configuration is based at least in part on receiving a second indication of the one or more indications.

9. The method of claim 1, further comprising: writing the first indication of the first result to a mode register based at least in part on configuring the logic for health monitoring according to the first configuration; outputting the first indication of the first result from the mode register; writing the second indication of the second result to the mode register based at least in part on configuring the logic for health monitoring according to the second configuration; and outputting the second indication of the second result from the mode register.

10. The method of claim 9, further comprising: receiving a first command to read the mode register, wherein outputting the first indication of the first result from the mode register is based at least in part on the first command; and receiving a second command to read the mode register, wherein outputting the second indication of the second result from the mode register is based at least in part on the second command.

11. The method of claim 1, further comprising: receiving one or more commands to write to a mode register of the memory device, wherein receiving the one or more indications to evaluate the logic for health monitoring is based at least in part on reading the mode register.

12. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on configuring the logic for health monitoring according to a first monitored component of a plurality of components of the memory device; and configuring the logic for health monitoring according to the second configuration is based at least in part on configuring the logic for health monitoring according to a second monitored component of the plurality of components of the memory device.

13. The method of claim 2, wherein: configuring the logic for health monitoring according to the first configuration is based at least in part on configuring the logic for health monitoring according to a first degradation metric; and configuring the logic for health monitoring according to the second configuration is based at least in part on configuring the logic for health monitoring according to a second degradation metric different from the first degradation metric.

14. A method, comprising: transmitting, by a host device, one or more indications to a memory device to evaluate a logic for health monitoring of the memory device according to both a first configuration of the logic for health monitoring and a second configuration of the logic for health monitoring; ​ ​ receive a first indication of a first result of the logic for health monitoring according to the first configuration and receive a second indication of a second result of the logic for health monitoring according to the second configuration based at least in part on transmitting the one or more indications to evaluate the logic for health monitoring; and evaluate a condition of the memory device based at least in part on comparing the first result and the second result.

15. The method of claim 14, further comprising: transmit an indication of a status of the memory device based at least in part on the first result being the same as the second result.

16. The method of claim 14, further comprising: transmit an indication of a degradation level for evaluating the memory device using the logic for health monitoring based at least in part on the first result being different than the second result; and receive an indication of whether the memory device meets the degradation level based at least in part on transmitting the indication of the degradation level.

17. The method of claim 14, wherein: the first configuration is associated with a first degradation level of the logic for health monitoring; and the second configuration is associated with a second degradation level of the logic for health monitoring.

18. The method of claim 17, wherein the one or more indications comprise an indication of the first degradation level and an indication of the second degradation level.

19. The method of claim 14, wherein the one or more indications to evaluate the logic for health monitoring comprise a single indication to evaluate the logic for health monitoring according to both the first configuration and the second configuration.

20. The method of claim 14, wherein the one or more indications to evaluate the logic for health monitoring comprise a first indication to evaluate the logic for health monitoring according to the first configuration and a second indication to evaluate the logic for health monitoring according to the second configuration.

21. The method of claim 14, further comprising: transmit one or more commands to read a mode register of the memory device, wherein receiving the first indication of the first result and receiving the second indication of the second result are based at least in part on transmitting the one or more commands to read the mode register.

22. The method of claim 14, further comprising: transmit one or more commands to write a mode register of the memory device, wherein transmitting the one or more indications to evaluate the logic for health monitoring are based at least in part on transmitting the one or more commands to write the mode register.

23. A memory device, comprising: one or more memory arrays; and logic coupled with the one or more memory arrays and configured to cause the memory device to: receiving, at a memory device, one or more indications from a host device to evaluate a logic for health monitoring of the memory device according to both a first configuration of the logic for health monitoring and a second configuration of the logic for health monitoring; outputting, from the memory device, a first indication of a first result of the logic for health monitoring according to the first configuration of the logic for health monitoring based at least in part on the one or more indications to evaluate the logic for health monitoring; and outputting, from the memory device, a second indication of a second result of the logic for health monitoring according to the second configuration of the logic for health monitoring based at least in part on the one or more indications to evaluate the logic for health monitoring.

24. The memory device of claim 23, wherein the logic is configured to cause the memory device to: configure the logic for health monitoring according to the first configuration based at least in part on receiving the one or more indications to evaluate the logic for health monitoring; generate the first result based at least in part on configuring the logic for health monitoring according to the first configuration; configure the logic for health monitoring according to the second configuration based at least in part on receiving the one or more indications to evaluate the logic for health monitoring; and generate the second result based at least in part on configuring the logic for health monitoring according to the second configuration.

25. The memory device of claim 24, wherein the logic is configured to cause the memory device to: configure the logic for health monitoring according to the first configuration based at least in part on configuring the logic for health monitoring according to a first output value of the logic for health monitoring; and configure the logic for health monitoring according to the second configuration based at least in part on configuring the logic for health monitoring according to a second output value of the logic for health monitoring.

26. The memory device of claim 24, wherein the logic is configured to cause the memory device to: configure the logic for health monitoring according to the first configuration based at least in part on configuring the logic for health monitoring according to a first degradation level; and configure the logic for health monitoring according to the second configuration based at least in part on configuring the logic for health monitoring according to a second degradation level.

27. The memory device of claim 24, wherein the logic is configured to cause the memory device to: configure the logic for health monitoring according to the first configuration based at least in part on configuring the logic for health monitoring according to a first monitored component of a plurality of components of the memory device; and configure the logic for health monitoring according to the second configuration based at least in part on configuring the logic for health monitoring according to a second monitored component of the plurality of components of the memory device. ​ based at least in part on the logic for health monitoring being configured according to a second monitored component of a plurality of components of the memory device, the logic for health monitoring is configured according to the second configuration.

28. The memory device of claim 24, wherein the logic is configured to cause the memory device to: based at least in part on the logic for health monitoring being configured according to a first degradation metric, the logic for health monitoring is configured according to the first configuration; and based at least in part on the logic for health monitoring being configured according to a second degradation metric different from the first degradation metric, the logic for health monitoring is configured according to the second configuration.

29. The memory device of claim 26, wherein the one or more indications comprise an indication of the first degradation level and an indication of the second degradation level.

30. The memory device of claim 26, wherein: the first indication of the first result comprises an indication of whether a degradation level of the memory device satisfies the first degradation level; and the second indication of the second result comprises an indication of whether the degradation level of the memory device satisfies the second degradation level.

31. A host device comprising: logic usable to couple with a memory device, the logic configured to cause the host device to: transmit, by the host device, one or more indications to a memory device for both a first configuration of logic for health monitoring and a second configuration of the logic for health monitoring to evaluate logic for health monitoring of a memory device; based at least in part on transmitting the one or more indications to evaluate the logic for health monitoring, receive a first indication of a first result of the logic for health monitoring according to the first configuration and a second indication of a second result of the logic for health monitoring according to the second configuration; and based at least in part on comparing the first result and the second result, evaluate a condition of the memory device.

32. The host device of claim 31, wherein the logic is configured to cause the host device to: based at least in part on the first result being the same as the second result, transmit an indication of a status of the memory device.

33. The host device of claim 31, wherein the logic is configured to cause the host device to: based at least in part on the first result being different from the second result, transmit an indication of a degradation level for use in evaluating the memory device using the logic for health monitoring; and based at least in part on transmitting the indication of the degradation level, receive an indication of whether the memory device satisfies the degradation level.

34. The host device of claim 31, wherein: the first configuration is associated with a first degradation level of the logic for health monitoring; and the second configuration is associated with a second degradation level of the logic for health monitoring.

35. The host device of claim 34, wherein the one or more indications include an indication of the first degradation level and an indication of the second degradation level.

36. A method comprising: receiving, at a memory device from a host device, a condition of the memory device associated with a test mode; based at least in part on identifying the condition associated with the test mode, configuring logic for health monitoring of the memory device according to evaluating a first degradation level; based at least in part on configuring the logic for health monitoring according to evaluating the first degradation level, outputting a first indication of a first result of the logic for health monitoring; based at least in part on identifying the condition associated with the test mode, configuring the logic for health monitoring according to evaluating a second degradation level; and based at least in part on configuring the logic for health monitoring according to evaluating the second degradation level, outputting a second indication of a second result of the logic for health monitoring.

37. The method of claim 36, further comprising: receiving a first indication of the first degradation level and a second indication of the second degradation level, wherein configuring the logic for health monitoring according to evaluating the first degradation level is based at least in part on the first indication, and configuring the logic for health monitoring according to evaluating the second degradation level is based at least in part on the second indication.

38. The method of claim 36, further comprising: writing the first indication of the first result to a mode register; outputting the first indication of the first result from the mode register; writing the second indication of the second result to the mode register; and outputting the second indication of the second result from the mode register.

39. The method of claim 38, further comprising: receiving a first command to read the mode register, wherein outputting the first indication of the first result from the mode register is based at least in part on the first command; and receiving a second command to read the mode register, wherein outputting the second indication of the second result from the mode register is based at least in part on the second command.

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