Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the method comprising: forming an initial gate on surfaces of a plurality of composite layers, the initial gate also being in a first opening, the initial gate being parallel to a second direction, and the initial gate having an isolation groove therein, the isolation groove being between two adjacent composite layers, and a bottom of the isolation groove exposing a substrate; forming a first isolation material layer on surfaces of the initial gate and in the isolation groove; forming a third opening in the first isolation material layer, the third opening exposing the initial gate at top portions of the plurality of composite layers; forming a second gate material layer on surfaces of the first isolation material layer and in the third opening; planarizing the first isolation material layer, the initial gate and the second gate material layer until a top surface of an insulating wall is exposed, to form a first gate with the initial gate, a second isolation layer with the first isolation material layer, and a second gate with the second gate material layer, the second isolation layer being formed by a self-alignment process, improving quality of the second isolation layer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Technology

[0002] With the advancement of semiconductor technology, transistor dimensions have shrunk to below a few nanometers. The size of FinFET devices has already reached its limit, and limitations in fin spacing, short-channel effects, leakage current, and material properties have made transistor manufacturing increasingly precarious, even rendering the physical structure impossible to achieve. Gate-all-around (GAA) devices have become a new direction for research and development in the industry. As future processes continue to shrink, the spacing between nFET and pFET devices within a standard cell will require even smaller spacing. However, for FinFETs and Nanosheets, process limitations restrict the spacing between these N-type and P-type devices.

[0003] Forksheet devices are considered an important alternative to fin field-effect transistors and gate-all-around devices, named for their complex double-sided fin structure. In a forksheet device, the nFET and pFET are integrated into the same structure, separated by dielectric walls. Forksheet devices have a tighter n-to-p spacing, resulting in a more compact circuitry compared to gate-all-around devices using the same manufacturing process. This facilitates the scaling of standard cells in Static Random-Access Memory (SRAM).

[0004] In SRAM circuits formed using forksheet devices, gate isolation between nFET devices and pFET devices (such as pull-up transistors and pull-down transistors) can be achieved through dielectric walls. However, gate isolation between devices of the same conductivity type, such as nFET devices (and pull-up transistors), requires photolithography and etching techniques. With the miniaturization of feature sizes, these techniques are susceptible to limitations, leading to misalignment, incomplete gate removal at gate cutoff points, and other anomalies that affect device performance.

[0005] Therefore, the existing methods for forming Forksheet devices need further improvement. Summary of the Invention

[0006] The technical problem solved by this invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of semiconductor structures.

[0007] To solve the above-mentioned technical problems, the present invention provides a semiconductor structure, comprising: a substrate, the substrate including a base, a plurality of protrusions disposed on the base and disposed therebetween, and a first isolation layer between adjacent protrusions, the top surface of the first isolation layer being flush with the top surface of the protrusions, the plurality of protrusions being parallel to a first direction and arranged along a second direction, the first direction being perpendicular to the second direction; a composite layer located on each of the protrusions, each composite layer including a plurality of channel layers overlapping along a direction perpendicular to the surface of the substrate, a first opening between adjacent two channel layers, and a second opening penetrating the composite layer along the first direction within each composite layer. The second opening extends into the protrusion, its sidewalls exposing the channel layer sidewalls, and has an insulating wall within it; a first gate is located on the surface of the plurality of composite layers, also located within the first opening and exposing the top surface of the insulating wall, the first gate being parallel to the second direction and having an isolation trench within it, the isolation trench being located between two adjacent composite layers, and the bottom of the isolation trench exposing the substrate; a second gate is located between the upper sidewall of the first gate and the second isolation layer, the top surface of the second gate being flush with the top surface of the first gate; and a second isolation layer is located within the isolation trench.

[0008] Optionally, the top surface of the insulating wall is higher than the top surface of the channel layer, and the insulating wall portion is also located on the uppermost channel layer and overlaps with the channel layer in a direction perpendicular to the substrate surface.

[0009] Optionally, the insulating wall portion is also located between the first opening and the substrate. Correspondingly, the present invention also provides a method for forming a semiconductor structure, comprising: forming a substrate and a plurality of composite layers located on the substrate, the substrate including a base, a plurality of protrusions separated from each other on the base, and a first isolation layer between adjacent protrusions, the top surface of the first isolation layer being flush with the top surface of the protrusions, the plurality of protrusions being parallel to a first direction and arranged along a second direction, the first direction being perpendicular to the second direction, each composite layer being located on each of the protrusions, each composite layer including a plurality of channel layers overlapping along a direction perpendicular to the substrate surface, a first opening between adjacent channel layers, and each composite layer also having a second opening penetrating the composite layer along the first direction, the second opening further extending into the protrusion, the sidewall of the second opening exposing the sidewall of the channel layer, and an insulating wall within the second opening. An insulating wall is formed; an initial gate is formed on the surface of the plurality of composite layers, the initial gate being located within the first opening, the initial gate being parallel to the second direction, and the initial gate having an isolation trench located between two adjacent composite layers, the bottom of the isolation trench exposing the substrate; a first isolation material layer is formed on the surface of the initial gate and within the isolation trench; a third opening is formed within the first isolation material layer, the third opening exposing the initial gate at the top of the plurality of composite layers; a second gate material layer is formed within the third opening and on the surface of the first isolation material layer; the first isolation material layer, the initial gate, and the second gate material layer are planarized until the top surface of the insulating wall is exposed, forming a first gate with the initial gate, forming a second isolation layer with the first isolation material layer, and forming a second gate with the second gate material layer.

[0010] Optionally, the material of the second gate material layer includes a metal, such as tungsten, copper, or gold.

[0011] Optionally, the method for forming the initial gate and the isolation trench further includes: forming a first gate material layer located on the surface of the plurality of composite layers, the gate material layer also being located within the first opening, the first gate material layer having an initial isolation trench between adjacent composite layers; etching the first gate material layer exposed by the initial isolation trench until the substrate surface is exposed, forming the initial gate with the first gate material layer, and forming the isolation trench with the initial isolation trench.

[0012] Optionally, the first gate material layer includes a gate dielectric material layer, a work function material layer located on the gate dielectric material layer, and a first metal material layer located on the work function material layer; the first metal material layer includes tungsten, copper, or gold.

[0013] Optionally, the method for the isolation trench further includes: forming an initial protective layer on the surface of the first gate material layer; etching the initial protective layer until the first gate material layer on the bottom surface of the initial isolation trench is exposed, thereby forming a protective layer with the initial protective layer; and using the protective layer as a mask, etching the first gate material layer until the substrate surface is exposed.

[0014] Optionally, the material of the protective layer includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon carbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide nitride, and silicon carbide nitride.

[0015] Optionally, the method for forming the plurality of composite layers includes: forming an initial composite material layer on the surface of a substrate, the initial composite material layer including a first composite material layer, the first composite material layer including a plurality of vertically overlapping channel material layers, and a first sacrificial material layer located between two adjacent channel material layers; etching the initial composite material layer to form a plurality of transition composite material layers, each of the transition composite material layers having a second opening; forming the insulating wall within the second opening; after forming the insulating wall, forming a dummy gate spanning the plurality of transition composite material layers and the insulating wall; forming an interlayer dielectric layer on the surface of the substrate, the interlayer dielectric layer being located on the sidewall of the dummy gate and exposing the top surface of the dummy gate; after forming the interlayer dielectric layer, removing the dummy gate and forming a gate opening within the interlayer dielectric layer; removing the first sacrificial material layer exposed by the gate opening to form the plurality of composite layers.

[0016] Optionally, the method for forming the plurality of transition composite material layers further includes: forming a mask layer on the surface of the initial composite material layer, the mask layer exposing a portion of the surface of the initial composite material layer; using the mask layer as a mask, etching the initial composite material layer to form a plurality of intermediate composite material layers; etching the plurality of intermediate composite material layers to form the plurality of transition composite material layers and the second opening.

[0017] Optionally, the top surface of the insulating wall is higher than the top surface of the channel layer, and the insulating wall portion is also located on the uppermost channel layer and overlaps with the channel layer in a direction perpendicular to the substrate surface.

[0018] Optionally, the initial composite material layer further includes a second composite material layer located on the first composite material layer. The second composite material layer includes a second sacrificial material layer and a third sacrificial material layer located on the second sacrificial material layer. The second sacrificial material layer is made of a different material than the first sacrificial material layer, and the second sacrificial material layer is made of a different material than the third sacrificial material layer.

[0019] Optionally, the method for forming the plurality of composite layers further includes: after forming the second opening and before forming the dummy gate, forming an initial insulating wall in the second opening; after forming the initial insulating wall, removing the second sacrificial material layer to form a first groove in the transition composite material layer; forming a first insulating material layer in the first groove, and forming the insulating wall with the first insulating material layer and the initial insulating wall; and after forming the gate opening, further removing the third sacrificial material layer exposed by the gate opening.

[0020] Optionally, the insulating wall portion is also located between the first opening and the substrate. Optionally, the initial composite material layer further includes a fourth sacrificial material layer located between the first composite material layer and the substrate, the fourth sacrificial material layer being made of a different material than the first sacrificial material layer and the third sacrificial material layer.

[0021] Optionally, the method for forming the plurality of composite layers further includes: after forming the initial insulating wall, removing the fourth sacrificial material layer to form a second groove in the transition composite material layer; forming a second insulating material layer in the second groove, and forming the insulating wall with the second insulating material layer and the initial insulating wall.

[0022] Compared with the prior art, the technical solution of the embodiments of the present invention has the following beneficial effects:

[0023] In the semiconductor structure formation method provided by the present invention, a third opening is formed in the first isolation material layer, the third opening exposing the initial gate on the top of the plurality of composite layers; a second gate material layer is formed in the third opening and on the surface of the first isolation material layer; the first isolation material layer, the initial gate, and the second gate material layer are planarized until the top surface of the insulating wall is exposed, a first gate is formed with the initial gate, a second isolation layer is formed with the first isolation material layer, and a second gate is formed with the second gate material layer. The second isolation layer is formed by a self-aligned process, which can realize gate cutting without being limited by photolithography and etching processes, thus improving the quality of the second isolation layer, thereby improving the performance of the device. Attached Figure Description

[0024] Figures 1 to 10 This is a schematic cross-sectional view of each step in the semiconductor structure formation method according to an embodiment of the present invention. Detailed Implementation

[0025] It should be noted that the terms "surface" and "on" in this specification are used to describe the relative spatial position and are not limited to whether there is direct contact.

[0026] As described in the background section, existing methods for forming Forksheet devices need further improvement.

[0027] To address the aforementioned problems, the present invention provides a semiconductor structure and its formation method, wherein a third opening is formed within a first isolation material layer, the third opening exposing the initial gate on top of the plurality of composite layers; a second gate material layer is formed within the third opening and on the surface of the first isolation material layer; the first isolation material layer, the initial gate, and the second gate material layer are planarized until the top surface of the insulating wall is exposed, a first gate is formed with the initial gate, a second isolation layer is formed with the first isolation material layer, and a second gate is formed with the second gate material layer. The second isolation layer is formed by a self-aligned process, which enables gate cutting without being limited by photolithography and etching processes, thus improving the quality of the second isolation layer and thereby improving device performance.

[0028] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0029] Figures 1 to 10 This is a schematic cross-sectional view of each step in the semiconductor structure formation method according to an embodiment of the present invention.

[0030] Please refer to Figure 1 and Figure 2 , Figure 1 This is a top view. Figure 2 for Figure 1 A cross-sectional structural diagram along the EE1 direction shows a substrate and a plurality of composite layers 101 on the substrate. The substrate includes a base 100, a plurality of protrusions 200 disposed on the base 100, and a first isolation layer 105 between adjacent protrusions 200. The top surface of the first isolation layer 105 is flush with the top surface of the protrusions 200. The plurality of protrusions 200 are parallel to a first direction X and arranged along a second direction Y. The first direction X is perpendicular to the second direction Y. Each of the composite layers 101... Located on each of the protrusions 200, each of the composite layers 101 includes a plurality of overlapping channel layers 102 along a direction perpendicular to the surface of the substrate 200. A first opening 103 is provided between two adjacent channel layers 102. Each of the composite layers 101 also has a second opening (not shown in the figure) that penetrates the composite layer 101 along the first direction X. The second opening also extends into the protrusion 200. The sidewall of the second opening exposes the sidewall of the channel layer 102. An insulating wall 104 is provided in the second opening.

[0031] The method for forming the substrate and the plurality of composite layers 101 includes: providing an initial substrate (not shown); forming an initial composite material layer (not shown) on the surface of the initial substrate, the initial composite material layer including a first composite material layer, the first composite material layer including a plurality of vertically overlapping channel material layers, and a first sacrificial material layer located between two adjacent channel material layers; etching the initial composite material layer and the initial substrate to form a plurality of transition composite material layers (not shown), each of the transition composite material layers having a second opening (not shown); forming the substrate 100 and the plurality of protrusions 200 on the initial substrate, with adjacent protrusions 200... A trench (not shown) is formed between the layers; an insulating wall 104 is formed within the second opening; after forming the insulating wall 104, a first isolation layer 105 is formed within the trench; after forming the first isolation layer 105, a dummy gate (not shown) is formed across the plurality of transition composite material layers and the insulating wall 104; an interlayer dielectric layer (not shown) is formed on the surface of the substrate 100, the interlayer dielectric layer being located on the sidewall of the dummy gate and exposing the top surface of the dummy gate; after forming the interlayer dielectric layer, the dummy gate is removed, and a gate opening (not shown) is formed within the interlayer dielectric layer; the first sacrificial material layer exposed by the gate opening is removed, forming the plurality of composite layers.

[0032] In this embodiment, the method for forming the plurality of transition composite material layers further includes: forming a mask layer (not shown in the figure) on the surface of the initial composite material layer, the mask layer exposing a portion of the surface of the initial composite material layer; using the mask layer as a mask, etching the initial composite material layer to form a plurality of intermediate composite material layers (not shown in the figure); etching the plurality of intermediate composite material layers to form the plurality of transition composite material layers and the second opening.

[0033] In this embodiment, the top surface of the insulating wall 104 is higher than the top surface of the channel layer 102, and a portion of the insulating wall 104 is also located on the uppermost channel layer 102, overlapping the channel layer 102 in a direction perpendicular to the surface of the substrate 100. In other embodiments, the top surface of the insulating wall is higher than the top surface of the channel layer, but does not include the portion of the uppermost channel layer.

[0034] Specifically, the initial composite material layer further includes a second composite material layer located on the first composite material layer. The second composite material layer includes a second sacrificial material layer and a third sacrificial material layer located on the second sacrificial material layer. The materials of the second sacrificial material layer and the third sacrificial material layer are different.

[0035] In this embodiment, the method for forming the plurality of composite layers further includes: after forming the second opening and before forming the dummy gate, forming an initial insulating wall (not shown in the figure) within the second opening; after forming the initial insulating wall, removing the second sacrificial material layer to form a first groove (not shown in the figure) within the transition composite material layer; forming a first insulating material layer (not shown in the figure) within the first groove, using the first insulating material layer and the initial insulating wall to form the insulating wall; and after forming the gate opening, further removing the third sacrificial material layer exposed by the gate opening. More specifically, the second sacrificial material layer is made of a different material than the first sacrificial material layer, and the second sacrificial material layer is made of a different material than the third sacrificial material layer. During the etching process for forming the first groove, a process with a larger etching selectivity ratio for the second sacrificial material layer relative to the first and third sacrificial material layers can be selected to reduce etching damage to the first and third sacrificial material layers, improve the flatness of the channel layer surface in the subsequent formation of the composite layer, and thus improve device performance. In this embodiment, the first and third sacrificial material layers are made of the same material.

[0036] In this embodiment, the insulating wall 104 is also located between the first opening 103 and the substrate 100. In other embodiments, the insulating wall does not include the portion located between the first opening and the substrate.

[0037] Specifically, the initial composite material layer further includes a fourth sacrificial material layer (not shown in the figure) located between the first composite material layer and the substrate 100. The fourth sacrificial material layer is made of a different material than the first sacrificial material layer and is made of a different material than the third sacrificial material layer.

[0038] In this embodiment, the method for forming the plurality of composite layers further includes: after forming the initial insulating wall, removing the fourth sacrificial material layer to form a second groove (not shown in the figure) within the transition composite material layer; forming a second insulating material layer (not shown in the figure) within the second groove, and forming the insulating wall 104 with the second insulating material layer and the initial insulating wall. During the etching process for forming the second groove, a process with a larger etching selectivity ratio for the fourth sacrificial material layer relative to the first and third sacrificial material layers can be selected to reduce etching damage to the first and third sacrificial material layers, improve the surface smoothness of the channel layer in the subsequent composite layer formation, and thus improve device performance. In this embodiment, the material of the fourth sacrificial material layer is the same as the material of the second sacrificial material layer, and the fourth sacrificial material layer and the second sacrificial material layer can be removed in the same process.

[0039] It should be noted that, subsequently Figures 3 to 10 The view direction is the same Figure 2 .

[0040] Subsequently, an initial gate is formed on the surface of the plurality of composite layers 101. The initial gate is also located within the first opening. The initial gate is parallel to the second direction Y, and has an isolation trench within it. The isolation trench is located between two adjacent composite layers, and the bottom of the isolation trench exposes the substrate 100. For the method of forming the initial gate and the isolation trench, please refer to [reference needed]. Figures 3 to 6 .

[0041] Please refer to Figure 3 A first gate material layer 201 is formed on the surface of the plurality of composite layers 101. The first gate material layer 201 is also located in the first opening 103. The first gate material layer 201 has an initial isolation groove 202 between adjacent composite layers 101.

[0042] The first gate material layer 201 includes a gate dielectric material layer (not shown in the figure) and a work function material layer (not shown in the figure) located on the gate dielectric material layer.

[0043] The first gate material layer 201 is used to form an initial gate, which further forms a first gate. Specifically, the first gate includes a gate dielectric layer and a work function layer located on the gate dielectric layer. The gate dielectric material layer is used to form the gate dielectric layer of the first gate, and the work function material layer is used to form the work function layer of the first gate.

[0044] The first gate material layer 201 is located on the surface of several composite layers 101 and does not fill the spaces between adjacent composite layers 101. The initial isolation trench 202 is used to form an isolation trench to provide space for self-alignment to form the second isolation layer.

[0045] Subsequently, the first gate material layer 201 exposed by the initial isolation trench 202 is etched until the surface of the substrate 100 is exposed, so as to form the initial gate with the first gate material layer 201 and the isolation trench with the initial isolation trench 202.

[0046] In this embodiment, the method for forming the initial gate and the isolation trench is also referred to... Figures 4 to 6 .

[0047] Please refer to Figure 4 An initial protective layer 203 is formed on the surface of the first gate material layer 201.

[0048] The material of the initial protective layer 203 includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon carbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon carbide.

[0049] In this embodiment, the material of the initial protective layer 203 is silicon nitride.

[0050] Please refer to Figure 5 The initial protective layer 203 is etched until the first gate material layer 201 on the bottom surface of the initial isolation trench 202 is exposed, so that the initial protective layer 203 forms a protective layer 204.

[0051] The material of the protective layer 204 includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbonate, silicon oxynitride, aluminum oxide, aluminum nitride, silicon oxycarbonate, and silicon oxycarbonate.

[0052] In this embodiment, the protective layer 204 is made of silicon nitride.

[0053] Please refer to Figure 6 Using the protective layer 204 as a mask, the first gate material layer 201 is etched until the surface of the substrate 100 is exposed.

[0054] The first gate material layer 201 exposed by the initial isolation trench 202 is etched until the surface of the substrate 100 is exposed, so that the initial gate 205 is formed with the first gate material layer 201 and the isolation trench 206 is formed with the initial isolation trench 202.

[0055] In this embodiment, the first gate material layer 201 on the top surface of the plurality of composite layers 101 is partially retained relative to the first gate material layer 201 at the bottom of the initial isolation trench 202. In other embodiments, the first gate material layer on the top surface of the plurality of composite layers is etched to expose the insulating wall, the top surface of which is higher than the channel layer, thereby protecting the channel layer and reducing etching damage to the channel layer during the etching process.

[0056] The isolation trench 206 is used to cut off the initial gate 205, forming isolation between the gates of different devices.

[0057] In this embodiment, to ensure that the initial gate 205 is completely cut off, the first gate material layer 201 exposed by the initial isolation trench 202 is etched. After exposing the surface of the substrate 100, the substrate 100 is further etched, meaning that the isolation trench 206 is still located within the substrate 100. In another embodiment, the substrate may not be etched.

[0058] Please refer to Figure 7 A first isolation material layer 207 is formed on the surface of the initial gate 205 and within the isolation trench 206.

[0059] The first insulating material layer 207 is made of a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon carbide, silicon oxynitride, aluminum oxide, aluminum nitride, silicon carbide, and silicon carbide.

[0060] In this embodiment, the material of the first isolation material layer 207 is silicon oxide.

[0061] Subsequently, the first isolation material layer 207 is planarized until the top surface of the insulating wall 104 is exposed, forming a first gate with the initial gate 205 and a second isolation layer with the first isolation material layer 207.

[0062] Please refer to Figure 8 A third opening 208 is formed within the first insulating material layer 207, the third opening 208 exposing the initial gate 205 on top of the plurality of composite layers 101.

[0063] The formation process of the third opening 208 includes one or a combination of dry etching and wet etching. In this embodiment, the formation process of the third opening 208 is a dry etching process, which is beneficial for improving the morphology of the formed opening.

[0064] In this embodiment, the method for forming the third opening 208 includes: forming a patterned layer 209 on the surface of the first isolation material layer 207, wherein the patterned layer 209 exposes a portion of the first isolation material layer 207; using the patterned layer 209 as a mask, etching the first isolation material layer 207 to form the third opening 208; and removing the patterned layer 209 after forming the third opening 208.

[0065] Please refer to Figure 9 A second gate material layer 210 is formed within the third opening 208 and on the surface of the first isolation material layer 207.

[0066] The material of the second gate material layer 210 includes a metal, such as tungsten, copper, or gold.

[0067] Please refer to Figure 10The first isolation material layer 207, the initial gate 205 and the second gate material layer 210 are planarized until the top surface of the insulating wall 104 is exposed, the first gate 212 is formed with the initial gate 205, the second isolation layer 213 is formed with the first isolation material layer 207 and the second gate 211 is formed with the second gate material layer 210.

[0068] Thus, the second isolation layer 213 is formed through a self-aligned process, which enables the gate to be cut off without being limited by photolithography and etching processes. This improves the quality of the second isolation layer 213, thereby improving the performance of the device.

[0069] Accordingly, embodiments of the present invention also provide a semiconductor structure formed using the above method. Please refer to [the documentation for further details]. Figure 10 The system includes: a substrate, the substrate comprising a base 100, a plurality of protrusions 200 disposed on the base 100 and a first isolation layer 105 between adjacent protrusions 200, the top surface of the first isolation layer 105 being flush with the top surface of the protrusions 200, the plurality of protrusions 200 being parallel to a first direction X and arranged along a second direction Y, the first direction X being perpendicular to the second direction Y; a composite layer 101 located on each of the protrusions 200, each composite layer 101 comprising a plurality of overlapping channel layers 102 along a direction perpendicular to the surface of the substrate 100, a first opening 103 between adjacent channel layers 102, and each composite layer 101 further comprising a second opening (not shown in the figure) penetrating the composite layer along the first direction X, the second opening further extending to the protrusion. Within 200, the second opening sidewall exposes the sidewall of the channel layer 102, and the second opening has an insulating wall 104; a first gate 212 is located on the surface of the plurality of composite layers 101, the first gate 212 is also located within the first opening 103, and exposes the top surface of the insulating wall 104, the first gate 212 is parallel to the second direction Y, and the first gate 212 has an isolation trench 206, the isolation trench 206 is located between two adjacent composite layers 101, and the bottom of the isolation trench 206 exposes the substrate 100; a second gate 211 is located between the sidewall of the upper part of the first gate 212 and the second isolation layer 213, the top surface of the second gate 211 is flush with the top surface of the first gate 212; and a second isolation layer 213 is located within the isolation trench 206.

[0070] In this embodiment, the top surface of the insulating wall 104 is higher than the top surface of the channel layer 102, and the insulating wall 104 is also located on the uppermost channel layer 102, and overlaps with the channel layer 102 in a direction perpendicular to the surface of the substrate 100.

[0071] In this embodiment, the insulating wall 104 portion is also located between the first opening and the substrate.

[0072] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: The substrate includes a base, a plurality of protrusions located on the base and separated from each other, and a first isolation layer between adjacent protrusions, the top surface of the first isolation layer being flush with the top surface of the protrusions, the plurality of protrusions being parallel to a first direction and arranged along a second direction, the first direction being perpendicular to the second direction. A composite layer is located on each of the protrusions, each of the composite layers includes a plurality of channel layers overlapping in a direction perpendicular to the surface of the substrate, a first opening is provided between two adjacent channel layers, and each of the composite layers also has a second opening that penetrates the composite layer in the first direction, the second opening also extends into the protrusion, the sidewall of the second opening exposes the sidewall of the channel layer, and an insulating wall is provided in the second opening. A first gate is located on the surface of the plurality of composite layers, the first gate is also located in the first opening and exposes the top surface of the insulating wall, the first gate is parallel to the second direction, and the first gate has an isolation trench, the isolation trench is located between two adjacent composite layers, and the bottom of the isolation trench exposes the substrate; The second gate is located between the sidewall of the upper part of the first gate and the second isolation layer, and the top surface of the second gate is flush with the top surface of the first gate. The second isolation layer is located within the isolation groove.

2. The semiconductor structure as described in claim 1, characterized in that, The top surface of the insulating wall is higher than the top surface of the channel layer, and the insulating wall portion is also located on the uppermost channel layer and overlaps with the channel layer in a direction perpendicular to the substrate surface.

3. The semiconductor structure as described in claim 2, characterized in that, The insulating wall portion is also located between the first opening and the substrate.

4. A method for forming a semiconductor structure, characterized in that, include: A substrate and a plurality of composite layers are formed on the substrate. The substrate includes a base, a plurality of protrusions separated from each other on the base, and a first isolation layer between adjacent protrusions. The top surface of the first isolation layer is flush with the top surface of the protrusions. The plurality of protrusions are parallel to a first direction and arranged along a second direction, which is perpendicular to the second direction. Each composite layer is located on each of the protrusions. Each composite layer includes a plurality of channel layers that overlap in a direction perpendicular to the surface of the substrate. A first opening is provided between two adjacent channel layers. Each composite layer also has a second opening that penetrates the composite layer along the first direction. The second opening extends into the protrusion. The sidewall of the second opening exposes the sidewall of the channel layer. An insulating wall is provided in the second opening. An initial gate is formed on the surface of the plurality of composite layers. The initial gate is also located within the first opening. The initial gate is parallel to the second direction and has an isolation trench located between two adjacent composite layers. The bottom of the isolation trench exposes the substrate. A first isolation material layer is formed on the initial gate surface and within the isolation trench; A third opening is formed within the first isolation material layer, the third opening exposing the initial gate on top of the plurality of composite layers; A second gate material layer is formed within the third opening and on the surface of the first isolation material layer; the first isolation material layer, the initial gate, and the second gate material layer are planarized until the top surface of the insulating wall is exposed, a first gate is formed with the initial gate, a second isolation layer is formed with the first isolation material layer, and a second gate is formed with the second gate material layer.

5. The method for forming a semiconductor structure as described in claim 4, characterized in that, The material of the second gate material layer includes a metal, such as tungsten, copper, or gold.

6. The method for forming a semiconductor structure as described in claim 4, characterized in that, The method for forming the initial gate and the isolation trench further includes: forming a first gate material layer located on the surface of the plurality of composite layers, the gate material layer also being located within the first opening, the first gate material layer having an initial isolation trench between adjacent composite layers; etching the first gate material layer exposed by the initial isolation trench until the substrate surface is exposed, forming the initial gate with the first gate material layer, and forming the isolation trench with the initial isolation trench.

7. The method for forming a semiconductor structure as described in claim 6, characterized in that, The first gate material layer includes a gate dielectric material layer, a work function material layer located on the gate dielectric material layer, and a first metal material layer located on the work function material layer; the first metal material layer includes tungsten, copper, or gold.

8. The method for forming a semiconductor structure as described in claim 6, characterized in that, The method for creating an isolation trench further includes: forming an initial protective layer on the surface of the first gate material layer; etching the initial protective layer until the first gate material layer on the bottom surface of the initial isolation trench is exposed, thereby forming a protective layer with the initial protective layer; and using the protective layer as a mask, etching the first gate material layer until the substrate surface is exposed.

9. The method for forming a semiconductor structure as described in claim 8, characterized in that, The material of the protective layer includes a dielectric material, which includes one or more combinations of silicon oxide, silicon nitride, silicon carbide, silicon oxycarbonate, silicon oxynitride, aluminum oxide, aluminum nitride, silicon oxycarbonate, and silicon oxycarbonate.

10. The method for forming a semiconductor structure as described in claim 4, characterized in that, The method for forming the plurality of composite layers includes: forming an initial composite material layer on the surface of a substrate, the initial composite material layer including a first composite material layer, the first composite material layer including a plurality of vertically overlapping channel material layers, and a first sacrificial material layer located between two adjacent channel material layers; etching the initial composite material layer to form a plurality of transition composite material layers, each of the transition composite material layers having a second opening; forming the insulating wall within the second opening; after forming the insulating wall, forming a dummy gate spanning the plurality of transition composite material layers and the insulating wall; forming an interlayer dielectric layer on the surface of the substrate, the interlayer dielectric layer being located on the sidewall of the dummy gate and exposing the top surface of the dummy gate; after forming the interlayer dielectric layer, removing the dummy gate and forming a gate opening within the interlayer dielectric layer; removing the first sacrificial material layer exposed by the gate opening to form the plurality of composite layers.

11. The method for forming a semiconductor structure as described in claim 10, characterized in that, The method for forming the plurality of transition composite material layers further includes: forming a mask layer on the surface of the initial composite material layer, the mask layer exposing a portion of the surface of the initial composite material layer; using the mask layer as a mask, etching the initial composite material layer to form a plurality of intermediate composite material layers; etching the plurality of intermediate composite material layers to form the plurality of transition composite material layers and the second opening.

12. The method for forming a semiconductor structure as described in claim 10, characterized in that, The top surface of the insulating wall is higher than the top surface of the channel layer, and the insulating wall portion is also located on the uppermost channel layer and overlaps with the channel layer in a direction perpendicular to the substrate surface.

13. The method for forming a semiconductor structure as described in claim 12, characterized in that, The initial composite material layer further includes a second composite material layer located on the first composite material layer. The second composite material layer includes a second sacrificial material layer and a third sacrificial material layer located on the second sacrificial material layer. The materials of the second sacrificial material layer and the third sacrificial material layer are different.

14. The method for forming a semiconductor structure as described in claim 13, characterized in that, The method for forming the plurality of composite layers further includes: after forming the second opening and before forming the dummy gate, forming an initial insulating wall in the second opening; after forming the initial insulating wall, removing the second sacrificial material layer to form a first groove in the transition composite material layer; forming a first insulating material layer in the first groove, and forming the insulating wall with the first insulating material layer and the initial insulating wall; and after forming the gate opening, removing the third sacrificial material layer exposed by the gate opening.

15. The method for forming a semiconductor structure as described in claim 14, characterized in that, The insulating wall portion is also located between the first opening and the substrate.

16. The method for forming a semiconductor structure as described in claim 15, characterized in that, The initial composite material layer further includes a fourth sacrificial material layer located between the first composite material layer and the substrate. The fourth sacrificial material layer is made of a different material than the first sacrificial material layer and is made of a different material than the third sacrificial material layer.

17. The method for forming a semiconductor structure as described in claim 16, characterized in that, The method for forming the plurality of composite layers further includes: after forming the initial insulating wall, removing the fourth sacrificial material layer to form a second groove in the transition composite material layer; forming a second insulating material layer in the second groove, and forming the insulating wall with the second insulating material layer and the initial insulating wall.

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