Power device with reverse-sloped dielectric trench

Abstract

The present invention discloses a power device with a reverse-inclined dielectric groove, in which a reverse-inclined dielectric groove is added to the active area. The reverse-inclined dielectric groove blocks the movement of carriers along the surface toward the source. The carriers can only move downward toward the outside of the drain and then turn back toward the source at the bottom of the active layer, forming a folded voltage-resistant path. This significantly increases the effective lateral voltage-resistant length of the device and can solve the technical problems of reducing the surface length of the device and improving the voltage resistance. The reverse-inclined dielectric groove can be formed on the basis of the traditional power device structure by combining silicon wafer inclined deep groove etching and dielectric filling. This process step is fully compatible with the CMOS / SOI process and the process is simple. In addition, the inverted doping layer formed outside the dielectric groove can improve the body electric field distribution and reduce the phenomenon of electric field concentration at the corner of the dielectric groove, which is particularly suitable for the design of high-voltage power devices.

Description

Technical Field

[0001] The present invention relates to the technical field of power devices, and in particular to a power device with a reverse-inclined dielectric groove. Background Art

[0002] SOI (Silicon-On-Insulator) power devices significantly reduce on-resistance through the conductivity modulation effect. They offer advantages such as low drive power consumption, strong conduction capability, excellent thermal stability, high withstand voltage, and a large safe operating area. They facilitate electrical isolation and power integration, and are widely used in power electronics, industrial automation, aerospace, and weaponry. The lateral withstand voltage of SOI power devices is calculated by the ionization integral of the lateral electric field along the withstand length. Therefore, the design strategy for improving lateral withstand voltage is to flatten the surface electric field distribution and increase the drift region length. By flattening the surface electric field, the breakdown voltage increases with increasing the length and thickness of the active layer of the power device. However, increasing the length and thickness of the active layer results in large size and high manufacturing costs for conventional high-voltage power devices. This also conflicts with the trend of proportional reduction in the size of semiconductor integrated circuits, severely hindering the development and application of discrete devices and power integrated circuits. Modifying the bulk electric field distribution or altering the withstand path is an effective way to reduce device length and thickness and increase withstand voltage. Currently, the main method for reducing device length by altering the withstand voltage path is to embed dielectric trenches on the surface, improving the withstand voltage characteristics through their carrier blocking effect. However, due to the poor blocking effect of the surface dielectric trenches, the effective withstand voltage length has not been significantly increased, and the device withstand voltage has not achieved the desired results. Furthermore, technologies that flatten the surface electric field distribution have not increased the withstand voltage length and thickness of the device. Summary of the Invention

[0003] The present invention aims to solve the problem that the dielectric slot blocking effect of the existing structure of changing the path to increase the effective withstand voltage length is poor and the effective withstand voltage length is not significantly increased, and provides a power device with a reverse-inclined dielectric slot.

[0004] To solve the above problems, the present invention is achieved through the following technical solutions:

[0005] A power device with a reverse-sloped dielectric trench is disclosed. The power device is a SOI LDMOS power device and includes a substrate layer, a buried dielectric layer, an active layer, a channel region, a source region, a drain region, a gate, a source electrode, and a drain electrode. The buried dielectric layer is located above the substrate layer, and the active region is located above the buried dielectric layer. The channel region is embedded in the upper left portion of the active region, the source region is embedded in the upper left portion of the channel region, and the drain region is embedded in the upper right portion of the active region. The gate is located above the channel region and is connected to the source region, the channel region, and the active region. The source electrode is located above the source region and is connected to the source electrode. The drain electrode is located above the drain region and is connected to the drain region. The difference between the power device and the SOI LDMOS power device is that the device further includes a dielectric trench formed of a semiconductor dielectric material. The dielectric trench is reversely tilted and arranged in the middle of the active region. The upper end of the dielectric trench is located between the channel region and the drain region, and the upper end surface of the dielectric trench is flush with the upper surface of the active region. The lower end of the dielectric trench is tilted toward the drain region, and the lower end surface of the dielectric trench is higher than the lower surface of the active region.

[0006] In the above solution, the dielectric groove is in the shape of an inclined "1", a shape of a "7" with an inclined lower portion, or an inclined step shape.

[0007] In the above solution, the surface of the dielectric trench is covered with a doping layer, and the electrical polarity of the doping layer is opposite to that of the active region.

[0008] In the above solution, the angle α between the dielectric groove and the upper surface of the active layer has a value range of (0°, 90°).

[0009] Another power device with a reverse-inclined dielectric groove is a SOI LIGBT power device, comprising a substrate layer, a dielectric buried layer, an active layer, a channel region, an emitter region, a collector region, a base, an emitter and a collector; the dielectric buried layer is located above the substrate layer, and the emitter region is located above the dielectric buried layer; the channel region is embedded in the upper left part of the emitter region, the emitter region is embedded in the upper left part of the channel region, and the collector region is embedded in the upper right part of the emitter region; the base is located above the channel region and is connected to the emitter region, the channel region and the emitter region; the emitter is located above the emitter region and is connected to the emitter; the collector is located above the collector region and is connected to the collector region; the difference is that it also includes a dielectric groove formed by a semiconductor dielectric material; the dielectric groove is reversely inclined and arranged in the middle of the emitter region; the upper end of the dielectric groove is located between the channel region and the collector region, and the upper end surface of the dielectric groove is flush with the upper surface of the emitter region; the lower end of the dielectric groove is inclined toward the collector region, and the lower end surface of the dielectric groove is higher than the lower surface of the emitter region.

[0010] In the above solution, the dielectric groove is in the shape of an inclined "1", a shape of a "7" with an inclined lower portion, or an inclined step shape.

[0011] In the above solution, the surface of the dielectric trench is covered with a doping layer, and the electrical polarity of the doping layer is opposite to that of the active region.

[0012] In the above solution, the angle α between the dielectric groove and the upper surface of the active layer has a value range of (0°, 90°).

[0013] Compared with the prior art, the present invention has the following characteristics:

[0014] 1. The reverse-inclined dielectric groove blocks the movement of carriers along the surface toward the source. The carriers can only move downward toward the outside of the drain, and then turn back toward the source at the bottom of the active layer, forming a folded voltage-resistant path. This significantly increases the lateral voltage-resistant length of the device and can solve the technical problem of reducing the surface length of the device and improving the voltage resistance. Under the longitudinal blocking effect of the reverse-inclined dielectric groove, the carriers first tilt toward the outside of the drain and then move vertically downward. The longitudinal voltage-resistant path is improved, and as the inclination angle of the dielectric groove increases, the longitudinal voltage-resistant path is further improved. Under the combined effect of the above two aspects, the blocking characteristics of the device are significantly improved.

[0015] 2. The reverse-sloped dielectric trench can be formed on the basis of the traditional power device structure by combining silicon wafer tilted deep trench etching and dielectric filling. This process step is fully compatible with CMOS / SOI technology and the process is simple.

[0016] 3. The inverted doping layer formed outside the dielectric groove can improve the body electric field distribution and reduce the electric field concentration phenomenon at the corner of the dielectric groove, which is particularly suitable for the design of high-voltage power devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of a power device with reverse-inclined dielectric slots.

[0018] Figure 2 Schematic diagram of the structure of another power device with reverse-inclined dielectric slots.

[0019] Figure 3 Schematic diagram of the structure of another power device with reverse-inclined dielectric grooves.

[0020] Figure 4 Schematic diagram comparing the voltage-withstand paths of a conventional power device and the power device of the present invention, (a) conventional power device, (b) power device of the present invention.

[0021] Numbers in the figure: 1 substrate layer; 2, buried dielectric layer; 3, active layer; 4, channel region; 5, source region / emitter region; 6, drain region / collector region; 7, gate / base; 8, source / emitter; 9, drain / collector; 10, dielectric groove; 11, doping layer. DETAILED DESCRIPTION

[0022] To make the objectives, technical solutions, and advantages of the present invention more clearly understood, the present invention is further described below in detail with reference to specific examples and the accompanying drawings. It should be noted that directional terms mentioned in the examples, such as "upper," "lower," "center," "left," "right," "front," and "back," are merely references to the directions in the accompanying drawings. Therefore, the directions used are for illustrative purposes only and are not intended to limit the scope of protection of the present invention.

[0023] SOI power devices mainly include two types: SOI LDMOS (Lateral Double Diffused MOS) and SOI LIGBT (Lateral Insulated Gate Bipolar Transistor).

[0024] A conventional SOI LDMOS power device primarily consists of a substrate layer 1, a buried dielectric layer 2, an active layer 3, a channel region 4, a source region 5, a drain region 6, a gate 7, a source electrode 8, and a drain electrode 9. The buried dielectric layer 2 is located above the substrate layer 1, and the active region 5 is located above the buried dielectric layer 2. The channel region 4 is embedded in the upper left portion of the active region 5, the source region 5 is embedded in the upper left portion of the channel region 4, and the drain region 6 is embedded in the upper right portion of the active region 5. The gate 7 is located above the channel region 4 and is connected to the source region 5, the channel region 4, and the active region 5. The source electrode 8 is located above the source region 5 and is connected to the source electrode 8. The drain electrode 9 is located above the drain region 6 and is connected to the drain region 6.

[0025] A conventional SOI LIGBT power device is primarily composed of a substrate layer 1, a buried dielectric layer 2, an active layer 3, a channel region 4, an emitter region 5, a collector region 6, a base 7, an emitter 8, and a collector 9. The buried dielectric layer 2 is located above the substrate layer 1, and the emitter region 5 is located above the buried dielectric layer 2. The channel region 4 is embedded in the upper left portion of the emitter region 5, the emitter region 5 is embedded in the upper left portion of the channel region 4, and the collector region 6 is embedded in the upper right portion of the emitter region 5. The base 7 is located above the channel region 4 and is connected to the emitter region 5, the channel region 4, and the emitter region 5. The emitter 8 is located above the emitter region 5 and is connected to the emitter 8. The collector 9 is located above the collector region 6 and is connected to the collector region 6.

[0026] In order to improve the voltage resistance performance of the existing SOI power device, the present invention adds a reverse-inclined dielectric groove 10 to the active area 5 of the existing SOI power device, wherein the angle α between the dielectric groove 10 and the upper surface of the active layer 3 is in the range of (0°, 90°). The dielectric groove 10 is formed of a semiconductor dielectric material, such as silicon dioxide, silicon nitride or aluminum oxide. The dielectric groove 10 is reversely inclined and arranged in the middle of the emitter area 5. The upper end of the dielectric groove 10 is located between the channel area 4 and the collector area 6, and the upper end surface of the dielectric groove 10 is flush with the upper surface of the emitter area 5. The lower end of the dielectric groove 10 is inclined toward the drain area 6 (SOI LIGBT) or the collector area 6 (SOILIGBT), and the lower end surface of the dielectric groove 10 is higher than the lower surface of the emitter area 5. The dielectric groove 10 only needs to form a reverse-inclined structure as a whole, and it can be in the shape of an inclined letter "1" ( Figure 1 ), the lower part of the 7-shaped slant ( Figure 2 ), or inclined stepped type, etc.

[0027] In order to further improve the body electric field distribution and reduce the electric field concentration phenomenon at the corner of the dielectric groove 10, the surface of the dielectric groove 10, that is, the surface of the portion embedded in the active area 5, is coated with a doping layer 11, such as Figure 3 As shown. The doped layer 11 is an inverted doped layer 11, and the electrical polarity of the doped layer 11 is opposite to that of the active region 5, that is, when the active region 5 is n-type, the doped layer 11 is p-type; when the active region 5 is p-type, the doped layer 11 is n-type. The inverted doped layer 11 and the active layer 3 compensate for each other's depletion, thereby increasing the optimized doping concentration of the active layer 3 and reducing the on-resistance; at the same time, the inverted doped layer 11 can also improve the body electric field distribution, reduce the high electric field at the corner of the dielectric groove 10, and improve the withstand voltage characteristics. The reverse-tilted dielectric groove 10 is used to easily introduce the inverted charge region into the active layer 3, that is, after the reverse-tilted deep groove etching of the silicon wafer, the deposition and diffusion doping processes are added. Therefore, it is particularly suitable for the design of high-voltage power devices and thick-film SOI devices.

[0028] Figure 4 Schematic diagram comparing the breakdown voltage paths of conventional power devices and the power device of the present invention, (a) conventional power device, (b) power device of the present invention. According to the breakdown voltage theory of semiconductor devices, the breakdown voltage is calculated by integrating the electric field along the length.

[0029] Transverse withstand voltage: For conventional SOI power devices, carriers move laterally along the upper surface of the active layer 3 toward the source electrode, and the lateral withstand voltage path is L dFor the SOI power device of the present invention, under the blocking effect of the reverse inclined dielectric groove 10, the carriers can only flow laterally toward the source 8 / emitter 8 along the AA-BB-CC path, and the lateral withstand voltage path is AA+BB+CC. It can be seen from this that the lateral withstand voltage length AA+BB+CC of the SOI power device of the present invention is much greater than the lateral withstand voltage length L of the conventional SOI power device. d The reason is that the reverse-tilted dielectric trench 10 folds the lateral withstand voltage length into three sections, changing the withstand voltage path and thus improving the lateral withstand voltage of the device. Furthermore, as the inclination angle of the dielectric trench 10 increases, the angle α decreases, further increasing the effective lateral withstand voltage length.

[0030] Longitudinal withstand voltage: For conventional SOI power devices, the longitudinal withstand voltage path is BB. For the SOI power device of the present invention, the longitudinal withstand voltage path changes due to the blocking effect of the reversely inclined dielectric trench 10, becoming AA+BB. This shows that the longitudinal withstand voltage length AA+BB of the SOI power device of the present invention is greater than the longitudinal withstand voltage length BB of conventional SOI power devices, thereby increasing the effective longitudinal withstand voltage length with a thinner active layer 3 thickness. Furthermore, as the inclination angle of the dielectric trench 10 increases and the angle α decreases, the effective longitudinal withstand voltage length further increases.

[0031] In summary, the present invention achieves voltage resistance through the reversely inclined dielectric groove 10. Its voltage resistance mechanism is used to increase the lateral voltage resistance length and the longitudinal voltage resistance length, while improving the electric field distribution. Through the combined effect of these two mechanisms, the overall voltage resistance of the device is improved.

[0032] It should be noted that although the embodiments of the present invention described above are illustrative, this is not a limitation of the present invention, and therefore the present invention is not limited to the above-mentioned specific embodiments. The SOI voltage-resistant structure with the reverse-inclined dielectric groove 10 described in the present invention can be applied to all mainstream SOI lateral power devices. The present invention is applied to high-voltage power devices or power integrated circuits to extend the effective lateral voltage-resistant path and the longitudinal voltage-resistant path, and its voltage resistance is greatly improved compared to that of conventional SOI devices. Without departing from the principles of the present invention, any other implementation methods obtained by those skilled in the art under the guidance of the present invention are deemed to be within the protection of the present invention.

Claims

1. A power device with a reverse-inclined dielectric groove, the power device being a SOIL DMOS power device, comprising a substrate layer (1), a dielectric buried layer (2), an active layer (3), a channel region (4), a source region (5), a drain region (6), a gate (7), a source electrode (8) and a drain electrode (9); the dielectric buried layer (2) is located above the substrate layer (1), and the active region (5) is located above the dielectric buried layer (2); the channel region (4) is embedded in the upper left portion of the active region (5), the source region (5) is embedded in the upper left portion of the channel region (4), and the drain region (6) is embedded in the upper right portion of the active region (5); the gate (7) is located above the channel region (4) and is connected to the source region (5), the channel region (4) and the active region (5); the source electrode (8) is located above the source region (5) and is connected to the source electrode (8); the drain electrode (9) is located above the drain region (6) and is connected to the drain region (6); and the characteristics are: The device further comprises a dielectric groove (10) formed of a semiconductor dielectric material; the dielectric groove (10) is arranged in a reversely inclined manner in the middle of the active area (5); the upper end of the dielectric groove (10) is located between the channel area (4) and the drain area (6), and the upper end surface of the dielectric groove (10) is flush with the upper surface of the active area (5); the lower end of the dielectric groove (10) is inclined toward the drain area (6), and the lower end surface of the dielectric groove (10) is higher than the lower surface of the active area (5).

2. The power device with reverse-sloped dielectric trench according to claim 1, wherein: The dielectric groove (10) is in an inclined "1" shape, a "7" shape with an inclined lower portion, or an inclined step shape.

3. The power device with reverse-sloped dielectric trench according to claim 1, wherein: The surface of the dielectric groove (10) is covered with a doping layer (11), and the electrical polarity of the doping layer (11) is opposite to that of the active region (5).

4. The power device with reverse-sloped dielectric trench according to claim 1, wherein: The value range of the included angle α between the dielectric groove (10) and the upper surface of the active layer (3) is (0°, 90°).

5. A power device with a reverse-sloped dielectric groove, the power device being SOI A LIGBT power device comprises a substrate layer (1), a dielectric buried layer (2), an active layer (3), a channel region (4), an emitter region (5), a collector region (6), a base (7), an emitter (8) and a collector (9); the dielectric buried layer (2) is located above the substrate layer (1), and the emitter region (5) is located above the dielectric buried layer (2); the channel region (4) is embedded in the upper left portion of the emitter region (5), the emitter region (5) is embedded in the upper left portion of the channel region (4), and the collector region (6) is embedded in the upper right portion of the emitter region (5); the base (7) is located above the channel region (4) and is connected to the emitter region (5), the channel region (4) and the emitter region (5); the emitter (8) is located above the emitter region (5) and is connected to the emitter (8); the collector (9) is located above the collector region (6) and is connected to the collector region (6); the device is characterized in that: The invention also includes a dielectric groove (10) formed by a semiconductor dielectric material; the dielectric groove (10) is arranged in a reverse tilt in the middle of the emitter region (5); the upper end of the dielectric groove (10) is located between the channel region (4) and the collector region (6), and the upper end surface of the dielectric groove (10) is flush with the upper surface of the emitter region (5); the lower end of the dielectric groove (10) is tilted toward the collector region (6), and the lower end surface of the dielectric groove (10) is higher than the lower surface of the emitter region (5).

6. The power device with reverse-sloped dielectric trench according to claim 5, wherein: The dielectric groove (10) is in an inclined "1" shape, a "7" shape with an inclined lower portion, or an inclined step shape.

7. The power device with reverse-sloped dielectric trench according to claim 5, wherein: The surface of the dielectric groove (10) is covered with a doping layer (11), and the electrical polarity of the doping layer (11) is opposite to that of the active region (5).

8. The power device with reverse-sloped dielectric trench according to claim 5, wherein: The value range of the included angle α between the dielectric groove (10) and the upper surface of the active layer (3) is (0°, 90°).

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