ADDRESS ALLOCATION METHOD, SYSTEM, COMPUTER DEVICE AND STORAGE MEDIUM

Abstract

The present application is applicable to the field of battery management technology, and provides an address allocation method, system, computer equipment and storage medium, which is intended to achieve automatic address allocation to type B devices using type A devices, and improve address allocation efficiency. When the method of the present application is applied to type A devices, it mainly includes: sending a trigger signal to the target type B device through a trigger output interface, and sending a target address to be allocated to the communication bus through a communication bus interface, so that the target type B device that receives the trigger signal obtains the target address to be allocated from the communication bus; receiving the allocated address fed back by the target type B device through the communication bus, the allocated address is formed by assigning an allocated mark to the target type B device after successfully recording the target address to be allocated and feeding it back to the communication bus; stopping sending the target address to be allocated to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target type B device through the trigger output interface.

Description

Technical Field

[0001] The present application belongs to the field of battery management technology, and in particular, relates to an address allocation method, system, computer device and storage medium. Background Art

[0002] Battery energy storage systems are currently widely used in household life, industrial production, power transportation and other industries. One of the technical cores of battery energy storage systems is their controller management scheme. Since battery energy storage systems often include multiple levels of management of battery packs, networking and communication are usually carried out according to a multi-level architecture. For example, large-scale battery energy storage systems usually use a three-level architecture to locally network their battery energy storage management controllers; among them, the top-level battery energy storage management controller is called the master controller, which communicates with the master controllers of several battery clusters in the second layer, and the number of master controllers managed by a master controller is usually more than 10; and within each battery cluster, each master controller communicates with the slave controllers of multiple battery packs in the third layer, and the number of slave controllers managed by each master controller is usually more than 10. It can be seen that the number of battery energy storage management controllers in large-scale battery energy storage systems can reach more than 100, and accurate address allocation for local networking has become an important part of the normal and stable operation of battery energy storage systems.

[0003] However, the prior art solution for assigning addresses to each battery pack in the battery energy storage system for local area networking relies on the operator to manually set the address through a DIP switch. A multi-bit DIP switch is used on the operation panel of each battery pack, and the operator needs to operate the battery energy storage system with power on, that is, the operator needs to set a different binary number for each battery pack's multi-bit DIP switch to assign the network address. For the operator, inputting dozens to hundreds of binary numbers is prone to errors, which is inefficient and dangerous to operate with power on. Summary of the invention

[0004] The purpose of the present application is to provide an address allocation method, system, computer equipment and storage medium, which aims to realize the automatic allocation of addresses to type B devices using type A devices, improve the efficiency of address allocation, reduce the error rate of address allocation, and eliminate the need for operators to operate under power.

[0005] In a first aspect, the present application provides an address allocation method, applied to a type A device, comprising:

[0006] Sending a trigger signal to a target type B device through a trigger output interface, and sending a target address to be assigned to a communication bus through a communication bus interface, so that the target type B device that receives the trigger signal obtains the target address to be assigned from the communication bus;

[0007] receiving an allocated address fed back by the target type B device through the communication bus, wherein the allocated address is formed by the target type B device successfully recording the target address to be allocated and assigning an allocated mark to it, and feeding it back to the communication bus;

[0008] Stop sending the target address to be assigned to the communication bus through the communication bus interface, and stop sending the trigger signal to the target type B device through the trigger output interface.

[0009] Optionally, before sending a trigger signal to the target type B device through the trigger output interface and sending a target address to be assigned to the communication bus through the communication bus interface, the method further includes:

[0010] Determine the number N of type B devices to which the type A device is respectively connected via the communication bus, the target type B device being one of the N type B devices, where N is a positive integer greater than 1;

[0011] Obtain K addresses to be allocated, where K is a positive integer equal to or greater than N;

[0012] One address to be allocated is selected from the K addresses to be allocated as a target address to be allocated.

[0013] Optionally, the K addresses to be allocated are stored in a first address container, and after receiving the allocated address fed back by the target type B device via the communication bus, the method further includes:

[0014] The allocated addresses are placed in a preset second address container, and the initial state of the second address container is that no allocated addresses are stored.

[0015] Optionally, the type A device is connected only to the target type B device via the trigger interface;

[0016] After stopping sending the target address to be assigned to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target type B device through the trigger interface, the method further includes:

[0017] Sending a new target address to be allocated to the communication bus through the communication bus interface, wherein the new target address to be allocated is an address to be allocated selected from the first address container, so that the new target type-B device that receives the trigger signal obtains the new target address to be allocated from the communication bus;

[0018] receiving a new allocated address fed back by the new target type B device through the communication bus, wherein the new allocated address is formed by assigning an allocated mark to the new target type B device after successfully recording the new target address to be allocated and feeding it back to the communication bus;

[0019] Stop sending the new target address to be allocated to the communication bus through the communication bus interface, and place the new allocated address in the preset second address container.

[0020] Optionally, after stopping sending the new target address to be allocated to the communication bus through the communication bus interface, the method further includes:

[0021] Determining whether the number of allocated addresses stored in the second address container is equal to or greater than N;

[0022] If the number of allocated addresses stored in the second address container is equal to or greater than N, then the process ends;

[0023] If the number of allocated addresses stored in the second address container is less than N, the step of sending a new target address to be allocated to the communication bus through the communication bus interface is triggered.

[0024] In a second aspect, the present application provides another address allocation method applied to a type B device, comprising:

[0025] When a trigger signal is received through the trigger input interface, the communication bus interface is enabled and a target address to be assigned is obtained from the communication bus to which the communication bus interface is connected;

[0026] The target address to be allocated is used as the address of the type B device itself.

[0027] Optionally, after applying the target address to be allocated as the address of the type B device itself, the method further includes:

[0028] Assigning an allocated mark to the target address to be allocated to obtain an allocated address;

[0029] Feeding back the allocated address to the communication bus;

[0030] When the target address to be assigned cannot be obtained from the communication bus interface, the output feedback of the assigned address to the communication bus interface is stopped, the trigger input interface is closed, and the trigger output interface is started to output a trigger signal externally.

[0031] Optionally, after starting its own trigger output interface to output a trigger signal externally, the method further includes:

[0032] When the allocated address is acquired through the communication bus interface, the trigger output interface is stopped from outputting a trigger signal to the outside.

[0033] In a third aspect, the present application provides an address allocation system, including:

[0034] a sending unit, configured to send a trigger signal to a target type B device via a trigger output interface, and to send a target address to be assigned to a communication bus via a communication bus interface, so that the target type B device receiving the trigger signal acquires the target address to be assigned from the communication bus;

[0035] A receiving unit, configured to receive an allocated address fed back by the target type B device through the communication bus, wherein the allocated address is formed by assigning an allocated mark to the target type B device after successfully recording the target address to be allocated and feeding it back to the communication bus;

[0036] A stopping unit is used to stop sending the target address to be assigned to the communication bus through the communication bus interface, and to stop sending the trigger signal to the target type B device through the trigger output interface.

[0037] Optionally, the system further includes:

[0038] a determining unit, configured to determine a number N of type B devices to which the type A device is respectively connected via the communication bus, the target type B device being one of the N type B devices, and N being a positive integer greater than 1;

[0039] An acquisition unit, used for acquiring K addresses to be allocated, where K is a positive integer equal to or greater than N;

[0040] As a unit, it is used to select one address to be allocated from the K addresses to be allocated as a target address to be allocated.

[0041] Optionally, the system further includes:

[0042] The placing unit is used to place the allocated address in a preset second address container, where the initial state of the second address container is that no allocated address is stored.

[0043] Optionally, the type A device is connected only to the target type B device via the trigger interface;

[0044] The system further comprises:

[0045] The sending unit is further used to send a new target address to be assigned to the communication bus through the communication bus interface, wherein the new target address to be assigned is an address to be assigned selected from the first address container, so that the new target type-B device that receives the trigger signal obtains the new target address to be assigned from the communication bus;

[0046] The receiving unit is further used to receive a new allocated address fed back by the new target type B device through the communication bus, wherein the new allocated address is formed by assigning an allocated mark to the new target type B device after successfully recording the new target address to be allocated and feeding it back to the communication bus;

[0047] The stopping unit is further used to stop sending the new target address to be allocated to the communication bus through the communication bus interface;

[0048] The placing unit is further used to place the new allocated address in the preset second address container.

[0049] Optionally, the system further includes:

[0050] a determining unit, configured to determine whether the number of allocated addresses stored in the second address container is equal to or greater than N;

[0051] an ending unit, configured to end the process if the number of allocated addresses stored in the second address container is equal to or greater than N;

[0052] A triggering unit is used for triggering the step of sending a new target address to be allocated to the communication bus through the communication bus interface if the number of allocated addresses stored in the second address container is less than N.

[0053] In a fourth aspect, the present application provides another address allocation system, including:

[0054] an enabling unit, configured to enable the communication bus interface and obtain a target address to be assigned from the communication bus to which the communication bus interface is connected when a trigger signal is received through the trigger input interface;

[0055] An application unit is used to apply the target address to be allocated as the address of the type B device itself.

[0056] Optionally, the system further includes:

[0057] a marking unit, configured to assign an allocated mark to the target address to be allocated, so as to obtain an allocated address;

[0058] A feedback unit, configured to feed back the allocated address to the communication bus;

[0059] A stopping unit, used for stopping outputting feedback of the allocated address to the communication bus interface when the target address to be allocated cannot be obtained from the communication bus interface;

[0060] A closing unit, used for closing the trigger input interface;

[0061] The start unit is used to start its own trigger output interface to output a trigger signal to the outside.

[0062] Optionally, the system further includes:

[0063] The stopping unit is further used to stop the trigger output interface from outputting a trigger signal externally when the allocated address is acquired through the communication bus interface.

[0064] In a fifth aspect, the present application provides a computer device, including:

[0065] Processor, memory, bus, input and output interface, network interface;

[0066] The processor is connected to the memory, the input / output interface, and the network interface via the bus;

[0067] The memory stores a program;

[0068] When the processor executes the program stored in the memory, the address allocation method as described in any one of the first aspect or the second aspect is implemented.

[0069] In a sixth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores instructions, and when the instructions are executed on a computer, the computer executes the address allocation method as described in any one of the first aspect or the second aspect.

[0070] In a seventh aspect, the present application provides a computer program product, which, when executed on a computer, enables the computer to execute the address allocation method as described in any one of the first or second aspects above.

[0071] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0072] In the address allocation method of this embodiment, the Type A device sends a trigger signal to the target Type B device through the trigger output interface, and sends a target address to be allocated to the communication bus through the communication bus interface, so that the target Type B device that receives the trigger signal obtains the target address to be allocated from the communication bus, and only the target Type B device that receives the trigger signal can obtain the target address to be allocated from the communication bus; and after the target Type B device successfully records the target address to be allocated, it assigns an allocated mark to it to form an allocated address and feeds back to the communication bus, the Type A device can know that the Type B device has successfully obtained the address required for the local area network based on the received allocated address, and then the Type A device can stop sending the target address to be allocated to the communication bus through the communication bus interface, and the Type A device stops sending the trigger signal to the target Type B device through the trigger output interface, thereby completing the address allocation to the target Type B device, without the need for operators to operate under power, thereby improving the address allocation efficiency and reducing the error rate of address allocation. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 This is a flow chart of an embodiment of the address allocation method of the present application applied to a type A device;

[0074] Figure 2 This is a flowchart of another embodiment of the address allocation method of the present application applied to a Type B device;

[0075] Figure 3 This is a flow chart of an embodiment of the address allocation method of the present application applied between a type A device and a plurality of type B devices;

[0076] Figure 4 A schematic diagram of the structure of an embodiment of the address allocation system of the present application;

[0077] Figure 5 This is a schematic diagram of the structure of another embodiment of the address allocation system of the present application;

[0078] Figure 6 A schematic diagram of the structure of an embodiment of a computer device of the present application;

[0079] Figure 7 This is a schematic diagram of the connection between one Type A device and four Type B devices according to an embodiment of the present application. DETAILED DESCRIPTION

[0080] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0081] It should be noted that when the controller of the battery energy storage system for battery energy storage management communicates in a local area network based on a multi-level architecture, a controller in the upper level that performs local area networking needs to be connected to all controllers in the next level that it controls. That is to say, this embodiment takes a type A device as a master controller for local area networking in the upper level, and N type B devices as slave controllers of the next level connected to the type A device as an example. The application can be extended to the allocation of networking addresses of any two adjacent levels of local area networking communication in a multi-level architecture.

[0082] See also Figure 7 , Figure 7A connection diagram of one Type A device as a master controller and four Type B devices as slave controllers (this embodiment is described by taking N equal to 4 as an example, and in actual applications N is usually greater than 10) is shown. This embodiment mainly includes: Type A device 10, Type B device 21, Type B device 22, Type B device 23, Type B device 24, communication bus 30, trigger signal line 41, trigger signal line 42, trigger signal line 43, trigger signal line 44, and power supply line 50; wherein, Type A device 10 should have at least the following interfaces: a bus interface AC connected to the communication bus 30, a trigger output interface AT connected to the connected Type B device 21, a power supply interface for controlling power supply to all Type B devices at the next level, etc.; each Type B device has at least the following interfaces: a power supply interface, a bus interface BC connected to the communication bus 30, a trigger input interface BR for receiving a trigger signal, a trigger output interface BT for outputting a trigger signal, etc. Specifically, the communication bus 30 should be a duplex communication cable, and the communication bus 30 establishes communication connections between the bus interface AC of the type A device and the bus interface BC of the type B device 21, the bus interface BC of the type B device 22, the bus interface BC of the type B device 23, and the bus interface BC of the type B device 24. The trigger output interface AT of the type A device 10 is connected to the trigger input interface BR of the adjacent type B device 21 through the trigger signal line 41; the trigger output interface BT of the type B device 21 is connected to the trigger input interface BR of another adjacent type B device 22 through the trigger signal line 42, the trigger output interface BT of the type B device 22 is connected to the trigger input interface BR of another adjacent type B device 23 through the trigger signal line 43, and the trigger output interface BT of the type B device 23 is connected to another adjacent type B device 24 through the trigger signal line 44; this embodiment only shows 4 type B devices, if there are more type B devices in actual application, the connection between the trigger input interface and the trigger output interface can be carried out by analogy. The power supply interface of the type A device 10 is connected to the power supply interface of the type B device 21, the power supply interface of the type B device 22, the power supply interface of the type B device 23, and the power supply interface of the type B device 24 through the power supply line 50. When the type A device 10 is started, the type B device 21, the type B device 22, the type B device 23, and the type B device 24 can be powered on through the power supply line 50. In some embodiments, the type A device may also have a media output interface, which is connected to a display to display some information such as the progress of address allocation in this embodiment.

[0083] Based on the above understanding, please refer to Figure 1 , an embodiment of the address allocation method of the present application applied to a type A device includes:

[0084] 101. Send a trigger signal to a target type B device via a trigger output interface, and send a target address to be assigned to a communication bus via a communication bus interface, so that the target type B device receiving the trigger signal obtains the target address to be assigned from the communication bus.

[0085] Specifically by Figure 7 It can be seen that since the type A device 10 has only one trigger output interface AT connected to the type B device 21, the target type B device in this step is equivalent to Figure 7 In the type B device 21 shown, the type A device 10 sends a trigger signal to the type B device 21 through the trigger output interface AT, and sends a target address to be assigned to the communication bus 30 through the communication bus interface AC. For example, the target address to be assigned is a pre-set string of binary numbers. The type B device of this embodiment is configured to obtain the target address to be assigned from the communication bus 30 only when a trigger signal is received from the trigger input interface BR, so as to ensure that the target address to be assigned is uniquely assigned to a target type B device.

[0086] 102. Receive the allocated address fed back by the target Type B device through the communication bus. The allocated address is formed by assigning an allocated mark to the target Type B device after successfully recording the target address to be allocated and then feeding it back to the communication bus.

[0087] After the target address to be allocated of the Type A device is acquired by the target Type B device in step 101, the target Type B device will record the target address to be allocated and set it as its own local networking address, and assign an allocated mark to the target address to be allocated, thereby forming the target address to be allocated as an allocated address. The target Type B device will feed back the allocated address to the communication bus 30 through its own bus interface BC, and the Type A device can then receive the allocated address fed back by the target Type B device through the communication bus.

[0088] 103. Stop sending the target address to be assigned to the communication bus through the communication bus interface, and stop sending the trigger signal to the target type B device through the trigger interface.

[0089] When the Type A device receives the allocated address fed back by the target Type B device through the communication bus in step 102, it proves that the local networking address allocated through the communication bus has been used by the target Type B device. It can stop sending the target address to be allocated to the communication bus through the communication bus interface, and stop sending the trigger signal to the target Type B device through the trigger interface. At this time, the address allocation to the target Type B device is completed without the need for an operator to operate under power, thereby improving the efficiency of address allocation and reducing the error rate of address allocation.

[0090] Based on the above understanding, please refer to Figure 2 , an embodiment of the address allocation method of the present application applied to a type B device includes:

[0091] 201. When a trigger signal is received through a trigger input interface, a communication bus interface is enabled and a target address to be assigned is obtained.

[0092] The type B device of this embodiment is a target type B device connected to the trigger output interface AT of the type A device through a trigger signal line, for example Figure 7 The type B device 21 shown. When the type B device receives a trigger signal through the trigger input interface, the communication bus interface is enabled and the target address to be assigned is obtained. That is to say, the type B device in this embodiment does not need to care whether the trigger signal received by its own trigger input interface comes from the type A device. As long as the trigger signal is received through the trigger input interface, the communication bus interface can be enabled and the target address to be assigned can be obtained from the communication bus connected to the communication bus interface. Figure 7 The connection relationship between the type A device and the type B device is shown, and the trigger signal is stimulated from the type A device to the type B device one by one.

[0093] 202. Apply the target address to be allocated as the address of the Type B device itself.

[0094] After the Type B device obtains the target address to be assigned in step 201, it can directly apply the target address to be assigned as the address for the local networking of the Type B device itself. It can be seen that the Type B device only needs to obtain and apply the target address to be assigned from the communication bus based on the trigger signal, without the need for an operator to operate under power, thereby improving the efficiency of address allocation and reducing the error rate of address allocation.

[0095] For more details, see Figure 3 , the address allocation method of the present application is applied to an embodiment between a type A device and multiple type B devices. In this embodiment, the target type B device represents a type B device (such as Figure 7 The type B device 21 shown in the figure, the type B device N represents the Nth type B device, and the Nth type B device represents another type B device connected to the trigger output interface BT of the target type B device (or other type B devices) through a trigger signal line. For details, please refer to the following description of this embodiment, including:

[0096] 301. Type A device determines the number N of Type B devices respectively connected via a communication bus.

[0097] Please combine Figure 7When the Type A device 10 is started, the Type A device 10 will open its trigger output interface AT, bus interface AC, and power supply interface. Then the Type A device can supply power to all Type B devices connected to the power supply line 50 through the power supply interface and start them up. After starting, the Type B device will open its own trigger input interface BR, and close its own trigger output interface BT and its own bus interface BC. At this time, the Type A device sets itself as the signal source of the trigger signal, and determines the number N of Type B devices connected respectively through the communication bus. N should be a positive integer greater than or equal to 2, that is, N should be a positive integer greater than 1. The number of the Type B devices can be determined by the operator according to the number of Type B devices connected to the communication bus of the Type A device on site, for example Figure 7 There are 4 Type B devices shown, so N is equal to 4.

[0098] 302. Type A device obtains K addresses to be allocated and stores them in a first address container.

[0099] In order to allocate different local networking addresses to the N type B devices determined in step 301, the type A device needs to obtain K addresses to be allocated in this step, where K is a positive integer greater than or equal to N, that is, the type A device has at least the same number of addresses to be allocated for local networking as the number of type B devices, so as to ensure that each type B device can be allocated an address to be allocated for local networking. The local networking address of the type A device is usually allocated by the device at the upper level according to a similar process in this embodiment; or when the type A device is the highest level device, the local networking address of the type A device can be directly input or set by the operator. The K addresses to be allocated in this embodiment can be generated by a pre-set rule algorithm, or the operator can directly import other K addresses to be allocated, for example, the so-called address to be allocated is a string of binary numbers composed of "0" and "1". In order to facilitate the acquisition of the allocation process of the addresses to be allocated by the type A device in the subsequent steps, the K addresses to be allocated can be stored in the first address container of the type A device in this step.

[0100] 303. The type A device selects one address to be allocated from the K addresses to be allocated as a target address to be allocated.

[0101] Specifically, the type A device selects one address to be allocated from the K addresses to be allocated in the first address container in step 302 as a target address to be allocated.

[0102] 304. Type A device sends a trigger signal through the trigger output interface.

[0103] After the Type A device sets itself as the signal source of the trigger signal in step 301, it will actively send a trigger signal to the trigger input interface BR of the target Type B device through the trigger output interface AT. Since the trigger input interface BR of the target Type B device has been opened when it is powered on in step 301, the target Type B device can successfully receive the trigger signal sent by the Type A device. Figure 7 The type B device 21 is shown.

[0104] 305. Type A device sends a target address to be assigned to the communication bus through the communication bus interface.

[0105] After obtaining the target address to be allocated in step 303, the type A device immediately sends the target address to be allocated to the communication bus through its own communication bus interface. Specifically, the type A device periodically transmits the target address to the communication bus to keep the target address to be allocated in the communication bus.

[0106] 306. The target type B device enables the communication bus interface and obtains the target address to be assigned from the communication bus.

[0107] After the target type B device receives the trigger signal through the trigger input interface BR in step 305 , the target type B device enables the communication bus interface BC and obtains the target address to be assigned transmitted by the type A device from the communication bus 30 .

[0108] 307. The target type B device applies the target address to be assigned as its own address.

[0109] The target type B device can directly use the target address to be allocated obtained in step 306 as the address for its own local networking, thus realizing the address allocation process from the type A device to a target type B device.

[0110] 308. The target type B device assigns an allocated mark to the target address to be allocated, thereby obtaining an allocated address.

[0111] After the target type B device applies the target address to be allocated as its own address in step 307, it is also necessary to assign an allocated mark to the target address to be allocated, so as to obtain the address with the allocated mark, which is called the allocated address. For example, the binary number corresponding to the target address to be allocated is "0000...1101", where "..." indicates that several bits of "0" and / or "1" are omitted. Then, assuming that the first 4 binary digits of the target address to be allocated are marks used to distinguish "allocated address" from "address to be allocated", the several binary digits after the 4-bit binary mark are the real addresses used for local networking, where "0000" represents that the address belongs to the "address to be allocated" state, and "1111" represents that the address belongs to the "unallocated address" state; then the target type B device can change the binary number "0000...1101" corresponding to the target address to be allocated to "1111...1101", thereby changing the state of the target address to be allocated to the allocated address, and retaining the address of the target type B device for local networking. It is worth noting that in practical applications, different positions and numbers of binary digits in the target address to be allocated can be selected as marks indicating the address status according to actual needs, and no limitation is made here.

[0112] 309. The target type B device feeds back the allocated address to the communication bus.

[0113] The target type B device can transmit the allocated address obtained in step 308 to the communication bus 30 through its own bus interface BC. Since the communication bus 30 supports duplex communication, the communication bus 30 can accommodate the target address to be allocated sent by the type A device and the allocated address fed back by the target type B device in this step.

[0114] 310. The Type A device stops sending the target address to be assigned to the communication bus through the communication bus interface, and stops sending the trigger signal through the trigger output interface.

[0115] When the Type A device detects that an allocated address is fed back in the communication bus 30 through its bus interface AC after step 309, it proves that the target address to be allocated sent by itself to the communication bus in step 305 has been acquired and applied. In this step, the Type A device can stop sending the target address to be allocated to the communication bus 30 through the communication bus interface AC, and can stop sending the trigger signal through the trigger output interface AT, thereby ending its identity as the signal source of the trigger signal.

[0116] 311. Type B device stops outputting the assigned address to the communication bus interface and closes the trigger input interface.

[0117] After the Type B device enables the communication bus interface BC in step 306, it can monitor the existence of the target address to be assigned in the communication bus 30 through its bus interface BC. When the Type A device stops sending the target address to be assigned to the communication bus 30 through the communication bus interface AC in step 310, the Type B device can detect the disappearance of the target address to be assigned in the communication bus 30. At this time, the Type B device stops outputting feedback of the assigned address to the communication bus interface BC and the communication bus 30, and closes the trigger input interface BR.

[0118] 312. Type B device sends a trigger signal through the trigger output interface.

[0119] After step 311, the Type B device has completed the address acquisition and application of the local network, and needs to switch roles to act as the signal source of the trigger signal, and enable its own trigger output interface BT to send a trigger signal to the next Type B device connected to it. The next Type B device that receives the trigger signal will go through a similar process as the target Type B device above to complete the address acquisition and application required for its own local network. For example, the next Type B device is Figure 7 The type B device 22 shown in the figure, when the type B device 22 undergoes a process similar to the target type B device mentioned above and completes the acquisition and application of the address required for its own local networking, the type B device 22 will also trigger this step to enable its own trigger output interface BT to send a trigger signal to the next type B device 23 connected to it, and the cycle will continue until the trigger signal sent by the type B device 24 enabling its own trigger output interface BT no longer responds.

[0120] 313. Place the allocated address in a preset second address container, where the second address container is initially in a state where no allocated address is stored.

[0121] After the type A device detects that an allocated address is fed back in the communication bus 30 through its bus interface AC in step 309, the type A device places the allocated address in a preset second address container for storage in this step. The initial state of the second address container is that no allocated address is stored, so as to facilitate the subsequent steps to count the number of allocated addresses in the second address container. Further, in order to ensure the distinction between the allocated "to be allocated addresses" in the first address container of the type A device and other unallocated "to be allocated addresses", this step can also delete or mark the allocated "to be allocated addresses" according to the allocated addresses in the second container to avoid accidental reuse.

[0122] 314. The type A device determines whether the number of allocated addresses stored in the second address container is equal to or greater than N.

[0123] After the Type A device adds the allocated addresses to the second address container in step 313, the Type A device needs to further determine whether the number of allocated addresses stored in the second address container is equal to or greater than N, so as to determine whether the Type A device has transmitted the same number of addresses for local networking as the Type B device to the communication bus 30 through the bus interface AC; when the Type A device determines that the number of allocated addresses stored in the second address container is equal to or greater than N, it proves that the Type A device has transmitted the same number of addresses for local networking as the Type B device to the communication bus 30 through the bus interface AC, and at this time all the Type B devices have addresses for local networking; when the Type A device determines that the number of allocated addresses stored in the second address container is less than N, it proves that the Type A device has not transmitted the same number of addresses for local networking as the Type B device to the communication bus 30 through the bus interface AC, and at this time some Type B devices still do not have addresses for local networking.

[0124] 315. End.

[0125] When the Type A device determines in step 314 that it has transmitted the same number of addresses for local networking as the Type B device to the communication bus 30 through the bus interface AC, at this time all the Type B devices already have addresses for local networking, and the Type A device has completed the allocation of networking addresses to all the Type B devices connected to itself through the communication bus 30, and can terminate the execution of the address allocation scheme of this embodiment.

[0126] 316. The type A device selects an address to be allocated from the first address container as a new target address to be allocated.

[0127] When the type A device determines in step 314 that it has not transmitted the same number of addresses for local networking as the type B device to the communication bus 30 through the bus interface AC, it proves that some type B devices still do not have addresses for local networking. Then, the type A device selects an address to be allocated (not selected in step 303) from the first address container as the new target address to be allocated in this step.

[0128] 317. Type A device sends a new target address to be assigned to the communication bus through the communication bus interface.

[0129] The Type A device sends the new target address to be assigned selected in step 316 to the communication bus through the communication bus interface. The execution of this step is similar to that of step 305. The Type A device returns to execute step 305 in this step.

[0130] 318. One of the N type B devices performs a process similar to part or all of steps 306, 307, 308, 309, 311, 312, and 320.

[0131] After the Type A device sends the new target address to be assigned to the communication bus through the communication bus interface in step 317, the trigger signal is sent by the Type B device that has completed the address acquisition and application of the local networking as a signal source, and its own trigger output interface BT is enabled to send a trigger signal to the next Type B device connected to it. At this time, the Type B device N that receives the trigger signal will undergo a process similar to the above-mentioned target Type B device, that is, Type B device N executes all processes similar to steps 306, 307, 308, 309, 311, 312, and 320. When Type B device N happens to be the last one, that is, it fails to detect the assigned address through the bus interface BC after executing step 312, then the last Type B device N does not need to and cannot execute step 320, but all N Type B devices can complete the acquisition and application of the address required for their own local networking.

[0132] 319. One of the N Type B devices feeds back the new allocated address to the communication bus.

[0133] The execution of this step is similar to step 309, and the repeated parts are not repeated here. It is equivalent to treating the new allocated address as the allocated address of step 309, thereby triggering the type A device to execute step 310 in sequence. It should be noted that at this time, the type B device N that has completed the acquisition and application of the address required for its own local networking will also see the allocated address through the communication bus monitoring. The target type B device just acts as the signal source of the trigger signal in this round of circulation, and the target type B device can monitor the allocated address through the bus interface BC.

[0134] 320. The target type B device stops the trigger output interface from outputting the trigger signal to the outside.

[0135] When the target Type B device acting as the signal source detects the assigned address through the communication bus, it can end its identity as the signal source of the trigger signal, stop the trigger output interface BT from outputting the trigger signal to the outside, and complete the transmission of the trigger signal. At this time, the Type B device N that has completed the acquisition and application of the address required for its own local networking takes on the responsibility of the target Type B device and executes step 312, and repeats this cycle until the entire cycle reaches step 315.

[0136] It can be seen that the embodiment of the address allocation method of the present application can enable the Type A device as the main controller and the Type B device as the slave controller to automatically allocate addresses one by one, unlike the prior art that requires operator input and power-on work, thereby improving the address allocation efficiency and reducing the error rate of address allocation; and the display can also be connected through the media output interface of the Type A device to display the ratio of the number of allocated addresses stored in its second address container to the number N of Type B devices, that is, the display shows the progress of the Type A device allocating addresses to the Type B device through the communication bus.

[0137] The above embodiment describes the address allocation method of the present application. The following describes the address allocation system of the present application. Figure 4 , an embodiment of the address allocation system of the present application includes:

[0138] The sending unit 401 is used to send a trigger signal to the target type B device through the trigger output interface, and send a target address to be assigned to the communication bus through the communication bus interface, so that the target type B device that receives the trigger signal obtains the target address to be assigned from the communication bus;

[0139] A receiving unit 402 is used to receive an allocated address fed back by the target type B device through the communication bus, wherein the allocated address is formed by the target type B device successfully recording the target address to be allocated and assigning an allocated mark to it, and then feeding it back to the communication bus;

[0140] The stopping unit 403 is used to stop sending the target address to be assigned to the communication bus through the communication bus interface, and stop sending the trigger signal to the target type B device through the trigger output interface.

[0141] Optionally, the system further includes:

[0142] A determination unit 404 is configured to determine the number N of type B devices to which the type A device is respectively connected via the communication bus, the target type B device being one of the N type B devices, and N being a positive integer greater than 1;

[0143] An acquisition unit 405 is used to acquire K addresses to be allocated, where K is a positive integer equal to or greater than N;

[0144] As unit 406, it is used to select one address to be allocated from the K addresses to be allocated as a target address to be allocated.

[0145] Optionally, the system further includes:

[0146] The placing unit 407 is configured to place the allocated address in a preset second address container, wherein the initial state of the second address container is that no allocated address is stored.

[0147] Optionally, the type A device is connected only to the target type B device via the trigger interface;

[0148] The system further comprises:

[0149] The sending unit 401 is further configured to send a new target address to be assigned to the communication bus through the communication bus interface, wherein the new target address to be assigned is an address to be assigned selected from the first address container, so that the new target type-B device that receives the trigger signal obtains the new target address to be assigned from the communication bus;

[0150] The receiving unit 402 is further configured to receive a new allocated address fed back by the new target type B device through the communication bus, wherein the new allocated address is formed by the new target type B device successfully recording the new target address to be allocated and assigning an allocated mark to it, and then feeding it back to the communication bus;

[0151] The stopping unit 403 is further used to stop sending the new target address to be allocated to the communication bus through the communication bus interface;

[0152] The placing unit 407 is further configured to place the new allocated address in the preset second address container.

[0153] Optionally, the system further includes:

[0154] A judging unit 408, configured to judge whether the number of allocated addresses stored in the second address container is equal to or greater than N;

[0155] An ending unit 409, configured to end the process if the number of allocated addresses stored in the second address container is equal to or greater than N;

[0156] The trigger unit 410 is configured to trigger the step of sending a new target address to be allocated to the communication bus through the communication bus interface if the number of allocated addresses stored in the second address container is less than N.

[0157] The operations performed by the address allocation system in this embodiment are similar to those described above. Figure 1 , Figure 3 The operations performed by the type A device in the embodiment are similar and will not be described in detail here.

[0158] See also Figure 5 , another embodiment of the address allocation system of the present application includes:

[0159] An enabling unit 501 is used to enable the communication bus interface and obtain a target address to be allocated from the communication bus to which the communication bus interface is connected when a trigger signal is received through the trigger input interface;

[0160] The application unit 502 is used to apply the target address to be allocated as the address of the type B device itself.

[0161] Optionally, the system further includes:

[0162] A marking unit 503, configured to assign an allocated mark to the target address to be allocated, to obtain an allocated address;

[0163] A feedback unit 504, configured to feed back the allocated address to the communication bus;

[0164] A stopping unit 505 is used for stopping outputting feedback of the allocated address to the communication bus interface when the target address to be allocated cannot be obtained from the communication bus interface;

[0165] A closing unit 506, used to close the trigger input interface;

[0166] The start unit 507 is used to start its own trigger output interface to output a trigger signal to the outside.

[0167] Optionally, the system further includes:

[0168] The stopping unit 505 is further configured to stop the trigger output interface from outputting a trigger signal when the allocated address is acquired through the communication bus interface.

[0169] The operations performed by the address allocation system in this embodiment are similar to those described above. Figure 2 , Figure 3 The operations performed by the Type B device in the embodiment are similar and will not be described in detail here.

[0170] The computer device in the embodiment of the present application is described below. Figure 6 , an embodiment of the computer device in the embodiment of the present application includes:

[0171] The computer device 600 may include one or more processors (central processing units, CPU) 601 and a memory 602, in which one or more application programs or data are stored. Among them, the memory 602 is volatile storage or persistent storage. The program stored in the memory 602 may include one or more modules, and each module may include a series of instruction operations in the computer device. Furthermore, the processor 601 can be configured to communicate with the memory 602 to execute a series of instruction operations in the memory 602 on the computer device 600. The computer device 600 may also include: one or more wireless network interfaces 603, one or more input and output interfaces 604, and / or, one or more operating systems, such as HarmonyOS, Windows Server, Mac OS, Unix, Linux, FreeBSD, etc. The processor 601 can execute the aforementioned Figure 1 , Figure 2 and Figure 3 The operations performed in any of the illustrated embodiments will not be described in detail here.

[0172] In several embodiments provided in the embodiments of the present application, those skilled in the art should understand that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0173] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), disk or optical disk and other media that can store program code.

[0174] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions or improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. An address allocation method, characterized in that: Applicable to Type A devices, including: Sending a trigger signal to a target type B device through a trigger output interface, and sending a target address to be assigned to a communication bus through a communication bus interface, so that the target type B device that receives the trigger signal obtains the target address to be assigned from the communication bus; receiving an allocated address fed back by the target type B device through the communication bus, wherein the allocated address is formed by the target type B device successfully recording the target address to be allocated and assigning an allocated mark to it, and feeding it back to the communication bus; Stop sending the target address to be assigned to the communication bus through the communication bus interface, and stop sending the trigger signal to the target type B device through the trigger output interface; Before sending a trigger signal to the target type B device through the trigger output interface and sending a target address to be assigned to the communication bus through the communication bus interface, the method further includes: Determine the number N of type B devices to which the type A device is respectively connected via the communication bus, the target type B device being one of the N type B devices, where N is a positive integer greater than 1; Obtain K addresses to be allocated, where K is a positive integer equal to or greater than N; Selecting one address to be allocated from the K addresses to be allocated as a target address to be allocated; The K addresses to be allocated are stored in a first address container. After receiving the allocated address fed back by the target type B device via the communication bus, the method further includes: placing the allocated address in a preset second address container, wherein the initial state of the second address container is that no allocated address is stored; A display is connected via the media output interface of the type A device, so that the display displays the ratio of the number of allocated addresses stored in the second address container to the number N of the type B devices.

2. The address allocation method according to claim 1, characterized in that: The type A device is connected only to the target type B device via the trigger interface; After stopping sending the target address to be assigned to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target type B device through the trigger interface, the method further includes: Sending a new target address to be allocated to the communication bus through the communication bus interface, wherein the new target address to be allocated is an address to be allocated selected from the first address container, so that the new target type B device that receives the trigger signal obtains the new target address to be allocated from the communication bus; receiving a new allocated address fed back by the new target type B device through the communication bus, wherein the new allocated address is formed by the new target type B device successfully recording the new target address to be allocated and assigning an allocated mark to it, and feeding it back to the communication bus; Stop sending the new target address to be allocated to the communication bus through the communication bus interface, and place the new allocated address in the preset second address container.

3. The address allocation method according to claim 2, characterized in that: After stopping sending the new target address to be allocated to the communication bus through the communication bus interface, the method further includes: Determining whether the number of allocated addresses stored in the second address container is equal to or greater than N; If the number of allocated addresses stored in the second address container is equal to or greater than N, then end; If the number of allocated addresses stored in the second address container is less than N, the step of sending a new target address to be allocated to the communication bus through the communication bus interface is triggered.

4. An address allocation method, characterized in that: Applicable to a Type B device, wherein the Type B device is one of N Type B devices, wherein N is a positive integer greater than 1, including: When a trigger signal is received through the trigger input interface, the communication bus interface is enabled and a target address to be allocated is obtained from the communication bus to which the communication bus interface is connected, wherein the target address to be allocated is an address to be allocated selected by the type A device from K addresses to be allocated in the first address container, wherein K is a positive integer equal to or greater than N; Applying the target address to be allocated as the address of the type B device itself; After applying the target address to be allocated as the address of the type B device itself, the method further includes: Assigning an allocated mark to the target address to be allocated to obtain an allocated address; Feeding back the allocated addresses to the communication bus, so that the type A device places the allocated addresses in a preset second address container, the initial state of the second address container is that no allocated addresses are stored, and displaying the ratio of the number of allocated addresses stored in the second address container to the number N of the type B devices via a display connected to a media output interface of the type A device; When the target address to be assigned cannot be obtained from the communication bus interface, the output feedback of the assigned address to the communication bus interface is stopped, the trigger input interface is closed, and the trigger output interface is started to output a trigger signal externally; After starting the trigger output interface to output the trigger signal, the method further includes: When the allocated address is acquired through the communication bus interface, the trigger output interface is stopped from outputting a trigger signal to the outside.

5. An address allocation system, characterized in that: Applicable to Type A devices, including: a sending unit, configured to send a trigger signal to a target type B device via a trigger output interface, and to send a target address to be assigned to a communication bus via a communication bus interface, so that the target type B device receiving the trigger signal acquires the target address to be assigned from the communication bus; A receiving unit, configured to receive an allocated address fed back by the target type B device through the communication bus, wherein the allocated address is formed by assigning an allocated mark to the target type B device after successfully recording the target address to be allocated and feeding it back to the communication bus; a stopping unit, used for stopping sending the target address to be assigned to the communication bus through the communication bus interface, and stopping sending the trigger signal to the target type B device through the trigger output interface; The system further comprises: a determining unit, configured to determine a number N of type B devices to which the type A device is respectively connected via the communication bus, the target type B device being one of the N type B devices, and N being a positive integer greater than 1; An acquisition unit, used for acquiring K addresses to be allocated, where K is a positive integer equal to or greater than N; As a unit, used to select one address to be allocated from the K addresses to be allocated as a target address to be allocated; The system further comprises: A placing unit, used for placing the allocated address in a preset second address container, wherein the initial state of the second address container is that no allocated address is stored; The type A device is connected only to the target type B device via the trigger interface; The system further comprises: The sending unit is further used to send a new target address to be assigned to the communication bus through the communication bus interface, wherein the new target address to be assigned is an address to be assigned selected from the first address container, so that the new target type B device that receives the trigger signal obtains the new target address to be assigned from the communication bus; The receiving unit is further used to receive a new allocated address fed back by the new target type B device through the communication bus, wherein the new allocated address is formed by assigning an allocated mark to the new target type B device after successfully recording the new target address to be allocated and feeding it back to the communication bus; The stopping unit is further used to stop sending the new target address to be allocated to the communication bus through the communication bus interface; The placing unit is further used to place the new allocated address in a preset second address container; The sending unit is further configured to connect to a display via a media output interface of the type A device, so that the display displays a ratio of the number of allocated addresses stored in the second address container to the number N of the type B devices.

6. An address allocation system, characterized in that: Applicable to a Type B device, wherein the Type B device is one of N Type B devices, wherein N is a positive integer greater than 1, including: an enabling unit, configured to enable the communication bus interface and obtain a target address to be assigned from the communication bus to which the communication bus interface is connected when a trigger signal is received through the trigger input interface; An application unit, used for applying the target address to be allocated as the address of the type B device itself; The system further comprises: a marking unit, configured to assign an allocated mark to the target address to be allocated to obtain an allocated address, wherein the target address to be allocated is an address to be allocated selected by the type A device from K addresses to be allocated in the first address container, wherein K is a positive integer equal to or greater than N; a feedback unit, configured to feed back the allocated addresses to the communication bus, so that the type A device places the allocated addresses in a preset second address container, the initial state of the second address container being that no allocated addresses are stored therein, and displaying the ratio of the number of allocated addresses stored in the second address container to the number N of the type B devices through a display connected to a media output interface of the type A device; A stopping unit, used for stopping outputting feedback of the allocated address to the communication bus interface when the target address to be allocated cannot be obtained from the communication bus interface; A closing unit, used for closing the trigger input interface; A start unit, used to start its own trigger output interface to output a trigger signal externally; The system further comprises: The stopping unit is further used to stop the trigger output interface from outputting a trigger signal externally when the allocated address is acquired through the communication bus interface.

7. A computer device, characterized in that: include: Processor, memory, bus, input and output interface, network interface; The processor is connected to the memory, the input / output interface, and the network interface via the bus; The memory stores a program; When the processor executes the program stored in the memory, the address allocation method according to any one of claims 1 to 4 is implemented.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when the instructions are executed on a computer, the computer executes the address allocation method according to any one of claims 1 to 4.

Images