Pxi e-based dma data transmission processing method, system and device

Abstract

The embodiment of the application provides a PXIe-based DMA data transmission processing method, system and device, and belongs to the technical field of data transmission. The method first sends a DMA data read request to a host controller, the host controller is used for applying a ring buffer area to a main memory, and the ring buffer area is used for storing key information corresponding to DMA data; then, a DMA data read instruction sent by the host controller is received, a read difference between a read pointer and a write pointer pointing to the ring buffer area is determined based on the DMA data read instruction, wherein the read difference is obtained by the host controller by calculating the difference between the read pointer and the write pointer; target key information corresponding to target DMA data is read from the ring buffer area according to the read difference, and the read pointer is updated, so that the read pointer points to the latest read key information. The application can improve the efficiency of DMA data transmission while improving the performance of the host control.

Description

Technical Field

[0001] This application relates to the field of data transmission technology, and in particular to a PXIe-based DMA data transmission processing method, system, and device. Background Technology

[0002] Direct Memory Access (DMA) is a computer technology commonly used to achieve high-speed data transfer between devices. For example, in PXIe (PCI eXtensions for Instrumentation Express) systems, devices are often connected to the computer via the PXIe bus, and DMA data transfer technology is used to achieve high-speed data transfer. DMA data transfer technology can bypass the intervention of the CPU, thereby increasing the speed of data transfer.

[0003] However, in related technologies, when DMA data transfer technology is needed to transfer DMA data, the transfer device first sends a transfer request to the CPU. Then, upon receiving the transfer request, the CPU initiates an interrupt and accesses the main register connected to the CPU to perform the DMA data transfer. During this process, to ensure that each DMA data packet is accurately transferred, the CPU typically needs to perform multiple read / write operations and interrupt handling. Understandably, multiple other devices in the computer also require CPU control and management. Such frequent readings and writings to the main register and multiple CPU interrupts severely reduce the efficiency of DMA data transfer and CPU performance. Summary of the Invention

[0004] The main objective of this application is to propose a PXIe-based DMA data transfer processing method, system, and device that can improve the efficiency of DMA data transfer while enhancing the performance of the main controller.

[0005] To achieve the above objectives, a first aspect of this application proposes a PXIe-based DMA data transfer processing method, applied to an external device connected to a main controller, the main controller connected to a main memory, and the main memory storing DMA data. The method includes:

[0006] The main controller sends a DMA data read request to the main memory, and the main controller requests a circular buffer from the main memory to store key information corresponding to the DMA data.

[0007] The system receives a DMA data read instruction sent by the main controller and determines the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instruction. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0008] Based on the read difference, the target key information corresponding to the target DMA data is read from the circular buffer, and the read pointer is updated so that the read pointer points to the latest read key information.

[0009] In some embodiments, the target key information includes data address, data length, and storage information, wherein the storage information includes time information or priority information;

[0010] After reading the target key information corresponding to the target DMA data from the circular buffer based on the read difference, the process includes:

[0011] Based on the data address and the data length, read the corresponding target DMA data from the main memory;

[0012] If the stored information is time information, at least one of the target DMA data is stored sequentially in a preset DMA data buffer according to the reading time order;

[0013] If the storage information is priority information, at least one of the target DMA data is stored sequentially in the DMA data buffer according to priority order;

[0014] According to the preset reading requirements, the corresponding target DMA data is read from the DMA data buffer in batches.

[0015] In some embodiments, the target key information further includes control information;

[0016] After reading the corresponding target DMA data from the DMA data buffer in batches according to preset read requirements, the method further includes:

[0017] Based on the target key information, control information corresponding to the target DMA data is determined, and data processing operations are performed on the target DMA data according to the control information, wherein the data processing operations include at least one of data verification, data parsing, and data conversion.

[0018] In some embodiments, the method further includes:

[0019] Send a DMA data write request to the main controller and receive a DMA data write instruction from the main controller;

[0020] Based on the DMA data write instruction, the storage difference between the read pointer and the write pointer pointing to the circular buffer is determined. According to the storage difference, the target key information corresponding to the target DMA data is written into the circular buffer, and the write pointer is updated so that the write pointer points to the latest written key information.

[0021] Based on the DMA data write instruction, the target DMA data is written into the main memory.

[0022] In some embodiments, reading the target key information corresponding to the target DMA data from the circular buffer based on the read difference includes:

[0023] Obtain the header address and size of the circular buffer, and determine the tail address of the circular buffer based on the header address and size of the circular buffer;

[0024] If the read pointer is greater than the write pointer, the region indicated by the read pointer to the tail address is determined as the first read region;

[0025] If the read pointer is less than the write pointer, the area indicated by the read pointer to the write pointer is determined as the second read area;

[0026] Based on the first read area or the second read area, read the target key information corresponding to the target DMA data from the circular buffer.

[0027] In some embodiments, writing the target key information corresponding to the target DMA data into the circular buffer according to the storage difference includes:

[0028] If the read pointer is less than or equal to the write pointer, the region indicated by the write pointer to the tail address is determined as the first storage region;

[0029] If the read pointer is greater than the write pointer, and the storage difference indicated by the read pointer and the write pointer is greater than a preset interval difference, the area from the write pointer to the read pointer is determined to be the second storage area;

[0030] Based on the first storage area or the second storage area, the target key information corresponding to the target DMA data is written into the circular buffer.

[0031] To achieve the above objectives, a second aspect of this application proposes a PXIe-based DMA data transfer processing method applied to a main controller. The main controller is connected to an external device and to a main memory, which stores DMA data. The method includes:

[0032] Receive DMA data read request or DMA data write request sent by the external device, and request a circular buffer from the main memory according to the DMA data write request;

[0033] According to the DMA data read request or the DMA data write request, a read pointer and a write pointer are obtained, wherein the read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0034] Calculate the read difference or storage difference indicated by the read pointer and the write pointer, and generate a DMA data read instruction or a DMA data write instruction based on the read difference or the storage difference;

[0035] The DMA data read instruction or the DMA data write instruction is sent to the external device, so that the external device can read the target key information corresponding to the target DMA data from the circular buffer according to the DMA data read instruction, or write the target key information corresponding to the target DMA data into the circular buffer according to the DMA data write instruction.

[0036] To achieve the above objectives, a third aspect of this application proposes a PXIe-based DMA data transmission processing system, the system comprising:

[0037] The sending module is used to send a DMA data read request to the main controller, and the main controller is used to request a circular buffer from the main memory, which is used to store key information corresponding to the DMA data.

[0038] The receiving module is configured to receive a DMA data read instruction sent by the main controller, and determine the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instruction. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0039] The read module is used to read the target key information corresponding to the target DMA data from the circular buffer according to the read difference, and update the read pointer so that the read pointer points to the latest read key information.

[0040] To achieve the above objectives, a fourth aspect of the present application provides an electronic device, the electronic device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method described in the first aspect embodiment or the method described in the second aspect embodiment.

[0041] To achieve the above objectives, a fifth aspect of the present application provides a storage medium, which is a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect embodiment or the method described in the second aspect embodiment.

[0042] This application proposes a PXIe-based DMA data transfer processing method, system, and device. First, a DMA data read request is sent to the main controller, which requests a circular buffer from the main memory to store key information corresponding to the DMA data. Next, a DMA data read instruction is received from the main controller. Based on the DMA data read instruction, a read difference is determined between the read pointer and the write pointer pointing to the circular buffer. This read difference is obtained by the main controller by calculating the difference between the read and write pointers. The read pointer indicates the location of the most recently read key information in the circular buffer, and the write pointer indicates the location of the most recently written key information in the circular buffer. Then, the target key information corresponding to the target DMA data is read from the circular buffer according to the read difference, and the read pointer is updated so that it points to the most recently read key information. In this way, after the external device sends a read request to the main controller, the main controller only needs to perform a read / write operation once on the circular buffer that stores the key information corresponding to the DMA data, and generate corresponding instructions to enable the external device to perform corresponding read / write operations on the DMA data, without having to use the main controller frequently. This improves the performance of the main controller. Since DMA data transfer is closely related to the main controller, improving the performance of the main controller can further improve the efficiency of DMA data transfer. Attached Figure Description

[0043] Figure 1 This is an optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application;

[0044] Figure 2This is a schematic diagram of a PXIe-based DMA data transfer processing method provided in an embodiment of this application;

[0045] Figure 3 yes Figure 1 A flowchart of the implementation following step S103;

[0046] Figure 4 This is another optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application;

[0047] Figure 5 yes Figure 1 A flowchart of an implementation of step S103 in the process;

[0048] Figure 6 This is an optional transmission diagram of the PXIe-based DMA data transmission processing method provided in the embodiments of this application;

[0049] Figure 7 This is another optional transmission diagram of the PXIe-based DMA data transmission processing method provided in the embodiments of this application;

[0050] Figure 8 yes Figure 4 A flowchart of an implementation of step S402 in the process;

[0051] Figure 9 This is another optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application;

[0052] Figure 10 This is a functional module diagram of the PXIe-based DMA data transmission processing system provided in the embodiments of this application;

[0053] Figure 11 This is a schematic diagram of the hardware structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0056] Direct Memory Access (DMA) is a computer technology commonly used to achieve high-speed data transfer between devices. For example, in PXIe (PCI eXtensions for Instrumentation Express) systems, devices are often connected to the computer via the PXIe bus, and DMA data transfer technology is used to achieve high-speed data transfer. DMA data transfer technology can bypass the intervention of the CPU, thereby increasing the speed of data transfer.

[0057] However, in related technologies, when DMA data transfer technology is needed to transfer DMA data, the transfer device first sends a transfer request to the CPU. Then, upon receiving the transfer request, the CPU initiates an interrupt and accesses the main register connected to the CPU to perform the DMA data transfer. During this process, to ensure that each DMA data packet is accurately transferred, the CPU typically needs to perform multiple read / write operations and interrupt handling. Understandably, multiple other devices in the computer also require CPU control and management. Such frequent readings and writings to the main register and multiple CPU interrupts severely reduce the efficiency of DMA data transfer and CPU performance.

[0058] Based on this, embodiments of this application provide a PXIe-based DMA data transfer processing method, system, and device, which can improve the efficiency of DMA data transfer while improving the performance of the main control unit.

[0059] The PXIe-based DMA data transmission processing method, system, and device provided in this application are specifically illustrated through the following embodiments.

[0060] It should be noted that in all specific embodiments of this application, whenever processing based on DMA data is required, permission or consent from relevant personnel will be obtained first. Furthermore, the collection, use, and processing of this DMA data will comply with relevant laws, regulations, and standards. Additionally, when embodiments of this application require obtaining sensitive personal information of relevant personnel, the DMA data transmission operations in these embodiments will only be performed after obtaining explicit separate permission or consent from the relevant personnel.

[0061] like Figure 1 As shown, Figure 1 This is an optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application. Figure 1 The method may include, but is not limited to, steps S101 to S103.

[0062] Step S101: Send a DMA data read request to the main controller. The main controller is used to request a circular buffer from the main memory. The circular buffer is used to store key information corresponding to the DMA data.

[0063] In some embodiments, such as Figure 2 As shown, Figure 2 This is a connection diagram of a PXIe-based DMA data transfer processing method provided in this application embodiment. During DMA data transfer in the PXIe system, external devices (which are considered part of the PXIe system once connected to a PXIe slot) are typically connected to the main controller (also referred to as the "main controller"). It should be noted that in a computer system, the main controller can refer to an independent hardware module separate from the CPU, or it can refer to control logic integrated within the CPU. The specific meaning depends on the system design and architecture. It is important to note that the term "main controller" may have different meanings in different contexts, but generally, it refers to a hardware or software component responsible for controlling and managing a specific task or device. Furthermore, the main controller is connected to main memory, which is used to store DMA data.

[0064] It should be noted that since PCIe (Peripheral Component Interconnect Express) is a further extension of PXIe, the PXIe-based DMA data transfer processing method provided in this application embodiment can also be applied to the PCIe system to realize DMA data transfer processing operations in the PCIe system.

[0065] Furthermore, the external device can be a network adapter, hard drive, board, etc. In this embodiment, the external device can be a Field-Programmable Gate Array (FPGA). It is understood that the PXIe-based DMA data transfer processing method proposed in this application can also be used between the main controller and other connected external devices; this embodiment does not impose specific limitations. Additionally, the main controller can be connected to multiple external devices; this application also does not impose specific limitations and the number can be configured according to actual circumstances.

[0066] In some embodiments, when an external device requests DMA data transfer from the main controller for the first time, the main controller requests a ring buffer from the main memory. After the ring buffer request is completed, if the external device sends another DMA data read request to the main controller, the main controller can directly operate based on the previously requested ring buffer without needing to request a ring buffer again.

[0067] Furthermore, since the circular buffer is connected end to end, the master controller can return to the beginning of the circular buffer after writing to the end of the circular buffer. In addition, when an external device connected to the master controller, such as an FPGA, reads information from the circular buffer, it can also return to the beginning of the circular buffer after reading the end of the circular buffer.

[0068] Furthermore, the circular buffer stores key information corresponding to the DMA data to be transferred, including control information, data address, data size, and storage information. The control information indicates the data processing operation corresponding to the DMA data; the data address indicates the storage location of the DMA data in main memory; the data size indicates the storage space occupied by the DMA data in main memory; and the storage information indicates the storage basis of the DMA data read from main memory in the external device.

[0069] Furthermore, the addresses of the same DMA data in main memory and in the external device are usually different. To facilitate efficient access and management between the master controller and the external device, a base register (BAR) can be used for address mapping management between the master controller and the external device. For example, the BAR register can convert information such as the address corresponding to the circular buffer and send it to the external device. It can be understood that the converted address information is consistent with the address space in the external device. This facilitates memory access between main memory and the external device, eliminating the need to manually calculate the corresponding physical address and improving DMA data transfer efficiency.

[0070] Furthermore, the circular buffer can be a memory block in main memory or a memory block in external memory connected to main memory. The actual size of the circular buffer can be customized according to the data bandwidth, where data bandwidth refers to the amount of data that can be transmitted per unit time during data transmission. For example, if the data bandwidth at a certain moment represents the amount of critical information corresponding to 100 DMA data per second, where the data size of each critical information is 4 bytes, then the amount of critical information that needs to be transmitted per second can be calculated as 100 data * 4 bytes / data = 400 bytes. Therefore, to avoid data loss, the size of the circular buffer is usually set to accommodate the amount of data at the maximum transmission rate; that is, in this example, the size of the circular buffer is at least 400 bytes.

[0071] Step S102: Receive the DMA data read instruction sent by the main controller, and determine the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instruction. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0072] In some embodiments, when an external device receives a DMA data read command from the host controller, it can read the corresponding DMA data from the main memory according to the DMA data read command. Before reading the DMA data, it needs to read the key information corresponding to the DMA data from the circular buffer. The DMA data read command not only instructs the external device to read the DMA read signal, but also indicates the read difference between the read pointer and the write pointer in the circular buffer. Since the circular buffer stores the key information corresponding to the DMA data, the DMA data read command actually instructs the external device to read the corresponding key information.

[0073] Furthermore, the read pointer and write pointer can be set in an external device, a BAR register, or other related devices, and both the read pointer and write pointer point to the circular buffer.

[0074] Step S103: Read the target key information corresponding to the target DMA data from the circular buffer according to the read difference, and update the read pointer so that the read pointer points to the latest read key information.

[0075] In some embodiments, the circular buffer stores multiple key information items, and the target key information to be read can be determined based on the read pointer and the write pointer. For example, when the write pointer in the circular buffer is greater than the read pointer, it indicates that the currently readable key information is the data between the write pointer and the read pointer.

[0076] Furthermore, based on the read target key information, the target DMA data that needs to be read can be further determined. Compared with directly reading the target DMA data in traditional DMA data transfer, the key information occupies less space, is less likely to result in data loss, and has a faster reading speed. At the same time, by using the key information to record the key information corresponding to the DMA data, such as the data size, a counter can be used to determine whether the DMA data transfer has been completed, thus improving the DMA data transfer efficiency. On the other hand, in a complete DMA data transfer process, the main controller only needs to perform one read / write operation on the circular cache in the main memory, improving the performance of the main controller and thus improving the DMA data transfer efficiency.

[0077] like Figure 3 As shown, Figure 3 yes Figure 1 The flowchart following step S103 may include steps S201 to S204 in some embodiments.

[0078] Step S201: Read the corresponding target DMA data from the main memory according to the data address and data length.

[0079] In some embodiments, the target key information includes a data address and a data length. For example, the address where a target DMA data is stored in the main memory is the data address included in the target key information, and the storage space occupied by the target DMA data in the main memory is the data length (also known as the data size) included in the target key information.

[0080] Step S202: If the stored information is time information, store at least one target DMA data in a preset DMA data buffer in the order of reading time.

[0081] In some embodiments, the target key information also includes storage information. After the external device reads the target DMA data from the main memory, it needs to store the target DMA data in the corresponding location on the external device. The storage information is the basis for characterizing the storage of the target DMA data in the external device. The storage information can be time information. For example, if the external device reads multiple target DMA data from the main memory, and the storage information corresponding to these target DMA data is time information, then the multiple target DMA data are stored sequentially in the external device according to their chronological order. This way, when the external device performs subsequent data processing on these target DMA data, it can execute the processing according to the chronological order of data transmission.

[0082] Furthermore, the DMA data buffer is pre-allocated by the external device and is used to store the target DMA data read from the main memory. Alternatively, the external device can be connected to other external storage devices and the read target DMA data can be stored in those external storage devices.

[0083] Furthermore, it can be divided into multiple different time periods, and different target DMA data can be stored in different DMA data buffers according to different time periods, so that external devices can process different target DMA data in different DMA data buffers. In this way, the data processing efficiency of target DMA data can be improved in a targeted manner.

[0084] It should be noted that after obtaining the time information corresponding to the target DMA data, different data storage processing can be performed on the target DMA data according to the actual situation. The embodiments of this application are only described with reference to preferred embodiments and are not specifically limited.

[0085] Step S203: If the stored information is priority information, store at least one target DMA data in the DMA data buffer according to priority order.

[0086] In some embodiments, the stored information may also be priority information, wherein the priority information is used to indicate the processing priority of the corresponding target DMA data. Since a higher processing priority indicates that the corresponding target DMA data needs to be processed first, the external device can store the high priority information in the priority processing position, thereby speeding up the processing speed of the target DMA data.

[0087] For example, priority information can be divided into three levels: high, medium, and low. Furthermore, the external device can divide into three different DMA data buffers to store the target DMA data corresponding to different priority information. When receiving key information with high priority, the external device reads the corresponding target DMA data from the main memory according to the data address and data length, and stores the target DMA data in the first DMA data buffer. The first DMA data buffer is used to store the target DMA data with high priority information.

[0088] It should be noted that after obtaining the priority information corresponding to the target DMA data, different data storage processing can be performed on the target DMA data according to the actual situation. The embodiments of this application are only described with reference to preferred embodiments and are not specifically limited.

[0089] Understandably, flexibly configuring storage information allows external devices to store the target DMA data according to the actual transmission needs of different external devices after reading the corresponding target DMA data, thereby improving the processing efficiency of the target DMA data.

[0090] Step S204: Read the corresponding target DMA data from the DMA data buffer in batches according to the preset reading requirements.

[0091] In some embodiments, after storing the target DMA data in the DMA data buffer, the external device typically reads the target DMA data again to perform subsequent data processing operations, depending on its actual needs. In this case, the external device can read the corresponding target DMA data from the DMA data buffer in batches according to its preset reading requirements.

[0092] For example, at a certain moment, the network transfer speed of the external device when reading target DMA data from the DMA data buffer is not high. At this time, only 10 target DMA data can be read and processed at a time. Therefore, even if the DMA data buffer stores more than 10 target DMA data, it is not necessary to read them all at once. Compared with the traditional DMA data transfer process, which requires reading the corresponding DMA data from the main memory all at once, the embodiments of this application first read the corresponding key information from the circular buffer. Then, the external device can actively read data based on the key information and the actual situation, which can effectively reduce the waste of CPU resources.

[0093] In some embodiments, the following steps may be included after step S204.

[0094] In some embodiments, control information corresponding to the target DMA data is determined based on the target key information, and data processing operations are performed on the target DMA data according to the control information, wherein the data processing operations include at least one of data verification, data parsing, and data conversion.

[0095] In some embodiments, the target key information further includes control information, wherein the control information is used to instruct the external device on the data processing operations that need to be performed on the target DMA data.

[0096] Furthermore, control information is used to instruct data operations on the target DMA data. For example, control information can be one or more of the following: message sequence number, data transition information indication, timestamp, checksum information, etc., to perform corresponding data processing operations. When the control information is a message sequence number, a message sequence number can be appended to the target DMA data to make the message sequence number a unique representation of the target DMA data. When the control information is data transition information, data changes at specific positions in the target DMA data can be performed based on this data transition information. When the control information is a timestamp, the integrity of the target DMA data can be verified based on the timestamp, where the timestamp can be seconds, microseconds, year, month, day, hour, minute, second, etc. When the control information is checksum information, data verification operations can be performed on the target DMA data based on the checksum information.

[0097] Understandably, taking a programmable instrument extension interface system (PCI extensions for instrumentation, PXIe) as an example, the main control resources are the bottleneck for various system applications. If all target DMA data is processed by the main control CPU, this will greatly consume CPU resources, significantly reducing the system's transmission efficiency and bandwidth. In this embodiment, each target DMA data has control information defined in the key information. In this way, the CPU does not need to process the target DMA data itself. Instead, the external device reads the corresponding control information and then processes the target DMA data independently, thus increasing the flexibility of target DMA data processing.

[0098] like Figure 4 As shown, Figure 4 This is another optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application. Figure 4 The method may include, but is not limited to, steps S401 to S403.

[0099] Step S401: Send a DMA data write request to the master controller and receive a DMA data write instruction sent by the master controller.

[0100] In some embodiments, the DMA data transfer process includes not only the external device reading DMA data from main memory, but also the external device writing DMA data to main memory. When the external device needs to write DMA data to main memory, it first sends a DMA data write request to the main controller. After receiving the DMA data write instruction from the main controller, the external device can begin writing the target DMA data.

[0101] Step S402: Based on the DMA data write instruction, determine the storage difference between the read pointer and the write pointer pointing to the circular buffer. Write the target key information corresponding to the target DMA data into the circular buffer according to the storage difference, and update the write pointer so that the write pointer points to the latest written key information.

[0102] In some embodiments, the DMA data write instruction received by the external device includes an indication of the writable portion of the current circular buffer. Furthermore, the information the external device needs to write includes DMA data and corresponding key information; therefore, the key information needs to be written into the circular buffer, and the DMA data needs to be written into main memory.

[0103] Furthermore, after writing the critical information into the circular buffer, the write pointer needs to be updated so that the starting position for the next DMA data write can be determined based on the updated write pointer.

[0104] Step S403: Based on the DMA data write instruction, write the target DMA data into the main memory.

[0105] In some embodiments, after storing the key information in the circular buffer, it is also necessary to store the DMA data corresponding to the key information in the main memory. Since the key information includes the data address and data length of the corresponding DMA data stored in the main memory, the DMA data can be stored in the corresponding location in the main memory based on the data address and data length.

[0106] Understandably, external devices can perform DMA data read operations only on the main memory, in which case the controller performs only one read operation on the circular buffer; or, they can perform DMA data write operations only on the main memory, in which case the controller performs only one write operation on the circular buffer; or, they can perform DMA data read and write operations on the main memory, in which case the controller performs only one read and write operation on the circular buffer. Compared to the traditional DMA data transfer where the controller needs to read and write the corresponding registers multiple times, this reduces the interrupts to the controller and greatly improves the controller's performance.

[0107] like Figure 5 As shown, Figure 5 yes Figure 1 A flowchart of an implementation of step S103 is provided. In some embodiments, step S103 may include steps S501 to S504.

[0108] Step S501: Obtain the header address and size of the circular buffer, and determine the tail address of the circular buffer based on the header address and size.

[0109] In some embodiments, the size of the circular buffer can be set according to the actual situation. In this case, the address returned by the master controller is used as the head address of the circular buffer. The tail address of the circular buffer can be determined by adding the head address and the size of the circular buffer.

[0110] Step S502: If the read pointer is greater than the write pointer, determine the area indicated by the read pointer to the tail address as the first read area.

[0111] In some embodiments, since both the read pointer and the write pointer point to a circular cache, the readable region in main memory can be determined by the difference between the read pointer and the write pointer. For example, as... Figure 6 As shown, Figure 6 This is an optional transmission diagram of the PXIe-based DMA data transmission processing method provided in the embodiments of this application. Figure 6In the diagram, the head address of the circular buffer 1 is address 11, and the size of the circular buffer is 4 units of data. Therefore, address 14 is determined to be the tail address. At this time, the write pointer points to address 11, while the read pointer points to address 13, indicating that the DMA data stored at addresses 11 to 13 of the circular buffer 1 has been read. Thus, the position currently pointed to by the read pointer to the tail address is determined to be the first read area available for reading.

[0112] Step S503: If the read pointer is less than the write pointer, determine the area indicated by the read pointer to the write pointer as the second read area.

[0113] For example, such as Figure 7 As shown, Figure 7 This is another optional transmission diagram of the PXIe-based DMA data transmission processing method provided in the embodiments of this application. Figure 7 In the above, the head address of the circular buffer 2 is address 21, and the size of the circular buffer is 4 units of data. Therefore, address 24 is determined to be the tail address. At this time, the read pointer points to address 21, while the write pointer points to address 23, indicating that the DMA data stored at address 21 of the circular buffer 2 has been read. Therefore, the position currently pointed to by the read pointer to the position currently pointed to by the write pointer is determined to be the second read area available for reading.

[0114] Step S504: Read the target key information corresponding to the target DMA data from the circular buffer according to the first read area or the second read area.

[0115] For example, the size of the ring buffer can be set to 4MByte, and each buffer in the ring buffer can be set to 32Byte. In this case, the ring buffer can hold a maximum of 4096*1024 / 32=131072 DMA data. That is, the master controller can send 131072 DMA data in one read / write operation without having to execute master controller interrupts multiple times. This improves the performance of the master controller and also improves the transmission efficiency of DMA data.

[0116] In some embodiments, if the read pointer is equal to the write pointer, it means that no critical information is stored in the circular buffer, and no further read operation is required.

[0117] In some embodiments, when the readable area is a first readable area, the corresponding target key information is read from the first readable area in the circular buffer; or, when the readable area is a second readable area, the corresponding target key information is read from the second readable area in the circular buffer. After reading the target key information from any readable area, the read pointer pointing to the circular buffer needs to be updated so that the starting position of the next DMA data read can be determined according to the updated read pointer.

[0118] like Figure 8 As shown, Figure 8 yes Figure 4 A flowchart of an implementation of step S402 is provided. In some embodiments, step S402 may include steps S601 to S603.

[0119] Step S601: If the read pointer is less than or equal to the write pointer, determine the area indicated by the write pointer to the tail address as the first storage area.

[0120] In some embodiments, when an external device needs to store DMA data in main memory, it is also necessary to determine the available storage area in the circular buffer based on the DMA data write instruction. For example, as... Figure 7 As shown, at this time, the read pointer in the circular buffer 2 is less than the write pointer, which means that the corresponding DMA data has been written to the part of the circular buffer 2 from address 21 to address 23. At this time, the address area from the write pointer to the tail is the first memory area available for writing, i.e., address 24.

[0121] In some embodiments, when the read pointer equals the write pointer, the portion available for writing is also the address region from the write pointer to the tail.

[0122] Step S602: If the read pointer is greater than the write pointer, and the storage difference indicated by the read pointer and the write pointer is greater than the preset interval difference, the area indicated by the write pointer to the read pointer is determined as the second storage area.

[0123] In some embodiments, such as Figure 6 As shown, at this time, the read pointer in the circular buffer 1 is greater than the write pointer. Therefore, the area from the write pointer to the read pointer is the second storage area that can be written to, namely address 11 to address 13.

[0124] Furthermore, the preset interval difference is set to protect the read boundary. For example, the preset interval difference can be set to 4KByte. When performing a DMA data write operation, if the read pointer is greater than the write pointer and the storage difference is within 4KByte, it means that the write speed is faster than the read speed and the circular buffer is full. In order to ensure that the circular buffer is not damaged, DMA data cannot be written at this time.

[0125] It should be noted that the interval difference can be set specifically according to the actual situation. The embodiments in this application are only described with reference to preferred embodiments and are not specifically limited.

[0126] Step S603: Write the target key information corresponding to the target DMA data into the circular buffer according to the first storage area or the second storage area.

[0127] In some embodiments, when the available storage area is a first storage area, the corresponding target key information is stored in the first storage area of ​​the circular buffer; or, when the available storage area is a second storage area, the corresponding target key information is stored in the second storage area of ​​the circular buffer. Furthermore, regardless of which storage area the target key information is stored in, the write pointer pointing to the circular buffer needs to be updated so that the starting position for the next storage of key information can be determined based on the updated write pointer.

[0128] like Figure 9 As shown, Figure 9 This is another optional flowchart of the PXIe-based DMA data transfer processing method provided in the embodiments of this application. Figure 9 The method may include, but is not limited to, steps S701 to S703.

[0129] Step S701: Receive a DMA data read request or DMA data write request sent by an external device, and request a circular buffer from the main memory according to the DMA data write request;

[0130] In some embodiments, the PXIe-based DMA data transfer processing method proposed in this application can also be applied to the main controller, wherein the main controller is connected to an external device, the main controller is connected to the main memory, and the main memory stores DMA data.

[0131] Furthermore, when the main controller receives a DMA data write request from an external device, the main controller can request a circular buffer from the main memory. The circular buffer is used to store the key information corresponding to the DMA sent by the external device. When the main controller receives a DMA data read request from an external device, the main controller can read the corresponding key information from the already requested circular buffer.

[0132] Step S702: Obtain the read pointer and write pointer according to the DMA data read request or DMA data write request. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0133] In some embodiments, when the main controller receives a DMA data read request or a DMA data write request, it needs to obtain the pointer status of the read pointer and write pointer pointing to the circular buffer.

[0134] Step S703: Calculate the read difference or storage difference indicated by the read pointer and write pointer, and generate a DMA data read instruction or DMA data write instruction based on the read difference or storage difference.

[0135] In some embodiments, the read difference or storage difference between the read pointer and the write pointer is calculated based on their pointer states. It is understood that for the same pointer state, such as when the read pointer is greater than the write pointer, different DMA data requests will generate different DMA data instructions.

[0136] For example, when the main controller receives a DMA data read request, if the read pointer is greater than the write pointer at this time, a DMA data read instruction is generated. This instruction is used to indicate that the area from the position pointed to by the read pointer to the end address of the circular buffer is the area that the external device can read. Alternatively, when the main controller receives a DMA data write request, if the read pointer is greater than the write pointer at this time, a DMA data write instruction is generated. This instruction is used to indicate that the area from the position pointed to by the write pointer to the position pointed to by the read pointer is the area that the external device can store DMA data.

[0137] Step S704: Send the DMA data read instruction or DMA data write instruction to the external device so that the external device can read the target key information corresponding to the target DMA data from the circular buffer according to the DMA data read instruction, or write the target key information corresponding to the target DMA data into the circular buffer according to the DMA data write instruction.

[0138] In some embodiments, after generating a DMA data read instruction or a DMA data write instruction, the main controller can send the DMA data read instruction or DMA data write instruction to an external device. When the external device receives the DMA data read instruction or DMA data write instruction sent by the main controller, it can perform the corresponding DMA data read operation or DMA data storage operation according to the instruction.

[0139] like Figure 10 As shown, Figure 10 This is a functional block diagram of the PXIe-based DMA data transfer processing system provided in this application embodiment. This application embodiment also provides a PXIe-based DMA data transfer processing system that can implement the above-mentioned PXIe-based DMA data transfer processing method. The PXIe-based DMA data transfer processing system includes:

[0140] The sending module 801 is used to send a DMA data read request to the main controller. The main controller is used to request a ring buffer from the main memory. The ring buffer is used to store key information corresponding to the DMA data.

[0141] The receiving module 802 is used to receive DMA data read instructions sent by the main controller, and determine the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instructions. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer.

[0142] The read module 803 is used to read the target key information corresponding to the target DMA data from the circular buffer according to the read difference, and update the read pointer so that the read pointer points to the latest read key information.

[0143] The specific implementation of the PXIe-based DMA data transfer processing system is basically the same as the specific embodiment of the PXIe-based DMA data transfer processing method described above, and will not be repeated here. Subject to meeting the requirements of the embodiments of this application, the PXIe-based DMA data transfer processing system may also be equipped with other functional modules to implement the PXIe-based DMA data transfer processing method in the above embodiments.

[0144] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described PXIe-based DMA data transfer processing method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0145] like Figure 11 As shown, Figure 11 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of this application. The electronic device includes:

[0146] The processor 901 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0147] The memory 902 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 902 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 902 and is called and executed by the processor 901 using the PXIe-based DMA data transfer processing method of the embodiments of this application.

[0148] The input / output interface 903 is used to implement information input and output;

[0149] The communication interface 904 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0150] Bus 905 transmits information between various components of the device (e.g., processor 901, memory 902, input / output interface 903, and communication interface 904);

[0151] The processor 901, memory 902, input / output interface 903, and communication interface 904 are connected to each other within the device via bus 905.

[0152] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described PXIe-based DMA data transfer processing method.

[0153] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0154] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0155] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0156] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0157] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0158] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0159] It should be understood that in this application, "at least one" and "several" refer to one or more, and "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0160] In the embodiments provided in this application, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0161] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0162] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0163] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0164] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A PXIe-based DMA data transfer processing method, applied to an external device, wherein the external device is connected to a main controller, the main controller is connected to a main memory, and the main memory stores DMA data, characterized in that, The method includes: The main controller sends a DMA data read request to the main memory, and the main controller requests a circular buffer from the main memory to store key information corresponding to the DMA data. The system receives a DMA data read instruction sent by the main controller and determines the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instruction. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer. Based on the read difference, the target key information corresponding to the target DMA data is read from the circular buffer, and the read pointer is updated so that the read pointer points to the latest read key information; The target key information includes data address, data length, and storage information, and the storage information includes time information or priority information. After reading the target key information corresponding to the target DMA data from the circular buffer based on the read difference, the process includes: Based on the data address and the data length, read the corresponding target DMA data from the main memory; If the stored information is time information, at least one of the target DMA data is stored sequentially in a preset DMA data buffer according to the reading time order; If the storage information is priority information, at least one of the target DMA data is stored sequentially in the DMA data buffer according to priority order; According to the preset reading requirements, the corresponding target DMA data is read from the DMA data buffer in batches.

2. The DMA data transfer processing method based on PXIe according to claim 1, characterized in that, The target key information also includes control information; After reading the corresponding target DMA data from the DMA data buffer in batches according to preset read requirements, the method further includes: Based on the target key information, control information corresponding to the target DMA data is determined, and data processing operations are performed on the target DMA data according to the control information, wherein the data processing operations include at least one of data verification, data parsing, and data conversion.

3. The PXIe-based DMA data transfer processing method according to claim 2, characterized in that, The method further includes: Send a DMA data write request to the main controller and receive a DMA data write instruction from the main controller; Based on the DMA data write instruction, the storage difference between the read pointer and the write pointer pointing to the circular buffer is determined. According to the storage difference, the target key information corresponding to the target DMA data is written into the circular buffer, and the write pointer is updated so that the write pointer points to the latest written key information. Based on the DMA data write instruction, the target DMA data is written into the main memory.

4. The PXIe-based DMA data transfer processing method according to claim 3, characterized in that, The step of reading the target key information corresponding to the target DMA data from the circular buffer based on the read difference includes: Obtain the header address and size of the circular buffer, and determine the tail address of the circular buffer based on the header address and size of the circular buffer; If the read pointer is greater than the write pointer, the region indicated by the read pointer to the tail address is determined as the first read region; If the read pointer is less than the write pointer, the area indicated by the read pointer to the write pointer is determined as the second read area; Based on the first read area or the second read area, read the target key information corresponding to the target DMA data from the circular buffer.

5. The PXIe-based DMA data transfer processing method according to claim 4, characterized in that, The step of writing the target key information corresponding to the target DMA data into the circular buffer based on the storage difference includes: If the read pointer is less than or equal to the write pointer, the region indicated by the write pointer to the tail address is determined as the first storage region; If the read pointer is greater than the write pointer, and the storage difference indicated by the read pointer and the write pointer is greater than a preset interval difference, the area from the write pointer to the read pointer is determined to be the second storage area; Based on the first storage area or the second storage area, the target key information corresponding to the target DMA data is written into the circular buffer.

6. A PXIe-based DMA data transfer processing method, applied to a main controller, wherein the main controller is connected to an external device, the main controller is connected to a main memory, and the main memory stores DMA data, characterized in that, The method includes: Receive DMA data read request or DMA data write request sent by the external device, and request a circular buffer from the main memory according to the DMA data write request; According to the DMA data read request or the DMA data write request, a read pointer and a write pointer are obtained, wherein the read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer. Calculate the read difference or storage difference indicated by the read pointer and the write pointer, and generate a DMA data read instruction or a DMA data write instruction based on the read difference or the storage difference; The DMA data read instruction or the DMA data write instruction is sent to the external device so that the external device can read the target key information corresponding to the target DMA data from the circular buffer according to the DMA data read instruction, or write the target key information corresponding to the target DMA data into the circular buffer according to the DMA data write instruction. The target key information includes data address, data length, and storage information, and the storage information includes time information or priority information. After the external device reads the target key information corresponding to the target DMA data from the circular buffer according to the DMA data read instruction, the process includes: Based on the data address and the data length, read the corresponding target DMA data from the main memory; If the stored information is time information, at least one of the target DMA data is stored sequentially in a preset DMA data buffer according to the reading time order; If the storage information is priority information, at least one of the target DMA data is stored sequentially in the DMA data buffer according to priority order; According to the preset reading requirements, the corresponding target DMA data is read from the DMA data buffer in batches.

7. A PXIe-based DMA data transfer processing system, characterized in that, The system includes: The sending module is used to send a DMA data read request to the main controller, which is used to request a circular buffer from the main memory, and the circular buffer is used to store key information corresponding to the DMA data. The receiving module is configured to receive a DMA data read instruction sent by the main controller, and determine the read difference between the read pointer and the write pointer pointing to the circular buffer based on the DMA data read instruction. The read difference is obtained by the main controller by calculating the difference between the read pointer and the write pointer. The read pointer is used to indicate the position of the latest read key information in the circular buffer, and the write pointer is used to indicate the position of the latest written key information in the circular buffer. The read module is used to read target key information corresponding to the target DMA data from the circular buffer according to the read difference, and update the read pointer so that the read pointer points to the latest read key information; The target key information includes data address, data length, and storage information, and the storage information includes time information or priority information. After reading the target key information corresponding to the target DMA data from the circular buffer based on the read difference, the process includes: Based on the data address and the data length, read the corresponding target DMA data from the main memory; If the stored information is time information, at least one of the target DMA data is stored sequentially in a preset DMA data buffer according to the reading time order; If the storage information is priority information, at least one of the target DMA data is stored sequentially in the DMA data buffer according to priority order; According to the preset reading requirements, the corresponding target DMA data is read from the DMA data buffer in batches.

8. An electronic device, characterized in that, The electronic device includes a memory and a processor. The memory stores a computer program. When the processor executes the computer program, it implements the PXIe-based DMA data transfer processing method according to any one of claims 1 to 5, or the PXIe-based DMA data transfer processing method according to claim 6.

9. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the PXIe-based DMA data transfer processing method according to any one of claims 1 to 5, or implements the PXIe-based DMA data transfer processing method according to claim 6.

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