Integrated circuit comprising first and second power supply nodes for writing and reading memory cells

Abstract

A print cartridge circuit component includes an integrated circuit for association with a plurality of fluid actuation devices and includes an input signal contact for receiving an input signal from a host printer. The integrated circuit includes a plurality of memory cells, a first power supply node, and a second power supply node. The first power supply node is for supplying power to the plurality of memory cells for writing data to the plurality of memory cells. The second power supply node is for supplying power to the plurality of memory cells for reading data from the plurality of memory cells.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to integrated circuits including first and second power supply nodes for writing and reading memory cells. BACKGROUND

[0002] An inkjet printing system, as one example of a fluid ejection system, can include an integrated circuit (such as a fluid die), an ink supply that supplies liquid ink to the fluid die, and an electronic controller that controls the fluid die. A fluid die, as one example of a fluid ejection device, ejects drops of ink through a plurality of nozzles or orifices and onto a print medium (such as a sheet of paper) to print on the print medium. In some examples, the orifices are arranged in a single column or single array or in multiple columns or multiple arrays, such that appropriate sequential ejection of ink from the orifices as the fluid die and / or the print medium are moved relative to each other causes characters or other images to be printed on the print medium. SUMMARY

[0003] According to an aspect of the present disclosure, there is provided a print cartridge circuit component comprising an integrated circuit for association with a plurality of fluid actuation devices and comprising input signal contacts for receiving input signals from a host printer, the integrated circuit comprising: a plurality of memory cells; a first power supply node for supplying power to the plurality of memory cells for writing data to the plurality of memory cells, wherein the first power supply node is for supplying a first voltage and a first maximum current; a second power supply node for supplying power to the plurality of memory cells for reading data from the plurality of memory cells, wherein the second power supply node is for supplying a second voltage and a second maximum current, and wherein the first voltage is greater than the second voltage and the first maximum current is greater than the second maximum current; a memory cell power node electrically coupled to the plurality of memory cells; a first voltage regulator for generating a memory write voltage on the memory cell power node based on the first voltage for writing data to the plurality of memory cells; and a second voltage regulator for generating a memory read voltage on the memory cell power node based on the second voltage for reading data from the plurality of memory cells, wherein the memory write voltage is greater than the memory read voltage.

[0004] According to another aspect of the present disclosure, there is provided a print cartridge comprising an ink reservoir and an ink ejection die, the ink ejection die comprising an integrated circuit according to the print cartridge circuit component as described above.

[0005] According to another aspect of the present disclosure, there is provided a used, refurbished, and / or refilled print cartridge including a die-external package of a print cartridge circuit component as described above, the package connected to printer signal input contacts of the print cartridge.

[0006] According to another aspect of the present disclosure, there is provided a refurbished print cartridge including: a previously used fluid ejection die including a plurality of fluid actuation devices and a plurality of at least partially written and / or at least partially disabled memory cells; an ink reservoir; an array of printer signal contacts connected to the fluid ejection die; and an integrated circuit package attached to a wall of the print cartridge and including: a plurality of memory cells connected to at least one of the printer signal input contacts for reading and writing; a first power supply node connected to at least one of the printer signal input contacts to power the plurality of memory cells to write data to the plurality of memory cells; and a second power supply node connected to at least one of the printer signal input contacts to power the plurality of memory cells to read data from the plurality of memory cells.

[0007] According to another aspect of the present disclosure, there is provided a print cartridge fluid ejection die including: a first power supply node to supply a first voltage; a second power supply node to supply a second voltage; a plurality of fluid actuation devices to receive power from the first power supply node; a plurality of memory cells to receive power from the first power supply node during a write operation and to receive power from the second power supply node during a read operation; and a logic circuit to receive power from the second power supply node, wherein the first voltage is greater than the second voltage.

[0008] According to another aspect of the disclosure, a method for accessing a plurality of memory cells of an integrated circuit is provided, the method comprising: supplying power to the plurality of memory cells of the integrated circuit for write operations via a first power supply; and supplying power to the plurality of memory cells for read operations via a second power supply, wherein a first voltage provided by the first power supply is greater than a second voltage provided by the second power supply; generating a memory write voltage based on the first voltage for writing data to the plurality of memory cells; and generating a memory read voltage based on the second voltage for reading data from the plurality of memory cells, wherein the memory write voltage is greater than the memory read voltage. BRIEF DESCRIPTION OF DRAWINGS

[0009] FIG. 1A is a block diagram illustrating one example of an integrated circuit for association with a plurality of fluid actuation devices.

[0010] FIG. 1B is a block diagram illustrating one example of a fluid die.

[0011] FIG. 2 is a block diagram illustrating one example of a voltage regulator circuit for generating a memory write voltage and a memory read voltage.

[0012] FIGS. 3A-3D is a flow diagram illustrating one example of a method for accessing a plurality of memory cells of an integrated circuit.

[0013] FIG. 4A and FIG. 4B illustrates one example of a fluid die.

[0014] FIG. 5 is a block diagram illustrating one example of a fluid ejection system.

[0015] FIG. 6A is a diagram illustrating one example of a print cartridge including an integrated circuit.

[0016] FIG. 6B is a diagram illustrating one example of an integrated circuit package for attachment to a print cartridge of FIG. 6A is a diagram illustrating one example of an integrated circuit package for attachment to a print cartridge of DETAILED DESCRIPTION

[0017] Each of the drawings can be considered to represent multiple embodiments, and thus the drawings can be used for reference purposes to support the multiple embodiments disclosed herein. A skilled artisan will understand that all individual or combined features illustrated or described with respect to any one drawing can be combined with individual or combined features illustrated or described with respect to any other drawing.

[0018] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration specific examples in which the disclosure can be practiced. It is to be understood that other examples can be utilized and structural or logical changes can be made without departing from the scope of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims. It is to be understood that features of the various examples described herein can be combined with each other, in part or in whole.

[0019] Printing systems are commonly provided with a host printer and a replaceable inkjet cartridge that is replaceable relative to a compatible receiving station of the host printer. The inkjet cartridge can be provided with a printhead. The inkjet cartridge can be provided with an ink reservoir to supply ink to the printhead. The printhead typically comprises or is comprised of an integrated circuit, such as a fluidic die (also referred to as a fluid ejection die), that is provided with fluidic channels and fluid ejection actuators to eject ink. The fluid ejection die is provided with memory cells. Logic (switching) circuitry is provided in the die to enable individual and / or groups of fluid actuators and memory cells. The combination of circuitry on the die can be referred to as an integrated circuit. Signal contacts are provided on the cartridge to connect to corresponding contacts of the host printer to transfer signals between the integrated circuit and a host printer controller.

[0020] Most embodiments of the present disclosure will relate to fluid ejection dies and their on-board memory. Other embodiments of the present disclosure are separate integrated circuit packages that are external to the fluid ejection die and do not include fluid actuators. The separate integrated circuit packages include replacement memory for the replacement of the on-die memory in which the memory read and write functions are at least partially configured in the same manner as the integrated circuit on the die. These off-die integrated circuit packages can be used to refurbish previously used up inkjet cartridges, for example, to refill and / or reset ink levels. Other off-die integrated circuit packages can be provided for new printhead cartridges rather than on-die memory functions, whereby the memory functions and ink ejection functions can be provided in separate packages. For example, the memory can be provided on a flat package such as a flexible circuit, while the ink ejection functions are provided in a printhead. All of the different embodiments of the printing cartridge integrated circuit components can be configured to process input signals from a connected host printer to power, read, and write to the memory cells.

[0021] A fluidic die or integrated circuit package can include on-die non-volatile memory (NVM) bits (e.g., one-time programmable (OTP) NVM) to store information accumulated over the life of the fluidic die, such as manufacturing tracking data and in-product usage statistics (e.g., total number of pages printed, etc.). The OTP and / or NVM cells can include programmable read-only memory (PROM) cells, erasable programmable read-only memory (EPROM) cells, fuses, antifuses, reference resistors, or other suitable memory cells. The NVM circuit can use two unique voltages for read and write operations. Typically, a voltage regulator is used by a single high voltage supply to generate the two voltages. This high voltage supply for the NVM circuit can also be used to fire the fluid actuation device and heat the circuit. Thus, to read the NVM bits, the supply node (i.e., busbar) for the component that connects the high voltage supply to the fluidic die cannot be disabled (e.g., due to damage or other reasons). Unfortunately, the high voltage supply node can be susceptible to electrical damage (e.g., shorting) due to fluid actuation device failure and / or electrical overstress (EOS) events. If the high voltage supply node fails, the NVM data stored in the failed fluidic die can not be accessible to a failure analysis technician or return center. In some cases, the failed high voltage supply node can even damage the NVM circuit or corrupt the data stored in the NVM cells. For commercial / industrial printing businesses, the ability to efficiently diagnose fluidic dies that have already been returned by customers is desirable. Correct diagnosis can include the ability to robustly read the NVM data.

[0022] Accordingly, disclosed herein is a print cartridge integrated circuit component (e.g., fluidic die) that includes memory cells (e.g., non-volatile memory cells, such as one-time programmable memory cells). A first power supply (such as a high voltage power supply) is used to power writing data to the memory cells. For example, a power supply between about 10 V and 35 V can be used to power writing data. In one example, the first power supply is configured to supply a voltage of 32 V. A second power supply (such as a low voltage power supply) is used to power reading data from the memory cells. For example, a power supply between about 3 V and 7 V can be used to power reading data. In one example, the second power supply is configured to supply a voltage of 5.6 V.

[0023] In one example, a dual output voltage regulator circuit is used to generate a memory write voltage (e.g., 11 V) from a first power supply and a memory read voltage (e.g., 5 V) from a second power supply. The voltage regulator can generate the memory read voltage in the absence of the first power supply. In one example, memory cells can be read even if a fluidic die fails due to a high voltage supply node failure. In another example, memory cells can be read independent of a high power supply, e.g., read without an active high power supply, such as starting an integrated circuit to read memory cells before enabling a high power supply. Additionally, the risk of data stored in memory cells being corrupted due to a high voltage supply node failure of a fluidic die is reduced.

[0024] FIG. 1A is a block diagram illustrating one example of an integrated circuit 100a for use in association with a plurality of fluidic actuation devices. In this example, the integrated circuit 100a can be separate from, but used in association with, an integrated circuit that includes fluidic actuation devices. The integrated circuit 100a includes a plurality of memory cells 102, a first power supply node 104 (e.g., a high voltage power supply node), and a second power supply node 106 (e.g., a low voltage power supply node). The plurality of memory cells 102 includes memory cells 1020 through 102 N where "N" is any suitable number of memory cells. The first power supply node 104 is used to power the plurality of memory cells 102 for writing data to the plurality of memory cells 102. The second power supply node 106 is used to power the plurality of memory cells 102 for reading data from the plurality of memory cells 102. The integrated circuit 100a can include logic (not shown) for reading and / or writing the plurality of memory cells 102. Because the first power supply node 104 is not used to power the plurality of memory cells 102 for read operations, the plurality of memory cells 102 are readable in the absence of the first power supply node 104.

[0025] The first power supply node 104 is to supply a first voltage and a first maximum current to the integrated circuit 100a. The second power supply node 106 is to supply a second voltage and a second maximum current to the integrated circuit 100a. The first voltage is greater than the second voltage, and the first maximum current is greater than the second maximum current. The first power supply node 104 can be electrically coupled to a high voltage supply (e.g., VPP) to receive the first voltage and the first maximum current. The second power supply node 106 can be electrically coupled to a low voltage supply (e.g., VDD) to receive the second voltage and the second maximum current. The first voltage supplied by the first power supply node 104 can be at least three times the second voltage supplied by the second power supply node 106 (i.e., the first voltage supplied by the first power supply node 104 can be three times the second voltage or more than three times the second voltage supplied by the second power supply node 106). In one example, the first voltage supplied by the first power supply node 104 is greater than about 15 V (e.g., in a range between about 15 V and about 50 V, such as about 32 V), and the second voltage supplied by the second power supply node 106 is less than about 15 V (e.g., 5.6 V). In one example, the first maximum current can be greater than about 1 A (e.g., in a range between about 1 A and about 10 A), and the second maximum current can be less than about 1 A (e.g., in a range between about 50 mA and about 500 mA).

[0026] FIG. 1B is a block diagram illustrating another example of an integrated circuit 100b (e.g., a fluidic die). The fluidic die 100b includes a memory cell 102, a first power supply node 104, and a second power supply node 106 as previously described and illustrated with respect to FIG. 1A The fluidic die 100b includes a logic circuit 108, a plurality of fluid actuation devices 110, a first contact pad 112, and a second contact pad 114. The first power supply node 104 is to supply power to the plurality of fluid actuation devices 110. The second power supply node 106 is to supply power to the logic circuit 108.

[0027] The first contact pad 112 is electrically coupled to the first power supply node 104. While one first contact pad 112 is illustrated in FIG. 1B other examples, the fluidic die 100b can include more than one first contact pad electrically coupled to the first power supply node 104. The second contact pad 114 is electrically coupled to the second power supply node 106. While one second contact pad 114 is illustrated in FIG. 1B other examples, the fluidic die 100b can include more than one second contact pad electrically coupled to the second power supply node 106.

[0028] The logic circuit 108 is configured to receive power from the second power supply node 106. The logic circuit 108 can control operation of the fluidic die 100b, including reading and writing data to the plurality of memory cells 102 and controlling triggering of the plurality of fluidic actuation devices 110.

[0029] FIG. 2 is a block diagram illustrating one example of a voltage regulator circuit 200 for generating a memory write voltage and a memory read voltage. In one example, the voltage regulator circuit 200 can be included in the integrated circuit 100a of FIG. 1A or the integrated circuit 100b of FIG. 1B . The voltage regulator circuit 200 includes a first voltage regulator 202 (e.g., a memory write voltage regulator), a second voltage regulator 206 (e.g., a memory read voltage regulator), a voltage isolation component 208, and a memory cell power node 210. An input of the first voltage regulator 202 is electrically coupled to the first power supply node 104 to receive the first voltage (e.g., VPP). An output of the first voltage regulator 202 is electrically coupled to an input of the voltage isolation component 208 through a signal path 204. An input of the second voltage regulator 206 is electrically coupled to the second power supply node 106 to receive the second voltage (e.g., VDD). An output of the second voltage regulator 206 and an output of the voltage isolation component 208 are electrically coupled to the memory cell power node 210. The memory cell power node 210 is electrically coupled to the plurality of memory cells 1020-102 N ( FIGS. 1A-1B ).

[0030] The first voltage regulator 202 is configured to generate a memory write voltage on the signal path 204 based on the first voltage for writing data to the plurality of memory cells. The memory write voltage can be less than the first voltage. The voltage isolation component 208 passes the memory write voltage on the signal path 204 to the memory cell power node 210. The voltage isolation component 208 electrically isolates the first voltage regulator 202 from the second voltage regulator 206 and from the memory cell power node 210. The voltage isolation component can include a high voltage diode, a high voltage isolation switch, or other suitable high voltage isolation circuit or device.

[0031] The second voltage regulator 206 is to generate a memory read voltage on the memory cell power node 210 based on the second voltage to read data from the plurality of memory cells. The memory read voltage can be less than or equal to the second voltage. In one example, both the first voltage regulator 202 and the second voltage regulator 206 are disabled until a write or read request is received (e.g., from the logic circuit 108). In response to a write request, the first voltage regulator 202 is enabled to provide a memory write voltage on the memory cell power node 210, data is written to selected memory cells, and then the first voltage regulator 202 is disabled. In response to a read request, the second voltage regulator 206 is enabled to provide a memory read voltage on the memory cell power node 210, data is read from selected memory cells, and then the second voltage regulator 206 is disabled.

[0032] FIGS. 3A-3D is a flow diagram illustrating one example of a method 300 for accessing a plurality of memory cells (e.g., 102) of an integrated circuit (e.g., 100a or 100b). As FIG. 3A illustrated in FIG. 3, at 302, the method 300 includes powering the plurality of memory cells of the integrated circuit for a write operation via a first power supply (e.g., VPP). At 304, the method 300 includes powering the plurality of memory cells for a read operation via a second power supply (e.g., VDD), where a first voltage provided by the first power supply is greater than a second voltage provided by the second power supply.

[0033] As illustrated in FIG. 3, at 306, the method 300 can further include generating a memory write voltage (e.g., via the memory write voltage regulator 202) based on the first voltage to write data to the plurality of memory cells. At 308, the method 300 can further include generating a memory read voltage (e.g., via the memory read voltage regulator 206) based on the second voltage to read data from the plurality of memory cells, where the memory write voltage is greater than the memory read voltage. FIG. 3B

[0034] As illustrated in FIG. 3, at 310, the method 300 can further include reading the plurality of memory cells when the integrated circuit exits a reset state. Upon exiting the reset state (e.g., for die initialization), the first power supply can be disabled (or blocked), but the second power supply can be enabled, thereby enabling the plurality of memory cells to be read, but not written to. FIG. 3C

[0035] As illustrated in FIG. 3, at 312, the method 300 can further include writing data to the plurality of memory cells when the integrated circuit is in the reset state. Upon entering the reset state, the second power supply can be disabled (or blocked), but the first power supply can be enabled, thereby enabling the plurality of memory cells to be written to, but not read from. FIG. 3D ​​As illustrated in the middle, at 312, the method 300 can further include powering the plurality of fluid actuation devices (e.g., 110) of the integrated circuit via the first power supply. At 314, the method 300 can further include powering the logic circuit (e.g., 108) of the integrated circuit via the second power supply.

[0036] FIG. 4A An example of a fluid die 400 is illustrated, and FIG. 4B An enlarged view of an end of the fluid die 400 is illustrated. In one example, the fluid die 400 includes a first column 402 of contact pads, a second column 404 of contact pads, and a column 406 of fluid actuation devices 408. FIG. 1A the integrated circuit 100a of FIG. 1, FIG. 1B the integrated circuit 100b of FIG. 2, and / or FIG. 2 the regulator circuit 200 of FIG. 3. The fluid die 400 includes a first column 402 of contact pads, a second column 404 of contact pads, and a column 406 of fluid actuation devices 408.

[0037] The second column 404 of contact pads is aligned with the first column 402 of contact pads and is a distance (i.e., along the Y-axis) from the first column 402 of contact pads. The column 406 of fluid actuation devices 408 is longitudinally disposed relative to the first column 402 of contact pads and the second column 404 of contact pads. The column 406 of fluid actuation devices 408 is also disposed between the first column 402 of contact pads and the second column 404 of contact pads. In one example, the fluid actuation devices 408 are nozzles or fluid pumps for ejecting droplets.

[0038] In one example, the first column 402 of contact pads includes nine contact pads. The first column 402 of contact pads can include, in order, the following contact pads: a data contact pad 410, a clock contact pad 412, a mode contact pad 414, a multipurpose input / output (e.g., sensing) pad 416, a logic power ground return contact pad 418, a logic reset contact pad 420, a trigger contact pad 422, a first high voltage power supply contact pad 424, and a first high voltage power ground return contact pad 426. In one example, the first high voltage power supply contact pad 424 provides electrical coupling to a high voltage power supply as previously described with respect to the integrated circuit 100a of FIG. 1. FIG. 1BThe contact pads 112 of the first power supply node 104 are described and illustrated. Thus, the first column 402 of contact pads includes the data contact pads 410 at the top of the first column 402, the first high voltage power supply ground return contact pad 426 at the bottom of the first column 402, and the first high voltage power supply contact pad 424 directly above the first high voltage power supply ground return contact pad 426. Although the contact pads 410, 412, 414, 416, 418, 420, 422, 424, and 426 are illustrated in a particular order, in other examples, the contact pads can be arranged in a different order. In other examples, there can be two additional contact pads (not shown) above the data contact pads 410 that are not connected to circuitry of any fluidic die 400. The two additional contact pads can be used for wire bond jumpers between multiple fluidic dies during manufacturing of a multi-die printhead, such as a color printhead.

[0039] In one example, the second column 404 of contact pads includes three contact pads. The second column 404 of contact pads can include, in order, the following contact pads: the second high voltage power supply contact pad 428, the second high voltage power supply ground return contact pad 430, and the logic power supply contact pad 432. In one example, the logic power supply contact pad 432 provides electrical coupling to logic circuitry of the fluidic die 400, such as the logic circuitry 208 of FIG. 2. In one example, the second high voltage power supply contact pad 428 provides electrical coupling to the high voltage power supply 206 of FIG. 2. In one example, the second high voltage power supply ground return contact pad 430 provides electrical coupling to the high voltage power supply ground return 210 of FIG. 2. FIG. 1B The contact pads 114 of the second power supply node 106 are described and illustrated. Thus, the second column 404 of contact pads includes the second high voltage power supply contact pad 428 at the top of the second column 404, the second high voltage power supply ground return contact pad 430 directly below the second high voltage power supply contact pad 428, and the logic power supply contact pad 432 at the bottom of the second column 404. Although the contact pads 428, 430, and 432 are illustrated in a particular order, in other examples, the contact pads can be arranged in a different order.

[0040] The data contact pads 410 can be used to input serial data to the die 400 for selecting fluid actuation devices, memory bits, thermal sensors, configuration modes (e.g., via configuration registers), etc. The data contact pads 410 can also be used to output serial data from the die 400 for reading memory bits, configuration modes, status information (e.g., via status registers), etc. The clock contact pads 412 can be used to input a clock signal to the die 400 to shift serial data on the data contact pads 410 into the die or to shift serial data out of the die to the data contact pads 410. The mode contact pads 414 can be used as a logic input to control access to enable / disable configuration modes (i.e., functional modes) of the die 400. The multipurpose input / output contact pads 416 can be used for analog sensing and / or digital test modes of the die 400. The logic power ground return contact pads 418 provide a ground return path for logic power (e.g., about 0 V) supplied to the die 400. In one example, the logic power ground return contact pads 418 are electrically coupled to a semiconductor (e.g., silicon) substrate 440 of the die 400.

[0041] The logic reset contact pads 420 can be used as a logic reset input to control an operating state of the die 400. The fire contact pads 422 can be used as a logic input to latch loaded data from the data contact pads 410 and to enable fluid actuation devices or memory elements of the die 400. The logic power supply contact pads 432 can be used to supply logic power (e.g., between about 1.8 V and about 15 V, such as about 5.6 V) to the die 400.

[0042] The first high voltage power supply contact pads 424 and the second high voltage power supply contact pads 428 can be used to supply high voltage (e.g., about 32 V) to the die 400. The first high voltage power ground return contact pads 426 and the second high voltage power ground return contact pads 430 can be used to provide a power ground return (e.g., about 0 V) for the high voltage power supply. The high voltage power ground return contact pads 426 and 430 are not directly electrically connected to the semiconductor substrate 440 of the die 400. The particular contact pad order of the high voltage power supply contact pads 424 and 428 and the high voltage power ground return contact pads 426 and 430 as the innermost contact pads can improve power delivery to the die 400. Having the high voltage power ground return contact pads 426 and 430 at the bottom of the first column 402 and the middle of the second column 404, respectively, can improve manufacturing reliability and can improve ink short protection.

[0043] The die 400 includes an elongated substrate 440 having a length 442 (along the Y-axis), a thickness 444 (along the Z-axis), and a width 446 (along the X-axis). In one example, the length 442 is at least twenty times the width 446. The width 446 can be 1 mm or less and the thickness 444 can be less than 500 microns. Fluid actuation devices 408 (e.g., fluid actuation logic) and contact pads 410-432 are provided on the elongated substrate 440 and arranged along the length 442 of the elongated substrate. The fluid actuation devices 408 have a strip length 452 that is less than the length 442 of the elongated substrate 440. In one example, the strip length 452 is at least 1.2 cm. The contact pads 410-432 can be electrically coupled to the fluid actuation logic. The first column 402 of contact pads can be arranged near a first longitudinal end 448 of the elongated substrate 440. The second column 404 of contact pads can be arranged near a second longitudinal end 450 of the elongated substrate 440 opposite the first longitudinal end 448.

[0044] FIG. 5 is a block diagram illustrating one example of a fluid ejection system 500. The fluid ejection system 500 includes a fluid ejection assembly, such as a printhead assembly 502, and a fluid supply assembly 510, such as an ink supply assembly. In the illustrated example, the fluid ejection system 500 also includes a maintenance station assembly 504, a carriage assembly 516, a print media transport assembly 518, and an electronic controller 520. Although the following description provides examples of systems and assemblies for fluid handling with respect to ink, the disclosed systems and assemblies are also applicable to handling fluids other than ink.

[0045] The printhead assembly 502 includes a single printhead or fluid die 400 or multiple printheads or fluid dies 400 that include fluid actuation devices (e.g., ejection actuators, or non-ejection actuators such as microfluidic pumps for moving fluid in microfluidic channels). The fluid die 400 can eject drops of ink or fluid through a plurality of orifices or nozzles 408. In one example, the drops are directed toward a media, such as a print media 524, to print onto the print media 524. In one example, the print media 524 includes any type of suitable sheet material, such as paper, cardstock, transparency film, Mylar, fabric, etc. In another example, the print media 524 includes media for three-dimensional (3D) printing, such as a powder bed, or media for bioprinting, drug discovery testing, and / or other life science applications, such as reservoirs, vessels, or receptacles. In one example, the nozzles 408 are arranged in a single column or single array or multiple columns or multiple arrays such that proper sequential ejection of fluid from the nozzles 408 as the printhead assembly 502 and the print media 524 are moved relative to each other causes characters, symbols, and / or other graphics or images to print onto the print media 524.

[0046] The fluid supply assembly 510 supplies fluid (e.g., ink) to the printhead assembly 502 and includes a reservoir 512 for storing the fluid. Thus, in one example, fluid flows from the reservoir 512 to the printhead assembly 502. In one example, the printhead assembly 502 and the fluid supply assembly 510 are housed together in an inkjet or fluid ejection print cartridge or pen. In another example, the fluid supply assembly 510 is separate from the printhead assembly 502 and supplies fluid to the printhead assembly 502 through an interface connection 513, such as a supply tube and / or valve.

[0047] The carriage assembly 516 positions the printhead assembly 502 relative to the print media transport assembly 518, and the print media transport assembly 518 positions the print media 524 relative to the printhead assembly 502. Thus, a print zone 526 is defined in the area between the printhead assembly 502 and the print media 524 adjacent the nozzles 408. In one example, the printhead assembly 502 is a scanning printhead assembly such that the carriage assembly 516 moves the printhead assembly 502 relative to the print media transport assembly 518. In another example, the printhead assembly 502 is a non-scanning printhead assembly such that the carriage assembly 516 fixes the printhead assembly 502 at a prescribed position relative to the print media transport assembly 518.

[0048] The maintenance station assembly 504 provides for purging, wiping, capping, and / or priming of the printhead assembly 502 to maintain the functionality of the printhead assembly 502, and more particularly, the nozzles 408. For example, the maintenance station assembly 504 can include a rubber blade or wiper that periodically passes over the printhead assembly 502 to wipe and clear excess fluid from the nozzles 408. Additionally, the maintenance station assembly 504 can include a cap that covers the printhead assembly 502 to protect the nozzles 408 from drying out during periods of non-use. Additionally, the maintenance station assembly 504 can include a spittoon into which the printhead assembly 502 ejects fluid during purging to ensure that the reservoir 512 maintains an appropriate level of pressure and fluidity, and to ensure that the nozzles 408 do not clog or leak. The functionality of the maintenance station assembly 504 can include relative motion between the maintenance station assembly 504 and the printhead assembly 502.

[0049] The electronic controller 520 communicates with the printhead assembly 502 over a communication path 503, with the maintenance station assembly 504 over a communication path 505, with the carriage assembly 516 over a communication path 517, and with the print media transport assembly 518 over a communication path 519. In one example, the electronic controller 520 and the printhead assembly 502 can communicate via the carriage assembly 516 over a communication path 501 when the printhead assembly 502 is installed in the carriage assembly 516. The electronic controller 520 can also communicate with the fluid supply assembly 510 so that, in one implementation, a new (or used) fluid supply can be detected.

[0050] The electronic controller 520 receives data 528 from a host system, such as a computer, and can include memory for temporarily storing the data 528. The data 528 can be sent to the fluid ejection system 500 along an electronic, infrared, optical, or other information transport path. The data 528 represents, for example, a document and / or file to be printed. Thus, the data 528 forms a print job for the fluid ejection system 500 and includes a single print job command and / or command parameter or multiple print job commands and / or command parameters.

[0051] In one example, the electronic controller 520 provides control of the printhead assembly 502, including timing control for ejection of drops from the nozzles 408. Thus, the electronic controller 520 defines a pattern of ejected drops that form characters, symbols, and / or other graphics or images on the print media 524. The timing control, and thus the pattern of ejected drops, is determined by the print job command and / or command parameter. In one example, logic and drive circuitry forming part of the electronic controller 520 is located on the printhead assembly 502. In another example, logic and drive circuitry forming part of the electronic controller 520 is located off the printhead assembly 502.

[0052] FIG. 6A FIG. 6 illustrates an inkjet printhead cartridge 603 including an ink ejection die 600b and a package 600 including an integrated circuit 600a, which can represent any of the example integrated circuits disclosed herein. The package 600 and / or the integrated circuit 600a can include a flat substrate, such as a flex circuit (sometimes referred to as a tab head assembly, flex circuit assembly, or flex printed circuit board) or a printed circuit board, to facilitate attachment to the cartridge 603 without interfering with the cartridge 603 connecting to a printer receiving station. The die 600b includes ink ejection actuators 608b. The combination of the integrated circuit 600a and the package 600 can be referred to as an integrated circuit package 600.

[0053] FIG. 6B FIG. 6 illustrates an inkjet printhead cartridge 603 including an ink ejection die 600b and a package 600 including an integrated circuit 600a, which can represent any of the example integrated circuits disclosed herein. The package 600 and / or the integrated circuit 600a can include a flat substrate, such as a flex circuit (sometimes referred to as a tab head assembly, flex circuit assembly, or flex printed circuit board) or a printed circuit board, to facilitate attachment to the cartridge 603 without interfering with the cartridge 603 connecting to a printer receiving station. The die 600b includes ink ejection actuators 608b. The combination of the integrated circuit 600a and the package 600 can be referred to as an integrated circuit package 600. FIG. 6Aa simplified diagram of a package 600. Contacts 601b, including first and second power supply nodes 604 and 606 and memory read / write (e.g., data) contacts 605, are configured to align with corresponding original signal contacts 601b of a print cartridge 603 to power, read, and write to a plurality of off-chip memory units 602 of the package 600. The integrated circuit 600a and its contacts 601 are configured to divert signals that were originally intended for memory units 602b on other dies that reside on a fluid ejection die of the print cartridge 603 to the plurality of off-chip memory units 602. The package contact array 601 is configured to be directly and / or indirectly connected to host printer contacts. The package 600 is arranged such that when the package is attached to the cartridge 603, the contacts 601 align with the cartridge contacts 601b such that both the first and / or second power supply signals are re-routed to the integrated circuit 600a and transmitted to the ink ejection die 600b, while at least some of the memory read / write data signals on the data contacts 605 can be intercepted without further transmission to the die 600b. Other read / write signals can be transmitted to the die 600b depending on, for example, whether a memory read / write function is enabled using memory addressing logic 608. The memory addressing logic 608 can be used to address individual memory units 602.

[0054] In one example, the print cartridge 603 is a used, refurbished, and / or refilled print cartridge that includes an ink reservoir 607. In one example, the die 600b is a used die, while the reservoir 607 has not been used previously. In both of these examples, we can refer to the print cartridge 603 as a refurbished print cartridge because the die 600b has been refurbished. The refurbished print cartridge 603 can include at least: a previously used fluid ejection die 600b that includes a plurality of fluid actuation devices 608b and a plurality of at least partially written and / or at least partially disabled memory cells 602b; an ink reservoir 607; a printer signal contact array 601b connected to the fluid ejection die 600b; and / or an integrated circuit package 600 attached to a wall of the print cartridge 603. The plurality of off-die memory cells 602 are connected to host printer contacts using the package contacts 601 for memory read and write. A first power supply node 604 of the package 600 is connected to at least one of these contacts 601 (i.e., to a single contact or to multiple contacts) to power the plurality of memory cells 602 for writing data to the plurality of memory cells 602. A second power supply node 606 of the package 600 is connected to at least one of the package contacts 601 (i.e., to a single contact or to multiple contacts) to power the plurality of memory cells 602 for reading data from the plurality of memory cells. In one example, the package 600 includes voltage regulation circuitry for converting to custom memory cell read / write voltages.

[0055] Although specific examples have been illustrated and described herein, various alternations and / or equivalents can be substituted for the specific examples without departing from the scope of the disclosure. This application is intended to cover any alternatives, modifications, and equivalents of the specific examples discussed herein. Therefore, the disclosure is not intended to be limited to the specific examples disclosed.

Claims

1. A print cartridge circuit component comprising an integrated circuit for association with a plurality of fluid actuation devices and comprising an input signal contact for receiving an input signal from a host printer, the integrated circuit comprising: a plurality of memory cells; a first power supply node for supplying power to the plurality of memory cells for writing data to the plurality of memory cells, wherein the first power supply node is for supplying a first voltage and a first maximum current; a second power supply node for supplying power to the plurality of memory cells for reading data from the plurality of memory cells, wherein the second power supply node is for supplying a second voltage and a second maximum current, and wherein the first voltage is greater than the second voltage and the first maximum current is greater than the second maximum current; a memory cell power node electrically coupled to the plurality of memory cells; a first voltage regulator for generating a memory write voltage on the memory cell power node based on the first voltage for writing data to the plurality of memory cells; and a second voltage regulator for generating a memory read voltage on the memory cell power node based on the second voltage for reading data from the plurality of memory cells, wherein the memory write voltage is greater than the memory read voltage.

2. The printing cartridge electrical component of claim 1, wherein, the second power supply node is for supplying a voltage less than 7 V and the first power supply node is for supplying a voltage greater than 9 V.

3. The printing cartridge electrical component of claim 1 or 2, wherein, the plurality of memory cells are readable with the first power supply node disabled.

4. The print cartridge circuit component of claim 1 or 2, the integrated circuit further comprising: a plurality of fluid actuation devices, wherein the first power supply node is for supplying power to the plurality of fluid actuation devices.

5. The print cartridge circuit component of claim 1 or 2, the integrated circuit further comprising: a logic circuit, wherein the second power supply node is for supplying power to the logic circuit.

6. The printing cartridge electrical component of claim 5, wherein, the logic circuit is for controlling reading and writing of data to the plurality of memory cells and triggering of the plurality of fluid actuation devices.

7. The print cartridge circuit component of claim 1, the integrated circuit further comprising: a voltage isolation component between the first voltage regulator and the memory cell power node.

8. The print cartridge circuit component of any one of claims 1 or 2, comprising: an off-die package comprising: the integrated circuit, wherein the memory cells are off-die; and a memory cell power node electrically coupled to the plurality of memory cells. contacts connected to the first and second power supply nodes and memory read / write data contacts to transmit corresponding printer signals to power, read, and write to the plurality of memory cells off-die when installed, wherein signals originally intended for on-die memory cells are diverted to the plurality of memory cells off-die, the on-die memory cells residing on a fluid ejection die of the print cartridge.

9. A print cartridge comprising an ink reservoir and an ink ejection die, the ink ejection die comprising an integrated circuit of the print cartridge circuitry assembly of any one of claims 1-7.

10. A used, refurbished, and / or refilled print cartridge comprising an off-die package of the print cartridge circuitry assembly of the print cartridge of claim 9, the off-die package connected to printer signal input contacts of the print cartridge.

11. A refurbished print cartridge comprising: a previously used fluid ejection die comprising a plurality of fluid actuation devices and a plurality of at least partially written and / or at least partially disabled memory cells; an ink reservoir; an array of printer signal contacts connected to the fluid ejection die; and an integrated circuit package attached to a wall of the print cartridge and comprising: a plurality of memory cells connected to at least one of the printer signal input contacts for reading and writing; a first power supply node connected to at least one of the printer signal input contacts to power the plurality of memory cells to write data to the plurality of memory cells; and a second power supply node connected to at least one of the printer signal input contacts to power the plurality of memory cells to read data from the plurality of memory cells. the integrated circuit package comprises a flexible circuit comprising contacts for connecting printer signals to the memory cells and the first and second power supply nodes.

12. The remanufactured printing cartridge of claim 11, wherein, 13. A print cartridge fluid ejection die comprising: a first power supply node to supply a first voltage; a second power supply node to supply a second voltage; a plurality of fluid actuation devices to receive power from the first power supply node; a plurality of memory cells to receive power from the first power supply node during a write operation and from the second power supply node during a read operation; and a logic circuit to receive power from the second power supply node, wherein the first voltage is greater than the second voltage. ​ ​ 14. The printhead fluid ejection die of claim 13, further comprising: a first voltage regulator to generate a memory write voltage based on the first voltage to write data to the plurality of memory cells; and a second voltage regulator to generate a memory read voltage based on the second voltage to read data from the plurality of memory cells, wherein the memory write voltage is less than the first voltage and the memory read voltage is less than or equal to the second voltage.

15. The printing cartridge fluid ejection die of claim 13 or 14, wherein, The plurality of memory cells comprise non-volatile memory cells.

16. The printing cartridge fluid ejection die of claim 13 or 14, wherein, The first voltage is at least three times the second voltage.

17. A method for accessing a plurality of memory cells of an integrated circuit, the method comprising: supplying power to the plurality of memory cells of the integrated circuit for write operations via a first power supply; and supplying power to the plurality of memory cells for read operations via a second power supply, wherein the first power supply provides a first voltage that is greater than a second voltage provided by the second power supply; generating a memory write voltage based on the first voltage to write data to the plurality of memory cells; and generating a memory read voltage based on the second voltage to read data from the plurality of memory cells, wherein the memory write voltage is greater than the memory read voltage.

18. The method of claim 17, further comprising: reading the plurality of memory cells in the event that the integrated circuit exits a reset state.

19. The method of claim 17 or 18, further comprising: supplying power to a plurality of fluid actuation devices of the integrated circuit via the first power supply; and supplying power to a logic circuit of the integrated circuit via the second power supply.

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