Method for implementing hard real-time in non-real-time system in hardware-in-the-loop simulation and electronic device
By creating real-time model tasks in non-real-time systems, setting the number of threads based on the number of processor cores, and using critical sections to synchronize multiple threads, the problem of high hardware investment in hardware-in-the-loop simulation is solved, enabling direct execution of hard real-time simulation on personal computers, improving development and testing efficiency and the flexibility of simulation signal observation.
Patent Information
- Application Number
- CN202311360067.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-22
- Filing Date
- 2023-10-19
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2043-10-19
AI Technical Summary
Existing technologies require real-time systems in hardware-in-the-loop simulations, which increases hardware investment and deployment costs, and makes it impossible to directly observe key signals.
In non-real-time systems, real-time model tasks are created, computer configurations are automatically read, and the number of threads is set according to the number of processor cores to achieve hard real-time simulation, including single-threaded and multi-threaded execution modes. Critical sections are used to synchronize multiple threads to ensure simulation time accuracy.
It enables the direct running of a hard real-time environment on a personal computer, reducing hardware investment costs and improving development and testing efficiency as well as the flexibility of simulation signal observation.
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Figure CN117608740B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of software development for vehicles, and particularly relates to a method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation and electronic equipment. BACKGROUND
[0002] In order to perform the task of hardware-in-the-loop simulation, it is often necessary to rely on a real-time system, and the execution of the task is deployed in the real-time system. The real-time system is on another computer, not locally, and any action needs to be completed by remote calling, which causes problems such as the inability to directly observe related signals and key signals that determine the function and performance of an algorithm. SUMMARY
[0003] The application aims to provide a method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation, a computer readable storage medium, a processor and electronic equipment.
[0004] To solve the above technical problems, the application provides a method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation, which comprises the following steps:
[0005] creating a real-time model task and forming a task program;
[0006] The task program automatically reads the computer configuration and judges the number Z of processor cores of the current computer device. When the number Z of processor cores does not exceed X, the number n of threads is set to 1 to execute the real-time model task, otherwise the number n of threads is set to (Z-X) / Y to execute the real-time model task, wherein
[0007] Y represents the number of threads of one physical core of the processor.
[0008] In another aspect, the application further provides a computer readable storage medium configured to store a program for executing the method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation as described above.
[0009] In a third aspect, the application further provides a processor configured to execute a program for implementing the method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation as described above.
[0010] In a fourth aspect, the application further provides electronic equipment comprising a processor, a readable storage medium, a communication bus and a communication interface; wherein the processor, the readable storage medium and the communication interface realize communication with each other through the communication bus.
[0011] The readable storage medium is used to store a program for executing the method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation as described above, and the program causes the processor to execute the corresponding operations of the method for implementing hard real-time of a non-real-time system in hardware-in-the-loop simulation.
[0012] The present application has the advantage that it enables a virtual hard real-time environment to be run directly in a personal computer when performing a hardware-in-the-loop simulation task, achieving hard real-time, i.e. without the need to purchase a real-time system, and greatly improving development test efficiency because all operations are performed locally.
[0013] Other features and advantages of the present application will be set forth in the descriptions that follow, and in part will be apparent from the description, or can be learned by practice of the application. The purposes and other advantages of the application will be realized and attained by the structure particularly pointed out in the description and the appended drawings.
[0014] In order to make the above objectives, features and advantages of the present application more apparent, the following will describe a preferred embodiment in detail, and the accompanying drawings will be referred to, as follows. BRIEF DESCRIPTION OF DRAWINGS
[0015] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.
[0016] Figure 1 A step diagram of a method for implementing hard real-time by a non-real-time system in hardware-in-the-loop simulation is shown;
[0017] Figure 2 A principle block diagram of a system for implementing hard real-time by a non-real-time system in hardware-in-the-loop simulation is shown;
[0018] Figure 3 A principle block diagram of an electronic device is shown. DETAILED DESCRIPTION
[0019] In order to make the objectives, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the present application will be described clearly and completely in the following with reference to the drawings. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0020] The current similar software generally achieves hard real-time through a real-time system when performing a hardware-in-the-loop simulation task, which needs to increase hardware investment and deployment cost, and the method for achieving hard real-time of a non-real-time system in hardware-in-the-loop simulation related to some embodiments does not need to additionally increase a real-time system and can achieve hard real-time in a non-real-time system.
[0021] Specifically, some embodiments provide a method for achieving hard real-time of a non-real-time system in hardware-in-the-loop simulation, comprising: creating a real-time model task and forming a task program; the task program automatically reads computer configuration and judges the number Z of processor cores of a current computer device, when the number Z of processor cores does not exceed X, sets the number n of threads as 1 to execute the real-time model task, otherwise sets the number n of threads as (Z-X) / Y to execute the real-time model task, wherein Y represents the number of threads of one physical core of a processor.
[0022] The method for achieving hard real-time of a non-real-time system in hardware-in-the-loop simulation related to some embodiments achieves that a virtual hard real-time environment can be directly run in a personal computer to achieve hard real-time when performing a hardware-in-the-loop simulation task, that is, a real-time system does not need to be purchased, and since all operations are performed locally, the development and test efficiency is greatly improved, and the flexibility of simulation signal observation and modification is increased, for example, a local program code is modified in time to add a printing information, observation information, curve drawing signal information and other functions, and the code can be immediately run after local compilation, which is efficient. According to the traditional method, an input and output interface needs to be designed for the local variable, a simulation model interface table needs to be updated, the entire code program needs to be compiled, a real-time system software needs to be re-deployed, the simulation model needs to be remotely run, and then observation is performed.
[0023] Various non-limiting embodiments of the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.
[0024] As Figure 1 shown, some embodiments provide a method for achieving hard real-time of a non-real-time system in hardware-in-the-loop simulation, comprising:
[0025] Step S101, creating a real-time model task and forming a task program;
[0026] Step S102, the task program automatically reads computer configuration and judges the number Z of processor cores of a current computer device, when the number Z of processor cores does not exceed X, sets the number n of threads as 1 to execute the real-time model task, otherwise sets the number n of threads as (Z-X) / Y to execute the real-time model task, wherein
[0027] Y represents the number of threads of one physical core of a processor.
[0028] Specifically, the real-time model task is a timing program, which is created by first creating a timer, setting the period of the timer, such as 500 microseconds, and then calling the step function of the model according to the period, forming a task program that is a code module for real-time model task simulation.
[0029] The number of processor cores Z is determined by the processor model, and different processor models have completely different core numbers Z, for example, the Intel Xeon Platinum 9282 has 56 cores, and the Intel Core i5-2520M has 2 cores.
[0030] When Z is not more than X, it means that the current computer performance is weak and is not suitable for dividing multiple threads to execute simulation, otherwise it will cause the local computer to crash, at this time, single-thread execution of real-time model tasks is suitable, that is, setting the thread number n = 1 to execute the real-time model task.
[0031] When Z exceeds X, in order to prevent the case of multiple threads executing simulation in the case of weak computer performance, the minimum value of X needs to be limited, that is, the minimum value of the core number Z of the computer executing the simulation task is limited, and in the limit case X = 0, the thread number n = Z / Y is equal to the number of real physical cores, when X is not zero, it means that X / Y real physical cores are reserved as self-cores, which do not participate in simulation, thereby ensuring the smooth running of the software system and other software.
[0032] As an implementation of some embodiments, setting the thread number n = 1 to execute the real-time model task includes:
[0033] Defining a real-time time interval m for the execution of the real-time model task;
[0034] The thread acquires the current time t in real time, and judges whether the current time t is greater than the next execution time t_next in real time,
[0035] When t > t_next, t_next = t_next + m, and the real-time model task is executed.
[0036] It should be noted that when the real-time model task is executed for the first time, t_next = m, and t = 0.
[0037] Specifically, the method for executing the real-time model task when n = 1 is described in detail in combination with the case:
[0038] When X = 4, and the processor model of the computer device is Intel Core i5-2520M, the number of cores Z = 2, which is less than 4, indicating that the current computer performance is weak, and it is not suitable to divide multiple threads to execute the simulation, otherwise it will cause the local computer to crash, at this time, it is suitable to execute the real-time model task in single thread, that is, the number of threads n = 1 is set to execute the real-time model task.
[0039] Since there is only one thread executing the real-time model task, during the execution process, the operation of judging whether the current time t is greater than the next execution time t_next does not exist thread preemption, so it is not necessary to use critical section and other means for thread synchronization, thereby reducing the performance overhead caused by introducing critical section, but the defects of single thread itself are also embodied, when the processor time slice of the thread is deprived due to operating system scheduling, the locking accuracy of t_next time will be reduced.
[0040] When the single thread executes the real-time model task, the real-time time interval m = 500 microseconds for executing the real-time model task is set. The pseudo code for the thread to execute the real-time model task is as follows:
[0041]
[0042] Wherein, "is_running" is a simulation running enable flag, when the simulation is terminated by the user or naturally exits, the flag is false, and the algorithm no longer executes the while loop; "get_current_time_stamp_us()" is an internal function of the simulation system, which is used to obtain the time stamp of the current time, and the unit is microsecond;
[0043] "run_model_task()" is an internal function of the simulation system, which is used to periodically call the step function of the model;
[0044] "other_task()" is other task of Windows system, such as Sleep(1) can be executed in it to reduce the consumption of processor time for the current processor.
[0045] As another implementation of some embodiments, when the number of threads is n = (Z-X) / Y, and the number of cores Z exceeds X, indicating that the processor of the current computer device is suitable for starting multi-thread simulation, the method for executing the real-time model task comprises:
[0046] Defining the real-time time interval m for executing the real-time model task;
[0047] Each thread simultaneously acquires the corresponding current time t in real time, and judges whether the corresponding current time t is greater than the next execution time t_next in real time;
[0048] When at least one thread recognizes that t > t_next, the thread attempts to enter the critical section, at which time other threads are blocked from entering the critical section, and after the thread successfully enters the critical section, the flag that the thread previously determined that t > t_next is no longer valid, so the thread that successfully enters the critical section will execute the following content in the critical section:
[0049] The current time t is repeatedly obtained, and it is determined whether the current time t is greater than the next execution time t_next:
[0050] If yes, t_next = t_next + m, the real-time model task is executed, and the thread exits the critical section;
[0051] If no, the thread directly exits the critical section.
[0052] Specifically, the method for executing the real-time model task when n = (Z-X) / Y is described in detail in combination with a case:
[0053] When X = 2 and Y = 2, the number of cores Z = 6 of the processor of the computer device is greater than 2, and the number of threads n = (Z-X) / Y = (6-2) / 2 = 2 is set to execute the real-time model task.
[0054] Two threads are defined as the 0th thread and the 1st thread.
[0055] The real-time time interval m = 500 microseconds for executing the real-time model task is defined, and the pseudo code for each thread to execute the model task is as follows:
[0056]
[0057]
[0058] Among them, “is_running” is a simulation running enable flag, when the simulation is terminated by the user or naturally exits, the flag is false, and the algorithm no longer executes the while loop; “get_current_time_stamp_us()” is an internal function of the simulation system, used to obtain the time stamp of the current time, with the unit of microseconds;
[0059] “EnterCriticalSection” is an API function of the Windows system, which is used to enter the critical section;
[0060] "FSection" is a critical section object shared by multiple threads; "LeaveCriticalSection" is an API function of Windows, which functions to exit the critical section; "run_model_task()" is an internal function of the simulation system, which is used to periodically call the step function of the model; "other_task()" is other tasks of the Windows system, such as Sleep(1) can be executed therein to reduce the consumption of the current processor for processor time.
[0061] The above pseudo code effectively alleviates the situation that the simulation time precision is reduced due to the fact that a single thread is deprived of the processor time by the system scheduling, that is, the simulation time precision is effectively guaranteed by the above method, thereby guaranteeing the simulation real-time performance.
[0062] The thread that fails to enter the critical section is blocked from entering the critical section until the thread that enters the critical section exits the critical section, and then the next attempt is started.
[0063] Still taking the method of executing the real-time model task when the number of threads n is set to 2 as an example, when the 0th thread fails to determine the next execution time t_next in time due to the system scheduling, the 1st thread has a great probability of determining the next execution time t_next, and when it identifies that t > t_next, it successfully enters the critical section, thereby preferentially executing the model task, and at this time, the 0th thread is blocked in the code line of entering the critical section. When the 1st thread executes the real-time model task and exits the critical section, the 0th thread will start to determine whether the current time t is greater than the next execution time t_next, and if the 0th thread successfully enters the critical section at this time, it will update the current time t again, that is, repeatedly acquire the current time t, and determine that the current time t is already less than the next execution time t_next (the next execution time t_next has been updated by the 1st thread), and then the 0th thread will not execute the real-time model task, but will immediately exit the critical section and wait for the next determination.
[0064] The thread that successfully enters the critical section is determined by the critical section itself, that is, the thread that successfully enters the critical section is randomly determined by the Windows system.
[0065] t_next is a global variable shared by each thread, that is, multiple threads can access the same variable. Each thread can share access to the same variable, so that any thread can first discover that the current time t is greater than the next execution time t_next, and then immediately attempt to enter the critical section, thereby effectively alleviating the situation that the simulation time precision is reduced due to the fact that a single thread is deprived of the processor time by the system scheduling, and effectively guaranteeing the simulation time precision.
[0066] Each set thread occupies one physical core of the processor, including:
[0067] The physical core index of the processor occupied by each thread is equal to the value obtained by performing a modulo operation on the corresponding thread number index and the total number of physical cores of the processor.
[0068] Each set thread occupies one physical core of the processor can bring the best performance of the computer device.
[0069] For example, a total of 10 threads are set, and the total number of physical cores of the processor is 8, then the physical core index of the processor occupied by the 0th thread is equal to the value obtained by performing a modulo operation on 0 and 8, which is 0; the physical core index of the processor occupied by the 9th thread is equal to the value obtained by performing a modulo operation on 9 and 8, which is 1.
[0070] The method for implementing hard real-time in a non-real-time system in the hardware-in-the-loop simulation of the present disclosure realizes that the virtual hard real-time environment can be directly run in the personal computer when performing the hardware-in-the-loop simulation task to achieve hard real-time, that is, there is no need to purchase a real-time system, and since all operations are performed locally, the development and testing efficiency is greatly improved, and the flexibility of simulation signal observation and modification is increased.
[0071] As shown in Figure 2 Some embodiments also provide a system for implementing hard real-time in a non-real-time system in a hardware-in-the-loop simulation, including a computer device configured to execute a task creation module and a task thread setting module; wherein
[0072] The task creation module is configured to create a real-time model task and form a task program;
[0073] The task thread setting module is configured to make the task program automatically read the computer configuration and judge the number Z of processor cores of the current computer device, when the number Z of processor cores does not exceed X, set the number n of threads to 1 to execute the real-time model task, otherwise set the number n of threads to (Z-X) / Y to execute the real-time model task, wherein
[0074] Y represents the number of threads of one physical core of the processor.
[0075] In some embodiments, the functions performed by the task creation module and the task thread setting module are implemented in the computer device, and specific descriptions can be referred to the specific description of the method for implementing hard real-time in a non-real-time system in a hardware-in-the-loop simulation, which will not be repeated here.
[0076] The electronic device in some embodiments is described from the perspective of hardware processing as follows:
[0077] Some embodiments of the present disclosure do not limit the specific implementation of the electronic device.
[0078] As Figure 3 shown, the electronic device includes a processor, a readable storage medium, a communication bus and a communication interface; wherein the processor, the readable storage medium and the communication interface realize communication with each other through the communication bus; the readable storage medium is used to store a program for implementing the method for realizing hard real-time of non-real-time system in hardware-in-the-loop simulation according to the embodiment, and the program makes the processor execute the corresponding operation of the method for realizing hard real-time of non-real-time system in hardware-in-the-loop simulation.
[0079] In other embodiments, the computer device and the industrial computer can also be used as an electronic device.
[0080] Figure 3 The structure shown does not constitute a limitation on the electronic device, and can include fewer or more components than shown, or combine certain components, or different component arrangements.
[0081] In some embodiments, the communication interface can be an RS232, RS485, USB port, TYPE port, etc., and can be a communication interface connected with an external bus adapter. It can also include a wired or wireless network interface, and the network interface can optionally include a wired interface and / or a wireless interface (such as a WI-FI interface, a Bluetooth interface, etc.), which is usually used to establish a communication connection between the computer device and other electronic devices.
[0082] The readable storage medium or the computer readable storage medium includes at least one type of memory, including a flash memory, a hard disk, a multimedia card, a card-type memory (e.g., an SD or DX memory, etc.), a magnetic memory, a magnetic disk, an optical disk, etc. In some embodiments, it can be an internal storage unit of the computer device, such as a hard disk of the computer device. In other embodiments, the memory can also be an external storage device of the computer device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. Further, the memory can include both the internal storage unit and the external storage device. The memory can be used not only to store application software and various data installed in the computer device, such as the code of a computer program, etc., but also to temporarily store data that has been output or will be output.
[0083] The processor in some embodiments can be a processor, a controller, a microcontroller, a microprocessor or other data processing chip, which is used to run the program code stored in the memory or process data, such as executing a computer program, etc.
[0084] In some embodiments, the communication bus can also be an input / output bus, which can be a Peripheral Component Interconnect (PCI) bus or an Enhanced Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc.
[0085] Optionally, the computer device can further include a user interface, which can include a display, an input unit such as a keyboard, and optionally, a standard wired interface, a wireless interface. Optionally, in some embodiments, the display can be an LED display, a liquid crystal display, a touch liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, etc. The display can also be appropriately referred to as a display screen or a display unit, for displaying information processed in the computer device and for displaying a visualized user interface.
[0086] The processor implements the above-mentioned Figure 1 The steps in the method for implementing hard real-time in a non-real-time system in a hardware-in-the-loop simulation, such as Figure 1 The steps S101-S102 shown. Alternatively, the processor implements the functions of each module or unit in each of the above-mentioned device embodiments when executing the computer program.
[0087] In some embodiments, the processor is specifically configured to implement the following steps:
[0088] Creating a real-time model task and forming a task program;
[0089] The task program automatically reads the computer configuration and determines the number Z of processor cores of the current computer device. When the number Z of cores does not exceed X, the number n of threads is set to 1 to execute the real-time model task, otherwise the number n of threads is set to (Z-X) / Y to execute the real-time model task, wherein
[0090] Y represents the number of threads of one physical core of the processor.
[0091] Optionally, as a possible implementation, the processor can also be configured to implement the following steps:
[0092] Setting the number of threads n to 1 to execute the real-time model task includes:
[0093] Defining a real-time time interval m for the execution of the real-time model task;
[0094] The thread acquires the current time t in real time, and determines whether the current time t is greater than the next execution time t_next in real time,
[0095] When t>t_next, t_next=t_next+m, and the real-time model task is executed simultaneously.
[0096] Optionally, as a possible implementation, the processor can also be used to implement the following steps:
[0097] When the real-time model task is executed for the first time, t_next=m, and t=0.
[0098] Optionally, as a possible implementation, the processor can also be used to implement the following steps:
[0099] Setting the number of threads to n=(Z-X) / Y to execute the real-time model task includes:
[0100] Defining the real-time time interval m of the real-time model task execution;
[0101] Each thread acquires the corresponding current time t in real time, and determines whether the corresponding current time t is greater than the next execution time t_next in real time;
[0102] When at least one thread recognizes that t>t_next, the thread attempts to enter the critical section, and the thread that successfully enters the critical section will execute the following contents in the critical section:
[0103] Repeating the acquisition of the current time t, and determining whether the current time t is greater than the next execution time t_next:
[0104] If yes, t_next=t_next+m, the real-time model task is executed simultaneously, and the thread exits the critical section;
[0105] If no, the thread directly exits the critical section.
[0106] Optionally, as a possible implementation, the processor can also be used to implement the following steps:
[0107] The thread that has not successfully entered the critical section is blocked from entering the critical section until the thread that has entered the critical section exits the critical section, and then the next attempt is started.
[0108] Optionally, as a possible implementation, the processor can also be used to implement the following steps:
[0109] The thread that has successfully entered the critical section is determined by the critical section itself.
[0110] Optionally, as a possible implementation, the processor can also be used to implement the following steps:
[0111] t_next is a common global variable for each thread.
[0112] Optionally, as a possible implementation, the processor can be further configured to implement the following steps:
[0113] Each set thread occupies a physical core of the processor, including:
[0114] The physical core index of the processor occupied by each thread is equal to the value obtained by performing a modulo operation on the corresponding thread number index and the total number of physical cores of the processor.
[0115] Some embodiments also provide a computer readable storage medium configured to store a program for implementing the method for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation as described in the foregoing embodiments, and the program can implement the specific steps of the method for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation when executed by a processor. For specific description of the method for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation, please refer to the foregoing description.
[0116] Some embodiments also provide a computer program product comprising a computer program or instructions, wherein the computer program or instructions, when executed on a computer, enable the computer to perform any of the possible methods for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation.
[0117] In several embodiments provided in the present application, it should be understood that the disclosed apparatus and method can also be implemented by other means. The apparatus embodiments described above are only schematic, and the flowcharts and block diagrams in the drawings show possible implementation architectures, functions and operations of the apparatus, method and computer program product according to the embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment or a part of code, which contains one or more executable instructions for implementing the specified logic function. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur in a different order than that noted in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, or they can be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and the combination of blocks in the block diagrams and / or flowcharts, can be implemented by a dedicated hardware-based system, or by a combination of special-purpose hardware and computer instructions.
[0118] In addition, each functional module in various embodiments of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.
[0119] The functions, if implemented in the form of software functional modules and sold or used as independent products, can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts that contribute to the prior art or parts of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present application.
[0120] Based on the above ideal embodiments according to the present application, through the above description, relevant personnel can make various changes and modifications without deviating from the scope of the technical idea of the present application. The technical scope of the present application is not limited to the contents of the specification, and the technical scope must be determined according to the scope of the claims.
Claims
1. A method for non-real-time system to implement hard real-time in hardware-in-the-loop simulation, characterized in that, Comprising: creating a real-time model task and forming a task program; the task program automatically reads the computer configuration and judges the number of processor cores Z of the current computer device, when the number of cores Z does not exceed X, the number of threads n is set to 1 to execute the real-time model task, otherwise the number of threads n is set to (Z-X) / Y to execute the real-time model task, wherein Y represents the number of threads of a physical core of the processor, Z is set to be greater than X, and X is not equal to 0; setting the number of threads n=(Z-X) / Y to execute the real-time model task includes: defining the real-time time interval m of the real-time model task execution; each thread simultaneously acquires the corresponding current time t in real time, and judges whether the corresponding current time t is greater than the next execution time t_next in real time; At least one thread identifies that t>t_next, the thread attempts to enter the critical section, and the thread that successfully enters the critical section will execute the following contents in the critical section: repeat acquiring the current time t, and judging whether the current time t is greater than the next execution time t_next: if yes, then t_next= t_next+m, execute the real-time model task at the same time, and the thread exits the critical section; if no, the thread directly exits the critical section; Each set thread occupies a physical core of a processor, including: The physical core index of the processor occupied by each thread is equal to the value obtained by performing modulo operation on the corresponding thread number index and the total number of physical cores of the processor.
2. The method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to claim 1, wherein setting the number of threads n=1 to execute the real-time model task includes: defining the real-time time interval m of the real-time model task execution; the thread acquires the current time t in real time, and judges whether the current time t is greater than the next execution time t_next in real time, when t>t_next, then t_next= t_next+m, execute the real-time model task at the same time.
3. The method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to claim 2, wherein when the real-time model task is executed for the first time, t_next=m, t=0.
4. The method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to claim 1, wherein the thread that has not successfully entered the critical section is blocked from entering the critical section until the thread that has entered the critical section exits the critical section, then the next attempt is started; and the thread that has successfully entered the critical section is determined by the critical section itself.
5. The method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to claim 1, wherein t_next is a global variable shared by all threads.
6. A computer-readable storage medium, characterized in that, The computer readable storage medium is configured to store a program for executing the method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to any one of claims 1-5.
7. A processor, comprising: The processor is configured to execute the program for executing the method for implementing hard real-time in a non-real-time system in hardware-in-the-loop simulation according to any one of claims 1-5.
8. An electronic device, comprising: processor, readable storage medium, communication bus and communication interface; The processor, the readable storage medium and the communication interface realize communication with each other through the communication bus. The readable storage medium is used for storing a program for executing the method for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation according to any one of claims 1-5, and the program makes the processor execute corresponding operations of the method for implementing hard real-time of non-real-time system in hardware-in-the-loop simulation.
Citation Information
Patent Citations
Shared resource read-write mutual exclusion method based on RTX real-time system
CN112559210A
Implementation method for guaranteeing real-time performance of semi-physical simulation through three-layer structure
CN113110108A
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