A control parameter design method for grid-connected converter based on stable operation domain

Abstract

A control parameter design method for a grid-connected converter based on a stable operating domain comprises the following steps: S1. classifying the operating conditions based on the load conditions; S2. establishing a variable coefficient equivalent SISO model and obtaining a complex space vector open-loop transfer function G according to the variable coefficient equivalent SISO model. s (s); S3. Characterize the feasible domain of control parameters; S4. Characterize different phase-locked loop parameters f cpll Stable operation domain under S5. Determine the phase-locked loop parameters; satisfy the f corresponding to the boundary margin cpll The values are used as phase-locked loop (PLL) parameters to complete the control parameter design of the grid-connected converter system. The parameter design method proposed in this invention improves the phase-locked loop (PLL) parameter values while ensuring a stable margin. This method does not change the PLL structure, and does not require approximation or trial and error. Parameters can be flexibly set based on the actual requirements for speed and stability under different operating conditions, enhancing the system's robustness and adaptability to the operating environment.

Description

Technical Field

[0001] The present invention relates to the technical field of power systems, and in particular to a control parameter design method for a grid-connected converter based on a stable operation domain. Background Art

[0002] Actively developing new energy sources, such as wind and photovoltaics, and accelerating the green, low-carbon transformation of the energy system are the unanimous choices for humanity to address energy crises, environmental pollution, and enhance energy security. Grid-connected converters, serving as the interface between new energy power generation units and the power grid, have been widely used.

[0003] A grid-connected converter system consists of a main circuit and a control element, both of which together determine system stability. The system's ability to recover from a disturbance depends on its dynamic performance, which is closely related to controller parameters. Excessively slow dynamic response results in prolonged recovery time, making it difficult to meet the grid-connected converter's requirements for high-performance control and system fault ride-through. Therefore, it is crucial to rationally design control parameters to balance loop dynamic performance with other requirements.

[0004] The control parameter design methods proposed in existing literature generally design controller parameters based on design objectives (such as accuracy, stability, etc.) or dynamic performance (such as rise time, settling time, etc.). After establishing models such as impedance models or state-space models, the control parameters are verified through step response, Bode plots, root loci, or simulation experiments, and further adjusted based on indicators such as PM, GM, short-circuit ratio, and steady-state error. Some existing technologies use the constructed cascade impedance model to obtain the value range of the phase-locked loop bandwidth under different PM constraints through Bode plots. In addition, existing technologies also include establishing an impedance model of the grid-connected system under rated operating conditions, characterizing the parameter feasible domain with the PLL and current loop cutoff frequency as variables based on the Nyquist theorem, and further using phase margin and amplitude margin as design performance indicators. The parameter value range that meets the design indicators is obtained according to the graphical method.

[0005] Currently, control parameters are often designed under a fixed operating condition, focusing on the dynamic performance of the control loop and system stability under that fixed condition, while ignoring the impact of control parameters on the converter's power transmission performance. Furthermore, in actual operation, the system may operate under a variety of conditions. When the system operating environment deviates from the fixed operating condition, the control parameter tuning results under that fixed condition may not be applicable to the new condition, making it difficult to adjust the parameters according to the actual operating conditions. Furthermore, most literature only designs parameters for a single control loop, ignoring the coupling effects of other control loops in the system.

[0006] Furthermore, to ensure a certain system stability margin, the gain margin (GM) and phase margin (PM) are typically designed, demarcating the forbidden region of the Nyquist curve. Criteria for demarcating the forbidden region include the Middlebrook criterion, the GMPM criterion, the Opposing Argument criterion, and the Energy Systems Analysis Consortium (ESAC) criterion. While parameter design based on GM and PM ensures sufficient system stability margin, it sacrifices the dynamic performance of the phase-locked loop (PLL). Furthermore, the stability margin is only valid for minimum phase systems; for non-minimum phase systems, the stability margin is no longer meaningful. Furthermore, the gain margin and phase margin in classical control theory lack clear physical meaning in practical applications of power electronics. The quantitative relationship between stability margin and system stability relies on simulation or experimentation, lacking quantitative characterization methods. Simply giving a system's stability margin makes it difficult to determine its stability. Summary of the Invention

[0007] In view of this, the present invention provides a control parameter design method for a grid-connected converter based on a stable operating domain, which is used to at least solve the problem in the prior art that control parameter design is mostly designed under a certain fixed operating condition, ignoring the impact of control parameters on the power transmission performance of the converter.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions:

[0009] A method for designing control parameters of a grid-connected converter based on a stable operation domain comprises the following steps:

[0010] S1. Classify the operating conditions based on load conditions and divide the working ranges. Then, design the proportional / integral parameters of the current loop and phase-locked loop according to the actual requirements of the system dynamic performance in different working ranges.

[0011] S2. Establish a variable coefficient equivalent SISO model and obtain the complex space vector open-loop transfer function G according to the variable coefficient equivalent SISO model s (s);

[0012] S3. Characterize the feasible region of control parameters; determine the phase-locked loop parameters f cpll and current loop parameter f ci Analysis range and analysis accuracy, for the phase-locked loop parameter f cpll and current loop parameter f ci The value is adjusted according to the complex space vector open loop transfer function G s(s) and stability criteria to judge the system stability after each parameter adjustment, and then obtain the feasible region of control parameters through numerical simulation;

[0013] S4. Characterize different phase-locked loop parameters f cpll The stable operation domain under the control parameter is obtained in the feasible domain of the given f ci The corresponding f cpll The maximum value of f cpll Take the value and for the current f cpll The value is used to characterize the stable operation domain. For different working ranges, it is judged whether the boundary margin is met. If not, f is further reduced. cpll Take the value and characterize the corresponding stable operation domain until the boundary margin is met. If it is met, proceed to S5;

[0014] S5. Determine the phase-locked loop parameters; set f to meet the boundary margin cpll The values are taken as the phase-locked loop parameters to complete the control parameter design of the grid-connected converter system.

[0015] Preferably, the specific content of S1 includes:

[0016] Based on the load conditions, the working conditions are classified into four categories: light load, medium load, heavy load and overload.

[0017] Preferably, the specific content of S2 includes:

[0018] S21. The two input quantities are the voltage disturbance at the PCC point in the synchronous reference frame. and “*” indicates conjugate, and the output is the small current disturbance

[0019] S22. Simplify the DISO model and, based on the circuit topology, convert the two input quantities in the DISO model into small current disturbance quantities to obtain an equivalently transformed DISO model;

[0020] S23. Eliminate the conjugate part of the small current disturbance, convert the DISO model after equivalent transformation into a single-input single-output model based on the input-output relationship in the DISO model after equivalent transformation, and further obtain the open-loop transfer function of the system.

[0021] Preferably, the specific content of S21 includes:

[0022] S211. According to the linearization relationship in the phase-locked loop during the dynamic adjustment process of the phase-locked loop, the phase-locked loop output position angle θ is p The dq coordinate system is the control reference system, and the actual position angle θ of the PCC voltage s The dq coordinate system is a synchronous reference system, and θ is obtained.p and θ s There is a deviation angle Δθ between:

[0023]

[0024] Among them, g p (s)=F PLL (s) / (s+U t0 F PLL (s)), F PLL (s) = k pp +k ip / s is the phase-locked loop PI controller, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop, U t0 is the steady-state voltage value at PCC point;

[0025] S212. Obtain the relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit respectively. According to the conversion relationship between the control reference frame and the synchronous reference frame, obtain the voltage small disturbance Δe in the current control circuit in the synchronous reference frame. s Small current disturbance The relationship between:

[0026]

[0027] Among them, G de (s) is the time delay introduced by the digital control system, G C (s) is the current loop PI controller, the current reference value disturbance Δi dqr ,i L0 is the steady-state value of current, and E0 is the steady-state value of the converter output voltage.

[0028] S213. Obtain the voltage small disturbance Δe in the power circuit under the synchronous reference frame s and respectively with the current small disturbance The relationship between the two, combined with the relationship obtained by S212, obtains the current small disturbance The expression is:

[0029]

[0030]

[0031] S214. Combine the deviation angle Δθ expression to eliminate small current disturbances The deviation angle Δθ in the current reference value is set to Δi dqr =0, the dual-input single-output DISO model is obtained as:

[0032]

[0033]

[0034] Preferably, the specific content in S212 includes:

[0035] The relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit is:

[0036]

[0037] The conversion relationship between the control reference frame and the synchronization reference frame is:

[0038] Δx c =Δx s -jx0Δθ (8)

[0039] where x0 = x d0 +jx q0 , is the steady-state value of the variable x;

[0040] Will According to the conversion relationship, it is converted into The voltage small disturbance Δe in the current control circuit under the synchronous reference frame is obtained s Small current disturbance the relationship between;

[0041] The specific contents of S213 include:

[0042] Small voltage disturbance Δe in power circuit under synchronous reference frame s and respectively with the current small disturbance The relationship between them is:

[0043]

[0044] Among them, since the grid voltage is an ideal voltage source, the grid voltage small disturbance ΔU g Ignore, DU g =0; Z f (s) is the filter impedance in the control reference frame, Z g (s) is the grid impedance in the synchronous reference frame:

[0045]

[0046] Substituting equations (9) and (10) into equation (2), we can obtain the current small disturbance

[0047] Preferably, the specific content of S22 includes:

[0048] Using the circuit topology, the PCC voltage disturbance DU t Replace it with the grid current disturbance and eliminate ΔU t and Get the DISO model after equivalent transformation:

[0049]

[0050]

[0051] Among them, Z g (s) is the grid impedance in the synchronous reference frame.

[0052] Preferably, the specific content of S23 includes:

[0053] Eliminate the conjugate part of the small current disturbance in the DISO model after equivalent transformation:

[0054]

[0055] In the calculation of the conjugate of the complex transfer function, s is considered to be a real number, so the conjugate is solved as follows when calculating the full frequency response:

[0056]

[0057] Substituting Equation (13) into the DISO model after equivalent transformation, we obtain a single-input single-output model:

[0058]

[0059]

[0060] Therefore, the complex space vector open-loop transfer function of the system G s (s) is:

[0061]

[0062] Among them, Z g (s) is the grid impedance in the synchronous reference frame.

[0063] Preferably, the specific content of S3 includes:

[0064] Current loop PI controller parameter k pc and k ic for:

[0065]

[0066] where f ci is the open-loop cutoff frequency of the current loop, k pc and kic They are the proportional gain coefficient and the integral gain coefficient in the current loop PI controller respectively;

[0067] The phase-locked loop PI controller parameters are:

[0068]

[0069] where ζ and ω n are the damping ratio and natural frequency, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop respectively;

[0070] With open loop cutoff frequency f cpll As a phase-locked loop parameter, the relationship between the open-loop cutoff frequency of the phase-locked loop and the proportional coefficient and integral coefficient of the phase-locked loop is:

[0071]

[0072] Among them, U t0 is the steady-state voltage value at PCC point;

[0073] According to k in formula (19) pp and k ip The relationship is:

[0074]

[0075] Where g = U t0 / 4ζ 2 , the requirements for the comprehensive system dynamic performance and steady-state performance are set as ζ=0.707, g=U t0 / 2;

[0076] f cpll and f ci Gradually increase the value of the variable, for each increase of f cpll and f ci After numerical simulation, the corresponding Nyquist curve is obtained according to the complex space vector open-loop transfer function. The stability of the current system is judged by whether the Nyquist curve surrounds the point (-1, 0). Finally, the feasible boundary of the control parameters is derived through numerical simulation.

[0077] If the Nyquist curve surrounds the (-1, 0) point, the grid-connected converter system is stable; if not, the grid-connected converter system is unstable.

[0078] Preferably, the specific content of S4 includes:

[0079] Determine the current loop parameter f ci , determine different rated operating point boundary margins for different operating ranges;

[0080] Get the given f within the feasible boundary of the control parameters ci The corresponding f cpll The maximum value of

[0081] Lower f cpll Take the value and for the current f cpll The value characterizes the stable operation domain;

[0082] For each working range, determine whether the corresponding boundary margin is met. If not, further reduce f cpll Take the value and characterize the corresponding stable operation domain until the boundary margin is met. If it is met, proceed to S5.

[0083] It can be seen from the above technical solutions that, compared with the prior art, the present invention discloses a method for designing control parameters of a grid-connected converter based on a stable operating domain, which has the following beneficial effects:

[0084] The present invention takes into account the mutual coupling between the current loop and the phase-locked loop, establishes a variable coefficient equivalent single-input single-output model, and is used to analyze the system stability of the grid-connected converter under variable operating conditions and variable parameters. Based on the SISO model, the feasible domain of the control parameters is obtained through numerical simulation, and the stable operation boundary of the system under different control parameters is characterized. The operating margin in the working range is used as the stability margin, and the phase-locked loop parameters are flexibly selected according to actual needs to achieve a balance between the stability margin and dynamic performance. The present invention uses the stability domain to guide the control parameter design, links the concepts in the control theory with the converter working range, and improves the safety and flexibility of the system in the entire working range. The parameter design based on the stability domain can intuitively describe the impact of changes in the system control parameters on the stability margin, and flexibly design the control parameters, which helps to enhance the robustness and adaptability of the system to the operating environment, and achieve a balance between the dynamic performance and the stability margin of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0086] Figure 1 The topology and control block diagram of the three-phase grid-connected converter provided in the embodiment of the present invention;

[0087] Figure 2 The SRF-PLL linearization model provided by the embodiment of the present invention;

[0088] Figure 3 A flowchart provided for an embodiment of the present invention;

[0089] Figure 4 Establishment of a complex space vector equivalent SISO model provided by an embodiment of the present invention; (a) complex space vector DISO model; (b) complex space vector DISO model after equivalent transformation; (c) complex space vector equivalent SISO model;

[0090] Figure 5 The Nyquist curve of the complex transfer function provided by the embodiment of the present invention;

[0091] Figure 6 The system control parameter boundaries provided by the embodiment of the present invention;

[0092] Figure 7 Parameter boundaries under the EASC criterion provided in an embodiment of the present invention;

[0093] Figure 8 Static transmission limits and safe operating domains of a converter provided in an embodiment of the present invention; (a) Static transmission limits; (b) Schematic diagram of a safe domain;

[0094] Figure 9 The stable operation boundary of the system provided by the embodiment of the present invention;

[0095] Figure 10 The feasible boundaries of control parameters under different working conditions provided by the embodiment of the present invention;

[0096] Figure 11 Stable operating boundaries under different PLL parameters provided by the embodiment of the present invention; (a)i d =0.2pu when the system safe operation boundary; (b)i d =0.55pu when the system safe operation boundary; (c)i d =0.875pu when the system safe operation boundary; (d)i d =1.25pu when the system safe operation boundary;

[0097] Figure 12 Nyquist curve of the complex transfer function provided by the embodiment of the present invention; (a) f ci =1000Hz, f cpll =75Hz; (b)f ci =1000Hz, f cpll =83Hz; (c)f ci =1200Hz, f cpll =77Hz;(d)f ci =1200Hz, f cpll =77Hz;

[0098] Figure 13The dynamic characteristics of the system under different control parameters provided by the embodiment of the present invention; (a)f cpll Three-phase current waveform when changing; (b)f ci Three-phase current waveform when changing;

[0099] Figure 14 A small signal mathematical model provided by an embodiment of the present invention;

[0100] Figure 15 The step dynamic response of the phase-locked loop provided by the embodiment of the present invention; (a) step change of the q-axis component of the grid-connected voltage; (b) step change of the d-axis component of the grid-connected voltage;

[0101] Figure 16 Selection of observation points and simulation waveforms provided for an embodiment of the present invention; (a) Schematic diagram of observation point selection; (b) Three-phase current simulation waveforms in medium and light load areas; (c) Three-phase current simulation waveforms in heavy and overload areas. DETAILED DESCRIPTION

[0102] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0103] The present invention provides a method for designing control parameters of a grid-connected converter based on a stable operation domain, wherein the topology of the grid-connected converter system and the control module are as follows: Figure 1 As shown. Ignoring the voltage fluctuation on the DC side of the converter, using the ideal DC source V dc Replace; L f and R L Respectively represent the inductance and parasitic resistance of the filter; L g and R g Represent the equivalent reactance and equivalent resistance of the power grid respectively, and the power grid impedance is compared with the ideal voltage source U g Series simulated weak power grid; e is the converter output voltage vector, U t is the voltage vector at the point of common coupling (PCC), i L is the grid current vector; G de represents the delay link, i dr 、i qr are the current dq axis component command values respectively.

[0104] The current is controlled based on the PI controller in the dq coordinate system, such as Figure 1 As shown, the current loop PI controller can be expressed as:

[0105] G c (s) = k pc +k ic / s (22)

[0106] The time delay G introduced by the digital control system de (s) can be expressed as:

[0107]

[0108] Where T s =1 / f s is the sampling period, in the present invention, t=T s .

[0109] In order to obtain the phase information of the grid voltage in real time, a phase-locked loop (Synchronous Reference Frame-PLL, SRF-PLL) based on a synchronous reference frame is used. The control structure is as follows: Figure 1 As shown. Among them, θ p is the phase-locked loop output angle, F PLL (s) = k pp +k ip / s is the phase-locked loop PI controller. The SRF-PLL linearization model is as follows Figure 2 As shown, where Δθ p and Δθ s are the small disturbance of the phase angle of the phase-locked loop output and the small disturbance of the actual voltage phase angle of the PCC point, U t0 is the steady-state voltage value at PCC point, ΔU tq is the q-axis component disturbance of the voltage at the PCC point.

[0110] The open-loop transfer function expression of the phase-locked loop is:

[0111]

[0112] The present invention utilizes an equivalent SISO model for control parameter design, and obtains a feasible domain of parameters based on stability criteria and numerical simulation. The boundary value of the feasible domain is the maximum value that the phase-locked loop can take. However, the stability margin of the boundary value is low, and it is difficult to ensure system stability when the operating conditions deviate from the rated point. Therefore, it is necessary to characterize the stable operating domain under different phase-locked loop parameters and determine the final parameter value based on the required operating margin. In the parameter design method proposed in the present invention, the feasible domain of the control parameters determines the upper limit value of the phase-locked loop parameters, and the system stable operating domain ensures the system stability margin.

[0113] The present invention comprises the following steps, as Figure 3 As shown:

[0114] S1. Classify the working conditions based on the load conditions and divide the working ranges. Then, design the proportional / integral parameters of the current loop and the phase-locked loop according to the actual requirements of the system dynamic performance in different working ranges. It should be noted that the PCC point voltage value is included in formula (24). Therefore, when designing the control parameters for different load ranges, U t0 It is the actual value of the PCC point voltage under the design point condition rather than a constant value.

[0115] S2. Establish a variable coefficient equivalent SISO model and obtain the complex space vector open-loop transfer function G according to the variable coefficient equivalent SISO model s (s);

[0116] S3. Characterize the feasible region of control parameters; determine the phase-locked loop parameters f cpll and current loop parameter f ci Analysis range and analysis accuracy, for the phase-locked loop parameter f cpll and current loop parameter f ci The value is adjusted according to the complex space vector open loop transfer function G s (s) and stability criteria to judge the system stability after each parameter adjustment, and then obtain the feasible region of control parameters through numerical simulation;

[0117] S4. Characterize different phase-locked loop parameters f cpll The stable operation domain under the control parameter is obtained in the feasible domain of the given f ci The corresponding f cpll The maximum value of f cpll Take the value and for the current f cpll The value is used to characterize the stable operation domain. For different working ranges, it is judged whether the boundary margin is met. If not, f is further reduced. cpll Take the value and characterize the corresponding stable operation domain until the boundary margin is met. If it is met, proceed to S5;

[0118] S5. Determine the phase-locked loop parameters; set f to meet the boundary margin cpll The values are taken as the phase-locked loop parameters to complete the control parameter design of the grid-connected converter system.

[0119] It should be noted that:

[0120] In actual applications, the analysis range and accuracy of S3 are determined by the user. The current loop cutoff frequency typically ranges from a few hundred hertz to a few thousand hertz; the phase-locked loop cutoff frequency typically ranges from tens of hertz to a few hundred hertz. The analysis accuracy can be customized based on analysis requirements and calculation time.

[0121] In order to further implement the above technical solutions, the specific contents of S1 include:

[0122] Based on the load conditions, the working conditions are classified into four categories: light load, medium load, heavy load and overload.

[0123] In order to further implement the above technical solution, the specific contents of S2 include:

[0124] S21. The two input quantities are the voltage disturbance at the PCC point in the synchronous reference frame. and “*” indicates conjugate, and the output is the small current disturbance

[0125] S22. Simplify the DISO model and, based on the circuit topology, convert the two input quantities in the DISO model into small current disturbance quantities to obtain an equivalently transformed DISO model;

[0126] S23. Eliminate the conjugate part of the small current disturbance, convert the DISO model after equivalent transformation into a single-input single-output model based on the input-output relationship in the DISO model after equivalent transformation, and further obtain the open-loop transfer function of the system.

[0127] In order to further implement the above technical solutions, the specific contents of S21 include:

[0128] S211. According to the linearization relationship in the phase-locked loop during the dynamic adjustment process of the phase-locked loop, the phase-locked loop output position angle θ is p The dq coordinate system is the control reference system, and the actual position angle θ of the PCC voltage s The dq coordinate system is a synchronous reference system, and θ is obtained. p and θ s There is a deviation angle Δθ between:

[0129]

[0130] Among them, g p (s)=F PLL (s) / (s+U t0 F PLL (s)), F PLL (s) = k pp +k ip / s is the phase-locked loop PI controller, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop, U t0 is the steady-state voltage value at PCC point;

[0131] S212. Obtain the relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit respectively. According to the conversion relationship between the control reference frame and the synchronous reference frame, obtain the voltage small disturbance Δe in the current control circuit in the synchronous reference frame. s Small current disturbance The relationship between:

[0132]

[0133] Among them, G de (s) is the time delay introduced by the digital control system, G C (s) is the current loop PI controller, the current reference value disturbance Δi dqr ,i L0 is the steady-state value of the current, and E0 is the steady-state value of the converter output voltage.

[0134] S213. Obtain the voltage small disturbance Δe in the power circuit under the synchronous reference frame s and respectively with the current small disturbance The relationship between the two, combined with the relationship obtained by S212, obtains the current small disturbance The expression is:

[0135]

[0136]

[0137] S214. Combine the deviation angle Δθ expression to eliminate small current disturbances The deviation angle Δθ in the current reference value is set to Δi dqr =0, the dual-input single-output DISO model is obtained as:

[0138]

[0139]

[0140] The dual-input single-output model is as follows Figure 4 (a) shows the two input quantities of the system are ΔU t and ΔU t * , the output is Δi L .

[0141] In order to further implement the above technical solution, the specific contents of S212 include:

[0142] The relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit is:

[0143]

[0144] The conversion relationship between the control reference frame and the synchronization reference frame is:

[0145] Δx c =Δx s -jx0Δθ (8)

[0146] where x0 = x d0 +jx q0 , is the steady-state value of the variable x;

[0147] Will According to the conversion relationship, it is converted into The voltage small disturbance Δe in the current control circuit under the synchronous reference frame is obtained s Small current disturbance the relationship between;

[0148] It should be noted that:

[0149] During the dynamic adjustment of the phase-locked loop, due to the voltage fluctuation at the PCC point, the phase-locked loop output position angle q p The actual position angle θ with the PCC voltage s There will be a deviation angle Δθ between p =θ s +Δθ. In order to distinguish the corresponding dq coordinate systems of the two, θ p The dq coordinate system is defined as the control reference system, and the superscript is represented by "c"; θ s The dq coordinate system is a synchronous reference system, represented by the superscript "s". For the operating point variable x, the small disturbance quantity in different reference systems satisfies the following relationship:

[0150]

[0151] Among them, x d0 、x q0 are the steady-state values of the dq-axis components of the variable x, respectively.

[0152] Formula (25) can be rewritten as formula (8) in plural form.

[0153] The specific contents of S213 include:

[0154] Small voltage disturbance Δe in power circuit under synchronous reference frame s and respectively with the current small disturbance The relationship between them is:

[0155]

[0156] Among them, since the grid voltage is an ideal voltage source, the grid voltage small disturbance ΔU g Ignore, ΔU g =0; Z f (s) is the filter impedance in the control reference frame, Z g (s) is the grid impedance in the synchronous reference frame:

[0157]

[0158] Substituting equations (9) and (10) into equation (2), we can obtain the current small disturbance

[0159] Compared with the classical frequency domain modeling, the complex transfer function includes the coupling relationship between dq, and its frequency domain response usually has the asymmetric characteristics of positive and negative frequency domains, that is, the response of ω>0 is usually not the conjugate of the response of ω<0, such as Figure 5 As shown. Its stability criterion is also the Nyquist theorem, but there is only one Nyquist curve. By analyzing G s If (s) surrounds (-1, 0), the stability of the system can be determined.

[0160] In order to further implement the above technical solution, the specific contents of S22 include:

[0161] Using the circuit topology, the PCC voltage disturbance ΔU t Replace it with the grid current disturbance and eliminate ΔU t and Get the DISO model after equivalent transformation:

[0162]

[0163]

[0164] Among them, Z g (s) is the grid impedance in the synchronous reference frame.

[0165] In order to further implement the above technical solution, the specific contents of S23 include:

[0166] Eliminate the conjugate part of the small current disturbance in the DISO model after equivalent transformation:

[0167]

[0168] In the calculation of the conjugate of the complex transfer function, s is considered to be a real number, so the conjugate is solved as follows when calculating the full frequency response:

[0169]

[0170] Substituting Equation (13) into the DISO model after equivalent transformation, we obtain a single-input single-output model:

[0171]

[0172]

[0173] Therefore, the complex space vector open-loop transfer function of the system G s (s) is:

[0174]

[0175] Among them, Z g (s) is the grid impedance in the synchronous reference frame.

[0176] To further implement the above technical solutions, the specific contents of S3 include:

[0177] Current loop PI controller parameter k pc and k ic for:

[0178]

[0179] where f ci is the open-loop cutoff frequency of the current loop, k pc and k ic They are the proportional gain coefficient and the integral gain coefficient in the current loop PI controller respectively;

[0180] The phase-locked loop PI controller parameters are:

[0181]

[0182] where ζ and ω n are the damping ratio and natural frequency, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop respectively;

[0183] With open loop cutoff frequency f cpll As a phase-locked loop parameter, the relationship between the open-loop cutoff frequency of the phase-locked loop and the proportional coefficient and integral coefficient of the phase-locked loop is:

[0184]

[0185] Among them, U t0 is the steady-state voltage value at PCC point;

[0186] According to k in formula (19) pp and k ip The relationship is:

[0187]

[0188] Where g = U t0 / 4ζ 2 , the requirements for the comprehensive system dynamic performance and steady-state performance are set as ζ=0.707, g=U t0 / 2;

[0189] f cpll and f ci Gradually increase the value of the variable, for each increase of f cpll and f ci After numerical simulation, the corresponding Nyquist curve is obtained according to the complex space vector open-loop transfer function. The stability of the current system is judged by whether the Nyquist curve surrounds the point (-1, 0). Finally, the feasible boundary of the control parameters is derived through numerical simulation.

[0190] If the Nyquist curve surrounds the (-1, 0) point, the grid-connected converter system is stable; if not, the grid-connected converter system is unstable.

[0191] It should be noted that:

[0192] After the complex space vector equivalent SISO model is established, based on the stability criterion, f cpll 、f ci By gradually increasing the values of the variables, the feasible boundaries of the control parameters are derived through numerical simulation. Based on the parameters in Table 1, the feasible domain boundaries of the parameters under different power grid conditions are obtained, such as Figure 6 shown.

[0193] For points on the parameter boundary, such as Figure 6 Point K in the figure indicates that the Nyquist curve of the complex transfer function should just pass through the critical point (-1, j0) on the s plane. Figure 6 It can be seen that under different grid conditions, the weaker the grid strength, the more serious the impact of PLL on current control, and the more stable the system f is. cpll The lower the maximum value, the weaker the grid environment is, and the less conducive it is to safe system operation.

[0194] Table 1 System rated parameters

[0195]

[0196] Characterizing the feasible boundary of the control parameters can obtain the maximum value of the phase-locked loop parameters that maintain system stability, but this value cannot guarantee the system stability margin. If the stability margin is guaranteed by designing GM and PM, the PLL parameter values will be greatly reduced. The parameter domain is characterized using the least conservative ESAC criterion: SCR = 2.5, GM = 6dB, PM = 30°, 60°. The parameter boundaries are as follows: Figure 7 shown.

[0197] from Figure 7 It can be seen that under the same current control parameters, as PM increases, the phase-locked loop parameter f cpll The value decreases accordingly. H / H1 are f ci =900Hz, the boundary points of the feasible region of parameters and the boundary points of ESAC parameters, K / K1 are f ci =1000Hz, the boundary point of the feasible region and the boundary point of ESAC parameters. At point H f cpll =75Hz, and the phase-locked loop parameter value at H1 is reduced to 39Hz; at point K f cpll =76Hz, while the PLL parameters at K1 drop to 41Hz. While the ESAC principle is less conservative than other design criteria, it still places stringent demands on the interactive system's control parameters. Lower bandwidth can affect PLL dynamic performance, so improving PLL parameters while ensuring sufficient system stability margin is crucial.

[0198] In order to further implement the above technical solutions, the specific contents of S4 include:

[0199] Determine the current loop parameter f ci , determine different rated operating point boundary margins for different operating ranges;

[0200] Get the given f within the feasible boundary of the control parameters ci The corresponding f cpll The maximum value of

[0201] Lower f cpll Take the value and for the current f cpll The value characterizes the stable operation domain;

[0202] For each working range, determine whether the corresponding boundary margin is met. If not, further reduce f cpll Take values and characterize the corresponding stable operating domain until the boundary margin is met. If it is met, proceed to S5. Existing control parameter design is usually carried out at the rated operating point. When the actual operating conditions deviate from the rated operating point, the applicability of the parameters is unknown, and there is a lack of a method for quantitatively characterizing the relationship between the stability margin and the system stability. The present invention uses the safe operating domain to perform stability analysis of the entire operating range of the converter, and uses the stable domain to guide the design of control parameters. It can quantitatively analyze the impact of the stability margin on the system operating range, and at the same time, it can flexibly design parameters according to the actual requirements of different operating conditions for dynamic performance, thereby improving the safety and flexibility of the system within the entire operating range.

[0203] Open-loop transfer function G s (s) contains both operating point variables and parameter variables. In the previous section, we changed the control parameters to obtain the parameter feasible region. In this S4, we change the operating point value to characterize the system's stable operating region to guide the design of the system's control parameters.

[0204] A given operating point may not satisfy the electrical constraints. For operating points outside the transmission limits, any control strategy or control parameter cannot stabilize the converter, thus losing its physical meaning and analytical value. Therefore, if the operating range margin includes operating points that do not satisfy the output limit relationship, they should be eliminated. Based on the circuit relationship of the steady-state value of the operating point, the output limit relationship is obtained as follows:

[0205] U g0 ≥|U gq0 |=|-ω0L g i Ld0 -R g i Lq0 | (26)

[0206] Among them U g0 is the steady-state value of the grid voltage, U gq0 is the q-axis steady-state value of the grid voltage, i Ld0 is the steady-state value of the output current d axis, i Lq0 is the q-axis steady-state value of the output current.

[0207] The static current transmission limit range of the converter is obtained by the formula, such as Figure 8 .(a) shows. Where Λ ml Represents the undefined area, that is, the set of points that do not meet the electrical constraints, Λ de represents the domain, that is, the set of operating points within the transmission limit. Figure 8 .(b) is a schematic diagram of the system stability domain, which includes three parts: the safe domain, the oscillation domain and the undefined domain.

[0208] The present invention proposes to use operating margin to evaluate the stability margin of the power conversion system, characterize the safety boundary to obtain the stable operating range of the system under the set of control parameters, and enhance the robustness of the system and its adaptability to the operating environment. Combined with the stable operating domain of the system, it can be seen that as long as a certain margin is maintained between the operating range and the stable operating boundary, the system can be guaranteed to have sufficient stability domain margin. When designing control parameters, an additional margin of 20% to 50% is usually left, which can provide a certain degree of redundancy and fault tolerance, ensuring that the system can still meet operating requirements under adverse conditions. The actual margin can be designed according to different industries, equipment types and engineering requirements, as well as load characteristics, environmental conditions, reliability and economic factors.

[0209] Figure 7 The system parameter boundary has been obtained. According to the parameter boundary, we can know that f ci =900Hz, the maximum value of the phase-locked loop parameter is 75Hz, but the stability margin of the system under this parameter control is low and the value is unreasonable. cpllThe stable operation domain under the value is determined, and the final phase-locked loop parameter value is determined according to the operation margin. Figure 11 f ci =900Hz under different phase-locked loop parameters of the stable operation boundary, where the phase-locked loop parameter f cpll The values are 80Hz, 75Hz (H point), 60Hz, 54Hz and 39Hz (H1 point).

[0210] from Figure 9 It can be seen that when f cpll =80Hz, the phase-locked loop parameter value exceeds the maximum value. When the reactive current is zero, the boundary point current value is 114A, and the rated operating point is outside the stable operation domain. When the PLL parameter value is the boundary point H, the boundary point current value is 123A. The rated operating point is within the stable operation domain, but the closer it is to the boundary, the smaller the system stability margin. When f cpll = 60Hz, the boundary current value is 160A, and the rated operating point has a margin of 40A from the stable boundary. cpll =54Hz, the boundary current value is 181A, which is 1.5 times of the rated operating point. Figure 7 When the operating margin is 20%, the phase-locked loop parameter f cpll It can be selected as 60Hz; when the operating margin is 50%, the phase-locked loop parameter f cpll It can be taken as 54Hz.

[0211] This embodiment uses the grid-connected system control parameter design shown in Table 1 as an example:

[0212] To mitigate the drawbacks of single-operating-condition design parameters, this embodiment designs control parameters for light-load, medium-load, heavy-load, and overload operating ranges. Using the rated current as the baseline and based on the operating current, the operating ranges are divided into: light-load (0-0.4 pu), medium-load (0.4 pu-0.75 pu), heavy-load (0.75 pu-1 pu), and overload (1 pu-1.5 pu). Specific light-load, heavy-load, and overload standards may vary based on national standards, industry specifications, equipment type, power system scale, and regulatory requirements.

[0213] In order to reduce the complexity of parameter design, the design parameters of the midpoint working condition are selected, and the open-loop transfer function is used to characterize the feasible domain of control parameters under different currents, such as Figure 10 shown.

[0214] Furthermore, considering the dynamic characteristics of the current inner loop and the switching frequency limit, the current loop parameter f ciAfter determining the current loop parameters, the Figure 10 The maximum values of the phase-locked loop parameters under different working conditions are obtained as follows: (0.2pu, 260Hz), (0.55pu, 128Hz), (0.875pu, 86Hz), (1.25pu, 58Hz). The stability margin of the system is low when it is running under the boundary control parameters, and the PLL value needs to be appropriately reduced to ensure the stability margin. Therefore, different f cpll The stable operation domain under the value is determined, and the phase-locked loop parameter values are finally determined based on the operation margin. Figure 11 f ci =The safe operation boundary of the system under different working conditions and different phase-locked loop parameters when 900Hz.

[0215] According to the actual demand for dynamic performance, 20% to 50% of the maximum capacity of this interval is selected as the additional margin, that is, the maximum stable operating current is 1.2 to 1.5 times the value of the right endpoint of the interval. For the light load interval, it is hoped that its dynamic performance is faster, so the operating margin is 20%, that is, the maximum stable operating current is 0.48pu, and the phase-locked loop parameters are Figure 11 (a) can be determined as 150Hz. Similarly, according to the method for determining the phase-locked loop parameters in the light-load range, the operating margin in the medium-load range is 20%, and the phase-locked loop parameters are determined by Figure 11 (b) can be determined as 88Hz; the operating margin in the heavy load range is 20%, and the phase-locked loop parameters are Figure 11 (c) can be determined to be 67Hz. The overload range is a redundant capacity for the converter, and the operating margin does not need to be taken. Figure 11 (d) can be determined to be 50Hz. If the actual redundant capacity of the converter is expected to be greater than 50% of the rated capacity, f can be determined based on the stable operation boundary under different PLL parameters. cpll In addition, compared Figure 11 .(b), Figure 11 .(c) The same control parameter (such as f cpll =95Hz, 80Hz), it can be seen that the system operating conditions have a certain impact on parameter design. Even if the open-loop cutoff frequency is the same, the smaller the design operating current value, the larger the stable operating range due to the influence of the actual PCC voltage.

[0216] The amplitude margin and phase margin in classical control theory lack clear physical meaning in practical applications of power electronics, and there is a lack of quantitative analysis of the impact of the stability margin on actual system operation. The stability domain connects control theory concepts with the converter operating range, quantifying the impact of the stability margin on system stability. Parameter design based on the stability domain intuitively describes the impact of changes in system control parameters on the stability margin. Flexible control parameter design helps enhance system robustness and adaptability to the operating environment, achieving a balance between system dynamic performance and stability margin.

[0217] The present invention will be further described below through simulation experiments:

[0218] This simulation experiment uses Matlab / Simulink software to build Figure 1 The simulation model and small signal mathematical model of the grid-connected inverter model shown in the figure verify the correctness and effectiveness of the boundary characterization and parameter design methods, and illustrate the disadvantages of low phase-locked loop parameter values.

[0219] 1) Simulation verification of parameter feasible region boundary

[0220] exist Figure 6 Four groups of parameters are selected for simulation verification when SCR=2.5, where the four groups of control parameter values are: A={1000, 75}, B={1000, 83}, C={1200, 77}, D={600, 77}, and the remaining parameters are shown in Table 1. Figure 12 The double-sided frequency domain SISO model G under different control parameters is shown. s (s) frequency characteristics. As can be seen from the figure, when the current loop parameters are the same, f cpll =75Hz, the Nyquist curve does not surround the (-1, 0) point, and the system is stable; when f cpll =83Hz, the Nyquist curve surrounds the (-1, 0) point, and the system becomes unstable. When the phase-locked loop parameters are the same, f ci =1200Hz Nyquist curve does not surround the (-1, 0) point, the system is stable; when f ci When =600Hz, the Nyquist curve surrounds the (-1, 0) point and the system becomes unstable.

[0221] Figure 13 The three-phase current simulation waveforms of the system under different control parameters are shown. Before t=0.4s, Figure 13 The system operates under the control parameters of group A and group C respectively. It can be seen from the figure that the system can operate stably. At t = 0.4-0.6s, Figure 13 .(a) f cpll The system works under the control parameters of group B. Figure 13 (b) fci The system was operated under group D parameters. After the control parameters were changed, the current waveform was distorted and a large number of harmonics appeared, making it difficult for the system to operate stably. The conclusions drawn from the complex transfer function double-sided frequency-domain SISO model were consistent with the simulation results, verifying the effectiveness of the modeling method and the correct characterization of the parameter domain boundaries.

[0222] 2) The impact of phase-locked loop parameter values on system dynamic performance

[0223] In order to analyze the effect of the phase-locked loop cutoff frequency on system stability, a small signal mathematical model of the inverter grid-connected system was built, such as Figure 14 shown. Figure 15 SCR = 2.5, f ci = =1000Hz, the PLL dynamic response process of the grid voltage q-axis component step change and the current d-axis component step change under different phase-locked loop parameters. cpll The values are 76Hz (point K), 60Hz, 50Hz, 41Hz (point K1), 30Hz, and 20Hz, and the steady-state error band is set to ±2%.

[0224] Figure 15 (a) shows the dynamic response of the phase-locked loop when the q-axis component of the grid voltage is input. At 0.1s, the q-axis component of the grid voltage changes stepwise. As the cutoff frequency of the phase-locked loop decreases, the PLL stabilization time becomes longer. The response speed at point K is the fastest, while the adjustment time at point K1 is f cpll = 1.5 times the adjustment time at 60Hz. Figure 15 (b) is the dynamic response process of the phase-locked loop when the current d-axis component input is a step. cpll When the value is K, the system reaches a stable state after attenuated oscillation due to the small stability margin, but f cpll When the value is slightly reduced and the system has a certain stability margin, the PLL stabilization time is reduced. cpll Further reduction increases the steady-state response time of the system, and the adjustment time of point K1 is f cpll = 1.56 times the adjustment time at 60Hz.

[0225] Depend on Figure 15 It can be seen that when the phase-locked loop parameters are determined, f cpll The value of has a significant impact on the system's response speed. The higher the PLL cutoff frequency, the faster the PLL responds. Lower PLL parameters result in a longer system stabilization time, affecting the grid-connected system's fault ride-through capability.

[0226] 3) Parameter design simulation verification

[0227] In order to study the dynamic characteristics of the system and the influence of system parameters on the safety domain when the operating point changes, observation points in the fixed grid voltage and current operation domain are selected for simulation, and the effectiveness of control parameter design combined with the stability domain is verified.

[0228] Figure 16 The selection of observation points and the simulation waveforms of the system three-phase current when the output current and control parameters change are shown. Ld ,i Lq Six observation points A to C, A1 to C1 are selected in}, such as Figure 16 (a) shows that the three observation points A to C are selected in the medium-light load range, and their coordinate values are: A = {48A, 0A}, B = {66A, 0A}, C = {100A, 10A}; the three observation points A1 to C1 are selected in the heavy overload range, and their coordinate values are: A1 = {125A, 0A}, B1 = {150A, 0A}, C1 = {180A, 0A}. Figure 16 In (b), the initial operating point is A, and the phase-locked loop parameter f before t = 0.25s is cpll =150Hz, t=0.25s, f cpll It decreases from 150Hz to 88Hz, and the subsequent values remain unchanged; when t=0.1-0.4s, the active current increases and works at point B, and when t=0.4s, the active current continues to increase and works at point C. Figure 16 In (c), the initial operating point is A1, and the phase-locked loop parameter f before t = 0.45s is cpll =67Hz, t=0.45s, f cpll It decreases from 67Hz to 50Hz, and the subsequent values remain unchanged; at t=0.3-0.6s, the active current increases and works at point B, and at t=0.6s, the active current continues to increase and works at point C.

[0229] As can be seen from the figure, when f cpll =150Hz / 67Hz, the operating point B / B1 is outside the stable region. When the operating point migrates from A / A1 to B / B1, the current waveform is distorted and the system becomes unstable. The system can only maintain a stable operating state after the control parameters are switched. cpll =88Hz / 50Hz, the system's stable operating domain includes operating points B / B1 and C / C1. After the operating point migration, the system maintains stable operation under the new operating conditions, and the simulation results are consistent with the analysis results. The simulation results show that when the system operating conditions change, as long as the new operating conditions are within the stable region, the new steady state can be reached with a relatively fast response speed. The parameter design method proposed in this invention can ensure the stability of the system and have sufficient stability margin as long as the system operating margin meets the requirements, thereby achieving a system with sufficient stability margin and good dynamic performance.

[0230] The present invention establishes a complex space vector equivalent SISO model in the modeling process of the grid-connected converter, comprehensively considers the stability limit of the control parameters and the dynamic performance of the system, and proposes a control parameter design method based on the stable operation domain.

[0231] 1) The equivalent SISO model constructed in the present invention can be used to characterize the feasible domain and stable operation domain of the converter control parameters under different operating environments, eliminating the need for repeated trial and error in parameter design.

[0232] 2) Analysis of the feasible domain of control parameters shows that the weaker the grid is, the smaller the maximum phase-locked loop cutoff frequency required to maintain grid stability; under the same current loop parameters, the higher the phase-locked loop cutoff frequency, the better the phase-locked loop dynamic performance but the smaller the stability margin.

[0233] 3) Parameter design based on the safe operating region directly quantifies the impact of the stability margin on system operation and derives the system's stable operating boundaries under different control parameters. Furthermore, parameters can be flexibly set based on the actual requirements for speed and stability. Based on the results of the stable region characterization, the phase-locked loop parameters are negatively correlated with the stable region.

[0234] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A control parameter design method for a grid-connected converter based on a stable operation domain, characterized in that: The following steps are involved: S1. Classify the operating conditions based on load conditions and divide the working ranges. Then, design the proportional / integral parameters of the current loop and phase-locked loop according to the actual requirements of the system dynamic performance in different working ranges. S2. Establish a variable coefficient equivalent SISO model and obtain the complex space vector open-loop transfer function G according to the variable coefficient equivalent SISO model s (s); S3. Characterize the feasible region of control parameters; determine the phase-locked loop parameters f cpll and current loop parameter f ci Analysis range and analysis accuracy, for the phase-locked loop parameter f cpll and current loop parameter f ci The value is adjusted according to the complex space vector open loop transfer function G s (s) and stability criteria to judge the system stability after each parameter adjustment, and then obtain the feasible region of control parameters through numerical simulation; S4. Characterize different phase-locked loop parameters f cpll The stable operation domain under the control parameter is obtained in the feasible domain of the given f ci The corresponding f cpll The maximum value of f cpll Take the value and for the current f cpll The value is used to characterize the stable operation domain. For different working ranges, it is judged whether the boundary margin is met. If not, f is further reduced. cpll Take the value and characterize the corresponding stable operation domain until the boundary margin is met. If it is met, proceed to S5; S5. Determine the phase-locked loop parameters; set f to meet the boundary margin cpll The values are taken as the phase-locked loop parameters to complete the control parameter design of the grid-connected converter system.

2. A method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 1, characterized in that: The specific contents of S1 include: Based on the load conditions, the working conditions are classified into four categories: light load, medium load, heavy load and overload.

3. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 1, characterized in that: The specific contents of S2 include: S21. According to the grid-connected converter system structure, a dual-input single-output DISO model is established, where the two input quantities are the voltage disturbance at the PCC point in the synchronous reference frame. and "*" indicates conjugate, and the output is the small current disturbance S22. Simplify the DISO model and, based on the circuit topology, convert the two input quantities in the DISO model into small current disturbance quantities to obtain an equivalently transformed DISO model; S23. Eliminate the conjugate part of the small current disturbance, convert the DISO model after equivalent transformation into a single-input single-output model based on the input-output relationship in the DISO model after equivalent transformation, and further obtain the open-loop transfer function of the system.

4. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 3, characterized in that: The specific contents of S21 include: S211. According to the linearization relationship in the phase-locked loop during the dynamic adjustment process of the phase-locked loop, the phase-locked loop output position angle θ is p The dq coordinate system is the control reference system, and the actual position angle θ of the PCC voltage s The dq coordinate system is a synchronous reference system, and θ is obtained. p and θ s There is a deviation angle Δθ between: Among them, g p (s)=F PLL (s) / (s+U t0 F PLL (s)), F PLL (s) = k pp +k ip / s is the phase-locked loop PI controller, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop, U t0 is the steady-state voltage value at PCC point; S212. Obtain the relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit respectively, and obtain the voltage small disturbance Δe of the converter output in the synchronous reference frame according to the conversion relationship between the control reference frame and the synchronous reference frame. s Small current disturbance The relationship between: Among them, G de (s) is the time delay introduced by the digital control system, G C (s) is the current loop PI controller, the current reference value disturbance Δi dqr ,i L0 is the steady-state value of the current, and E0 is the steady-state value of the converter output voltage; S213. Obtain the voltage small disturbance Δe of the converter output in the synchronous reference frame s and respectively with the current small disturbance The relationship between the two, combined with the relationship obtained by S212, obtains the current small disturbance The expression is: Where Z f (s) is the filter impedance in the control reference frame; S214. Combine the deviation angle Δθ expression to eliminate small current disturbances The deviation angle Δθ in the current reference value is set to Δi dqr =0, the dual-input single-output DISO model is obtained as:

5. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 4, characterized in that: The specific contents of S212 include: The relationship between the voltage small disturbance and the current small disturbance in the two reference frames of the current control circuit is: The conversion relationship between the control reference frame and the synchronization reference frame is: Δx c =Δx s -jx0Δθ (8) where x0 = x d0 +jx q0 , is the steady-state value of the variable x; Will According to the conversion relationship, it is converted into The small voltage disturbance Δe of the converter output in the synchronous reference frame is obtained s Small current disturbance the relationship between; The specific contents of S213 include: Small voltage disturbance Δe of the converter output in the synchronous reference frame s and respectively with the current small disturbance The relationship between them is: Among them, since the grid voltage is an ideal voltage source, the grid voltage small disturbance Ignore, Z f (s) is the filter impedance in the control reference frame, Z g (s) is the grid impedance in the synchronous reference frame: Among them, R f is the parasitic resistance, L f is the filter inductor, R g is the grid resistance, L g is the grid inductance; Substituting equations (9) and (10) into equation (2), we can obtain the current small disturbance 6. A method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 5, characterized in that: The specific contents of S22 include: Using the circuit topology, the PCC voltage disturbance ΔU t Replace it with the grid current disturbance and eliminate ΔU t and ΔU t * , and get the DISO model after equivalent transformation: Among them, Z g (s) is the grid impedance in the synchronous reference frame.

7. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 6, characterized in that: The specific contents of S23 include: Eliminate the conjugate part of the small current disturbance in the DISO model after equivalent transformation: In the calculation of the conjugate of the complex transfer function, s is considered to be a real number, so the conjugate is solved as follows when calculating the full frequency response: Substituting equations (13) and (14) into the equivalent transformed DISO model (13), we obtain a single-input single-output model: Therefore, the complex space vector open-loop transfer function of the system G s (s) is: Among them, Z g (s) is the grid impedance in the synchronous reference frame.

8. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 1, characterized in that: The specific contents of S3 include: Current loop PI controller parameter k pc and k ic for: where f ci is the open-loop cutoff frequency of the current loop, k pc and k ic They are the proportional gain coefficient and the integral gain coefficient in the current loop PI controller; L f is the filter inductor; The phase-locked loop PI controller parameters are: where ζ and ω n are the damping ratio and natural frequency, k pp and k ip are the proportional coefficient and integral coefficient of the phase-locked loop respectively; With open loop cutoff frequency f cpll As a phase-locked loop parameter, the relationship between the open-loop cutoff frequency of the phase-locked loop and the proportional coefficient and integral coefficient of the phase-locked loop is: Among them, U t0 is the steady-state voltage value at PCC point; According to k in formula (18) pp and k ip The relationship is: Where g = U t0 / 4ζ 2 , the requirements for the comprehensive system dynamic performance and steady-state performance are set as ζ=0.707, g=U t0 / 2; f cpll and f ci Gradually increase the value of the variable, for each increase of f cpll and f ci After numerical simulation, the corresponding Nyquist curve is obtained according to the complex space vector open-loop transfer function. The stability of the current system is judged by whether the Nyquist curve surrounds the point (-1, 0). Finally, the feasible boundary of the control parameters is derived through numerical simulation. If the Nyquist curve surrounds the (-1, 0) point, the grid-connected converter system is stable; if not, the grid-connected converter system is unstable.

9. The method for designing control parameters of a grid-connected converter based on a stable operation domain according to claim 1, characterized in that: The specific contents of S4 include: Determine the current loop parameter f ci , determine different boundary margins for different working intervals; Get the given f within the feasible boundary of the control parameters ci The corresponding f cpll The maximum value of Lower f cpll Take the value and for the current f cpll The value characterizes the stable operation domain; For each working range, determine whether the corresponding boundary margin is met. If not, further reduce f cpll Take the value and characterize the corresponding stable operation domain until the boundary margin is met. If it is met, proceed to S5.

Images