Power chip friction-assisted rapid sintering method and power chip

Abstract

The application discloses a power chip friction-assisted rapid sintering method and a power chip, and relates to the technical field of power chip preparation. The substrate is placed on the heating table, and the middle layer is placed on the substrate; the power chip to be sintered is placed on the middle layer, dynamic friction is used to promote the isothermal solidification of the brazing filler metal until a thin Au-Sn liquid phase layer is left in the middle, then static pressure sintering is carried out to completely realize isothermal solidification, and a full intermetallic compound joint is obtained; and the full intermetallic compound joint is subjected to heat preservation and cooling. The application aims to promote the dissolution of high-melting-point metals into the middle low-melting-point liquid phase through friction assistance, shorten the solid-liquid interdiffusion connection time, and meanwhile, the internal structure of the chip is not damaged.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power chip preparation, in particular to a power chip friction-assisted rapid sintering method and a power chip. BACKGROUND

[0002] The statements in this section merely provide background information related to the present application and do not necessarily constitute the prior art.

[0003] Si C, GaN and other third-generation wide band gap (WBG) semiconductor materials have the characteristics of high breakdown electric field, high thermal conductivity, high electron density, etc., and the power chip still has good working ability at a temperature of 500 DEG C or even higher. It has great application potential in the fields of high-power microwave weapons, 5G communication, new energy vehicles, ultra-high voltage power transmission and transformation, etc. However, the highest working temperature of the WBG power chip is limited by the packaging technology, so the high-temperature-resistant and high-reliable connection between the WBG power chip and the substrate is a key problem affecting the full play of its potential.

[0004] The prior art adopts nano-silver sintering, solid-liquid interdiffusion connection and other methods for packaging the third-generation semiconductor chip, and the problems are:

[0005] 1. The nano-silver sintering process takes too long, and the sintered silver joint has an electromigration phenomenon. The price of nano-silver is expensive, and the preparation process is complex.

[0006] 2. The solid-liquid interdiffusion connection takes a long time, which can cause internal thermal mismatch of the joint, failure of the chip barrier layer and other problems. Although the connection time can be shortened by ultrasonic and current assistance, it is not clear whether the ultrasonic vibration and high-density current damage the internal structure of the chip.

[0007] Therefore, how to shorten the solid-liquid interdiffusion connection time and not damage the internal structure of the chip has become a problem to be solved in the prior art. SUMMARY

[0008] In view of the deficiencies in the prior art, the purpose of the present application is to provide a power chip friction-assisted rapid sintering method and a power chip, which aims to promote the dissolution of high-melting-point metals into intermediate low-melting-point liquid phase through friction assistance, shorten the solid-liquid interdiffusion connection time, and not damage the internal structure of the chip.

[0009] In order to achieve the above-mentioned purpose, the present application is realized by the following technical scheme:

[0010] The present application provides a power chip friction-assisted rapid sintering method in the first aspect, comprising the following steps:

[0011] Place the substrate on the heating table and place the intermediate layer on the substrate;

[0012] Placing the power chip to be sintered on the intermediate layer, promoting the isothermal solidification of the power chip through dynamic friction until the remaining thin Au-Sn liquid phase layer in the intermediate layer, and then realizing the isothermal solidification through static pressure sintering to obtain a full intermetallic compound joint;

[0013] The full intermetallic compound joint is subjected to heat preservation and cooling.

[0014] Further, before placing the substrate and the intermediate layer, the substrate and the intermediate layer are subjected to argon plasma cleaning.

[0015] Further, the substrate is a gold-plated substrate.

[0016] Further, the intermediate layer is an Au80Sn20 solder sheet.

[0017] Further, the substrate is placed on the heating table through a circular vacuum suction nozzle, and the intermediate layer is placed on the substrate through the circular vacuum suction nozzle.

[0018] Further, the power chip is placed on the intermediate layer through a pyramid suction nozzle, and the pyramid suction nozzle only contacts the edge of the power chip to avoid damaging the internal lines of the chip.

[0019] Further, the friction process is that a certain pressure is applied to the power chip through the pyramid suction nozzle and the power chip is driven to move in the horizontal direction relative to the substrate.

[0020] Further, the background temperature of the heating table is set to 270-275 DEG C.

[0021] Further, the heat preservation temperature is 310-330 DEG C, and the heat preservation time is 1-5 min.

[0022] The second aspect of the present application provides a power chip sintered by the power chip friction-assisted rapid sintering method of the first aspect.

[0023] The above one or more technical solutions have the following beneficial effects:

[0024] The present application discloses a power chip friction-assisted rapid sintering method and a power chip, which is aimed at the third generation semiconductor power chip, shortens the solid-liquid interdiffusion connection time through friction-assisted rapid sintering, and does not damage the internal structure of the chip. The present application improves the sintering efficiency of the power chip by combining dynamic friction with static pressure sintering, while ensuring the integrity of the chip.

[0025] The advantages of the additional aspects of the present application will be partially given in the following description, partially become obvious from the following description, or be known by the practice of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0026] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0027] Figure 1 This is a schematic diagram of the power chip sintering process in Embodiment 1 of the present invention;

[0028] Figure 2 This is a schematic diagram of the friction cycle path in Embodiment 1 of the present invention;

[0029] Figure 3 This refers to the friction-assisted Au / Au-Sn SL ID bonding process in Embodiment 1 of the present invention;

[0030] Figure 4 This is the temperature curve of the power chip sintering process in Embodiment 1 of the present invention. Detailed Implementation

[0031] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0032] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0033] Terminology Explanation:

[0034] Solid-liquid interdiffusion bonding (instantaneous liquid phase bonding): This method utilizes the isothermal solidification resulting from the solid-liquid interdiffusion (reaction) between a high-melting-point metal and a low-melting-point metal to obtain a high-melting-point all-metal intermetallic compound joint. The heat resistance temperature of the joint is significantly higher than the connection temperature, achieving the goal of "low-temperature connection and high-temperature service".

[0035] Friction-assisted: After the solder melts, a certain pressure is applied to the chip through a nozzle, causing the chip to move relative to the substrate in the horizontal direction. This can be achieved by an automatic chip soldering machine.

[0036] Nano-silver sintering bonding: a high-temperature resistant encapsulation bonding technology that utilizes the surface effect of nanoparticles (increased specific surface area and surface energy of powder reduced to nanoscale size) to achieve bonding at relatively low temperatures (200-350℃) and certain pressures.

[0037] Embodiment one:

[0038] The embodiment one of the present application provides a power chip friction-assisted rapid sintering method, comprising the following steps:

[0039] Step 1, placing the substrate on the heating table and placing the intermediate layer on the substrate.

[0040] Step 2, placing the power chip to be sintered on the intermediate layer, promoting the isothermal solidification of the solder through dynamic friction on the power chip until the remaining thin Au-Sn liquid phase layer, and then realizing the isothermal solidification through static pressure sintering to obtain a full intermetallic compound joint.

[0041] Step 3, heat preservation and cooling of the full intermetallic compound joint.

[0042] In step 1, the substrate is a gold-plated substrate. Before placing the substrate and the intermediate layer, the substrate and the intermediate layer are subjected to argon plasma cleaning to improve the wettability of the solder on the surface of the substrate.

[0043] In this embodiment, the intermediate layer is an Au80Sn20 solder sheet. The intermediate layer metal includes gold-tin solder, which can be directly pre-plated on the back of the chip.

[0044] In this embodiment, the substrate is placed on the heating table by a circular vacuum suction nozzle, and the intermediate layer is also placed on the substrate by a circular vacuum suction nozzle.

[0045] In step 2, the power chip is placed on the intermediate layer by a pyramid suction nozzle, which only contacts the edge of the power chip to avoid damaging the internal lines of the chip, as shown in Figure 1 .

[0046] The background temperature of the heating table is set to 270-275℃ in advance.

[0047] After placing the power chip, the heating table starts to heat up, and when the temperature rises to 300-310℃, dynamic friction starts. The friction process is: a certain pressure is applied to the power chip by the pyramid suction nozzle and the power chip is driven to move in the horizontal direction relative to the substrate, with a duration of 3-10s. Among them, according to the different areas of the chip, the applied pressure is adjusted within the range of 40-100g.

[0048] In this embodiment, the friction process is realized by a chip soldering machine. During soldering, the substrate is fixed on the heating table by a clamp, the vacuum of the suction nozzle is closed, and the chip is fixed and driven to move by the pyramid structure of the suction nozzle, realizing friction-assisted welding. During welding, the chip center is taken as the origin and moves along the "+" or "X" path in a reciprocating cycle, Figure 2The schematic diagram of the "+" type friction cycle path is shown. The friction amplitude, speed, cycle number and other parameters are precisely controllable. The molten solder is in a turbulent state under the driving of the reciprocating friction movement, the internal particles are fully mixed, and the composition tends to be homogenized. After the dynamic friction is completed, the gold-tin solder is well wetted on the surface of the substrate and the chip. The solder can be an independent preformed solder sheet, or can be prepositioned on the surface of the substrate or the back of the chip.

[0049] By dynamic friction, the solder is isothermally solidified until a relatively thin Au-Sn liquid phase layer of about 5-10 μm is left. Then, after a short time of static pressure sintering, complete isothermal solidification is achieved, and a full intermetallic compound joint is obtained. In this embodiment, the static pressure sintering time is in the range of 1-10 min. In this embodiment, Figure 3 Fig. 1 shows the schematic diagram of the initial state before sintering (a), the state of the chip during dynamic friction (b), and the state of the chip during the static pressure sintering step after dynamic friction (c).

[0050] It should be particularly noted that the circular vacuum suction nozzle and the pyramid suction nozzle are existing products, including a vacuum hole and a suction nozzle, and can move the chip, the substrate, the intermediate layer and the like, which will not be described here.

[0051] In step 3, the holding temperature is 310-330 °C, and the holding time is 1-5 min. The temperature of the heating table is reduced to 270-275 °C, and the overall process parameter curve is as shown in Figure 4 The soldered power chip module is finally taken out.

[0052] Embodiment Two

[0053] Embodiment Two of the present application provides a power chip, which is sintered by using the power chip friction-assisted rapid sintering method of Embodiment One.

[0054] The steps and methods involved in Embodiment Two above correspond to Embodiment One, and the specific embodiments can be referred to the relevant description part of Embodiment One.

[0055] The above describes the specific embodiments of the present application in conjunction with the accompanying drawings, but is not a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications or variations made by those skilled in the art on the basis of the technical solutions of the present application without creative labor are still within the protection scope of the present application.

Claims

1. A power chip friction-assisted rapid sintering method, characterized by, The method comprises the following steps: placing the substrate on a heating table and placing the intermediate layer on the substrate; placing the power chip to be sintered on the intermediate layer, promoting the isothermal solidification of the solder through dynamic friction on the power chip until a thin Au-Sn liquid phase layer remains, and then achieving complete isothermal solidification through static pressure sintering to obtain a full intermetallic compound joint; holding and cooling the full intermetallic compound joint; shortening the solid-liquid interdiffusion connection time through friction-assisted rapid sintering and not damaging the internal structure of the chip; the substrate is a gold-plated substrate; the intermediate layer is an Au80Sn20 solder piece.

2. The power chip friction-assisted rapid sintering method of claim 1, wherein, Before placing the substrate and the intermediate layer, the substrate and the intermediate layer are subjected to argon plasma cleaning.

3. The power chip friction-assisted rapid sintering method of claim 1, wherein, The substrate is placed on the heating table through a circular vacuum suction nozzle, and the intermediate layer is also placed on the substrate through a circular vacuum suction nozzle.

4. The power chip friction-assisted rapid sintering method of claim 1, wherein, The power chip is placed on the intermediate layer through a pyramid suction nozzle, and the pyramid suction nozzle only contacts the edge of the power chip to avoid damaging the internal lines of the chip.

5. The power chip friction-assisted rapid sintering method of claim 4, wherein, The friction process is: a certain pressure is applied to the power chip through the pyramid suction nozzle and the power chip is driven to move horizontally relative to the substrate.

6. The power die friction-assisted rapid sintering method of claim 1, wherein, The background temperature of the heating table is set to 270-275℃.

7. The power die friction-assisted rapid sintering method of claim 1, wherein, The holding temperature is 310-330℃, and the holding time is 1-5min.

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