Circuit board and electronic device

By stacking sub-board layers and frame layers on the motherboard of electronic devices to form a multi-layer stacked structure, the problem of limited motherboard space is solved, a larger layout area and optimized signal connection are achieved, the needs of device and circuit layout are met, and battery life is improved.

CN117693115BActive Publication Date: 2026-03-20HONOR DEVICE CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-07-06
Publication Date
2026-03-20

AI Technical Summary

Technical Problem

The limited space on the motherboard of electronic devices cannot meet the complex layout requirements of components and circuits. In particular, the cutout area of ​​the camera component results in narrow wiring channels on the left and right sides of the motherboard, increasing the demand for signal connection and battery life.

Method used

The circuit board design adopts a multi-layer stacked structure, including a motherboard layer, a first frame board layer, a first sub-board layer, and a second device. By stacking the first sub-board layer on the motherboard layer, a sandwich or five-sided PCB board stacked structure is formed. The layout area is increased by utilizing the Z-axis space, and the left and right sides of the motherboard layer are connected by the wiring layer, reducing signal line through-holes and lowering signal insertion loss.

Benefits of technology

Without increasing the circuit board area, the layout area was increased to meet the layout requirements of components and circuits, signal insertion loss was reduced, signal connection was optimized, and battery life was improved.

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Patent Text Reader

Abstract

The application discloses a circuit board and an electronic device, the circuit board comprising a main plate layer, a first frame plate layer, a first sub plate layer, a first device and a second device, the first frame plate layer being stacked on the main plate layer, the first sub plate layer being stacked on a side of the first frame plate layer away from the main plate layer, the first device being arranged on the main plate layer, and the second device being arranged on the first sub plate layer. The application can exchange a larger layout area for a Z-direction space in a stacked manner by stacking the first sub plate layer on the main plate layer, that is, the layout area of the circuit board is increased. At this time, the first device can be arranged on the main plate layer, and the second device can be arranged on the first sub plate layer, so that the layout and wiring requirements of the devices and the circuit are met.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic equipment, in particular to a circuit board and an electronic equipment comprising the same. BACKGROUND

[0002] Since the area and thickness of electronic equipment (such as mobile phones and tablets) are usually of a certain specification, the space for assembling the mainboard in the electronic equipment is limited, and the mainboard cannot be made too large. However, with the increasing functions of electronic equipment, the mainboard of the electronic equipment is becoming more and more complex, for example, there are more and more devices and circuits on the mainboard, which leads to the fact that the area of the current mainboard cannot meet the layout of devices and circuits. SUMMARY

[0003] In order to overcome the problems existing in the prior art, the main purpose of the present application is to provide a circuit board capable of meeting the layout of devices and circuits.

[0004] In order to achieve the above-mentioned purpose, the present application specifically adopts the following technical solutions:

[0005] The present application provides a circuit board applied to an electronic equipment, comprising:

[0006] a mainboard layer;

[0007] a first frame plate layer, which is stacked on the mainboard layer;

[0008] a first subboard layer, which is stacked on a side of the first frame plate layer away from the mainboard layer;

[0009] a first device, which is arranged on the mainboard layer; and

[0010] a second device, which is arranged on the first subboard layer.

[0011] The present embodiment can exchange a larger layout area for Z-direction space in a stacked manner by stacking the first subboard layer on the mainboard layer, that is, the layout area of the circuit board is increased. At this time, the first device can be arranged on the mainboard layer, and the second device can be arranged on the first subboard layer, thereby meeting the layout and wiring requirements of devices and circuits.

[0012] In some embodiments, the main board layer is provided with a hollowed-out area, a first layout area and a second layout area, the first layout area and the second layout area are respectively located on opposite sides of the hollowed-out area; the circuit board further comprises a wiring layer and a second frame plate layer, the first frame plate layer, the second frame plate layer and the wiring layer are spaced and stacked in the first layout area, and the wiring layer is located between the first frame plate layer and the second frame plate layer, and the wiring layer extends from the first layout area to the second layout area. In this embodiment, since the wiring layer extends from the first layout area to the second layout area, the signals between the first layout area and the second layout area can be connected through the wiring layer, thereby meeting the signal connection requirements of the regions on the left and right sides of the main board layer.

[0013] In some embodiments, the first sub-board layer is stacked on a side of the first frame plate layer away from the main board layer and extends to the second frame plate layer. In this embodiment, since the first sub-board layer is stacked on a side of the first frame plate layer away from the main board layer and extends to the second frame plate layer, the second devices on the first sub-board layer can be electrically connected through the signal lines in the first sub-board layer, without the signal lines electrically connecting the second devices on the first sub-board layer passing through the first frame plate layer and the second frame plate layer, so that the connection lines between the second devices are shorter and the connection line holes are fewer, thereby reducing signal insertion loss.

[0014] In some embodiments, the thicknesses of the first frame plate layer and the second frame plate layer are the same, and the thickness of the wiring layer is smaller than the thicknesses of the first frame plate layer and the second frame plate layer. In this embodiment, by making the thicknesses of the first frame plate layer and the second frame plate layer the same, the first sub-board layer can be arranged parallel to the main board layer, thereby enhancing the support stability of the first frame plate layer and the second frame plate layer to the first sub-board layer; by making the thickness of the wiring layer smaller than the thicknesses of the first frame plate layer and the second frame plate layer, the wiring layer and the first sub-board layer are prevented from contacting and affecting each other, and at the same time, the space between the wiring layer and the first sub-board layer can be fully utilized to arrange devices.

[0015] In some embodiments, the first frame plate layer has a ring structure. In this embodiment, by arranging the first frame plate layer in a ring structure, the first frame plate layer in a ring structure can more stably support the first sub-board layer, and the volume of the first frame plate layer can be reduced, thereby reducing costs.

[0016] In some embodiments, the circuit board further comprises a third frame plate layer and a second sub-board layer, the third frame plate layer is stacked on a side of the first sub-board layer away from the first frame plate layer, the second sub-board layer is stacked on a side of the third frame plate layer away from the first sub-board layer, and the second sub-board layer is provided with at least one second device. In this embodiment, by arranging the second sub-board layer, the layout area in the Z direction is further exchanged for a larger layout area in a stacked manner, thereby increasing the layout area of the circuit board.

[0017] In some embodiments, the third frame plate layer has a ring structure. This embodiment can more stably support the second sub-board layer by the third frame plate layer having a ring structure, and can reduce the volume of the third frame plate layer, thereby reducing the cost.

[0018] In some embodiments, the first sub-board layer includes a first part and a second part, the first part is stacked on a side of the first frame plate layer away from the main board layer, the second part is stacked on a side of the second frame plate layer away from the main board layer, and the first part and the second part are respectively provided with at least one second device.

[0019] In some embodiments, the circuit board further includes a third frame plate layer and a second sub-board layer, the third frame plate layer is stacked on a side of the first part away from the first frame plate layer, the second sub-board layer is stacked on a side of the third frame plate layer away from the first part, and the second sub-board layer is further provided with at least one second device.

[0020] In some embodiments, the first device includes at least one of a system-on-chip, a universal flash storage chip, a power management unit, a fast charging chip, an audio codec chip, an audio amplifier, a screen driving chip, a board-to-board connector, a resistor, a capacitor, and an inductor; and the second device includes at least one of a radio frequency transceiver, a power amplifier, a low noise amplifier, a combining switch, a filter, a duplexer, an open line switch, and an open line spring.

[0021] Correspondingly, the application also provides an electronic device, which includes:

[0022] A housing, which surrounds a containing cavity;

[0023] A circuit board, which is arranged in the containing cavity, and includes a main board layer, a first frame plate layer, a first sub-board layer, a first device, and a second device, the first frame plate layer is stacked on the main board layer, the first sub-board layer is stacked on a side of the first frame plate layer away from the main board layer, the first device is arranged on the main board layer, and the second device is arranged on the first sub-board layer.

[0024] This embodiment can exchange a larger layout area for the Z-direction space inside the electronic device in a stacked manner by stacking the first sub-board layer on the main board layer, thereby meeting the layout and wiring requirements of the devices and lines by fully utilizing the internal space of the electronic device, and saving more space in the X-direction and the Y-direction for layout of a larger volume battery, thereby meeting the user's demand for battery endurance of the electronic device.

[0025] In some embodiments, the camera assembly is further included, the housing is provided with a light-transmitting hole, the mainboard layer is provided with a hollow region, a first layout area and a second layout area, the first layout area and the second layout area are respectively located on opposite sides of the hollow region, the first frame plate layer is stacked in the first layout area, and the camera assembly is assembled in the hollow region and opposite to the light-transmitting hole. In this embodiment, the hollow region is arranged on the mainboard layer, and the camera assembly is assembled in the hollow region, so that the Z-direction space inside the electronic device can be fully utilized to assemble the camera assembly, and the thickness of the electronic device is not affected by the height of the camera assembly in the Z-direction.

[0026] In some embodiments, the circuit board further includes a wiring layer and a second frame plate layer, the first frame plate layer, the second frame plate layer and the wiring layer are spaced and stacked in the first layout area, and the wiring layer is located between the first frame plate layer and the second frame plate layer, and the wiring layer extends from the first layout area to the second layout area. In this embodiment, the wiring layer extending from the first layout area to the second layout area is arranged, so that the signals between the first layout area and the second layout area can be connected through the wiring layer, and the signal connection requirements of the left and right regions of the mainboard layer are met.

[0027] In some embodiments, the first subboard layer is stacked on the first frame plate layer and extends to the second frame plate layer. In this embodiment, the first subboard layer is stacked on the side of the first frame plate layer away from the mainboard layer and extends to the second frame plate layer, so that the signal lines in the first subboard layer can electrically connect the second devices on the first subboard layer, without the signal lines electrically connecting the second devices on the first subboard layer passing through the first frame plate layer and the second frame plate layer. The connection lines between the second devices are short and the connection line holes are few, so that the signal insertion loss is reduced.

[0028] In some embodiments, the first subboard layer includes a first part and a second part, the first part is stacked on the side of the first frame plate layer away from the mainboard layer, the second part is stacked on the side of the second frame plate layer away from the mainboard layer, and the first part and the second part are respectively provided with at least one second device.

[0029] In some embodiments, the circuit board further includes a third frame plate layer and a second subboard layer, the third frame plate layer is stacked on the side of the first subboard layer away from the first frame plate layer, the second subboard layer is stacked on the side of the third frame plate layer away from the first subboard layer, and the second subboard layer is provided with at least one second device.

[0030] In some embodiments, the camera assembly comprises a camera decoration and a camera module, the camera decoration is assembled in the light transmission hole, the camera module is assembled in the hollowed-out area, and the position of the camera module corresponds to the position of the camera decoration, and at least part of the third frame plate layer, the second sub-plate layer and the second device arranged on the second sub-plate layer are located in the internal space of the camera decoration. In this embodiment, at least part of the third frame plate layer, the second sub-plate layer and the second device arranged on the second sub-plate layer of the circuit board are located in the internal space of the camera decoration, so that the internal space of the electronic device can be fully utilized, and the waste of the empty space of the electronic device is avoided.

[0031] Compared with the prior art, the circuit board comprises a main plate layer, a first frame plate layer, a first sub-plate layer, a first device and a second device, the first frame plate layer is stacked on the main plate layer, the first sub-plate layer is stacked on the side of the first frame plate layer away from the main plate layer, the first device is arranged on the main plate layer, and the second device is arranged on the first sub-plate layer. In this application, the first sub-plate layer is stacked on the main plate layer, so that a larger layout area can be obtained in the Z direction space in a stacked manner, that is, the layout area of the circuit board is increased. At this time, the first device can be arranged on the main plate layer, and the second device can be arranged on the first sub-plate layer, thereby meeting the layout and wiring requirements of the devices and lines. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 The top view of the circuit board provided in Embodiment One of the application.

[0033] Figure 2 The perspective view of the circuit board provided in Embodiment One of the application.

[0034] Figure 3 The cross-sectional view at E-E in Figure 1

[0035] Figure 4 The top view of the circuit board provided in Embodiment Two of the application.

[0036] Figure 5 The perspective view of the circuit board provided in Embodiment Two of the application.

[0037] Figure 6 The cross-sectional view at E-E in Figure 4

[0038] Figure 7 The top view of the circuit board provided in Embodiment Three of the application.

[0039] Figure 8 The perspective view of the circuit board provided in Embodiment Three of the application.

[0040] Figure 9 ​​Figure 1 is a perspective view of a circuit board according to an embodiment of the present application. Figure 7 Figure 2 is a sectional view at E-E in Figure 1.

[0041] Figure 10 Figure 3 is a top view of a circuit board according to an embodiment of the present application.

[0042] Figure 11 Figure 4 is a perspective view of a circuit board according to an embodiment of the present application.

[0043] Figure 12 Figure 5 is a sectional view at E-E in Figure 4. Figure 10

[0044] Figure 13 Figure 6 is a top view of a circuit board according to an embodiment of the present application.

[0045] Figure 14 Figure 7 is a perspective view of a circuit board according to an embodiment of the present application.

[0046] Figure 15 Figure 8 is a sectional view at E-E in Figure 7. Figure 13

[0047] Figure 16 Figure 9 is a top view of a circuit board according to an embodiment of the present application.

[0048] Figure 17 Figure 10 is a perspective view of a circuit board according to an embodiment of the present application.

[0049] Figure 18 Figure 11 is a sectional view at E-E in Figure 10. Figure 16

[0050] Figure 19 Figure 12 is a signal hole structure diagram of a circuit board.

[0051] Figure 20 Figure 13 is a top view of an electronic device according to an embodiment of the present application.

[0052] Figure 21 Figure 14 is a sectional view at F-F in Figure 13. Figure 20

[0053] Reference signs:

[0054] 1, main board layer; 11, hollowed-out area; 12, first layout area; 13, second layout area; 2, first frame board layer; 3, second frame board layer; 4, third frame board layer; 5, wiring layer; 6, first sub-board layer; 61, first part; 62, second part; 7, second sub-board layer; 8, first device; 9, second device; 10, shielding cover; 100, circuit board; 101, signal hole; 102, ground hole; 200, housing; 201, light-transmitting hole; 300, camera assembly; 301, camera decoration piece; 302, camera module; 400, screen module. ​​​​Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0056] In the description of this application, unless otherwise expressly specified and limited, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; unless otherwise specified or explained, the term "multiple" refers to two or more; the terms "connected," "fixed," etc., should be interpreted broadly. For example, "connected" can be a fixed connection, a detachable connection, an integral connection, or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0057] In the description of this specification, it should be understood that the directional terms such as "upper" and "lower" used in the embodiments of this application are used to describe the position relative to the screen. When the circuit board is installed in the housing of the electronic device, the side of each board layer closer to the screen is the upper surface, and the side farther from the screen is the lower surface. In addition, in the context, it should also be understood that when it is mentioned that one element is connected to another element "upper" or "lower", it can not only be directly connected to the other element "upper" or "lower", but also indirectly connected to the other element "upper" or "lower" through an intermediate element.

[0058] Electronic devices, such as mobile phones and tablets, typically include components such as a casing, screen, battery, circuit board, and camera assembly. The casing and screen are connected to form a housing cavity, within which the battery and circuit board are installed. The battery provides power to the entire electronic device, the circuit board controls its operation, and the screen displays relevant information. The casing also has a light-transmitting hole, and the camera assembly is installed inside the casing, opposite to this hole. The camera assembly enables the electronic device to perform a shooting function. The camera assembly includes a camera module and a camera decorative element. The camera decorative element is installed in the light-transmitting hole of the casing, and the camera module is mounted on the circuit board, corresponding to the camera decorative element.

[0059] In the prior art, the camera assembly of a mobile phone is generally designed in the center, and the specification is getting higher and higher, so that the center area of the mainboard is hollowed out by the camera assembly more and more, resulting in that the wiring channels on the left and right sides of the mainboard are getting narrower and narrower, and a large number of signals on the left and right sides of the mainboard need to be interconnected, and only through the mainboard, the left and right signal wiring channels are insufficient, and the sandwich scheme is needed to solve the problem of insufficient left and right wiring channels of the mainboard. At the same time, the hardware specification of the smart phone is getting higher and higher, the battery endurance demand becomes larger, and the battery size becomes larger. However, due to the limitation of the internal space of the mobile phone, the mainboard of the mobile phone cannot be increased, and the layout area of the mainboard is continuously insufficient, so it is necessary to stack multiple sandwich PCBs to layout in the Z direction space to obtain a larger layout area, and the radio frequency module layout sub-board has a higher requirement for signal insertion loss, especially the radio frequency signal common end to the antenna. In order to reduce the signal insertion loss, the wiring needs to be as short as possible and the via needs to be less.

[0060] Referring to Figures 1 to 3 As shown in the figure, Figure 1 The top view of the circuit board provided in Embodiment One of the present application, Figure 2 The perspective view of the circuit board provided in Embodiment One, Figure 3 Figure 1The cross-sectional view at E-E. The embodiments of the present application disclose a circuit board 100, which comprises a main plate layer 1, a first frame plate layer 2, a first sub-plate layer 6, a first device 8 and a second device 9. The main plate layer 1 is provided with a hollow area 11, a first layout area 12 and a second layout area 13, the hollow area 11 can be used for mounting a camera assembly, and the first layout area 12 and the second layout area 13 are respectively located on opposite sides of the hollow area 11 and can be used for device and circuit layout. The first frame plate layer 2 is stacked on the first layout area 12 of the main plate layer 1, and the first sub-plate layer 6 is stacked on a side of the first frame plate layer 2 away from the main plate layer 1. The first device 8 can be multiple, and the multiple first devices 8 are respectively arranged on the main plate layer 1. The second device 9 can be multiple, and the multiple second devices 9 are respectively arranged on the first sub-plate layer 6, and at least part of the second devices 9 on the first sub-plate layer 6 can be electrically connected through a signal line C. The first device 8 can be a baseband device of an electronic device, for example, can be a system on a chip (SOC), a universal flash storage (UFS), a power management unit (PMU), a fast charging chip, a codec chip (audio codec chip), an audio amplifier, an LCD (screen) drive chip, a board-to-board connector (BTB connector), a resistor, a capacitor, an inductor and the like; the second device 9 can be a radio frequency integrated circuit (RFIC), a radio frequency PA (power amplifier), a low noise amplifier (LNA), a combining switch, a filter, a duplexer, an antenna switch, an antenna spring and the like, and the board-to-board connector of the camera and the surrounding supporting devices and the like baseband devices can be arranged on the wiring layer 5.

[0061] In the embodiment, since each second device 9 is arranged on the first sub-board layer 6, each second device 9 can be electrically connected through the signal line in the first sub-board layer 6. If part of the second devices 9 are arranged on the first sub-board layer 6 and part of the second devices 9 are arranged on the main board layer 1, the signal line between the second device 9 on the first sub-board layer 6 and the second device 9 on the main board layer 1 needs to pass through the first frame layer 2. However, the signal line for electrically connecting each second device 9 in the embodiment does not need to pass through the first frame layer 2, so that the connection between the second devices 9 is shorter, the signal perforation is less, and the signal insertion loss (which is used to describe the degree of attenuation of the signal in the transmission process) is reduced. At the same time, the embodiment can exchange a larger layout area for the Z-direction space in a stacked manner by stacking the first sub-board layer 6 on the main board layer 1, thereby increasing the layout area of the circuit board. At this time, the first device 8 can be arranged on the main board layer 1 and the second device 9 can be arranged on the first sub-board layer 6, thereby meeting the layout and wiring requirements of the devices and lines.

[0062] With reference to the Figure 3 As shown in the figure, the main board layer 1 and the first sub-board layer 6 are connected through the first frame layer 2, that is, the first sub-board layer 6 is elevated above the main board layer 1 through the first frame layer 2, and the main board layer 1 can perform signal transmission with the first sub-board layer 6 through the signal line arranged inside the first frame layer 2. For example, a via hole can be formed in the first frame layer 2, and a conductive wire is arranged in the via hole, so that at least part of the first devices 8 on the main board layer 1 can be electrically connected with at least part of the second devices 9 on the first sub-board layer 6 through the conductive wire. Or a via hole is arranged in the first frame layer 2, and a conductive layer is arranged on the inner wall of the via hole, so that at least part of the first devices 8 on the main board layer 1 can be electrically connected with at least part of the second devices 9 on the first sub-board layer 6 through the conductive layer. Thus, a sandwiched PCB board stacking structure is formed. In the case of unchanged circuit board area, the layout area of the circuit board can be increased by extending the circuit board in the Z-direction (the thickness extension direction of the circuit board), because the electronic devices can be arranged not only on the main board layer 1 but also on the first sub-board layer 6.

[0063] Specifically, the first frame layer 2 is at least partially in a ring structure, and the circumferential side of the first sub-board layer 6 is flush with the circumferential side of the first frame layer 2, so that the first sub-board layer 6 can be more stably supported by the ring structure of the first frame layer 2. At the same time, the first frame layer 2 is arranged in a ring structure, which can reduce the volume of the first frame layer 2 and increase the device layout area while reducing the weight.

[0064] In some embodiments, with reference to the Figures 4 to 6 As shown in the figure, Figure 4 is a top view of the circuit board provided in Embodiment Two of the present application, Figure 5 is a perspective view of the circuit board provided in Embodiment Two of the present application, Figure 6 Figure 4A cross-sectional view at EE. In this embodiment, the circuit board 100 includes a main board layer 1, a first frame board layer 2, a second frame board layer 3, a wiring layer 5, a first sub-board layer 6, a first device 8, and a second device 9. The first sub-board layer 6 is divided into two parts: a first part 61 and a second part 62. The main board layer 1 has a cutout area 11, a first layout area 12, and a second layout area 13. The cutout area 11 can be used to assemble camera components. The first layout area 12 and the second layout area 13 are located on opposite sides of the cutout area 11 and are used for laying out devices and circuits. The first frame board layer 2, the wiring layer 5, and the second frame board layer 3 are stacked at intervals on the first layout area 12 of the main board layer 1, with the wiring layer 5 located between the first frame board layer 2 and the second frame board layer 3, extending from the first layout area 12 to the second layout area 13. The first part 61 is stacked on the side of the first frame board layer 2 facing away from the main board layer 1, and the second part 62 is stacked on the side of the second frame board layer 3 facing away from the main board layer 1. Multiple first devices 8 may be provided, and multiple first devices 8 are respectively provided on the motherboard layer 1; multiple second devices 9 may be provided, and multiple second devices 9 are respectively provided on the first part 61 and the second part 62, and at least some of the second devices 9 located in the first part 61 and at least some of the second devices 9 located in the second part 62 can be electrically connected through signal line C.

[0065] In this embodiment, since a wiring layer 5 is provided extending from the first layout area 12 of the motherboard layer 1 to the second layout area 13, the signals between the first layout area 12 and the second layout area 13 of the motherboard layer 1 can be connected through the wiring layer 5, thus satisfying the signal connection requirements of the left and right sides of the motherboard layer 1.

[0066] In some embodiments, refer to Figures 7 to 9 As shown, Figure 7 This is a top view of the circuit board provided in Embodiment 3 of this application. Figure 8 This is a perspective view of the circuit board provided in Embodiment 3. Figure 9 Figure 7The cross-sectional view at E-E. In this embodiment, the circuit board 100 comprises a main board layer 1, a first frame board layer 2, a second frame board layer 3, a wiring layer 5, a first sub-board layer 6, a first device 8 and a second device 9. The main board layer 1 is provided with a hollow area 11, a first layout area 12 and a second layout area 13, the hollow area 11 can be used for mounting a camera assembly, and the first layout area 12 and the second layout area 13 are respectively located on opposite sides of the hollow area 11 and can be used for layout of devices and lines. The first frame board layer 2, the second frame board layer 3 and the wiring layer 5 are spaced and stacked in the first layout area 12 of the main board layer 1, and the wiring layer 5 is located between the first frame board layer 2 and the second frame board layer 3, and the wiring layer 5 extends from the first layout area 12 to the second layout area 13 of the main board layer 1. The first sub-board layer 6 is stacked on the side of the first frame board layer 2 away from the main board layer 1 and extends to the second frame board layer 3. The first device 8 can be provided with a plurality of first devices 8, and the plurality of first devices 8 are respectively arranged on the main board layer 1. The second device 9 can be provided with a plurality of second devices 9, and the plurality of second devices 9 are respectively arranged on the first sub-board layer 6, and at least part of the second devices 9 can be electrically connected through the signal line C arranged in the first sub-board layer 6.

[0067] In this embodiment, since the wiring layer 5 extending from the first layout area 12 to the second layout area 13 of the main board layer 1 is arranged, the signals between the first layout area 12 and the second layout area 13 of the main board layer 1 can be connected through the wiring layer 5, meeting the signal connection requirement of the regions on the left and right sides of the main board layer 1. In addition, the first sub-board layer 6 is stacked on the side of the first frame board layer 2 away from the main board layer 1 and extends to the second frame board layer 3 (the first sub-board layer 6 crosses the wiring layer 5), and each second device 9 is arranged on the first sub-board layer 6, so that each second device 9 can be electrically connected through the signal line in the first sub-board layer 6, without the signal line electrically connecting each second device 9 passing through the first frame board layer 2 and the second frame board layer 3, thereby shortening the connection between the second devices 9 and reducing the connection via holes, and reducing the signal insertion loss.

[0068] In some embodiments, another specific implementation is also disclosed in the present application, referring to Figures 10 to 12 , Figure 10 the top view of the circuit board provided for Embodiment Four of the present application, Figure 11 the perspective view of the circuit board provided for Embodiment Four of the present application, Figure 12 Figure 10The cross-sectional view at E-E. In this embodiment, the circuit board 100 comprises a main board layer 1, a first frame board layer 2, a third frame board layer 4, a first sub-board layer 6, a second sub-board layer 7, a first device 8 and a second device 9. The main board layer 1 is provided with a hollow area 11, a first layout area 12 and a second layout area 13, the hollow area 11 can be used for assembling a camera assembly, the first layout area 12 and the second layout area 13 are respectively located on opposite sides of the hollow area 11 and can be used for layout of devices and lines. The first frame board layer 2 is stacked on the first layout area 12, and the first sub-board layer 6 is stacked on a side of the first frame board layer 2 away from the main board layer 1. The third frame board layer 4 is stacked on a side of the first sub-board layer 6 away from the first frame board layer 2, and the second sub-board layer 7 is stacked on a side of the third frame board layer 4 away from the first sub-board layer 6. The first device 8 can be provided with a plurality of first devices 8, which are respectively arranged on the main board layer 1. The second device 9 can be provided with a plurality of second devices 9, which are respectively arranged on the first sub-board layer 6 and the second sub-board layer 7, and at least part of the second devices 9 located on the second sub-board layer 7 and at least part of the second devices 9 located on the first sub-board layer 6 can be electrically connected through a signal line C.

[0069] In this embodiment, the second device 9 is arranged on the first sub-board layer 6 and the second sub-board layer 7, so that each second device 9 can be electrically connected through the signal line in the second sub-board layer 7, the second frame layer 4 and the first sub-board layer 6, without the signal line electrically connecting each second device 9 passing through the first frame board layer 2, thereby shortening the connection between the second devices 9 and reducing the connection hole, reducing the signal insertion loss. For example, the combining switch can be arranged on the second sub-board layer 7, and the antenna can be arranged on the first sub-board layer 6, so as to shorten the signal line from the combining switch to the antenna, thereby reducing the insertion loss of the radio frequency common end signal (the signal from the combining switch to the antenna can be referred to as the radio frequency common end signal).

[0070] In some embodiments, referring to Figures 13 to 15 , the top view of the circuit board provided for Embodiment Five, Figure 13 , the perspective view of the circuit board provided for Embodiment Five, Figure 14 Figure 15 Figure 13 ​The cross-sectional view at E-E. In this embodiment, the circuit board 100 comprises a main board layer 1, a first frame board layer 2, a second frame board layer 3, a third frame board layer 4, a wiring layer 5, a first sub-board layer 6, a second sub-board layer 7, a first device 8 and a second device 9. The first sub-board layer 6 is divided into two parts, i.e., a first part 61 and a second part 62. The main board layer 1 is provided with a hollow area 11, a first layout area 12 and a second layout area 13. The hollow area 11 can be used for mounting a camera assembly. The first layout area 12 and the second layout area 13 are respectively located on opposite sides of the hollow area 11 and can be used for layout of devices and lines. The first frame board layer 2, the wiring layer 5 and the second frame board layer 3 are respectively and alternately stacked on the first layout area 12 of the main board layer 1. The wiring layer 5 is located between the first frame board layer 2 and the second frame board layer 3 and extends from the first layout area 12 to the second layout area 13. The first part 61 is stacked on a side of the first frame board layer 2 away from the main board layer 1. The second part 62 is stacked on a side of the second frame board layer 3 away from the main board layer 1. The third frame board layer 4 is stacked on a side of the first part 61 away from the first frame board layer 2. The second sub-board layer 7 is stacked on a side of the third frame board layer 4 away from the first sub-board layer 6. The first device 8 can be provided with a plurality of first devices 8, which are respectively arranged on the main board layer 1 and the wiring layer 5. The second device 9 can be provided with a plurality of second devices 9, which are respectively arranged on the second sub-board layer 7, the first part 61 and the second part 62. At least part of the second devices 9 located on the first part 61 and at least part of the second devices 9 located on the second part 62 can be electrically connected through a signal line C.

[0071] In this embodiment, since the wiring layer 5 extending from the first layout area 12 to the second layout area 13 of the main board layer 1 is provided, the signals between the first layout area 12 and the second layout area 13 of the main board layer 1 can be connected through the wiring layer 5, thereby meeting the signal connection requirement of the regions on the left and right sides of the main board layer 1.

[0072] In some embodiments, referring to Figures 16 to 18 , a top view of the circuit board provided in Embodiment Six is shown, Figure 16 , a perspective view of the circuit board provided in Embodiment Six is shown, Figure 17 , a perspective view of the circuit board provided in Embodiment Six is shown, Figure 18 Figure 16The cross-sectional view at E-E. In this embodiment, the circuit board 100 comprises a main board layer 1, a first frame board layer 2, a second frame board layer 3, a third frame board layer 4, a wiring layer 5, a first sub-board layer 6, a second sub-board layer 7, a first device 8 and a second device 9. The main board layer 1 is provided with a hollow area 11, a first layout area 12 and a second layout area 13, the hollow area 11 can be used for mounting a camera assembly, and the first layout area 12 and the second layout area 13 are respectively located on opposite sides of the hollow area 11 and can be used for layout of devices and lines. The first frame board layer 2, the second frame board layer 3 and the wiring layer 5 are spaced and stacked in the first layout area 12, and the wiring layer 5 is located between the first frame board layer 2 and the second frame board layer 3, and the wiring layer 5 extends from the first layout area 12 to the second layout area 13. The first sub-board layer 6 is stacked on the side of the first frame board layer 2 away from the main board layer 1 and extends to the second frame board layer 3. The third frame board layer 4 is arranged on the side of the first sub-board layer 6 away from the first frame board layer 2, and the second sub-board layer 7 is stacked on the side of the third frame board layer 4 away from the first sub-board layer 6. The first device 8 can be provided with a plurality of first devices 8, which are respectively arranged on the upper and lower surfaces of the main board layer 1 and the wiring layer 5. The second device 9 can be provided with a plurality of second devices 9, which are respectively arranged on the upper and lower surfaces of the first sub-board layer 6 and the lower surface of the second sub-board layer 7, and at least part of the second devices 9 located on the second sub-board layer 7 and at least part of the second devices 9 located on the first sub-board layer 6 can be electrically connected through a signal line C.

[0073] In the embodiment, the main board layer 1 and the first sub-board layer 6 are connected through the first frame plate layer 2 and the second frame plate layer 3, that is, the first sub-board layer 6 is elevated above the main board layer 1 through the first frame plate layer 2 and the second frame plate layer 3, and the main board layer 1 can perform signal transmission with the first sub-board layer 6 through the first frame plate layer 2. For example, a via hole can be formed in the first frame plate layer 2, and a wire is arranged in the via hole, so that at least part of the first devices 8 on the main board layer 1 can be electrically connected with at least part of the second devices 9 on the first sub-board layer 6 through the wire; or a via hole is arranged in the first frame plate layer 2, and a conductive layer is arranged on the inner wall of the via hole, so that at least part of the first devices 8 on the main board layer 1 can be electrically connected with at least part of the second devices 9 on the first sub-board layer 6 through the conductive layer. The first sub-board layer 6 and the second sub-board layer 7 are connected through the third frame plate layer 4, that is, the second sub-board layer 7 is elevated above the first sub-board layer 6 through the third frame plate layer 4, and the second sub-board layer 7 can perform signal transmission with the first sub-board layer 6 through the third frame plate layer 4. For example, a via hole can be formed in the third frame plate layer 4, and a wire is arranged in the via hole, so that at least part of the second devices 9 on the first sub-board layer 6 can be electrically connected with at least part of the second devices 9 on the second sub-board layer 7 through the wire; or a via hole is arranged in the third frame plate layer 4, and a conductive layer is arranged on the inner wall of the via hole, so that at least part of the second devices 9 on the first sub-board layer 6 can be electrically connected with at least part of the second devices 9 on the second sub-board layer 7 through the conductive layer, thereby forming a five-sandwich PCB stack structure. In the case of unchanged area of the circuit board, the layout area of the circuit board is increased by extending the circuit board in the Z direction (the thickness extension direction of the circuit board), because the electronic devices can be arranged not only on the main board layer 1 but also on the first sub-board layer 6 and the second sub-board layer 7. In addition, the area of the second sub-board layer 7 is smaller than that of the first sub-board layer 6, so that the space in the electronic device can be fully utilized.

[0074] Specifically, the thicknesses of the first frame plate layer 2 and the second frame plate layer 3 are the same, that is, the first frame plate layer 2 and the second frame plate layer 3 are arranged at the same height. The first frame plate layer 2 is welded on the main plate layer 1, and signal lines can pass through the inside of the first frame plate layer 2, so that the first sub plate layer 6 can be electrically connected to the main plate layer 1 through the first frame plate layer 2. The second frame plate layer 3 can serve as a support, and the welding points between the second frame plate layer 3, the main plate layer 1 and the first sub plate layer 6 are arranged as ground network welding points or empty network welding points (non-functional welding points), and no signal lines pass through the inside of the second frame plate layer 3. The ground network welding point is a welding point with GND network attribute, which is connected to the single board GND. The empty network welding point is a dummy network attribute welding point, which is not connected to any network of the single board, and can also be called a dummy network welding point. The thickness of the wiring layer 5 is smaller than the thicknesses of the first frame plate layer 2 and the second frame plate layer 3. The wiring layer 5 is welded on the main plate layer 1, passes through the first frame plate layer 2 and the second frame plate layer 3, and is located below the first sub plate layer 6. The wiring layer 5 extends from the first layout area 12 to the second layout area 13, and signal lines can pass through the inside of the wiring layer 5, thereby facilitating signal transmission between the first layout area 12 and the second layout area 13 of the main plate layer 1.

[0075] Further, the first frame plate layer 2 and the third frame plate layer 4 are both in a ring structure. The first sub plate layer 6 is stacked on the side of the first frame plate layer 2 and is flush with the side of the first frame plate layer 2. The side of the second sub plate layer 7 is flush with the side of the third frame plate layer 4. Therefore, the first frame plate layer 2 in a ring structure can more stably support the first sub plate layer 6, and the third frame plate layer 4 in a ring structure can more stably support the second sub plate layer 7. At the same time, arranging the first frame plate layer 2 and the third frame plate layer 4 in a ring structure can reduce the volume of the first frame plate layer 2 and the third frame plate layer 4, and increase the device layout area while reducing the weight.

[0076] In the embodiment, since the wiring layer 5 extending from the first layout area 12 to the second layout area 13 is arranged, the signals between the first layout area 12 and the second layout area 13 can be connected through the wiring layer 5, thereby meeting the signal connection requirements of the regions on the left and right sides of the main plate layer 1. In addition, the first sub plate layer 6 is stacked on the side of the first frame plate layer 2 away from the main plate layer 1 and extends to the second frame plate layer 3 (the first sub plate layer 6 is arranged across the wiring layer 5), and the second devices 9 are arranged on the first sub plate layer 6 and the second sub plate layer 7, so that the connection lines between the second devices 9 are short and the connection line holes are few, thereby reducing the signal insertion loss. For example, the combining switch can be arranged on the second sub plate layer 7, and the antenna can be arranged on the first sub plate layer 6, thereby shortening the signal line from the combining switch to the antenna and reducing the insertion loss of the radio frequency common end signal. The insertion loss is used to describe the degree of attenuation of the signal in the transmission process.

[0077] For example, if the signal line between the combiner switch located on the second sub-board layer 7 and the antenna located on the first sub-board layer 6 needs to pass through the first frame board layer 2 and the second frame board layer 3, vias need to be opened on the first frame board layer 2 and the second frame board layer 3 to facilitate signal transmission. To ensure impedance continuity at the vias in the frame boards, multiple ground vias 102 are typically provided around the signal via 101. In this embodiment, six ground vias 102 are evenly distributed around the signal via 101. (Refer to...) Figure 19 As shown. Assume the thickness of the first frame layer 2 and the second frame layer 3 is 1.3mm, the solder joint spacing W1 (distance from the center point of the ground hole to the center point of the signal hole) of the first frame layer 2 and the second frame layer 3 is 0.6mm, the pad W2 (diameter of the ground hole or signal hole) is 0.4mm, and the insertion loss of a single via is -0.0328dB@2.2GHz and -0.0611@5GHz, where the insertion loss of a single via refers to the insertion loss of the signal passing through one frame layer. If designed according to the above parameters of the first frame layer 2 and the second frame layer 3, the scheme in which the signal lines of the electrical connector switch and the antenna pass through the first frame layer 2 and the second frame layer 3 have an insertion loss 0.0656dB@2.2GHz and 0.1222@5GHz greater than the scheme in this embodiment.

[0078] Accordingly, embodiments of this application also disclose an electronic device, referring to... Figure 20 and Figure 21 As shown, Figure 20 A top view of the electronic device provided in the embodiments of this application. Figure 21 for Figure 20 A cross-sectional view at the FF position. The electronic device includes a housing 200, a camera assembly 300, a screen module 400, and a circuit board 100 as described in embodiments four to six above. The housing 200 and the screen module 400 are connected to form a receiving cavity, and the housing 200 is provided with a light-transmitting hole 201. The circuit board 100 is disposed within the receiving cavity formed by the housing 200 and the screen module 400. The camera assembly 300 includes a camera decorative element 301 and a camera module 302. The camera decorative element 301 has a ring-shaped structure to form an internal space, and the camera decorative element 301 is fitted into the light-transmitting hole 201 of the housing 200. The camera module 302 is fitted into the cutout area 11 of the circuit board 100, and the position of the camera module 302 corresponds to the position of the camera decorative element 301. At least a portion of the third frame layer 4, the second sub-board layer 7, and the second device 9 disposed on the second sub-board layer 7 of the circuit board 100 are located within the internal space of the camera decorative element 301.

[0079] To prevent electromagnetic interference, the electronic device also includes a shielding cover 10, which covers the electronic components on the circuit board. The shielding cover 10 can shield the influence of external electromagnetic waves on the internal circuit and the electromagnetic waves generated inside from radiating outward, that is, it can shield the components on the circuit board.

[0080] In some embodiments, the electronic device can also include a housing, a camera assembly, and the circuit board 100 described in embodiments 1-3 above. The housing 200 and the screen module 400 are connected to form a containing cavity. The circuit board 100 is disposed in the containing cavity formed by the housing 200 and the screen module 400. The camera assembly 300 includes a camera decoration piece 301 and a camera module 302. The camera decoration piece 301 is assembled to the light-transmitting hole 201 of the housing 200, and the camera module 302 is assembled to the hollowed-out area 11 of the circuit board 100. The position of the camera module 302 corresponds to the position of the camera decoration piece 301.

[0081] In the present embodiment, by providing the circuit board 100 with the third frame plate layer 4 and the second sub-board layer 7, the layout area of the circuit board 100 is increased. At the same time, at least part of the third frame plate layer 4, the second sub-board layer 7 of the circuit board 100, and the second device 9 disposed on the second sub-board layer 7 are located in the internal space of the camera decoration piece 301, so that the internal space of the electronic device can be fully utilized, and the waste of the internal space of the electronic device is avoided.

[0082] The above description is only the preferred embodiment of the present application, but the protection scope of the present application is not limited to this. Any changes or replacements within the technical scope disclosed in the present application can be easily thought of by those skilled in the art, and should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A circuit board used in electronic devices, characterized in that, include: The motherboard layer has a cutout area, a first layout area and a second layout area, with the first layout area and the second layout area located on opposite sides of the cutout area; A first frame plate layer, a wiring layer, and a second frame plate layer are stacked at intervals in the first layout area; The first sub-board layer is stacked on the side of the first frame plate layer facing away from the main board layer; A first device, wherein the first device is disposed on the motherboard layer; as well as A second device is disposed on the first sub-board layer; The wiring layer is located between the first frame plate layer and the second frame plate layer. The wiring layer extends from the first layout area to the second layout area. The thickness of the wiring layer is less than the thickness of the first frame plate layer and the second frame plate layer. The first sub-board layer is stacked on the side of the first frame plate layer away from the main board layer and extends to the second frame plate layer.

2. The circuit board according to claim 1, characterized in that, The first frame plate layer and the second frame plate layer have the same thickness.

3. The circuit board according to claim 1, characterized in that, The first frame plate layer has a ring structure.

4. The circuit board according to any one of claims 1 to 3, characterized in that, The circuit board further includes a third frame board layer and a second sub-board layer. The third frame board layer is stacked on the side of the first sub-board layer opposite to the first frame board layer, and the second sub-board layer is stacked on the side of the third frame board layer opposite to the first sub-board layer. The second sub-board layer is provided with at least one second device.

5. The circuit board according to claim 4, characterized in that, The third frame plate layer has a ring structure.

6. The circuit board according to claim 1, characterized in that, The first sub-board layer includes a first part and a second part. The first part is stacked on the side of the first frame board layer facing away from the main board layer, and the second part is stacked on the side of the second frame board layer facing away from the main board layer. The first part and the second part are each provided with at least one second device.

7. The circuit board according to claim 6, characterized in that, The circuit board further includes a third frame board layer and a second sub-board layer. The third frame board layer is stacked on the side of the first portion opposite to the first frame board layer, and the second sub-board layer is stacked on the side of the third frame board layer opposite to the first portion. The second sub-board layer is also provided with at least one second device.

8. The circuit board according to claim 1, characterized in that, The first device includes at least one of a system-on-a-chip, a general-purpose flash memory chip, a power management unit, a fast charging chip, an audio codec chip, an audio amplifier, a screen driver chip, a board-to-board connector, a resistor, a capacitor, and an inductor; the second device includes at least one of a radio frequency transceiver, a power amplifier, a low-noise amplifier, a combiner switch, a filter, a duplexer, a wire-opening switch, and a wire-opening spring.

9. An electronic device, characterized in that, include: Camera components; The outer casing surrounds and forms a receiving cavity; The circuit board is disposed within the receiving cavity, and the circuit board includes a main board layer, a first frame board layer, a first sub-board layer, a wiring layer, a second frame board layer, a first device, and a second device. The main board layer has a cutout area, a first layout area, and a second layout area, with the first layout area and the second layout area located on opposite sides of the cutout area. The camera assembly is mounted in the cutout area. The first frame plate layer, the second frame plate layer, and the wiring layer are stacked at intervals in the first layout area. The first sub-board layer is stacked on the side of the first frame plate layer facing away from the main board layer. The first device is disposed on the main board layer, the second device is disposed on the first sub-board layer, the wiring layer is located between the first frame plate layer and the second frame plate layer, the wiring layer extends from the first layout area to the second layout area, and the thickness of the wiring layer is less than the thickness of the first frame plate layer and the second frame plate layer. The first sub-board layer is stacked on the first frame plate layer and extends to the second frame plate layer.

10. The electronic device according to claim 9, characterized in that, The housing is provided with a light-transmitting hole, and the camera assembly is opposite to the light-transmitting hole.

11. The electronic device according to claim 10, characterized in that, The first sub-board layer includes a first part and a second part. The first part is stacked on the side of the first frame board layer facing away from the main board layer, and the second part is stacked on the side of the second frame board layer facing away from the main board layer. The first part and the second part are each provided with at least one second device.

12. The electronic device according to claim 10 or 11, characterized in that, The circuit board further includes a third frame board layer and a second sub-board layer. The third frame board layer is stacked on the side of the first sub-board layer opposite to the first frame board layer, and the second sub-board layer is stacked on the side of the third frame board layer opposite to the first sub-board layer. The second sub-board layer is provided with at least one second device.

13. The electronic device according to claim 12, characterized in that, The camera assembly includes a camera decorative element and a camera module. The camera decorative element is mounted on the light-transmitting hole, and the camera module is mounted on the hollowed-out area. The position of the camera module corresponds to the position of the camera decorative element. At least a portion of the third frame plate layer, the second sub-plate layer, and the second device disposed on the second sub-plate layer are located in the internal space of the camera decorative element.

Citation Information

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