A kind of on-board computable storage system and electronic equipment based on storage-computing integrated acceleration

Abstract

The present disclosure provides a satellite-borne computable storage system and electronic equipment based on storage-computing integrated acceleration, which comprises: a computable storage controller configured to transmit satellite-borne remote sensing data to a storage-computing integrated accelerator, receive a feature label corresponding to the satellite-borne remote sensing data fed back by the storage-computing integrated accelerator, and organize the satellite-borne remote sensing data and the corresponding feature label into an object in an object-oriented management manner to realize storage control; the storage-computing integrated accelerator is configured to extract features of the satellite-borne remote sensing data to obtain the feature label corresponding to the satellite-borne remote sensing data; and a ZNS solid state disk is configured to perform feature label-based partition storage on the object under the control of the computable storage controller. The present disclosure realizes data storage based on feature label extraction, effectively shortens the data processing path to reduce data transmission power consumption, and improves the energy efficiency of neural network calculation through the storage-computing integrated accelerator, which provides the possibility for improving computing power.

Description

Technical Field

[0001] This disclosure relates to the field of on-orbit real-time processing technology of remote sensing images, and in particular to a spaceborne computing storage system and electronic device based on in-memory computing acceleration. Background Technology

[0002] Remote sensing image data is data recorded sequentially by remote sensing cameras. With the development of satellite remote sensing technology and the implementation of satellite networking projects, the requirements for real-time data processing from satellites have increased. In recent years, the interface speed of remote sensing camera data has improved significantly. Typical high-speed interfaces or fiber optic cables can reach speeds of 9Gbps, and even faster acquisition speeds can reach 10-100Gbps. In some application scenarios, due to orbital limitations preventing real-time communication with the ground, or due to the limited processing capabilities of the satellite, remote sensing data needs to be stored on solid-state drives for later processing during satellite idle time, or transmitted back to the ground during satellite transit for detailed analysis. This results in a relatively long information delay. On-orbit computing aims to improve real-time performance, therefore the accuracy requirements are much lower than for ground-based computing. However, remote sensing image data, compared to other small-scale time-series data, is characterized by its large data volume and high bandwidth, increasing the difficulty of real-time processing.

[0003] Figure 1 This illustrates traditional satellite data processing methods and workflows. In traditional satellite image processing systems, data processing is divided into two paths: one path transmits data back to the ground via satellite communication, and the other path writes it to a solid-state drive (SSD) via storage control. Simultaneously, data is read from the SSD via a cross-connect interface and sent to a central computer or dedicated data processing module for processing. Data processing modules typically consist of multiple computing boards, such as FPGAs. This board stacking leads to significant power consumption, especially for general-purpose computing boards like FPGAs. The write amplification problem of traditional storage architectures severely impacts system power consumption and the lifespan of SSDs. However, the lifespan of SSD devices has a significant impact on the service life of satellite equipment.

[0004] The storage system, acting as the data center for these satellites, is responsible for storing and transmitting payload data. Currently, traditional flash-based SSDs present various problems, including high garbage collection costs, significant overhead associated with over-provisioning space, high tail latency, and increased write amplification. Remote sensing image data is characterized by wide coverage, high resolution, and high bandwidth. With advancements in artificial intelligence (AI), significant research results have been achieved in remote sensing image processing, particularly in target extraction and localization using deep neural network (DNN) models. FPGA- or CPU-based neural network accelerators are commonly used to implement AI computations. However, these traditional von Neumann computing architectures lead to high power consumption and low energy efficiency when handling intensive DNN computations. On the other hand, embedding AI computations into computing storage faces hardware resource constraints. Summary of the Invention

[0005] The purpose of this disclosure is to provide a spaceborne computing storage system and electronic device based on in-memory computing acceleration, in order to solve the problems of high power consumption, short lifespan of storage devices, and low data storage and transmission efficiency in the prior art for remote sensing satellite data transmission.

[0006] The embodiments of this disclosure adopt the following technical solution: a spaceborne computational storage system based on in-memory computing acceleration, comprising: a computational storage controller, an in-memory computing accelerator, and a ZNS solid-state drive; wherein, the computational storage controller is used to transmit spaceborne remote sensing data to the in-memory computing accelerator, and receive feature tags corresponding to the spaceborne remote sensing data fed back by the in-memory computing accelerator, and simultaneously adopts an object-oriented management method to organize the spaceborne remote sensing data and its corresponding feature tags into objects to achieve storage control; the in-memory computing accelerator is used to extract features from the spaceborne remote sensing data to obtain feature tags corresponding to the spaceborne remote sensing data; the ZNS solid-state drive is used to perform partitioned storage of the objects based on the feature tags under the control of the computational storage controller.

[0007] This disclosure provides an electronic device, including at least the onboard compute-accelerated storage system based on in-memory computing as described above.

[0008] The beneficial effects of the embodiments disclosed herein are as follows: by utilizing a spaceborne computing storage system based on in-memory computing acceleration, the storage of spaceborne remote sensing data extracted based on feature tags is realized, effectively shortening the data processing path and thus reducing data transmission power consumption. Furthermore, the in-memory computing accelerator improves the energy efficiency of neural network computing, providing the possibility for increasing computing power. At the same time, combined with the partitioning and sequential write characteristics of ZNS solid-state drives, the write amplification problem of storage is effectively solved, improving data transmission bandwidth and lifespan. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in one or more embodiments of this specification or in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This refers to traditional satellite data processing methods and workflows.

[0011] Figure 2 For traditional computing and storage architecture;

[0012] Figure 3 This is a schematic diagram of the structure of the spaceborne computable storage system based on in-memory computing acceleration in the first embodiment of this disclosure;

[0013] Figure 4 This is a schematic diagram of the hardware architecture of the spaceborne compute-accelerated in-memory computing system in the first embodiment of this disclosure.

[0014] Figure 5 This is a schematic diagram of the software architecture of the spaceborne computable storage system based on in-memory computing acceleration in the first embodiment of this disclosure.

[0015] Figure 6 This is a schematic diagram illustrating the data writing process of the computable storage system in the first embodiment of this disclosure;

[0016] Figure 7 This is a schematic diagram illustrating the data reading process of the computable storage system in the first embodiment of this disclosure;

[0017] Figure 8 This is a schematic diagram of the in-memory computing accelerator circuit in the first embodiment of this disclosure;

[0018] Figure 9 This is a schematic diagram of the in-situ accumulator adder circuit in the first embodiment of this disclosure;

[0019] Figure 10 This is a schematic diagram illustrating the design and operation flow of the accelerator instruction set in the first embodiment of this disclosure;

[0020] Figure 11 This is a schematic diagram of the pipelined multiply-accumulate operation process of the CIM accelerator in the first embodiment of this disclosure. Detailed Implementation

[0021] To enable those skilled in the art to better understand the technical solutions in one or more embodiments of this specification, the technical solutions in one or more embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, and not all of the embodiments. Based on one or more embodiments of this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of this document.

[0022] Remote sensing image data is data recorded sequentially by remote sensing cameras. With the development of satellite remote sensing technology and the implementation of satellite networking projects, the requirements for real-time data processing from satellites have increased. In recent years, the interface speed of remote sensing camera data has improved significantly. Typical high-speed interfaces or fiber optic cables can reach speeds of 9Gbps, and even faster acquisition speeds can reach 10-100Gbps. In some application scenarios, due to orbital limitations preventing real-time communication with the ground, or due to the limited processing capabilities of the satellite, remote sensing data needs to be stored on solid-state drives for later processing during satellite idle time, or transmitted back to the ground during satellite transit for detailed analysis. This results in a relatively long information delay. On-orbit computing aims to improve real-time performance, therefore the accuracy requirements are much lower than for ground-based computing. However, remote sensing image data, compared to other small-scale time-series data, is characterized by its large data volume and high bandwidth, increasing the difficulty of real-time processing.

[0023] Figure 1 This illustrates traditional satellite data processing methods and workflows. In traditional satellite image processing systems, data processing is divided into two paths: one path transmits data back to the ground via satellite communication, and the other path writes it to a solid-state drive (SSD) via storage control. Simultaneously, data is read from the SSD via a cross-connect interface and sent to a central computer or dedicated data processing module for processing. Data processing modules typically consist of multiple computing boards, such as FPGAs. This board stacking leads to significant power consumption, especially for general-purpose computing boards like FPGAs. The write amplification problem of traditional storage architectures severely impacts system power consumption and the lifespan of SSDs. However, the lifespan of SSD devices has a significant impact on the service life of satellite equipment.

[0024] The storage system, acting as the data center for these satellites, is responsible for storing and transmitting payload data. Currently, traditional flash-based SSDs present various problems, including high garbage collection costs, significant overhead associated with over-provisioning space, high tail latency, and increased write amplification. Remote sensing image data is characterized by wide coverage, high resolution, and high bandwidth. With advancements in artificial intelligence (AI), significant research results have been achieved in remote sensing image processing, particularly in target extraction and localization using deep neural network (DNN) models. FPGA- or CPU-based neural network accelerators are commonly used to implement AI computations. However, these traditional von Neumann computing architectures lead to high power consumption and low energy efficiency when handling intensive DNN computations. On the other hand, embedding AI computations into computing storage faces hardware resource constraints.

[0025] Inspired by the concept of near-data computing, compute storage reduces power consumption by embedding computing circuitry within SSDs, thereby effectively shortening data transfer paths. As SSD performance continues to improve, research into compute storage architectures is also increasing, such as... Figure 2 As shown. Host-based architecture ( Figure 2 The right-hand side architecture directly manages NAND flash memory via the CPU, offering high flexibility but placing a heavy burden on the host and exhibiting poor compatibility; device-based architectures ( Figure 2 A mid-level architecture (or similar architecture) bypasses the SSD for data processing, which can reduce the burden on the host, but still lacks visibility into the storage's flash memory layer (FTL); an SSD-based architecture (... Figure 2 The left-hand side architecture embeds computing units within the SSD, but its computing power is limited due to constraints in internal hardware resources. These traditional computing storage devices face power consumption challenges when performing AI calculations due to the storage wall bottleneck.

[0026] To address the aforementioned problems, the first embodiment of this disclosure provides a spaceborne compute-enabled storage system based on in-memory computing acceleration, the structural schematic of which is shown below. Figure 3As shown, the system mainly includes a Computable Storage Controller (CSD), a Computing-In-Memory (CIM) accelerator, and a ZNS Solid State Drive (ZNS SSD). It utilizes the ZNS SSD as the data storage device on the terminal side and achieves high-efficiency neural network computing through the computing-in-memory (CIM). This system architecture achieves coordinated optimization of storage management and computing acceleration within its computing and storage framework. Specifically, the CSD controller is mainly used to transmit spaceborne remote sensing data to the CIM accelerator and receive feature tags corresponding to the spaceborne remote sensing data from the CIM accelerator. It also employs an object-oriented management approach to organize the spaceborne remote sensing data and its corresponding feature tags into objects for storage control. The CIM accelerator is mainly used to extract features from the spaceborne remote sensing data to obtain the corresponding feature tags. The ZNS SSD is mainly used for feature tag-based partitioned storage of objects under the control of the Computable Storage Controller. It should be noted that the host mentioned in this embodiment mainly refers to the application terminal that communicates with the onboard computing storage system and is used to initiate data write or read requests to it. It can be the acquisition device in the onboard equipment used for remote sensing data acquisition and the control terminal that communicates with the ground to obtain specific data requests from the ground.

[0027] Specifically, the Partition Namespace (ZNS) storage protocol is a new standardized storage protocol. Compared with standard SSDs, the ZNS protocol redefines the function of SSDs and provides a simplified and transparent partition management interface for upper-layer applications. At the same time, it restricts the order in which data is written. For data with strong time-series characteristics, such as remote sensing satellite data, the design and implementation of ZNS solid-state drives can better solve the write amplification problem in traditional file systems, improve storage bandwidth and reduce power consumption. At the same time, it can utilize the time-series characteristics of data to build time-based indexes, effectively improving the performance of data query and read.

[0028] Figure 4This is a schematic diagram of the hardware architecture of the onboard compute-accelerated storage system based on in-memory computing in this embodiment. The CIM accelerator and ZNS SSD are independently configured, while the CSD controller can be designed and implemented based on a Xilinx FPGA. Specifically, the FPGA includes at least a bare-metal operating system, a Linux operating system, a PCIe interface, a buffer, and direct memory accessors (DRAM). The FPGA communicates with the host via the PCIe interface through NVMe IP. The hardware NVMe IP core runs on an AXI bus bridge, and data transmission does not require CPU involvement. The FPGA and SSD interact via the PCIe interface and are connected to the CIM accelerator via general purpose input / output (GPIO). This embodiment's compute-accelerated storage system can accommodate up to three partitioned namespace SSDs to meet bandwidth requirements. It should be noted that the bare-metal operating system in this embodiment has higher execution efficiency and is mainly used for handling high-speed data transmission to the host, while the Linux operating system is more versatile and facilitates the development of user applications on it.

[0029] Figure 5 This diagram illustrates the software architecture of the onboard compute-accelerated storage system based on in-memory computing in this embodiment. To achieve unified management of data computation and storage, this embodiment constructs an object-oriented operating system (Object-OS) within the CSD controller. This operating system manages computation and storage tasks in a unified manner as objects. Unlike traditional file systems and block storage, the object-oriented operating system manages data as objects. Each object has a unique identifier, along with associated metadata and data content. This design enables the system to flexibly store and retrieve large numbers of objects without the need for traditional hierarchical directories.

[0030] For details, please refer to the following: Figure 5The CSD controller is based on an NVMe driver, and data transmission does not require kernel intervention. The operating system comprises a file system layer (Object-FS) and a flash translation layer (Object-FTL). Object-FS converts received data storage or read requests into object write or read operations, attaches object operation attributes, and then sends the object write or read operations to the flash translation layer. Object-FTL parses the object write or read operations to generate storage space information or partition operation requests for the ZNS SSD, enabling write or read control of the ZNS SSD. Based on this software architecture, the object-oriented operating system achieves unified management of data computation and storage. It provides efficient storage and retrieval mechanisms, allowing the system to work together better and providing higher efficiency and flexibility for data processing and computation.

[0031] Corresponding to the ZNS SSD design in this embodiment, the CSD controller's storage engine introduces file streams. For data with different feature tags, multiple file streams are defined. The concept of file streams is introduced to allow files with different feature tags to share a single open partition, but only one file can be written to per file stream at any given time. In some embodiments, the ZNS SSD provides eight partitions simultaneously, thus limiting the number of files that can be written to at any one time to eight or less. Simultaneously, the ZNS SSD can use its partition management to provide feedback to the CSD controller on data lifecycle and the status information of each partition, enabling the controller to perform targeted data merging and deletion operations, reducing garbage collection.

[0032] Figure 6This is a schematic diagram illustrating the data writing process of the computeable storage system in this embodiment when it receives a data storage request. Specifically, upon receiving a data storage request (Rquest) from the host, Object-FS calls the write function to write the satellite remote sensing data to be stored into the buffer. When the buffer is full, the data cached in the buffer is aggregated into objects, and after allocating source data to them, the objects are transferred to Object-FTL. The metadata includes at least the object ID, the offset within the object, the object length readback data, and the feature tag of the satellite remote sensing data to be stored. Object-FTL aggregates objects with the same feature tag into partition paging entries and sends them to ZNS SSD to store them in the same partition, modifying the metadata during the writing process. When a file reaches a certain length threshold, the file is closed, and the file metadata is appended to the end of the file. The file size threshold is aligned with the current open partition size as much as possible. If the remaining size of the current open partition is <128KB after closing the file, it is padded with 0; otherwise, it is allocated to the next object file. It is important to note that this embodiment defines two partition types for data storage: a log zone (Meta-Zone) and a data zone (IO-Zone). The log zone manages the file system's metadata, including information such as maintaining file system consistency and configuration in case of anomalies. The data zone primarily stores data files. The write process also includes sending a "Done" notification to the host and the ZNS SSD sending its address to Object-FTL; these are standard responses and will not be described in detail.

[0033] Corresponding to data storage, this embodiment indexes data according to time slices, such as... Figure 7As shown, firstly, based on the data recording rate and storage capacity, the time required to write a full round of data can be calculated. The time-slice interval is determined based on the index item size. File descriptors are organized into a linked list in chronological order to allow the application layer to query data by time. The time-series file system can also query specific data through the file descriptor linked list of the corresponding channel / load / device, and query data with specified content within the time-series file using a Bloom filter. When a data read request is received from the host, a search is first performed based on the time-slice information to find the time-series file descriptors within the specified time period. Then, based on the index information corresponding to the file descriptors, the storage partitions corresponding to all objects with time-slice information can be determined. Data that meets the requirements is combined into a set and returned to the application layer. Furthermore, this embodiment can combine data feature tags for further data query and retrieval, achieving rapid data location and reading. That is, after determining the storage partitions corresponding to all objects with time-slice information, the feature tags of the data to be read are converted into feature IDs. The feature IDs are retrieved in the index corresponding to the storage partitions to locate and read the data, effectively improving reading efficiency and avoiding reading useless data.

[0034] The design of a CIM accelerator can be implemented using conventional devices with in-memory computing capabilities, or it can be implemented using... Figure 8 The in-memory computing accelerator circuit shown is implemented accordingly. Specifically, the in-memory computing accelerator in this embodiment includes at least: a NOR Flash-based in-memory computing array, a shifter, an in-situ accumulator adder, an array driver circuit, and a control unit. The NOR Flash-based in-memory computing array may include multiple Flash arrays, such as eight arrays from Flash array0 to Flash array7, arranged as follows... Figure 8 The array is arranged as shown. The array driver circuit (Memory / CIM driver) serves as the driver circuit for both the storage array and the in-memory computing. It uses a multiplexer (MUX) to multiplex the word lines (WL) and connects them to the Flash array. The output of the Flash array uses a multiplexer (MUX) to multiplex the bit lines (BL) and connects them to the in-situ accumulator adder. The in-situ accumulator adder includes an in-situ accumulator circuit (Accumulator) and a summation circuit (Summation). The in-situ accumulator circuit is used to perform independent local accumulation and sparse processing on each channel, and the summation circuit is used to perform global summation.

[0035] Specifically, the in-situ accumulation circuit works in conjunction with the continuous read mode of the sensitive amplifier to perform self-accumulation operations on each channel and pass the accumulated result to the upper-level summing circuit. The summing circuit is time-division multiplexed by multiple output channels. During the accumulation process, the summing circuit is idle; after accumulation, the summing circuit only needs to perform one summation operation. For example, for a multiplication-accumulation operation of a 3×3 convolution kernel, the accumulation circuit needs to perform 9 calculations, while the summing circuit only needs to work once. If the number of input channels is greater than 8, according to the columnar weight mapping method, the weights of multiple input channels are deployed on a single BL. This increases the in-situ calculation time on a single BL, thereby increasing the idle time of the summing circuit and further reducing the power consumption of the circuit.

[0036] To further optimize the performance of the adder tree, in some embodiments, the in-situ accumulator adder can be further optimized. For example... Figure 9 As shown, the circuit consists of three parts: a 3-2 carry-save adder (CSA) circuit, a 2-1 carry-lookahead adder (CLA) circuit, and a register. The carry-save adder is a parallel adder that groups each bit of the two addends, passes the carry from the least significant bit to the most significant bit, and retains the carry in each group. The carry-lookahead adder is a serial adder that pre-calculates the carry for each bit and passes it from the least significant bit to the most significant bit. The CLA, through the use of logic gates and multi-level cascaded structures, can perform high-speed addition operations without waiting for the carry to be passed. The carry-save adder is suitable for large-scale addition operations, enabling high-speed addition, but requires additional hardware to store and pass the carry. The carry-lookahead adder is suitable for low-power and low-latency applications, with lower latency and smaller area, but its circuit complexity increases with a large number of input bits. In this work, the CLA is used as the last level of the adder tree, and the other parts use CSA. For the accumulator section, a latch, which saves more space and consumes less power, is used instead of a register.

[0037] To ensure compatibility with neural network models of different structures, this embodiment proposes an address-based accelerator instruction set. The CSD controller writes neural network configuration information and weight parameters to the in-memory computing array of the in-memory computing accelerator through the accelerator instruction set, enabling the implementation of different neural network models. Specifically, Figure 10 The diagram illustrates the design and operation flow of the accelerator instruction set. This instruction set defines a 14-byte instruction code stored in the network information storage area. The instruction ID code indicates the operation type; here, it represents only one convolution operation. Following the ID code is the size of the input feature map (C). i Hi W i ) and the weight parameters (H) of a certain layer of the neural network f W f C o In this diagram, S represents the convolution stride, and Head Addr represents the address of the current operation's storage array, i.e., the address of the weight parameters. The operation codes for other layers are arranged sequentially in the network information storage area using the same instruction format. By rewriting the instruction set, the transition mode of the accelerator's main state machine can be reconfigured, thus ensuring compatibility with different neural network architectures.

[0038] The accelerator's workflow consists of four steps: writing neural network configuration information, writing weight data, writing input feature data to an external cache, and enabling neural network computation. The weight addresses of each layer in the neural network are specified by the `HeadAdd` variable. Offline, the neural network weight data is mapped to the various MCB arrays in the in-memory computing storage space, and the instruction code for each layer is written to the network information storage area. During computation, input data is sent to the input buffer via the I / O interface, and the top-level controller sequentially reads the instruction code for each layer according to the address order in the network information storage area. This method, by rewriting the instruction code, enables the accelerator to process multiple neural models and saves the cost of additional off-chip non-volatile memory and external controllers.

[0039] Figure 11 This illustration demonstrates the pipelined multiply-accumulate operation flow of the CIM accelerator in this embodiment. Taking the calculation of a 3×3 convolution kernel as an example, in the SRAM Read (RS) stage, the CIM control loads the input feature data from the external SRAM buffer and selectively enables the word lines and shift control circuits of the storage array according to the input data. In the Array Read (RA) stage, the corresponding word line WL is enabled, and the weight data is read through the sensitive amplifier. In the Shifting weight (Shift) stage, the shifter selects whether to shift according to the input. In the Accumulation (ACC) stage, the accumulator adds the result of the previous cycle to the current shifter output. Because one storage array read operation may correspond to multiple shifts, the shift-accumulate operation may be repeated. When the nine parameters of the convolution kernel are calculated, a summation (SUM) operation is performed to sum the calculation results of different input channels.

[0040] This embodiment utilizes a spaceborne computeable storage system based on in-memory computing acceleration to store spaceborne remote sensing data extracted based on feature tags. This effectively shortens the data processing path, thereby reducing data transmission power consumption. Furthermore, the in-memory computing accelerator improves the energy efficiency of neural network computing, making it possible to increase computing power. At the same time, combined with the partitioning and sequential write characteristics of ZNS solid-state drives, the write amplification problem of storage is effectively solved, improving data transmission bandwidth and lifespan.

[0041] Based on the same inventive concept, the second embodiment of this disclosure provides an electronic device, which includes at least the spaceborne computing storage system based on in-memory computing acceleration provided in the first embodiment of this disclosure. It works in conjunction with other spaceborne equipment such as remote sensing data acquisition systems and communication systems of remote sensing satellites to optimize and improve the spaceborne equipment system, thereby achieving the goal of increasing the computing power and service life of the spaceborne equipment.

[0042] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A spaceborne computational storage system based on in-memory computing acceleration, characterized in that, include: It can compute storage controller, in-memory computing accelerator and ZNS solid-state drive; among them, The computable storage controller is used to transmit spaceborne remote sensing data to the in-memory computing accelerator and receive the feature tags corresponding to the spaceborne remote sensing data fed back by the in-memory computing accelerator. At the same time, it adopts an object-oriented management method to organize the spaceborne remote sensing data and its corresponding feature tags into objects to achieve storage control. The in-memory computing accelerator is used to extract features from the spaceborne remote sensing data to obtain feature labels corresponding to the spaceborne remote sensing data; wherein, the in-memory computing accelerator includes at least: an in-memory computing array based on NOR Flash, a shifter, an in-situ accumulator adder, an array driving circuit, and a control unit; the in-situ accumulator adder includes at least an in-situ accumulation circuit and a summing circuit, wherein the in-situ accumulation circuit is used to perform independent in-situ accumulation and sparse processing for each channel, and the summing circuit is used to perform global summation; The ZNS solid-state drive is used to perform partitioned storage of the object based on the feature tags under the control of the computable storage controller.

2. The spaceborne computable storage system according to claim 1, characterized in that, The computable memory controller includes at least a field-programmable gate array (FPGA), and the FPGA includes at least the following: The system includes a bare-metal operating system, a Linux operating system, a PCIe interface, a cache, and a direct memory accessor; wherein the cache is connected to the in-memory computing accelerator via a general-purpose input / output port, and the bare-metal operating system is connected to the ZNS solid-state drive via the PCIe interface.

3. The spaceborne computable storage system according to claim 1, characterized in that, The computable storage controller includes at least a file system layer and a flash translation layer; wherein... The file system layer is used to convert a data storage request or a data read request into an object write operation or an object read operation upon receiving the data storage request or data read request, and then send the object write operation or the object read operation to the flash conversion layer after attaching the object operation attributes. The flash memory translation layer is used to parse the object write operation or the object read operation to form the storage space status or partition operation request for the ZNS solid-state drive, so as to realize the control of writing or reading to the ZNS solid-state drive.

4. The spaceborne computational storage system according to claim 3, characterized in that, The computing and storage controller is specifically used for: Upon receiving a data storage request, the file system layer calls a write function to write the spaceborne remote sensing data to be stored into a cache. When the cache is full, the data cached in the cache is aggregated into an object, and metadata is allocated to the object before the object is sent to the flash conversion layer. The metadata includes at least the object ID, the offset within the object, the object length readback data, and the feature tag of the spaceborne remote sensing data to be stored. The flash conversion layer writes objects with the same characteristic tags to the same partition of the ZNS solid-state drive.

5. The spaceborne computational storage system according to claim 3, characterized in that, The computing and storage controller is specifically used for: Upon receiving a data read request, the file system layer queries the linked list for the file descriptor corresponding to the time slice information of the data to be read, and determines the storage partition corresponding to all objects with the time slice information based on the file descriptor; the feature tag of the data to be read is converted into a feature ID, and the feature ID is retrieved in the index corresponding to the storage partition to realize the location and reading of the data to be read.

6. The spaceborne computable storage system according to claim 1, characterized in that, The computing storage controller is also used for: The neural network configuration information and weight parameters are written to the in-memory array of the in-memory accelerator via the accelerator instruction set.

7. The spaceborne computational storage system according to claim 6, characterized in that, The accelerator instruction set includes at least: The instruction ID code used to indicate the type of operation, the size of the input feature map, the weight parameters in the neural network layer, the convolution stride, and the address of the weight parameters.

8. An electronic device, characterized in that, It includes at least the onboard computable storage system based on in-memory computing acceleration as described in any one of claims 1 to 7.

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