A test method, a test module and a preparation method thereof

Abstract

The present invention discloses a test method, a test module, and a preparation method thereof, for testing the bonding strength between resin and copper layers in a PCB board. The preparation method comprises: providing a multilayer board; the multilayer board includes a circuit area and a non-circuit area; drilling and electroplating the circuit area, and then forming grooves in the non-circuit area; plugging the holes with resin, and filling the grooves with resin; curing and leveling the resin; forming a copper layer in the circuit area and the non-circuit area; patterning the copper layer to form a conductive structure on the surface of the resin in the circuit area and a test structure on the surface of the resin in the non-circuit area; performing surface treatment on the circuit area and the non-circuit area; cutting the multilayer board so that the multilayer board in the circuit area forms a PCB board, and the multilayer board in the non-circuit area forms a test module. Using the above technical solution, a dedicated test module can be prepared for processing with the PCB board to retroactively monitor the bonding strength between the solder pad and the resin at the solder pad position.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a testing method, a testing module and a preparation method thereof. Background Art

[0002] In the PCB manufacturing process, the Plated On Filled Via (POFV) process is often used. This involves plugging already-plated holes with resin. After plugging, the surface is ground and polished to level them. Then, capping is performed on the holes using electroplating. Finally, an etching process forms pads on the holes to reduce the spacing between holes, enabling PCBs to move toward high-density wiring and increasing wiring density. Because the pads are located directly on the holes, there is a large area of ​​contact between the pads and the resin plugging the holes. Therefore, monitoring the interfacial bonding strength between the copper and resin surfaces at the pad locations is crucial. Poor bonding strength can cause pads to fall off during assembly.

[0003] In the existing technology, aging tests or resin surface tensile tests are usually used. Aging tests are sampling inspections, and it is impossible to test every PCB board. The coverage rate is low, and there are only two results: qualified and unqualified. The results cannot be quantified, which is not conducive to failure analysis. The resin surface tensile test is performed by the resin supplier and cannot achieve the purpose of testing the bonding strength between the resin surface and the copper surface of the PCB board.

[0004] In summary, it is urgent to propose a dedicated testing module for use in PCB board processing to trace and monitor the bonding force between the pad and the resin at the pad position. Summary of the Invention

[0005] The present invention provides a testing method, a testing module and a preparation method thereof, so as to monitor the bonding force between a resin and a copper layer in a PCB board.

[0006] According to one aspect of the present invention, a method for preparing a test module is provided. The test module is used to test the bonding strength between a resin and a copper layer in a PCB board. The method comprises:

[0007] Providing a laminated multilayer board; the multilayer board includes a circuit area and a non-circuit area;

[0008] Drilling and electroplating are performed in the circuit area, and then grooves are formed in the non-circuit area;

[0009] Performing resin plugging to fill the groove with the resin;

[0010] curing and leveling the resin;

[0011] forming a copper layer in the circuit area and the non-circuit area;

[0012] Patterning the copper layer to form a conductive structure on the surface of the resin in the circuit area, and forming a test structure on the surface of the resin in the non-circuit area;

[0013] performing surface treatment on the circuit area and the non-circuit area;

[0014] After surface treatment is performed on the circuit area and the non-circuit area, the multilayer board is cut so that the multilayer board located in the circuit area forms the PCB board, and the multilayer board located in the non-circuit area forms the test module.

[0015] Optionally, the non-circuit area includes a first dimension along a first direction and a second dimension along a second direction; the first direction and the second direction are parallel to the plane where the multilayer board is located, and the first direction and the second direction intersect;

[0016] Wherein, the first size is greater than or equal to 25 mm; the second size is greater than or equal to 55 mm.

[0017] Optionally, the groove includes a third dimension along the first direction and a fourth dimension along the second direction;

[0018] The third dimension is greater than or equal to 19.746 mm and less than or equal to 20.254 mm; the fourth dimension is greater than or equal to 39.746 mm and less than or equal to 40.254 mm.

[0019] Optionally, the test structure includes a fifth dimension along the first direction and a sixth dimension along the second direction;

[0020] Among them, the fifth dimension is greater than or equal to 2.921 mm and less than or equal to 3.429 mm; the sixth dimension is greater than or equal to 40 mm.

[0021] Optionally, the depth of the groove is greater than or equal to 0.073 mm and less than or equal to 0.327 mm.

[0022] Optionally, the thickness of the test structure is greater than or equal to 25 μm.

[0023] Optionally, performing surface treatment on the circuit area and the non-circuit area includes:

[0024] Performing surface anti-oxidation treatment on the conductive structure and the test structure.

[0025] Optionally, the non-circuit area is located outside the edge of the circuit area.

[0026] According to another aspect of the present invention, a test module is provided, which is prepared using the above-mentioned test module preparation method.

[0027] According to another aspect of the present invention, a testing method is provided for testing the bonding strength between the resin and the copper layer in a PCB board based on the above-mentioned testing module. The testing method comprises:

[0028] The test structure in the test module is pulled up, and the tension data is measured synchronously.

[0029] The technical solution of the present invention provides a circuit area and a non-circuit area on a multilayer board used to form a PCB board. The non-circuit area reserves processing space for the preparation of a test module, so that the test module can be formed simultaneously when the PCB board is processed and formed. A groove is formed in the non-circuit area, and a plugging resin can be deposited in the groove and formed in the same layer simultaneously with the circuit area. The resin and copper layer in the groove can simulate the bonding between the plugging resin and the copper layer in the circuit area. The bonding force between the resin surface and the copper surface in the groove can represent the bonding force between the resin surface and the copper surface of the PCB board, thereby enabling monitoring of the bonding force of each PCB board. Therefore, when a product problem occurs, the quality performance of each PCB board can be accurately traced. In addition, the PCB board and the corresponding test module are independent structures, and the test module can be directly tested using a tensile testing machine. Therefore, the tensile force of the copper foil on the resin surface can be directly quantified, and accurate tensile force data can be obtained, which can effectively evaluate the bonding force between the resin surface and the copper surface of the PCB board. In addition, the preparation of the test module can be achieved using existing traditional equipment, without the need for additional design and construction of equipment, which is conducive to reducing costs and simplifying the preparation process.

[0030] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 1 is a flow chart of a method for preparing a test module provided by an embodiment of the present invention;

[0033] Figure 2 This is a structural diagram of a test module preparation process provided by an embodiment of the present invention;

[0034] Figure 31 is a front view structural diagram of a test module provided by an embodiment of the present invention;

[0035] Figure 4 1 is a schematic diagram of a top view of a test module provided by an embodiment of the present invention;

[0036] Figure 5 It is a flowchart of a testing method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0038] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0039] Figure 1 The present invention provides a flow chart of a method for preparing a test module, wherein the prepared test module is used to test the bonding strength between the resin and the copper layer in the PCB board. Figure 2 is a structural diagram of a preparation process of a test module provided by an embodiment of the present invention, Figure 3 is a front view structural diagram of a test module provided by an embodiment of the present invention, Figure 4 This is a schematic diagram of a top view of a test module provided by an embodiment of the present invention, with reference to Figures 1-4 , the preparation method comprises:

[0040] S1001. Provide a laminated multilayer board.

[0041] Among them, the multilayer board 10 includes a circuit area 101 and a non-circuit area 102. The basic structures of the circuit area 101 and the non-working area 102 are the same, and are both made of the same core board and semi-cured sheets stacked and pressed in the same order. The difference between the circuit area 101 and the non-working area 102 is that during the entire processing process of the multilayer board 10, the circuit area 101 will form conductive connecting traces, pads and other conductive structures that can transmit and process signals, while the non-circuit area 102 will not form conductive connecting traces, pads and other conductive structures. The non-circuit area 102 is the waste area of ​​the multilayer board, which can be processed synchronously with the circuit area 101 without affecting the processing and production of the circuit area 101. The non-circuit area 102 is the processing area of ​​the test module, which is used for the production of the test module.

[0042] Exemplarily, the multilayer board 10 includes multiple circuit areas 101 and multiple non-circuit areas 102 to form multiple PCBs and multiple test modules. Each circuit area 101 corresponds to at least one non-circuit area 102, and the corresponding circuit areas 101 and non-circuit areas 102 are arranged adjacent to each other.

[0043] In an optional embodiment, the non-circuit area 102 is located outside the edge of the circuit area 101 .

[0044] S1002, drilling and electroplating are performed in the circuit area, and then grooves are formed in the non-circuit area.

[0045] For example, a drill can be used to drill the drilling area of ​​the circuit area 101, so that the drill penetrates at least a portion of the core board of the multilayer board 10. In one embodiment, the drill can drill through the multilayer board 10 to form a through hole 20. After removing burrs and smear, copper is deposited and electroplated in the through hole 20. Simultaneously, a copper layer 30 is also electroplated on the surface of the multilayer board 10. Then, a deep blind milling device is used to operate using a depth-controlled method to mill and mill the non-circuit area 102 to form a groove 40.

[0046] It should be noted that the circuit area 101 can also form a blind hole (not shown in the figure) that does not penetrate the multilayer board 10, and the blind hole can also be processed according to the following steps. The embodiment of the present invention does not limit the drilling depth, whether the multilayer board 10 is drilled through, and the type of hole formed. For the sake of convenience, the through hole 20 is used as an example for explanation below.

[0047] S1003, performing resin plugging, and filling the groove with resin.

[0048] For details, please refer to Figure 2 , select the side where the groove 40 is located to perform resin plugging, fill the through hole 20 with resin 50, and at the same time, fill the groove 40 with resin 50.

[0049] S1004, solidify and level the resin.

[0050] Specifically, the side where the groove 40 is located is placed horizontally upward, and the multilayer board 10 is baked in an oven to solidify the resin 50 in the groove 40 and the resin 50 in the through hole 20. Then, the resin 50 protruding from the surface of the multilayer board 10 at the groove 40 and the resin 50 protruding from the surface of the multilayer board 10 at the through hole 20 are ground and leveled using a grinding and polishing device.

[0051] S1005 , forming a copper layer in the circuit area and the non-circuit area.

[0052] For example, electrical degumming equipment or other chemical degumming equipment is first used to remove the dust and glue residue remaining on the surface of the resin 50 in the groove 40 after grinding and the dust and glue residue remaining on the multilayer board 10, and then conventional electroplating equipment is used to complete the cap electroplating copper on the surface of the resin 50 in the groove 40 and the surface of the multilayer board 10 to form a copper layer 60.

[0053] S1006 , patterning the copper layer to form a conductive structure on the surface of the resin in the circuit area, and forming a test structure on the surface of the resin in the non-circuit area.

[0054] For example, a photosensitive dry film (not shown) is applied to the surface of copper layer 60. The dry film is pressed tightly against the surface of copper layer 60 by hot pressing. Irradiated with strong light, causing a portion of the photosensitive dry film to polymerize, transferring the circuit pattern on the film to copper layer 60. A weak alkaline solution is then used to remove the unpolymerized portion of the photosensitive dry film, allowing the desired pattern to be developed and exposing the unnecessary copper layer 60. The exposed copper layer 60 and the underlying copper layer 30 can then be removed using a weak acid solution. Finally, a strong alkaline solution is used to remove the photopolymerized photosensitive dry film. Conductive structures 71 are formed on the surface of resin 50 in through-holes 20 of circuit area 101, and test structures 72 are formed on the surface of resin 50 in recesses 40 of non-circuit area 102. Conductive structures 71 are used to transmit and process signals, and test structures 72 are not connected to conductive structures 71 in circuit area 101.

[0055] S1007. Perform surface treatment on the circuit area and the non-circuit area.

[0056] Exemplarily, the conductive structure 71 in the circuit area 101 and the test structure 72 in the non-circuit area 102 are subjected to surface anti-oxidation treatment. The treatment methods of the two are the same and can be completed in the same process.

[0057] In an optional embodiment, after patterning the copper layer to form a conductive structure on the surface of the resin in the circuit area and forming a test structure on the surface of the resin in the non-circuit area, and before performing surface treatment on the circuit area and the non-circuit area, the preparation method further includes: forming solder resist ink on the surface of the multilayer board 10.

[0058] Specifically, a uniform layer of solder resist ink (not shown in the figure) can be applied to the surface of the multilayer board 10, and then the copper layer 60 to be soldered is exposed through exposure and development. For example, the solder resist ink does not cover the test structure 72 and the conductive structure 71 on the surface of the through hole 20 with a value of 50.

[0059] S1008 , cutting the multilayer board so that the multilayer board located in the circuit area forms a PCB board, and the multilayer board located in the non-circuit area forms a test module.

[0060] For example, a digital machine tool can be used to cut the multilayer board 10, and the circuit area 101 and the non-circuit area 102 can be separated at the same time. The multilayer board 10 located in the circuit area 101 forms a PCB board, and the multilayer board 10 located in the non-circuit area 102 forms a test module. Figure 3 and Figure 4 shown.

[0061] The test module preparation method provided by the embodiment of the present invention provides a circuit area and a non-circuit area on a multilayer board used to form a PCB board. The non-circuit area reserves processing space for the preparation of the test module, so that the test module can be formed simultaneously during the processing and formation of the PCB board. A groove is formed in the non-circuit area, and a plugging resin can be deposited in the groove and formed in the same layer as the circuit area. The resin and copper layer in the groove can simulate the bonding between the plugging resin and the copper layer in the circuit area. The bonding force between the resin surface and the copper surface in the groove can represent the bonding force between the resin surface and the copper surface of the PCB board, thereby enabling the monitoring of the bonding force of each PCB board. Therefore, when a product problem occurs, the quality performance of each PCB board can be accurately traced. In addition, the PCB board and the corresponding test module are independent structures. The test module can be directly tested using a tensile testing machine. Therefore, the copper foil tensile force on the resin surface can be directly quantified, and accurate tensile force data can be obtained, which can effectively evaluate the bonding force between the resin surface and the copper surface of the PCB board. In addition, the test module can be prepared using existing traditional equipment without the need for additional design and construction of equipment, which is conducive to reducing costs and simplifying the preparation process.

[0062] Optional, reference Figure 3 , the depth of the groove is greater than or equal to 0.073 mm and less than or equal to 0.327 mm.

[0063] For example, a groove 40 with a depth of 0.2 mm can be formed in the non-circuit area 101 of the multilayer board 10, with a tolerance within the range of ±5 mil, to avoid the groove 40 being too deep, which makes it difficult to fill the groove 40 with resin 50, and to avoid the groove 40 being too deep, which makes it easy for the resin 50 in the groove 40 to fall off.

[0064] Optional, continue to refer to Figure 3, the thickness H of the test structure 72 on the surface of the resin 50 in the groove 40 is greater than or equal to 25 μm. Generally, the thickness of the conductive structure on the resin surface in the through-hole of the PCB board is greater than or equal to 25 μm. Setting the thickness H of the test structure 72 to be greater than or equal to 25 μm can more accurately represent the bonding strength between the resin surface and the copper surface of the PCB board, thereby improving applicability.

[0065] Optional, reference Figure 4 The non-circuit area 102 includes a first dimension L1 along a first direction X and a second dimension L2 along a second direction Y. The first direction X and the second direction Y are parallel to the plane of the multilayer board 10 and intersect with each other. The first dimension L1 is greater than or equal to 25 mm, and the second dimension L2 is greater than or equal to 55 mm.

[0066] Exemplarily, the first dimension L1 of the non-circuit area 102 is 25 mm, and the second dimension L2 is 55 mm, which reserves sufficient space for preparing the groove 40 .

[0067] Optional, continue to refer to Figure 4 The groove 40 includes a third dimension L3 along the first direction X and a fourth dimension L4 along the second direction Y, wherein the third dimension L3 is greater than or equal to 19.746 mm and less than or equal to 20.254 mm, and the fourth dimension L4 is greater than or equal to 39.746 mm and less than or equal to 40.254 mm.

[0068] Exemplarily, the third dimension L3 of the groove 40 is 20 mm, and the fourth dimension L4 is 40 mm, with a tolerance within 10 mil.

[0069] Optional, continue to refer to Figure 4 The test structure 72 includes a fifth dimension L5 along the first direction X and a sixth dimension L6 along the second direction Y, wherein the fifth dimension L5 is greater than or equal to 2.921 mm and less than or equal to 3.429 mm, and the sixth dimension L6 is greater than or equal to 40 mm.

[0070] For example, the fifth dimension L5 can refer to the standard setting of the tensile testing machine to facilitate subsequent analysis and processing. The sixth dimension L6 is at least 40 mm, which is convenient for tensile testing. In one embodiment, the fifth dimension L5 of the test structure 72 is 1 / 8 inch, approximately 3.175 mm, and the sixth dimension L6 is 40 mm.

[0071] Based on the same inventive concept, the embodiment of the present invention further provides a test module, such as Figure 3 and Figure 4 As shown, it is prepared by the preparation method of the test module described in any embodiment of the present invention.

[0072] The test module provided in the embodiment of the present invention is prepared by the preparation method of the test module provided in any embodiment of the present invention, and has the functional modules and beneficial effects of executing the preparation method of the test module provided in the embodiment of the present invention. The contents not fully described in the embodiment of the test module can refer to the description of the preparation method of the test module above, and will not be repeated here; similarly, the preparation method of the test module provided in the embodiment of the present invention is used to prepare the test module provided in any embodiment of the present invention, and has the corresponding technical features and beneficial effects of the test module. The contents not fully described in the embodiment of the preparation method of the test module can refer to the description of the test module above, and will not be repeated here.

[0073] Based on the same inventive concept, an embodiment of the present invention further provides a testing method, characterized in that the bonding strength between the resin and the copper layer in the PCB board is tested by the test module based on any embodiment of the present invention, and the testing method includes: pulling up the test structure in the test module and synchronously measuring the tension data.

[0074] In an optional embodiment, Figure 5 This is a flow chart of a test method provided by an embodiment of the present invention, refer to Figure 5 , the test methods include:

[0075] S2001. Weld a wire at one end of the test structure of the test module.

[0076] S2002. Connect the tensile testing machine to the tension wire.

[0077] S2003. Control the tensile testing machine to pull the tension wire in a direction perpendicular to the plane where the test structure is located, and record the tension data at the same time.

[0078] For example, the tensile testing machine is controlled to pull the wire in a direction perpendicular to the plane of the test structure until the detached part of the test structure is at 90° to the non-detached part. The test is then completed. The bonding strength between the resin surface and the copper surface can be obtained based on the tensile data recorded by the tensile testing machine and the dimensional information of the test structure.

[0079] The testing method provided by the embodiment of the present invention uses the testing module provided by any embodiment of the present invention, and has the corresponding technical features and beneficial effects of the testing module. For the contents not fully described in the embodiment of the testing method, refer to the description of the testing module above and will not be repeated here. Similarly, the testing module of the embodiment of the present invention also has the functional modules and beneficial effects that can execute the testing method provided by the embodiment of the present invention. For the contents not fully described in the embodiment of the testing module, refer to the description of the testing method above and will not be repeated here.

[0080] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for preparing a test module, characterized in that: The test module is used to test the bonding strength between the resin and the copper layer in the PCB board. The preparation method includes: Providing a laminated multilayer board; the multilayer board includes a circuit area and a non-circuit area; Drilling and electroplating are performed in the circuit area, and then grooves are formed in the non-circuit area; Performing resin plugging to fill the groove with the resin; curing and leveling the resin; forming a copper layer in the circuit area and the non-circuit area; Patterning the copper layer to form a conductive structure on the surface of the resin in the circuit area, and forming a test structure on the surface of the resin in the non-circuit area; performing surface treatment on the circuit area and the non-circuit area; After surface treatment is performed on the circuit area and the non-circuit area, the multilayer board is cut so that the multilayer board located in the circuit area forms the PCB board, and the multilayer board located in the non-circuit area forms the test module.

2. The method for preparing a test module according to claim 1, wherein: The non-circuit area includes a first dimension along a first direction and a second dimension along a second direction; the first direction and the second direction are parallel to the plane where the multilayer board is located, and the first direction and the second direction intersect; Wherein, the first size is greater than or equal to 25 mm; the second size is greater than or equal to 55 mm.

3. The method for preparing a test module according to claim 2, wherein: The groove includes a third dimension along the first direction and a fourth dimension along the second direction; The third dimension is greater than or equal to 19.746 mm and less than or equal to 20.254 mm; the fourth dimension is greater than or equal to 39.746 mm and less than or equal to 40.254 mm.

4. The method for preparing a test module according to claim 2, wherein: The test structure includes a fifth dimension along the first direction and a sixth dimension along the second direction; Among them, the fifth dimension is greater than or equal to 2.921 mm and less than or equal to 3.429 mm; the sixth dimension is greater than or equal to 40 mm.

5. The method for preparing a test module according to claim 1, wherein: The depth of the groove is greater than or equal to 0.073 mm and less than or equal to 0.327 mm.

6. The method for preparing a test module according to claim 1, wherein: The thickness of the test structure is greater than or equal to 25 μm.

7. The method for preparing a test module according to claim 1, wherein: Surface treatment is performed on the circuit area and the non-circuit area, including: Performing surface anti-oxidation treatment on the conductive structure and the test structure.

8. The method for preparing a test module according to claim 1, wherein: The non-circuit area is located outside the edge of the circuit area.

9. A test module, characterized in that: The test module is prepared by the preparation method of any one of claims 1 to 8.

10. A testing method, characterized in that: The bonding strength between the resin and the copper layer in the PCB board is tested based on the test module according to claim 9, and the test method includes: The test structure in the test module is pulled up, and the tension data is measured synchronously.

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